ternary-computing

Compiler for ManiT, a systems language whose native number system is balanced ternary (−1, 0, +1). Two backends: LLVM for native execution today, and T3ISA — a ternary instruction set with assembler and cycle-accurate emulator included.

A translator to translate RV32I to REBEL-6. Includes custom assemblers to output RV32I (and hopefully soon REBEL-6) MRCS-readable object files, and assembly level simulators to simulate RV32I and REBEL-6 assembly code execution

Setun Ternary Computer Simulator

A simple OS for the ternary processor 5500FP and the GargantuRAM development system

This REPO exists to explore the idea of implementing ternary systems to software and hopefully hardware

T81 is the first operating system built for governed, deterministic AI inference — ternary weights, bit-exact reproducibility, pre-side-effect policy enforcement, and immutable content-addressed storage.

JuniorHome —local 1st edge 45W envelope computing home for JuniorCloud LLC. Central hub that orchestrates JuniorStock, JuniorMemSys-Suite, Web3Node, and the full edge-native SDK ecosystem. Runs entirely on Apple Silicon (M4/M1 Metal) with BitNet b1.58 ternary weights, TDA/SVD topological memory, spiking LIF automata, Hyper-Dimensional Computing

A microkernel operating system written entirely in ManiT, the balanced ternary systems language. Trit-addressed memory with trit-trie page tables, three privilege rings one trit deep, photon-schedule capability security. Builds and runs on Linux today.

A complete theoretical framework for ternary computing architecture grounded in a 7+1 dimensional ontological model, Clifford algebra, and Bott periodicity. Binary logic is not a fundamental truth. It is an observational artifact. Prove me wrong.

t81lib – Balanced-ternary quantization and arithmetic core for AI and quant workloads in modern C++ and Python.

Open protocol & Cursor Skill for verifiable AI ID, agent lineage, capability ranking, cross-AI review, anti-Sybil consensus, and append-only final verdicts

[WIP] Hardware and software of DIY analog frontends for PCI-7200 DAQ card, meant to be useful with long-term distros on any PC with available 32-bit PCI slot(s)

A balanced-ternary (-1, 0, +1) digital-logic simulator in pure C# + Avalonia — visual editor with composite chips, save/load and live simulation.

A tactile balanced-ternary calculator and logic console.

Digital logic simulator that supports ternary circuit design. Simulator is event-driven with zero delay and iterates delta cycles until quiescence.

Roofline analysis of BitNet b1.58 2B4T inference across H100, MI300X, Groq LPU, Cerebras WSE-3, and two hypothetical ternary chips. Five phases covering gate counts, precision sweeps, memory bandwidth, hybrid activation Pareto, and prefill regime, plus empirical weight-distribution validation against the published microsoft/bitnet weights.

Sparse 2D balanced-ternary CA with native trit-adder and Boolean universality

trinary logic — Part of the BlackRoad OS ecosystem. Sovereign computing, edge AI, mesh networking. blackroad.io

ulackuox protocol — Part of the BlackRoad OS ecosystem. Sovereign computing, edge AI, mesh networking. blackroad.io

Digital Ternary Logic is a browser-based visual simulator for balanced ternary computing. It lets makers, students and enthusiasts build ternary gates, buses, adders, registers, memory and reusable chips using N, 0 and P logic.