Address trigger has higher priority than alignment#387
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Address trigger has higher priority than alignment#387
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Used this test to confirm that riscv-software-src/riscv-isa-sim#1013 works right.
aswaterman
reviewed
May 25, 2022
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| # Slow path because CSR was *just* written. (This is spike-specific.) | ||
| sw x0, (a2) | ||
| beqz a2, fail |
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Presumably this branch should be removed since the store can't possibly write x2?
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Good point. Definitely a cut and paste issue. I just removed the checks, since if the trigger didn't match then you end up with an unaligned exception which will cause the test to fail.
aswaterman
reviewed
May 25, 2022
| # Fast path | ||
| li TESTNUM, 18 | ||
| sw x0, (a2) | ||
| beqz a2, fail |
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Same here. Or I guess if you're trying to make sure the store didn't write memory, you'd need to store a nonzero value and lb a byte of it back to see if it's still zero.
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Used this test to confirm that
riscv-software-src/riscv-isa-sim#1013 works
right.