iommu/arm-smmu: Add interconnect bandwidth voting support#590
iommu/arm-smmu: Add interconnect bandwidth voting support#590bibekpatro wants to merge 2 commits into
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PR #590 — validate-patchPR: #590
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PR #590 — checker-log-analyzerPR: #590
Detailed report: Full report
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…ts property Some SoC implementations require a bandwidth vote on an interconnect path before the SMMU register space is accessible. Add the optional 'interconnects' property to the binding to allow platform DT nodes to describe this path. The arm-smmu driver uses these properties to vote for bandwidth before accessing any SMMU registers and releases the vote on runtime suspend. Link: https://lore.kernel.org/all/20260516-smmu_interconnect_addition-v1-1-f889d933f5c1@oss.qualcomm.com/ Signed-off-by: Bibek Kumar Patro <bibek.patro@oss.qualcomm.com>
On some SoCs the SMMU registers require an active interconnect bandwidth vote to be accessible. While other clients typically satisfy this requirement implicitly, certain corner cases (e.g. during sleep/wakeup transitions) can leave the SMMU without a vote, causing intermittent register access failures. Add support for an optional interconnect path to the arm-smmu driver and vote for bandwidth while the SMMU is active. The path is acquired from DT if present and ignored otherwise. The bandwidth vote is enabled before accessing SMMU registers during probe and runtime resume, and released during runtime suspend and on error paths. Generally, from an architectural perspective, GEM_NOC and DDR are expected to have an active vote whenever the adreno_smmu block is powered on. In most common use cases, this requirement is implicitly satisfied because other GPU-related clients (for example, the GMU device) already hold a GEM_NOC vote when adreno_smmu is enabled. However, there are certain corner cases, such as during sleep/wakeup transitions, where the GEM_NOC vote can be removed before adreno_smmu is powered down. If adreno_smmu is then accessed while the interconnect vote is missing, it can lead to the observed failures. Because of the precise ordering involved, this scenario is difficult to reproduce consistently. (also GDSC is involved in adreno usecases can have an independent vote) Link: https://lore.kernel.org/all/20260516-smmu_interconnect_addition-v1-2-f889d933f5c1@oss.qualcomm.com/ Signed-off-by: Bibek Kumar Patro <bibek.patro@oss.qualcomm.com>
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Merge Check Failed: No Change Task Found No associated change tasks found for CR 4523338 on any of the following entities: Entities:
CR: 4523338 Please ensure the CR has a change task associated with at least one of the entities for this branch. |
Addressed for both the commits now. |
iommu/arm-smmu: Add interconnect bandwidth voting support
Link: https://lore.kernel.org/all/20260516-smmu_interconnect_addition-v1-0-f889d933f5c1@oss.qualcomm.com/#t
CRs-Fixed: 4523338