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Prepare qcom-next based on tag 'Linux 7.0-rc6' of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git#414

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Prepare qcom-next based on tag 'Linux 7.0-rc6' of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git#414
sgaud-quic wants to merge 621 commits intoqualcomm-linux:qcom-next-stagingfrom
sgaud-quic:qcom-next-staging-7.0-rc6-20260402

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Name SHA Commits

tech/bsp/clk 90af1d3 12
tech/bsp/interconnect 7d3a72c 5
tech/security/firmware-smc a50984a 2
tech/bsp/soc-infra c793ce5 5
tech/bsp/pinctrl 28c2b80 1
tech/bsp/remoteproc abb91ae 5
tech/bus/peripherals 8c19ed7 2
tech/bus/pci/all 6a697f8 6
tech/bus/pci/mhi fb9c163 1
tech/bus/pci/phy aaf8ef1 4
tech/bus/usb/dwc 49ac8e0 2
tech/bus/usb/phy 8c7f91d 35
tech/debug/hwtracing 87ae82d 31
tech/pmic/misc e6525e3 9
tech/pmic/regulator 81fc8fb 6
tech/mem/iommu 43dfdd1 4
tech/mm/audio/all d38b67b 14
tech/mm/camss ef80fad 20
tech/mm/drm b17e723 12
tech/mm/fastrpc c29b2a8 5
tech/mm/video fa0e482 4
tech/mm/gpu 9c8e55d 2
tech/net/ath f8562ba 2
tech/net/eth 49b156f 1
tech/net/qrtr 64d75f7 1
tech/net/phy a3602e9 1
tech/net/bluetooth 229e73e 3
tech/pm/power 25fc1b7 9
tech/pm/thermal d174ed3 6
tech/security/crypto a6ce790 12
tech/security/ice 5184a0e 15
tech/storage/all e254dae 1
tech/all/dt/qcs6490 5fb16ec 16
tech/all/dt/qcs9100 5586aac 19
tech/all/dt/qcs8300 37ae346 21
tech/all/dt/qcs615 367314f 27
tech/all/dt/agatti c828f10 1
tech/all/dt/hamoa 49fad94 32
tech/all/dt/glymur 3aa6f05 23
tech/all/dt/kaanapali 70486f2 23
tech/all/dt/pakala 86103bc 6
tech/all/config 9050b95 53
tech/overlay/dt bbed7cf 24
tech/all/workaround c3f9d3b 13
tech/mproc/all eabd91e 4
tech/noup/debug/all 342aeb8 15
tech/hwe/unoq 7d981fe 16
early/hwe/shikra/drivers 347ed44 25
early/hwe/shikra/dt 5fa1973 15

swatagar and others added 30 commits March 23, 2026 12:36
Add the binding for the USB3.2 Genesys Logic GL3590 hub.

Signed-off-by: Swati Agarwal <swati.agarwal@oss.qualcomm.com>
…h hardware

The Qualcomm Embedded USB Debugger (EUD) can intercept one or two
independent High-Speed UTMI paths, depending on the SoC. Each path is
distinct with its own HS-PHY interface, connector/controller wiring, and
UTMI routing behavior. The EUD hardware sits between the USB2 PHY and
the USB controller on each path.

The existing binding models only a single UTMI path and does not provide
a way to associate the required High-Speed USB PHY. EUD relies on the
HS-PHY on the selected UTMI path for link signalling and correct operation
of the hardware.

Historically, EUD has worked on platforms that use a single UTMI path
because the USB controller maintains ownership of the PHY during
enumeration and normal operation. This implicit relationship allowed
EUD to function even though the dependency on the PHY was not described
in the binding. However, this behavior is not guaranteed by hardware.
The current binding description is not sufficient for SoCs that expose
two independent UTMI paths, where the PHY association and port wiring
must be explicitly described.

Introduce per-path eud-path child nodes so each UTMI path can describe
its HS-PHY, port connections, and the role‑switching capability of its
associated USB port.

Signed-off-by: Elson Serrao <elson.serrao@oss.qualcomm.com>
Link: https://lore.kernel.org/linux-usb/20260126233830.2193816-2-elson.serrao@oss.qualcomm.com/
EUD can be mapped to either the primary USB port or the secondary USB port
depending on the value of the EUD_PORT_SEL register. Add a 'port' sysfs
attribute to allow userspace to select which port EUD should operate on
and update the ABI documentation. This is needed for systems with dual
USB ports where EUD needs to be accessible on either port depending on the
system configuration and use case.

Signed-off-by: Elson Serrao <elson.serrao@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/linux-usb/20260126233830.2193816-3-elson.serrao@oss.qualcomm.com/
EUD hardware can support multiple High-Speed USB paths, each routed
through its own PHY. The active path is selected in hardware via the
EUD_PORT_SEL register. As a High-Speed hub, EUD requires access to the
High-Speed PHY associated with the active UTMI path. To support this
multi-path capability, the driver must manage PHY resources on a per-path
basis, ensuring that the PHY for the currently selected path is properly
initialized and powered.

This patch restructures the driver to implement per-path PHY management.
The driver now powers the appropriate PHY based on the selected and
enabled UTMI path, ensuring correct operation when EUD is enabled.

Supporting this requires describing the available UTMI paths and their
corresponding PHYs in Device Tree. This updates DT requirements and is
not backward compatible with older DTs that lacked this description.
Historically, EUD appeared to work on single-path systems because the
USB controller kept the PHY initialized. However, EUD is designed to
operate independently of the USB controller and therefore requires
explicit PHY control.

Signed-off-by: Elson Serrao <elson.serrao@oss.qualcomm.com>
Link: https://lore.kernel.org/linux-usb/20260126233830.2193816-4-elson.serrao@oss.qualcomm.com/
The EUD hardware can support multiple High-Speed USB paths, each connected
to different USB controllers. The current implementation uses a single
chip-level role switch, which cannot properly handle multi-path
configurations where each path needs independent role management. Since
EUD is physically present between the USB connector and the controller,
it should also relay the role change requests from the connector.

Restructure the driver to support per-path role switches and remove the
chip-level role switch. Additionally, as EUD need not modify the USB
role upon enabling, remove the unnecessary role switch call from
enable_eud().

Signed-off-by: Elson Serrao <elson.serrao@oss.qualcomm.com>
Link: https://lore.kernel.org/linux-usb/20260126233830.2193816-5-elson.serrao@oss.qualcomm.com/
Currently enable_store() allows operations irrespective of the EUD state,
which can result in redundant operations. Avoid this by adding duplicate
state checks to skip requests when EUD is already in the desired state.
Additionally, improve error handling with explicit logging to provide
better feedback.

Signed-off-by: Elson Serrao <elson.serrao@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/linux-usb/20260126233830.2193816-6-elson.serrao@oss.qualcomm.com/
EUD functions by presenting itself as a USB device to the host PC for
debugging, making it incompatible in USB host mode configurations.
Enabling EUD, when in host mode can also cause the USB controller to
misbehave as the EUD hub can only have one upstream facing port.

Handle below two scenarios to prevent these conflicts:
1. Prevent user from enabling EUD via sysfs when the USB port is
   in host mode.
2. Automatically disable EUD when USB port switches to host mode
   and re-enable it when exiting host mode.

This ensures consistent state management without creating conflicts
between the EUD debug hub and the USB controller.

Signed-off-by: Elson Serrao <elson.serrao@oss.qualcomm.com>
Link: https://lore.kernel.org/linux-usb/20260126233830.2193816-7-elson.serrao@oss.qualcomm.com/
EUD provides virtual USB attach/detach events to simulate cable
plug/unplug while maintaining the physical debug connection. However,
the current implementation incorrectly sets the USB role to HOST on
virtual detach, which doesn't represent the disconnected state.

Fix the virtual detach handling by setting the USB role to NONE
instead of HOST, correctly representing the disconnected state.

Signed-off-by: Elson Serrao <elson.serrao@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
https://lore.kernel.org/linux-usb/20260126233830.2193816-8-elson.serrao@oss.qualcomm.com/
The EUD node does not match the current binding and maps USB endpoints
to the secondary controller. This SoC supports EUD only on the primary
High-Speed USB path. The binding also requires a per-path PHY reference.

Model the primary UTMI path as a child node with the required PHY and an
empty ports graph. Leave endpoint mapping to board DTS files, and remove
the secondary mapping and associated ports so the description conforms
to the binding.

Signed-off-by: Elson Serrao <elson.serrao@oss.qualcomm.com>
iLink: https://lore.kernel.org/linux-usb/20260126233830.2193816-9-elson.serrao@oss.qualcomm.com/
…nality

On this board, EUD resides on the primary High-Speed USB data path between
the connector and the DWC3 controller. Update the device tree connections
to correctly map the connector and controller endpoints, and describe
role-switch capability on the EUD primary path.

Signed-off-by: Elson Serrao <elson.serrao@oss.qualcomm.com>
Link: https://lore.kernel.org/linux-usb/20260126233830.2193816-10-elson.serrao@oss.qualcomm.com/
For systems where the ID pin isn't available as gpio use the ATTACHED_STATE
register instead to control vbus.

>From the datasheet:
"This is an additional method to communicate attach other
than the ID pin. These bits can be read by the application to
determine what was attached."

Use this method if id-gpios property is not set, but the connector node
has vbus-supply defined.

Check regulator state as peripheral and detach can disable vbus.

Signed-off-by: Jan Remmet <j.remmet@phytec.de>
The HD3SS3220's interrupt is disabled during system suspend, so a USB‑C
cable connect/attach event cannot wake the system. This prevents resume
from low‑power modes when the port controller is expected to act as a
wakeup source.

Add wakeup support by:

- Initialize the device as wakeup‑capable.
- Enable the HD3SS3220 IRQ as a wakeup interrupt.
- Add suspend/resume callbacks to enable or disable the IRQ for wakeup
depending on the device's wakeup configuration.

With this, USB‑C cable insertion correctly wakes the system from suspend.

Link: https://lore.kernel.org/all/20260215183325.3836178-2-swati.agarwal@oss.qualcomm.com/
Signed-off-by: Swati Agarwal <swati.agarwal@oss.qualcomm.com>
… functionality"

This reverts commit e65028c.

Issue is observed with this commit e65028c leading to crash,
with following call stack

[   19.706310][   T73] Call trace:
[   19.706312][   T73]  usb_role_switch_unregister+0x28/0x70 (P)
[   19.706319][   T73]  eud_role_switch_release+0x30/0x78 [qcom_eud]
[   19.884972][   T73]  devm_action_release+0x1c/0x30
[   19.884981][   T73]  release_nodes+0x70/0x120
[   19.884987][   T73]  devres_release_all+0x98/0xf0
[   19.884995][   T73]  device_unbind_cleanup+0x20/0x98
[   19.885000][   T73]  really_probe+0x184/0x3f0
[   19.885005][   T73]  __driver_probe_device+0x88/0x190
[   19.885010][   T73]  driver_probe_device+0x44/0x120
[   19.885015][   T73]  __device_attach_driver+0xc4/0x178
[   19.885020][   T73]  bus_for_each_drv+0x90/0xf8
[   19.885027][   T73]  __device_attach+0xa8/0x1d8
[   19.885032][   T73]  device_initial_probe+0x58/0x68
[   19.885037][   T73]  bus_probe_device+0x40/0xb8
[   19.885041][   T73]  deferred_probe_work_func+0xbc/0x128
[   19.885046][   T73]  process_one_work+0x180/0x450
[   19.885055][   T73]  worker_thread+0x26c/0x388
[   19.885062][   T73]  kthread+0x120/0x140
[   19.885068][   T73]  ret_from_fork+0x10/0x20
[   19.885079][   T73] Code: f9000bf3 aa0003f3 b140041f 54000168 (390c901f)
[   19.885083][   T73] ---[ end trace 0000000000000000 ]---
[   19.885088][   T73] Kernel panic - not syncing: Oops: Fatal exception
[   19.885091][   T73] SMP: stopping secondary CPUs

Revert commit for now.

Signed-off-by: Salendarsingh Gaud <sgaud@qti.qualcomm.com>
This reverts commit 09ed0b6.

Issue is observed with this commit 09ed0b6 leading to crash,
with following call stack

[   19.706310][   T73] Call trace:
[   19.706312][   T73]  usb_role_switch_unregister+0x28/0x70 (P)
[   19.706319][   T73]  eud_role_switch_release+0x30/0x78 [qcom_eud]
[   19.884972][   T73]  devm_action_release+0x1c/0x30
[   19.884981][   T73]  release_nodes+0x70/0x120
[   19.884987][   T73]  devres_release_all+0x98/0xf0
[   19.884995][   T73]  device_unbind_cleanup+0x20/0x98
[   19.885000][   T73]  really_probe+0x184/0x3f0
[   19.885005][   T73]  __driver_probe_device+0x88/0x190
[   19.885010][   T73]  driver_probe_device+0x44/0x120
[   19.885015][   T73]  __device_attach_driver+0xc4/0x178
[   19.885020][   T73]  bus_for_each_drv+0x90/0xf8
[   19.885027][   T73]  __device_attach+0xa8/0x1d8
[   19.885032][   T73]  device_initial_probe+0x58/0x68
[   19.885037][   T73]  bus_probe_device+0x40/0xb8
[   19.885041][   T73]  deferred_probe_work_func+0xbc/0x128
[   19.885046][   T73]  process_one_work+0x180/0x450
[   19.885055][   T73]  worker_thread+0x26c/0x388
[   19.885062][   T73]  kthread+0x120/0x140
[   19.885068][   T73]  ret_from_fork+0x10/0x20
[   19.885079][   T73] Code: f9000bf3 aa0003f3 b140041f 54000168 (390c901f)
[   19.885083][   T73] ---[ end trace 0000000000000000 ]---
[   19.885088][   T73] Kernel panic - not syncing: Oops: Fatal exception
[   19.885091][   T73] SMP: stopping secondary CPUs

Revert commit for now.

Signed-off-by: Salendarsingh Gaud <sgaud@qti.qualcomm.com>
… block

The APSS debug block is built with CoreSight devices like ETM,
replicator, funnel and TMC ETF. Add dt nodes for these devices to enable
ETM trace.

Link: https://lore.kernel.org/all/20251218-cpu_cluster_component_pm-v2-12-2335a6ae62a0@oss.qualcomm.com/
Signed-off-by: Jie Gan <jie.gan@oss.qualcomm.com>
Co-developed-by: Yuanfang Zhang <yuanfang.zhang@oss.qualcomm.com>
Signed-off-by: Yuanfang Zhang <yuanfang.zhang@oss.qualcomm.com>
Embedded Trace Router(ETR) is working as a DDR memory sink to collect
tracing data from source device.

The CTCU serves as the control unit for the ETR device, managing its
behavior to determine how trace data is collected.

Link: https://lore.kernel.org/all/20260204-enable-ctcu-and-etr-v3-2-0bb95c590ae1@oss.qualcomm.com/
Reviewed-by: Abel Vesa <abel.vesa@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Jie Gan <jie.gan@oss.qualcomm.com>
Document the device tree bindings for the PURWA-IOT-EVK board, which
uses the Qualcomm X1P42100 SoC.

Link: https://lore.kernel.org/all/20260202073555.1345260-1-yijie.yang@oss.qualcomm.com/
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Signed-off-by: Yijie Yang <yijie.yang@oss.qualcomm.com>
Add the Purwa-IoT-EVK board to the list to enable access to EFI variables.

Guarantee that subsystems relying on SCM services can access secure-world
features. This change improves reliability and prevents missing
functionality or boot-time issues by making service availability explicit.

Link: https://lore.kernel.org/all/20260202073555.1345260-2-yijie.yang@oss.qualcomm.com/
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Signed-off-by: Yijie Yang <yijie.yang@oss.qualcomm.com>
The PURWA-IOT-SOM is a compact computing module that integrates a System
on Chip (SoC) — specifically the x1p42100 — along with essential
components optimized for IoT applications. It is designed to be mounted on
carrier boards, enabling the development of complete embedded systems.

Purwa uses a slightly different Iris HW revision (8.1.2 on Hamoa, 8.1.11 on
Purwa). Support will be added later.

Make the following peripherals on the SOM enabled:
- Regulators on the SOM
- Reserved memory regions
- PCIe3, PCIe4, PCIe5, PCIe6a
- USB0 through USB6 and their PHYs
- ADSP, CDSP
- Graphic

Link: https://lore.kernel.org/all/20260202073555.1345260-3-yijie.yang@oss.qualcomm.com/
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Yijie Yang <yijie.yang@oss.qualcomm.com>
The PURWA-IOT-EVK is an evaluation platform for IoT products, composed of
the Purwa IoT SoM and a carrier board. Together, they form a complete
embedded system capable of booting to UART.

PURWA-IOT-EVK uses the PS8833 as a retimer for USB0, unlike HAMOA-IOT-EVK.
Meanwhile, USB0 bypasses the SBU selector FSUSB42.

Make the following peripherals on the carrier board enabled:
- UART
- On-board regulators
- USB Type-C mux
- Pinctrl
- Embedded USB (EUSB) repeaters
- NVMe
- pmic-glink
- USB DisplayPorts
- Bluetooth
- WLAN
- Audio
- PCIe ports for PCIe3 through PCIe6a
- TPM

Link: https://lore.kernel.org/all/20260202073555.1345260-4-yijie.yang@oss.qualcomm.com/
Signed-off-by: Yijie Yang <yijie.yang@oss.qualcomm.com>
Add UFS host controller and PHY nodes for x1e80100 SoC.

Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Reviewed-by: Abel Vesa <abel.vesa@oss.qualcomm.com>
Reviewed-by: Taniya Das <taniya.das@oss.qualcomm.com>
Reviewed-by: Manivannan Sadhasivam <mani@kernel.org>
Signed-off-by: Pradeep P V K <pradeep.pragallapati@oss.qualcomm.com>
Link:
https://lore.kernel.org/all/20260211132926.3716716-1-pradeep.pragallapati@oss.qualcomm.com
Enable UFS for HAMOA-IOT-EVK board.

Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Reviewed-by: Manivannan Sadhasivam <mani@kernel.org>
Signed-off-by: Pradeep P V K <pradeep.pragallapati@oss.qualcomm.com>
Link:
https://lore.kernel.org/all/20260211132926.3716716-1-pradeep.pragallapati@oss.qualcomm.com
…t evk board

Enable SD Card host controller for hamoa iot evk board.

Link:
https://lore.kernel.org/all/20260211093045.2595126-1-sarthak.garg@oss.qualcomm.com/
Signed-off-by: Sarthak Garg <sarthak.garg@oss.qualcomm.com>
Signed-off-by: Pradeep P V K <pradeep.pragallapati@oss.qualcomm.com>
Add DAI links for DP0 and DP1 playback and set sound-name-prefix
for both DisplayPort endpoints in the hamoa-evk DTS.

Link: https://lore.kernel.org/all/20260209091139.622756-1-le.qi@oss.qualcomm.com/
Signed-off-by: Le Qi <le.qi@oss.qualcomm.com>
Signed-off-by: Jie Gan <jie.gan@oss.qualcomm.com>
Add the CAMCC block for x1e80100. The x1e80100 CAMCC block is an iteration
of previous CAMCC blocks with the exception of having two required
power-domains not just one.

Reviewed-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Signed-off-by: Jagadeesh Kona <jagadeesh.kona@oss.qualcomm.com>
Reviewed-by: Abel Vesa <abel.vesa@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260128-purwa-videocc-camcc-v1-6-b23de57df5ba@oss.qualcomm.com
…odes on purwa

Update the compatible for videocc and camcc nodes to match with their
respective purwa(X1P42100) specific drivers.

Signed-off-by: Jagadeesh Kona <jagadeesh.kona@oss.qualcomm.com>
Reviewed-by: Abel Vesa <abel.vesa@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260128-purwa-videocc-camcc-v1-7-b23de57df5ba@oss.qualcomm.com
Enable passive cooling for CPUs in the X1E80100 SoC by adding the
'#cooling-cells' property. This will allow the OS to mitigate the CPU
power dissipation with the help of SCMI DVFS.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Tested-by: Gaurav Kohli <gaurav.kohli@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260210070321.17033-1-manivannan.sadhasivam@oss.qualcomm.com
Add support for SYSTEM_RESET2 vendor-specific resets as
reboot-modes in the psci node.  Describe the resets: "bootloader"
will cause device to reboot and stop in the bootloader's fastboot
mode.  "edl" will cause device to reboot into "emergency download
mode", which permits loading images via the Firehose protocol.

Signed-off-by: Xin Liu <xin.liu@oss.qualcomm.com>
Link: https://lore.kernel.org/all/20260226054113.4156874-1-xin.liu@oss.qualcomm.com/
Add support for building an EL2 combined DTB for the hamoa-evk
in the Qualcomm DTS Makefile.

The new hamoa-iot-evk-el2.dtb is generated by combining the base
hamoa-iot-evk.dtb with the x1-el2.dtbo overlay, enabling EL2-specific
configurations required by the platform.

Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Xin Liu <xin.liu@oss.qualcomm.com>
Link: https://lore.kernel.org/all/20260127062425.1084673-1-xin.liu@oss.qualcomm.com/
…e trees

All the existing variants Hamoa boards are using Gunyah hypervisor
which means that, so far, Linux-based OS could only boot in EL1 on
those devices. However, it is possible for us to boot Linux at EL2
on these devices [1].

When running under Gunyah, the remote processor firmware IOMMU streams
are controlled by Gunyah. However, without Gunyah, the IOMMU is managed
by the consumer of this DeviceTree. Therefore, describe the firmware
streams for each remote processor.

Add remoteproc IOMMUS to the EL2 device trees to generate the
corresponding -el2.dtb files.

[1]
https://docs.qualcomm.com/bundle/publicresource/topics/80-70020-4/boot-developer-touchpoints.html#uefi

Reviewed-by: Abel Vesa <abel.vesa@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Xin Liu <xin.liu@oss.qualcomm.com>
Link: https://lore.kernel.org/all/20260203063244.1498699-1-xin.liu@oss.qualcomm.com/
# Conflicts:
#	arch/arm64/boot/dts/qcom/talos.dtsi
# Conflicts:
#	drivers/phy/qualcomm/phy-qcom-qmp-pcie.c
# Conflicts:
#	arch/arm64/configs/defconfig
Adding merge log file and topic_SHA1 file

Signed-off-by: Salendarsingh Gaud <sgaud@qti.qualcomm.com>
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