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Add qref and refgen regulator for Monaco #1160

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Add qref and refgen regulator for Monaco #1160

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965c88d
WORKAROUND: dt-bindings: phy: qcom,sc8280xp-qmp-pcie-phy: Add vdda-re…
May 14, 2026
61b3ae5
WORKAROUND: phy: qcom: qmp-pcie: Add vdda-refgen and vdda-qref suppli…
May 14, 2026
2da8e88
WORKAROUND: arm64: dts: qcom: qcs8300-ride: Add vdda-qref and vdda-re…
May 14, 2026
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2 changes: 2 additions & 0 deletions Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml
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Original file line number Diff line number Diff line change
Expand Up @@ -89,6 +89,8 @@ properties:

vdda-qref-supply: true

vdda-refgen-supply: true

qcom,4ln-config-sel:
description: PCIe 4-lane configuration
$ref: /schemas/types.yaml#/definitions/phandle-array
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4 changes: 4 additions & 0 deletions arch/arm64/boot/dts/qcom/qcs8300-ride.dts
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Expand Up @@ -638,6 +638,8 @@
&pcie0_phy {
vdda-phy-supply = <&vreg_l6a>;
vdda-pll-supply = <&vreg_l5a>;
vdda-qref-supply = <&vreg_l7a>;
vdda-refgen-supply = <&refgen>;

status = "okay";
};
Expand All @@ -657,6 +659,8 @@
&pcie1_phy {
vdda-phy-supply = <&vreg_l6a>;
vdda-pll-supply = <&vreg_l5a>;
vdda-qref-supply = <&vreg_l7a>;
vdda-refgen-supply = <&refgen>;

status = "okay";
};
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16 changes: 10 additions & 6 deletions drivers/phy/qualcomm/phy-qcom-qmp-pcie.c
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Expand Up @@ -3390,6 +3390,10 @@ static const char * const sm8550_qmp_phy_vreg_l[] = {
"vdda-phy", "vdda-pll", "vdda-refgen0p9", "vdda-refgen1p2", "vdda-qref","vdda-qref2",
};

static const char * const sa8775p_qmp_phy_vreg_l[] = {
"vdda-phy", "vdda-pll", "vdda-qref", "vdda-refgen",
};

/* list of resets */
static const char * const ipq8074_pciephy_reset_l[] = {
"phy", "common",
Expand Down Expand Up @@ -3740,8 +3744,8 @@ static const struct qmp_phy_cfg qcs8300_qmp_gen4x2_pciephy_cfg = {

.reset_list = sdm845_pciephy_reset_l,
.num_resets = ARRAY_SIZE(sdm845_pciephy_reset_l),
.vreg_list = qmp_phy_vreg_l,
.num_vregs = ARRAY_SIZE(qmp_phy_vreg_l),
.vreg_list = sa8775p_qmp_phy_vreg_l,
.num_vregs = ARRAY_SIZE(sa8775p_qmp_phy_vreg_l),
.regs = pciephy_v5_regs_layout,

.pwrdn_ctrl = SW_PWRDN | REFCLK_DRV_DSBL,
Expand Down Expand Up @@ -4454,8 +4458,8 @@ static const struct qmp_phy_cfg sa8775p_qmp_gen4x2_pciephy_cfg = {

.reset_list = sdm845_pciephy_reset_l,
.num_resets = ARRAY_SIZE(sdm845_pciephy_reset_l),
.vreg_list = qmp_phy_vreg_l,
.num_vregs = ARRAY_SIZE(qmp_phy_vreg_l),
.vreg_list = sa8775p_qmp_phy_vreg_l,
.num_vregs = ARRAY_SIZE(sa8775p_qmp_phy_vreg_l),
.regs = pciephy_v5_regs_layout,

.pwrdn_ctrl = SW_PWRDN | REFCLK_DRV_DSBL,
Expand Down Expand Up @@ -4495,8 +4499,8 @@ static const struct qmp_phy_cfg sa8775p_qmp_gen4x4_pciephy_cfg = {

.reset_list = sdm845_pciephy_reset_l,
.num_resets = ARRAY_SIZE(sdm845_pciephy_reset_l),
.vreg_list = qmp_phy_vreg_l,
.num_vregs = ARRAY_SIZE(qmp_phy_vreg_l),
.vreg_list = sa8775p_qmp_phy_vreg_l,
.num_vregs = ARRAY_SIZE(sa8775p_qmp_phy_vreg_l),
.regs = pciephy_v5_regs_layout,

.pwrdn_ctrl = SW_PWRDN | REFCLK_DRV_DSBL,
Expand Down