Add V3 Coresight DT patch for Glymur#1159
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🔨 Build Failure Analysis — PR #1159PR: #1159
VerdictAll 1 failure is introduced by this PR: the large-scale revert of 📎 Detailed analysis: Full report |
🔨 Build Failure Analysis — PR #1159PR: #1159
VerdictAll 1 failure is introduced by this PR: the topic branch 📎 Detailed analysis: Full report |
PR #1159 — validate-patchPR: #1159
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PR #1159 — checker-log-analyzerPR: #1159
Detailed report: Full report
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PR #1159 — validate-patchPR: #1159
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PR #1159 — checker-log-analyzerPR: #1159
Detailed report: Full report
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This reverts commit 7dbe137. This issue has been addressed in Coresight DT patch V3. Revert this commit for updating the Coresight DT patch to V3. Signed-off-by: Jie Gan <jie.gan@oss.qualcomm.com>
This reverts commit 245e067. Update the Coresight DT patch to V3. Signed-off-by: Jie Gan <jie.gan@oss.qualcomm.com>
Add CoreSight nodes to enable trace paths like TPDM->ETF/STM->ETF. These devices are part of the AOSS, CDSP, QDSS, PCIe5, TraceNoc and some small subsystems, such as GCC, IPCC, PMU and so on. Delete cti_wpss DT node on Mahua since this device will cause NoC issue on Mahua device. Link: https://lore.kernel.org/all/20260518-add-coresight-nodes-for-glymur-v4-1-45f54f441899@oss.qualcomm.com/ Signed-off-by: Jie Gan <jie.gan@oss.qualcomm.com>
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update to V4 |
🔨 Build Failure Analysis — PR #1159PR: #1159
Verdict1 of 4 merge conflicts is introduced by this PR ( 📎 Detailed analysis: Full report |
🔨 Build Failure Analysis — PR #1159PR: #1159
Verdict1 of 4 merge conflicts is introduced by this PR ( 📎 Detailed analysis: Full report |
PR #1159 — validate-patchPR: #1159
|
PR #1159 — checker-log-analyzerPR: #1159
Detailed report: Full report
|
Add V3 Coresight DT patch for Glymur