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feat: add riscv debugger support - #1650

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Jvlegod wants to merge 2 commits into
qilingframework:devfrom
Jvlegod:feature/riscv64-debugger
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feat: add riscv debugger support#1650
Jvlegod wants to merge 2 commits into
qilingframework:devfrom
Jvlegod:feature/riscv64-debugger

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@Jvlegod

@Jvlegod Jvlegod commented Aug 3, 2026

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Checklist

Which kind of PR do you create?

  • This PR only contains minor fixes.
  • This PR contains major feature update.
  • This PR introduces a new function/api for Qiling Framework.

Coding convention?

  • The new code conforms to Qiling Framework naming convention.
  • The imports are arranged properly.
  • Essential comments are added.
  • The reference of the new code is pointed out.

Extra tests?

  • No extra tests are needed for this PR.
  • I have added enough tests for this PR.
  • Tests will be added after some discussion and review.

Changelog?

  • This PR doesn't need to update Changelog.
  • Changelog will be updated after some proper review.
  • Changelog has been updated in my PR.

Target branch?

  • The target branch is dev branch.

One last thing


Feature

88ca4d4 add the RISC-V related debugger components.

Fix

When I try to run tests for riscv, for example, using rootfs/riscv<32/64>_linux's example, I find that executing the si command causes it to jump straight to the end.

1f5801e fixes GDB breakpoint reliability by flushing TB after debugger hook and breakpoint updates. Without this, emulation may continue through cached TBs that were translated before the GDB code hook or breakpoint changes were visible.

References

Jvlegod added 2 commits August 3, 2026 13:43
Signed-off-by: Jvle <keke.oerv@isrc.iscas.ac.cn>
Signed-off-by: Jvle <keke.oerv@isrc.iscas.ac.cn>
@Jvlegod Jvlegod changed the title feat: add riscv debugger feat: add riscv debugger support Aug 4, 2026
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