feat: add WIZnet W5500-EVB-Pico2 + E22P-868M30S variant#10552
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Adds a community variant for the WIZnet W5500-EVB-Pico2 development board (https://docs.wiznet.io/Product/iEthernet/W5500/w5500-evb-pico2) paired with an external EBYTE E22P-868M30S LoRa module. This is the hardware twin of variants/rp2350/diy/pico2_w5500_e22 — same LoRa pinout, same W5500 pin mapping — and reuses its variant.h verbatim via `-I variants/rp2350/diy/pico2_w5500_e22`. No duplicated pinout file. Two differences vs pico2_w5500_e22 justify the separate env: 1. Board target: `wiznet_5500_evb_pico2` (2 MB flash) instead of `rpipico2` (4 MB flash). The WIZnet PCB ships with a smaller Q-SPI chip than a stock Pi Pico 2. Selecting the correct board makes the linker fail fast on overflow instead of producing a UF2 that gets silently truncated when flashed to the device. 2. W5500 PHY is integrated on the PCB (hard-wired SPI0 GP16-20) rather than supplied as an external module the user wires manually. The E22P-868M30S uses a single combined RFEN pin (LNA + PA enable) instead of the older E22-900M30S's split RXEN/TXEN pins. RFEN is held HIGH at all times via `SX126X_ANT_SW 3`; TX switching still uses the on-module DIO2 → TXEN bridge through `SX126X_DIO2_AS_RF_SWITCH`. Build verified: wiznet_5500_evb_pico2_e22p SUCCESS (RAM 19.2%, Flash 65.6% of 1.5 MB partition / 2 MB chip).
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Summary
Adds a community variant for the WIZnet W5500-EVB-Pico2 development board paired with an external EBYTE E22P-868M30S LoRa module. Hardware twin of
variants/rp2350/diy/pico2_w5500_e22(added in #10135) — same LoRa pinout, same W5500 pin mapping — reuses itsvariant.hverbatim via-I variants/rp2350/diy/pico2_w5500_e22, so there is no duplicated pinout file.Why a separate env
Two differences vs
pico2_w5500_e22make the existing env unsafe to use for this board:board = wiznet_5500_evb_pico2makes the linker fail fast on overflow instead of producing a UF2 that gets silently truncated when flashed to the device.E22P vs E22
The newer E22P-868M30S replaces the older E22-900M30S's split RXEN/TXEN pins with a single combined RFEN pin (LNA + PA enable). Firmware drives this with:
SX126X_ANT_SW 3— GP3 (RFEN) held HIGH at boot, never toggled afterwards;SX126X_DIO2_AS_RF_SWITCH— SX1262 drives DIO2 HIGH during TX, enabling TXEN via the on-module DIO2 → TXEN bridge.Both behaviours are inherited verbatim from the
pico2_w5500_e22variant.h.Files
variants/rp2350/diy/wiznet_5500_evb_pico2_e22p/platformio.ini— env definition; reuses the sharedvariant.hvia-I.variants/rp2350/diy/wiznet_5500_evb_pico2_e22p/README.md— board overview, pinout, build/flash instructions.No changes to shared code or other variants.
Test plan
pio run -e wiznet_5500_evb_pico2_e22pSUCCESS (RAM 19.2 %, Flash 65.6 % of 1.5 MB app partition on the 2 MB chip).pico2_w5500_e22build (variant.h shared but unchanged); existing builds keep working.