target: fix STM32F765xG linker scripts — correct DTCM size and SRAM1 address#11391
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sensei-hacker wants to merge 1 commit intoiNavFlight:maintenance-9.xfrom
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target: fix STM32F765xG linker scripts — correct DTCM size and SRAM1 address#11391sensei-hacker wants to merge 1 commit intoiNavFlight:maintenance-9.xfrom
sensei-hacker wants to merge 1 commit intoiNavFlight:maintenance-9.xfrom
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…address
The three stm32_flash_f765xg*.ld linker scripts were copy-pasted from the
STM32F745 linker without updating the memory map for the F765's larger DTCM.
STM32F745: DTCM = 64 KB (0x20000000–0x2000FFFF), SRAM1 starts at 0x20010000
STM32F765: DTCM = 128 KB (0x20000000–0x2001FFFF), SRAM1 starts at 0x20020000
The F765xG linker scripts kept the F745 values (TCM = 64 KB, RAM at
0x20010000), which places the RAM region inside the upper half of DTCM on
F765 hardware rather than in SRAM1.
Fix all three xG variants (normal, bl, for_bl):
- Expand DTCM_RAM from 64 KB to 128 KB (the full F765 DTCM)
- Move SRAM1 origin from 0x20010000 to 0x20020000 (correct F765 address)
- Add SRAM2 region (16 KB at 0x2007C000) matching the xi scripts
- Update REGION_ALIAS("RAM") to point to SRAM1
- Update stale file headers that still referenced STM32F745VGTx / 320 KB RAM
- Update flash sector comment from "32K on F74x" to "32K on F7xx"
The xi variant linker scripts (used by MATEKF765, MATEKF765SE) already had
the correct addresses and are not changed.
Affected targets: FRSKYPILOT, FRSKYPILOT_LED.
Contributor
Review Summary by QodoFix STM32F765xG linker scripts memory mapping and SRAM1 address
WalkthroughsDescription• Fix STM32F765xG linker scripts with incorrect DTCM and SRAM1 memory mapping - Expand DTCM from 64 KB to 128 KB (full F765 capacity) - Correct SRAM1 origin from 0x20010000 to 0x20020000 - Add missing SRAM2 region (16 KB at 0x2007C000) • Update stale file headers referencing STM32F745 and incorrect RAM size • Rename TCM/RAM aliases to DTCM_RAM/SRAM1 for clarity and DMA compatibility • Add explanatory comments about F765 vs F745 memory differences Diagramflowchart LR
A["STM32F765xG<br/>Linker Scripts"] -->|Expand DTCM| B["DTCM_RAM<br/>128 KB"]
A -->|Correct SRAM1| C["SRAM1<br/>0x20020000"]
A -->|Add SRAM2| D["SRAM2<br/>16 KB"]
A -->|Update Headers| E["Fix F745→F765<br/>References"]
B --> F["DMA Buffers<br/>in SRAM1"]
C --> F
File Changes1. src/main/target/link/stm32_flash_f765xg.ld
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Contributor
Code Review by Qodo🐞 Bugs (0) 📘 Rule violations (0) 📎 Requirement gaps (0)
Great, no issues found!Qodo reviewed your code and found no material issues that require reviewⓘ The new review experience is currently in Beta. Learn more |
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Test firmware build ready — commit Download firmware for PR #11391 223 targets built. Find your board's
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Problem
The three
stm32_flash_f765xg*.ldlinker scripts were copy-pasted from the STM32F745 linker without updating the memory map for the F765's larger DTCM.The F765xG linker scripts kept the F745 values (
TCM = 64K,RAM at 0x20010000). On STM32F765 hardware, 0x20010000 is the start of the second 64 KB of DTCM — not SRAM1. This means:RAMregion (containing.bss,.data, and DMA buffers) was placed in DTCM address space rather than in SRAM1The correct
stm32_flash_f765xi.ldscripts (used by MATEKF765, MATEKF765SE) already have the correct addresses at 0x20020000 and serve as the reference.Fix
All three xG linker script variants are corrected:
stm32_flash_f765xg.ldstm32_flash_f765xg_bl.ldstm32_flash_f765xg_for_bl.ldChanges in each file:
DTCM_RAM: 64 KB → 128 KB (full F765 DTCM)SRAM1origin: 0x20010000 → 0x20020000 (correct F765 SRAM1 start)SRAM2region (16 KB at 0x2007C000) matching xi scriptsREGION_ALIAS("RAM")to point toSRAM1Affected Targets
Targets using
target_stm32f765xi()(MATEKF765, MATEKF765SE) are not affected — their linker scripts already have the correct addresses.Testing
Build test: FRSKYPILOT builds cleanly. Post-fix memory report:
DTCM_RAM: 21,156 B / 128 KB (16%) — stack and FASTRAM variablesSRAM1: 95,404 B / 368 KB (25%) —.bss,.data, DMA buffersPreviously, those 95 KB were mapped starting at 0x20010000 (inside F765 DTCM) rather than SRAM1.
Hardware test: Not performed — no physical FRSKYPILOT hardware available.