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Fix compile warnings #89

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h2zero wants to merge 7 commits into from
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Fix compile warnings #89

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572a8b6
Update CMSIS
h2zero Nov 30, 2024
b04406c
Add extra delete operators to silence warning.
h2zero Nov 30, 2024
fbb98a5
Merge branch 'master' of https://github.com/h2zero/n-able-Arduino.git
h2zero Jan 20, 2026
71d3069
Merge branch 'master' of https://github.com/h2zero/n-able-Arduino.git
h2zero Jan 21, 2026
d02e3d9
Silence compiler warnings
h2zero Jan 24, 2026
149e9f6
Add new line after assertion message
h2zero Jan 24, 2026
898e6d4
Add nableRtos::getMainLoopTaskHandle method
h2zero Jan 24, 2026
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6 changes: 3 additions & 3 deletions cores/nRF5/CMSIS/Include/mpu_armv7.h
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Original file line number Diff line number Diff line change
Expand Up @@ -193,7 +193,7 @@ __STATIC_INLINE void ARM_MPU_Enable(uint32_t MPU_Control)
__DMB();
MPU->CTRL = MPU_Control | MPU_CTRL_ENABLE_Msk;
#ifdef SCB_SHCSR_MEMFAULTENA_Msk
SCB->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk;
SCB->SHCSR = SCB->SHCSR | SCB_SHCSR_MEMFAULTENA_Msk;
#endif
__DSB();
__ISB();
Expand All @@ -205,9 +205,9 @@ __STATIC_INLINE void ARM_MPU_Disable(void)
{
__DMB();
#ifdef SCB_SHCSR_MEMFAULTENA_Msk
SCB->SHCSR &= ~SCB_SHCSR_MEMFAULTENA_Msk;
SCB->SHCSR = SCB->SHCSR & ~SCB_SHCSR_MEMFAULTENA_Msk;
#endif
MPU->CTRL &= ~MPU_CTRL_ENABLE_Msk;
MPU->CTRL = MPU->CTRL & ~MPU_CTRL_ENABLE_Msk;
__DSB();
__ISB();
}
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4 changes: 4 additions & 0 deletions cores/nRF5/rtos.cpp
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Expand Up @@ -93,4 +93,8 @@ uint32_t nableRtos::getIsrStackHwm() {
return offset;
}

TaskHandle_t nableRtos::getMainLoopTaskHandle() {
return ::getMainLoopTaskHandle();
}

nableRtos RTOS;
1 change: 1 addition & 0 deletions cores/nRF5/rtos.h
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Expand Up @@ -37,6 +37,7 @@ class nableRtos {
uint32_t getTimerTaskHwm();
uint32_t getBleHostTaskHwm();
uint32_t getBleLLTaskHwm();
TaskHandle_t getMainLoopTaskHandle();
};

extern nableRtos RTOS;
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2 changes: 1 addition & 1 deletion cores/nRF5/utils/debug_utils.cpp
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Expand Up @@ -51,7 +51,7 @@ void Hardfault_handler_cpp( uint32_t *p_stack_address )
__attribute__ ((__weak__))
void __assert_func(const char *file, int line, const char *func, const char *e)
{
Serial.printf("Assertion Failed: %s at line %d , in function: %s", file, line, func);
Serial.printf("Assertion Failed: %s at line %d , in function: %s\n", file, line, func);
yield();
NVIC_SystemReset();
while (1){} // silence compiler
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16 changes: 8 additions & 8 deletions libraries/SPI/SPI.h
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Expand Up @@ -145,14 +145,14 @@ extern SPIClass SPI1;
// For compatibility with sketches designed for AVR @ 16 MHz
// New programs should use SPI.beginTransaction to set the SPI clock
#ifdef F_CPU
#define DIVISOR F_CPU / 16000000
#define SPI_CLOCK_DIV2 2 * DIVISOR
#define SPI_CLOCK_DIV4 4 * DIVISOR
#define SPI_CLOCK_DIV8 8 * DIVISOR
#define SPI_CLOCK_DIV16 16 * DIVISOR
#define SPI_CLOCK_DIV32 32 * DIVISOR
#define SPI_CLOCK_DIV64 64 * DIVISOR
#define SPI_CLOCK_DIV128 128 * DIVISOR
static constexpr uint32_t SPI_DIVISOR = (static_cast<uint32_t>(F_CPU) / 16000000UL);
static constexpr uint32_t SPI_CLOCK_DIV2 = (2UL * SPI_DIVISOR);
static constexpr uint32_t SPI_CLOCK_DIV4 = (4UL * SPI_DIVISOR);
static constexpr uint32_t SPI_CLOCK_DIV8 = (8UL * SPI_DIVISOR);
static constexpr uint32_t SPI_CLOCK_DIV16 = (16UL * SPI_DIVISOR);
static constexpr uint32_t SPI_CLOCK_DIV32 = (32UL * SPI_DIVISOR);
static constexpr uint32_t SPI_CLOCK_DIV64 = (64UL * SPI_DIVISOR);
static constexpr uint32_t SPI_CLOCK_DIV128 = (128UL * SPI_DIVISOR);
#endif

#endif
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