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Arm64: keep SP in base operand for large-offset adds #130467

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Arm64: keep SP in base operand for large-offset adds #130467

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2 changes: 1 addition & 1 deletion src/coreclr/jit/codegenarm64.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -2161,7 +2161,7 @@ void CodeGen::instGen_Set_Reg_To_Base_Plus_Imm(emitAttr size,
else
{
instGen_Set_Reg_To_Imm(size, dstReg, imm);
GetEmitter()->emitIns_R_R_R(INS_add, size, dstReg, dstReg, baseReg);
GetEmitter()->emitIns_R_R_R(INS_add, size, dstReg, baseReg, dstReg);
}
}

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4 changes: 2 additions & 2 deletions src/coreclr/jit/emitarm64.cpp
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Expand Up @@ -15017,8 +15017,8 @@ void emitter::emitInsLoadStoreOp(instruction ins, emitAttr attr, regNumber dataR
// First load/store tmpReg with the large offset constant
codeGen->instGen_Set_Reg_To_Imm(EA_PTRSIZE, tmpReg, offset);
// Then add the base register
// rd = rd + base
emitIns_R_R_R(INS_add, addType, tmpReg, tmpReg, memBase->GetRegNum());
// rd = base + rd
emitIns_R_R_R(INS_add, addType, tmpReg, memBase->GetRegNum(), tmpReg);

noway_assert(emitInsIsLoad(ins) || (tmpReg != dataReg));
noway_assert(tmpReg != index->GetRegNum());
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