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[SIM] inline support #135
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[SIM] inline support #135
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254971f
inline sim setup
hexdae b50392f
sim file relative
hexdae 586eaef
simpler just file
hexdae 1eaf802
enusre build
hexdae f239e60
Merge remote-tracking branch 'origin/main' into feat/simulation-upgrade
hexdae 34abcb0
add f-string
hexdae 8703bad
add spice model for all generics
hexdae 0cb4247
add tests for all generics
hexdae ea46382
implement better conventions
hexdae 508f08a
fix warnings
hexdae 2f9d9de
fix fmt
hexdae a239a7e
add non ideal models
hexdae 2d1a455
add inductor schematics
hexdae 3a18221
move generic spice lib
hexdae c0e3f53
add provisional modifiers
hexdae 8b2bae8
format
hexdae 426bfa7
better docs
hexdae db51aed
better docs
hexdae ed83dcb
add esl
hexdae f406952
add help
hexdae c9ed6d3
address comments
hexdae 59366e4
improve regression
hexdae eb7162b
add esl and cp
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -1,35 +1,2 @@ | ||
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| sim: sim_VoltageDivider sim_InvertingSum sim_LevelShifter sim_SallenKey sim_TwinTNotch sim_Sum sim_Inductor sim_NetTie sim_Diode sim_Led sim_Crystal | ||
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| sim_VoltageDivider: | ||
| pcb sim simulation/test/test_VoltageDivider.zen --setup simulation/test/test_VoltageDivider.sp -o - | ngspice | ||
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| sim_InvertingSum: | ||
| pcb sim simulation/test/test_InvertingSum.zen --setup simulation/test/test_InvertingSum.sp -o - | ngspice | ||
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| sim_LevelShifter: | ||
| pcb sim simulation/test/test_LevelShifter.zen --setup simulation/test/test_LevelShifter.sp -o - | ngspice | ||
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| sim_SallenKey: | ||
| pcb sim simulation/test/test_SallenKey.zen --setup simulation/test/test_SallenKey.sp -o - | ngspice | ||
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| sim_TwinTNotch: | ||
| pcb sim simulation/test/test_TwinTNotch.zen --setup simulation/test/test_TwinTNotch.sp -o - | ngspice | ||
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| sim_Sum: | ||
| pcb sim simulation/test/test_Sum.zen --setup simulation/test/test_Sum.sp -o - | ngspice | ||
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| sim_Inductor: | ||
| pcb sim simulation/test/test_Inductor.zen --setup simulation/test/test_Inductor.sp -o - | ngspice | ||
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| sim_NetTie: | ||
| pcb sim simulation/test/test_NetTie.zen --setup simulation/test/test_NetTie.sp -o - | ngspice | ||
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| sim_Diode: | ||
| pcb sim simulation/test/test_Diode.zen --setup simulation/test/test_Diode.sp -o - | ngspice | ||
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| sim_Led: | ||
| pcb sim simulation/test/test_Led.zen --setup simulation/test/test_Led.sp -o - | ngspice | ||
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| sim_Crystal: | ||
| pcb sim simulation/test/test_Crystal.zen --setup simulation/test/test_Crystal.sp -o - | ngspice | ||
| _default: | ||
| @just --list |
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,30 @@ | ||
| * BJT SPICE subcircuit | ||
| * Generic bipolar junction transistor model | ||
| * | ||
| * Parameters: | ||
| * BF - Forward current gain (hFE) | ||
| * IS - Saturation current | ||
| * NF - Forward emission coefficient | ||
| * VAF - Forward Early voltage | ||
| * RB - Base resistance | ||
| * RC - Collector resistance | ||
| * RE - Emitter resistance | ||
| * CJE - B-E junction capacitance | ||
| * CJC - B-C junction capacitance | ||
| * | ||
| * Nodes: | ||
| * 1 - Base | ||
| * 2 - Collector | ||
| * 3 - Emitter | ||
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| * NPN transistor | ||
| .SUBCKT NPN 1 2 3 PARAMS: BF=100 IS=1e-14 NF=1.0 VAF=100 RB=10 RC=1 RE=0.5 CJE=2p CJC=1p | ||
| Q1 2 1 3 NPN_MODEL | ||
| .MODEL NPN_MODEL NPN(BF={BF} IS={IS} NF={NF} VAF={VAF} RB={RB} RC={RC} RE={RE} CJE={CJE} CJC={CJC}) | ||
| .ENDS NPN | ||
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| * PNP transistor | ||
| .SUBCKT PNP 1 2 3 PARAMS: BF=100 IS=1e-14 NF=1.0 VAF=100 RB=10 RC=1 RE=0.5 CJE=2p CJC=1p | ||
| Q1 2 1 3 PNP_MODEL | ||
| .MODEL PNP_MODEL PNP(BF={BF} IS={IS} NF={NF} VAF={VAF} RB={RB} RC={RC} RE={RE} CJE={CJE} CJC={CJC}) | ||
| .ENDS PNP |
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,27 @@ | ||
| * Ferrite Bead SPICE subcircuit | ||
| * RLC model capturing frequency-dependent impedance | ||
| * | ||
| * Equivalent circuit: | ||
| * | ||
| * ┌── L ──┐ | ||
| * 1 ── Rdc ──┤ ├── 2 | ||
| * ├─ Rac ─┤ | ||
| * └─ Cp ──┘ | ||
| * | ||
| * Behavior: | ||
| * DC: Z ≈ Rdc (nearly transparent) | ||
| * f_rated: Z peaks ≈ Rac (rated impedance) | ||
| * f >> f_r: Cp dominates, Z drops | ||
| * | ||
| * Parameters: | ||
| * RDC - DC resistance (ohms) | ||
| * L - Equivalent inductance (henries) | ||
| * RAC - AC resistance at resonance (ohms) | ||
| * CP - Parasitic parallel capacitance (farads) | ||
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| .SUBCKT FB 1 2 PARAMS: RDC=0.3 L=350n RAC=220 CP=7.2p | ||
| R_dc 1 mid {RDC} | ||
| L1 mid 2 {L} | ||
| R_ac mid 2 {RAC} | ||
| C_p mid 2 {CP} | ||
| .ENDS FB |
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,28 @@ | ||
| * MOSFET SPICE subcircuit | ||
| * Generic MOSFET model | ||
| * | ||
| * Parameters: | ||
| * VTH - Threshold voltage | ||
| * KP - Transconductance parameter | ||
| * RD - Drain resistance | ||
| * RS - Source resistance | ||
| * CBD - Drain-bulk capacitance | ||
| * CBS - Source-bulk capacitance | ||
| * LAMBDA - Channel-length modulation | ||
| * | ||
| * Nodes: | ||
| * 1 - Gate | ||
| * 2 - Drain | ||
| * 3 - Source | ||
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| * N-Channel MOSFET | ||
| .SUBCKT NMOS 1 2 3 PARAMS: VTH=1.5 KP=120u RD=0.5 RS=0.5 CBD=5p CBS=5p LAMBDA=0.01 | ||
| M1 2 1 3 3 NMOS_MODEL | ||
| .MODEL NMOS_MODEL NMOS(VTO={VTH} KP={KP} RD={RD} RS={RS} CBD={CBD} CBS={CBS} LAMBDA={LAMBDA}) | ||
| .ENDS NMOS | ||
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| * P-Channel MOSFET | ||
| .SUBCKT PMOS 1 2 3 PARAMS: VTH=-1.5 KP=60u RD=0.5 RS=0.5 CBD=5p CBS=5p LAMBDA=0.01 | ||
| M1 2 1 3 3 PMOS_MODEL | ||
| .MODEL PMOS_MODEL PMOS(VTO={VTH} KP={KP} RD={RD} RS={RS} CBD={CBD} CBS={CBS} LAMBDA={LAMBDA}) | ||
| .ENDS PMOS |
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,13 @@ | ||
| * Thermistor SPICE subcircuit | ||
| * Simplified model as a fixed resistor at nominal resistance | ||
| * | ||
| * Parameters: | ||
| * RVAL - Resistance value in ohms (at 25°C) | ||
| * | ||
| * Nodes: | ||
| * 1 - Terminal 1 | ||
| * 2 - Terminal 2 | ||
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| .SUBCKT TH 1 2 PARAMS: RVAL=10000 | ||
| R1 1 2 {RVAL} | ||
| .ENDS TH |
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