Add per-object origin tracking (vOrigins) to Gia_Man_t

[robtaylor]

Summary

This adds lightweight per-object origin tracking to Gia_Man_t, enabling the Yosys abc9 flow to preserve \src (source-location) attributes on LUT cells through ABC's optimization passes.

Motivation

We are working on preserving \src (source-location) attributes through the Yosys abc9 synthesis flow. The approach uses the XAIGER "y" extension to pass an object-to-source mapping through ABC — Yosys writes the mapping on &read, ABC preserves it during optimization, and Yosys reads it back on &write to annotate the resulting LUT cells.

We initially prototyped a &verify -y approach that uses combinational equivalence checking to reconstruct the mapping after optimization, but this only achieves 17-57% coverage on non-trivial designs and doesn't work for sequential circuits. This PR takes a different approach — propagating origins during optimization — which achieves ~100% coverage.

Approach

Add a single Vec_Int_t *vOrigins vector to Gia_Man_t that maps each object to its "origin" input-side object ID:

• Initialized from the "y" extension on &read (AIGER reader)
• Propagated through all dup/conversion/optimization passes
• Written to "y" extension on &write (AIGER writer)
• Heuristic: when creating AND/XOR/MUX via structural hashing, inherit the origin with the lowest valid ID from the parents

Two propagation helpers handle different transformation patterns:

• Gia_ManOriginsDup() — for standard dup operations that use the Value field for old→new mapping
• Gia_ManOriginsAfterRoundTrip() — for GIA→AIG→GIA round-trips (&dc2, &dch) where per-object data is lost; recovers origins via CI/CO correspondence + top-down fanin propagation

Performance

Benchmarked on picorv32 (4-LUT mapping via abc9):

Metric	Without origins	With origins	Overhead
Wall-clock time	~3.0s	~3.02s	~0.6%
Peak memory	~48MB	~49.5MB	~3%
LUT count	identical	identical	0%

The overhead is negligible — approximately 4 bytes per GIA object for the vOrigins vector, with O(1) propagation per node creation.

Coverage

With this change, \src retention on LUT cells after abc9 mapping improves from 17-57% to 100% on all tested designs (simple combinational, Amaranth-style, and larger multi-output designs with 54 LUTs).

Files changed

File	Change
src/aig/gia/gia.h	Add vOrigins field + inline accessors + helper declarations
src/aig/gia/giaMan.c	Free vOrigins in Gia_ManStop
src/aig/gia/giaAiger.c	Read/write vOrigins via "y" extension
src/aig/gia/giaDup.c	Gia_ManOriginsDup + Gia_ManOriginsAfterRoundTrip helpers; instrument all Gia_ManDup* variants
src/aig/gia/giaHash.c	Propagate origins in Gia_ManHashAnd, Gia_ManHashXorReal, Gia_ManHashMuxReal, Gia_ManRehash
src/aig/gia/giaAig.c	Recover origins after AIG round-trips in Gia_ManCompress2 (&dc2) and Gia_ManPerformDch (&dch)
src/aig/gia/giaIf.c	Propagate through IF mapper via iCopy correspondence
src/aig/gia/giaEquiv.c	Propagate in Gia_ManEquivReduce
src/aig/gia/giaMuxes.c	Propagate in Gia_ManDupMuxes/Gia_ManDupNoMuxes
src/aig/gia/giaTim.c	Propagate in Gia_ManDupNormalize/Gia_ManDupUnnormalize
src/aig/gia/giaBalAig.c	Propagate in balance operations
src/opt/dau/dauGia.c	Propagate in Dsm_ManDeriveGia

Context

This is part of work on YosysHQ/yosys#5712 to improve \src attribute retention through the abc9 flow.

cc @alanminko @Ravenslofty — would appreciate your thoughts on this approach.