stm32h5/qspi, drivers/mtd/gd25: add QSPIMEM_QUADDATA flag and GD25 QSPI support#19177
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sammytranGeo wants to merge 2 commits into
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stm32h5/qspi, drivers/mtd/gd25: add QSPIMEM_QUADDATA flag and GD25 QSPI support#19177sammytranGeo wants to merge 2 commits into
sammytranGeo wants to merge 2 commits into
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xiaoxiang781216
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Jun 20, 2026
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@sammytranGeo please fix the CI error (long line and wrong block comment found) You can use the tools/checkpatch.sh to find coding style issues in the source code before creating the commit |
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Summary
include/nuttx/spi/qspi.hcurrently hasQSPIMEM_QUADIOfor 1-4-4 transfers (address and data both on quad lines) but no way to express 1-1-4 (single-line address, quad-width data only). Several NOR flash devices use this mode for page program commands.This adds
QSPIMEM_QUADDATA(bit 1) andQSPIMEM_ISQUADDATA()to fill that gap, and extends the STM32H5 QSPI driver to setCCR_DMODE_QUADwhen eitherQUADIOorQUADDATAis set. The address-mode selection block is unchanged, soQUADDATAkeepsaddrmodeat single-line.The GD25 MTD driver is updated as the first user, gaining a
CONFIG_GD25_QSPIbuild option that switches it from SPI to QuadSPI. When enabled,gd25_initialize()accepts aqspi_dev_spointer and abool unprotect. Both 3- and 4-byte address modes are supported, and the existing SPI path is fully preserved whenCONFIG_GD25_QSPI=n.Impact
qspi.h: additive change only — new flag and macro, no existing behaviour changed.stm32h5/stm32_qspi.c: theelse if (QSPIMEM_ISQUADIO(...))branch gains an|| QSPIMEM_ISQUADDATA(...)condition. No impact on existing QUADIO users.drivers/mtd/gd25.c: newCONFIG_GD25_QSPIKconfig option, off by default. Existing SPI users are unaffected.Testing
Host: Linux x86_64, arm-none-eabi-gcc 13.2
Board: Custom STM32H563ZI board with GD25Q256 NOR flash on OCTOSPI1
Config: Custom board NSH config with
CONFIG_STM32_QSPI1=y,CONFIG_MTD_GD25=y,CONFIG_GD25_QSPI=y,CONFIG_GD25_QSPIFREQUENCY=40000000,CONFIG_FS_LITTLEFS=yLittleFS was mounted on
/dev/mtd0and a file written and read back to exercise both transfer modes end-to-end: