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feat: Implement ARM CPU feature detection across Linux, Android, BSD, Windows, macOS, and iOS #62

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Merged
Xor-el merged 1 commit into from
Apr 12, 2026
Merged

feat: Implement ARM CPU feature detection across Linux, Android, BSD, Windows, macOS, and iOS #62

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2 changes: 2 additions & 0 deletions HashLib.Benchmark/Delphi/PerformanceBenchmarkConsole.dpr
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Original file line number Diff line number Diff line change
Expand Up @@ -128,6 +128,8 @@ uses
HlpX86SimdFeatures in '..\..\HashLib\src\Utils\HlpX86SimdFeatures.pas',
HlpArmSimdFeatures in '..\..\HashLib\src\Utils\HlpArmSimdFeatures.pas',
HlpSimdLevels in '..\..\HashLib\src\Utils\HlpSimdLevels.pas',
HlpArmHwCapProvider in '..\..\HashLib\src\Utils\HlpArmHwCapProvider.pas',
HlpDarwinSysCtl in '..\..\HashLib\src\Utils\HlpDarwinSysCtl.pas',
HlpHashLibTypes in '..\..\HashLib\src\Utils\HlpHashLibTypes.pas',
HlpArrayUtils in '..\..\HashLib\src\Utils\HlpArrayUtils.pas';

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2 changes: 2 additions & 0 deletions HashLib.Tests/Delphi.Tests/HashLib.Tests.dpr
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Expand Up @@ -146,6 +146,8 @@ uses
HlpX86SimdFeatures in '..\..\HashLib\src\Utils\HlpX86SimdFeatures.pas',
HlpArmSimdFeatures in '..\..\HashLib\src\Utils\HlpArmSimdFeatures.pas',
HlpSimdLevels in '..\..\HashLib\src\Utils\HlpSimdLevels.pas',
HlpArmHwCapProvider in '..\..\HashLib\src\Utils\HlpArmHwCapProvider.pas',
HlpDarwinSysCtl in '..\..\HashLib\src\Utils\HlpDarwinSysCtl.pas',
HlpHashLibTypes in '..\..\HashLib\src\Utils\HlpHashLibTypes.pas',
HlpArrayUtils in '..\..\HashLib\src\Utils\HlpArrayUtils.pas',
HashLibTestBase in '..\src\HashLibTestBase.pas',
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2 changes: 1 addition & 1 deletion HashLib/src/Checksum/HlpAdler32Dispatch.pas
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Expand Up @@ -201,7 +201,7 @@ procedure InitDispatch();
end;
{$ENDIF}
{$IFDEF HASHLIB_X86_64_ASM}
case TCpuFeatures.X86.GetSimdLevel() of
case TCpuFeatures.X86.GetActiveSimdLevel() of
TX86SimdLevel.AVX2:
begin
Adler32_Update := @Adler32_Update_Avx2;
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2 changes: 1 addition & 1 deletion HashLib/src/Checksum/HlpCRCDispatch.pas
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Expand Up @@ -521,7 +521,7 @@ procedure InitDispatch();
end;
{$ENDIF HASHLIB_I386_ASM}
{$IFDEF HASHLIB_X86_64_ASM}
case TCpuFeatures.X86.GetSimdLevel() of
case TCpuFeatures.X86.GetActiveSimdLevel() of
TX86SimdLevel.AVX2, TX86SimdLevel.SSSE3, TX86SimdLevel.SSE2:
BindSse2CrcFold;
end;
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2 changes: 1 addition & 1 deletion HashLib/src/Crypto/HlpBlake2BDispatch.pas
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Expand Up @@ -140,7 +140,7 @@ procedure InitDispatch();
end;
{$ENDIF}
{$IFDEF HASHLIB_X86_64_ASM}
case TCpuFeatures.X86.GetSimdLevel() of
case TCpuFeatures.X86.GetActiveSimdLevel() of
TX86SimdLevel.AVX2:
begin
Blake2B_Compress := @Blake2B_Compress_Avx2;
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2 changes: 1 addition & 1 deletion HashLib/src/Crypto/HlpBlake2SDispatch.pas
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Expand Up @@ -138,7 +138,7 @@ procedure InitDispatch();
end;
{$ENDIF}
{$IFDEF HASHLIB_X86_64_ASM}
case TCpuFeatures.X86.GetSimdLevel() of
case TCpuFeatures.X86.GetActiveSimdLevel() of
TX86SimdLevel.AVX2:
begin
Blake2S_Compress := @Blake2S_Compress_Avx2;
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2 changes: 1 addition & 1 deletion HashLib/src/Crypto/HlpBlake3Dispatch.pas
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Expand Up @@ -723,7 +723,7 @@ procedure InitDispatch();
end;
{$ENDIF}
{$IFDEF HASHLIB_X86_64_ASM}
case TCpuFeatures.X86.GetSimdLevel() of
case TCpuFeatures.X86.GetActiveSimdLevel() of
TX86SimdLevel.AVX2:
begin
Blake3_Compress := @Blake3_Compress_Avx2;
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2 changes: 1 addition & 1 deletion HashLib/src/Crypto/HlpSHA1Dispatch.pas
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Expand Up @@ -193,7 +193,7 @@ procedure InitDispatch();
SHA1_Compress := @SHA1_Compress_ShaNi_Wrap;
Exit;
end;
case TCpuFeatures.X86.GetSimdLevel() of
case TCpuFeatures.X86.GetActiveSimdLevel() of
TX86SimdLevel.AVX2:
begin
SHA1_Compress := @SHA1_Compress_Avx2_Wrap;
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2 changes: 1 addition & 1 deletion HashLib/src/Crypto/HlpSHA2_256Dispatch.pas
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Expand Up @@ -203,7 +203,7 @@ procedure InitDispatch();
SHA256_Compress := @SHA256_Compress_ShaNi_Wrap;
Exit;
end;
case TCpuFeatures.X86.GetSimdLevel() of
case TCpuFeatures.X86.GetActiveSimdLevel() of
TX86SimdLevel.AVX2:
begin
SHA256_Compress := @SHA256_Compress_Avx2_Wrap;
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2 changes: 1 addition & 1 deletion HashLib/src/Crypto/HlpSHA2_512Dispatch.pas
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Expand Up @@ -207,7 +207,7 @@ procedure InitDispatch();
end;
{$ENDIF}
{$IFDEF HASHLIB_X86_64_ASM}
case TCpuFeatures.X86.GetSimdLevel() of
case TCpuFeatures.X86.GetActiveSimdLevel() of
TX86SimdLevel.AVX2:
begin
SHA512_Compress := @SHA512_Compress_Avx2_Wrap;
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2 changes: 1 addition & 1 deletion HashLib/src/Crypto/HlpSHA3Dispatch.pas
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Expand Up @@ -497,7 +497,7 @@ procedure InitDispatch();
KeccakF1600_Permute := @KeccakF1600_Scalar;
KeccakF1600_Absorb := @KeccakF1600_Absorb_Scalar;
{$IFDEF HASHLIB_X86_64_ASM}
case TCpuFeatures.X86.GetSimdLevel() of
case TCpuFeatures.X86.GetActiveSimdLevel() of
TX86SimdLevel.AVX2:
begin
KeccakF1600_Permute := @KeccakF1600_Avx2_Wrap;
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2 changes: 1 addition & 1 deletion HashLib/src/Hash64/HlpXXHash3Dispatch.pas
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Expand Up @@ -225,7 +225,7 @@ procedure InitDispatch();
end;
{$ENDIF}
{$IFDEF HASHLIB_X86_64_ASM}
case TCpuFeatures.X86.GetSimdLevel() of
case TCpuFeatures.X86.GetActiveSimdLevel() of
TX86SimdLevel.AVX2:
begin
XXH3_Accumulate512 := @XXH3_Accumulate512_Avx2;
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90 changes: 50 additions & 40 deletions HashLib/src/Include/HashLib.inc
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Expand Up @@ -16,7 +16,7 @@
{$IFDEF FPC}
{$I HashLibFPC.inc}
{$ELSE}
// Delphi 2010 and Above
// Delphi 2010 and Above
{$IF CompilerVersion < 21.0}
{$MESSAGE ERROR 'This Library requires Delphi 2010 or higher.'}
{$IFEND}
Expand All @@ -43,54 +43,54 @@
{$DEFINE HASHLIB_USE_PPL} // Use Parallel Programming Library
{$IFEND}

{============================== CPU Architecture ==============================}
{============================== CPU Architecture ==============================}

{$IF DEFINED(CPU386)}
{$DEFINE HASHLIB_I386}
{$IFDEF MSWINDOWS}
{$DEFINE HASHLIB_I386_ASM}
{$ENDIF}
{$IFEND}

{$IF DEFINED(CPUX64)}
{$DEFINE HASHLIB_X86_64}
{$IFDEF MSWINDOWS}
{$DEFINE HASHLIB_X86_64_ASM}
{$ENDIF}
{$IFEND}
{$IF DEFINED(CPU386)}
{$DEFINE HASHLIB_I386}
{$IFDEF MSWINDOWS}
{$DEFINE HASHLIB_I386_ASM}
{$ENDIF}
{$IFEND}

{$IFDEF CPUARM32}
{$DEFINE HASHLIB_ARM}
{$ENDIF}
{$IF DEFINED(CPUX64)}
{$DEFINE HASHLIB_X86_64}
{$IFDEF MSWINDOWS}
{$DEFINE HASHLIB_X86_64_ASM}
{$ENDIF}
{$IFEND}

{$IFDEF CPUARM64}
{$DEFINE HASHLIB_AARCH64}
{$ENDIF}
{$IFDEF CPUARM32}
{$DEFINE HASHLIB_ARM32}
{$ENDIF}

{$ENDIF}
{$IFDEF CPUARM64}
{$DEFINE HASHLIB_AARCH64}
{$ENDIF}

{================================= Target OS ==================================}
{================================= Target OS ==================================}

{$IFDEF MSWINDOWS}
{$DEFINE HASHLIB_MSWINDOWS}
{$ENDIF}
{$IFDEF MSWINDOWS}
{$DEFINE HASHLIB_MSWINDOWS}
{$ENDIF}

{$IFDEF IOS}
{$DEFINE HASHLIB_IOS}
{$ENDIF}
{$IFDEF IOS}
{$DEFINE HASHLIB_IOS}
{$ENDIF}

{$IFDEF MACOS}
{$IFNDEF IOS}
{$IFDEF MACOS}
{$IFNDEF IOS}
{$DEFINE HASHLIB_MACOS}
{$ENDIF}
{$ENDIF}
{$ENDIF}
{$ENDIF}

{$IFDEF ANDROID}
{$DEFINE HASHLIB_ANDROID}
{$ENDIF}
{$IFDEF ANDROID}
{$DEFINE HASHLIB_ANDROID}
{$ENDIF}

{$IFDEF LINUX}
{$DEFINE HASHLIB_LINUX}
{$ENDIF}

{$IFDEF LINUX}
{$DEFINE HASHLIB_LINUX}
{$ENDIF}

{========================== Common Compiler Settings ==========================}
Expand All @@ -102,7 +102,17 @@
{$SCOPEDENUMS ON}
{$POINTERMATH ON}

{============================== SIMD Settings =================================}
{========================== Common Defines Settings ===========================}

{$IF DEFINED(HASHLIB_I386) OR DEFINED(HASHLIB_X86_64)}
{$DEFINE HASHLIB_X86}
{$IFEND}

{$IF DEFINED(HASHLIB_ARM32) OR DEFINED(HASHLIB_AARCH64)}
{$DEFINE HASHLIB_ARM}
{$IFEND}

{============================ Common SIMD Settings ============================}

// Uncomment to force scalar dispatch (available on all platforms):
// {$DEFINE HASHLIB_FORCE_SCALAR}
Expand All @@ -111,7 +121,7 @@
{$DEFINE HASHLIB_X86_SIMD}
{$IFEND}

{$IF DEFINED(HASHLIB_ARM_ASM) OR DEFINED(HASHLIB_AARCH64_ASM)}
{$IF DEFINED(HASHLIB_ARM32_ASM) OR DEFINED(HASHLIB_AARCH64_ASM)}
{$DEFINE HASHLIB_ARM_SIMD}
{$IFEND}

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32 changes: 16 additions & 16 deletions HashLib/src/Include/HashLibFPC.inc
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Expand Up @@ -13,25 +13,25 @@

// FPC 3.2.2 and Above
{$IF FPC_FULLVERSION < 30202}
{$MESSAGE ERROR 'This Library requires FreePascal 3.2.2 or higher.'}
{$MESSAGE ERROR 'This Library requires FreePascal 3.2.2 or higher.'}
{$IFEND}

{$IFDEF ENDIAN_BIG}
{$MESSAGE FATAL 'This Library does not support "Big Endian" processors yet.'}
{$MESSAGE FATAL 'This Library does not support "Big Endian" processors yet.'}
{$ENDIF}

{$IFDEF FPC_LITTLE_ENDIAN}
{$DEFINE HASHLIB_LITTLE_ENDIAN}
{$DEFINE HASHLIB_LITTLE_ENDIAN}
{$ENDIF}

{$IFDEF FPC_REQUIRES_PROPER_ALIGNMENT}
{$DEFINE HASHLIB_REQUIRES_PROPER_ALIGNMENT}
{$DEFINE HASHLIB_REQUIRES_PROPER_ALIGNMENT}
{$ENDIF}

{========================= FPC Version Features ===============================}

{$IF FPC_FULLVERSION >= 30301}
{.$DEFINE HASHLIB_USE_PPL} // Use Parallel Programming Library
{.$DEFINE HASHLIB_USE_PPL} // Use Parallel Programming Library
{$IFEND}

{$DEFINE USE_UNROLLED_VARIANT}
Expand All @@ -49,43 +49,43 @@
{$IFEND}

{$IFDEF CPUARM}
{$DEFINE HASHLIB_ARM}
{$DEFINE HASHLIB_ARM_ASM}
{$DEFINE HASHLIB_ARM32}
{$DEFINE HASHLIB_ARM32_ASM}
{$ENDIF}

{$IFDEF CPUAARCH64}
{$DEFINE HASHLIB_AARCH64}
{$DEFINE HASHLIB_AARCH64_ASM}
{$DEFINE HASHLIB_AARCH64}
{$DEFINE HASHLIB_AARCH64_ASM}
{$ENDIF}

{================================= Target OS ==================================}

{$IFDEF MSWINDOWS}
{$DEFINE HASHLIB_MSWINDOWS}
{$DEFINE HASHLIB_MSWINDOWS}
{$ENDIF}

{$IFDEF ANDROID}
{$DEFINE HASHLIB_ANDROID}
{$DEFINE HASHLIB_ANDROID}
{$ENDIF}

{$IFDEF IOS}
{$DEFINE HASHLIB_IOS}
{$DEFINE HASHLIB_IOS}
{$ENDIF}

{$IF DEFINED(DARWIN) AND NOT DEFINED(HASHLIB_IOS)}
{$DEFINE HASHLIB_MACOS}
{$DEFINE HASHLIB_MACOS}
{$IFEND}

{$IF DEFINED(FREEBSD) OR DEFINED(NETBSD) OR DEFINED(OPENBSD) OR DEFINED(DRAGONFLY)}
{$DEFINE HASHLIB_BSD}
{$DEFINE HASHLIB_BSD}
{$IFEND}

{$IFDEF LINUX}
{$DEFINE HASHLIB_LINUX}
{$DEFINE HASHLIB_LINUX}
{$ENDIF}

{$IFDEF SOLARIS}
{$DEFINE HASHLIB_SOLARIS}
{$DEFINE HASHLIB_SOLARIS}
{$ENDIF}

{========================= Compiler Mode & Optimizations ======================}
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2 changes: 1 addition & 1 deletion HashLib/src/KDF/HlpArgon2Dispatch.pas
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Expand Up @@ -145,7 +145,7 @@ procedure InitDispatch();
end;
{$ENDIF}
{$IFDEF HASHLIB_X86_64_ASM}
case TCpuFeatures.X86.GetSimdLevel() of
case TCpuFeatures.X86.GetActiveSimdLevel() of
TX86SimdLevel.AVX2:
begin
Argon2_FillBlock := @Argon2_FillBlock_Avx2;
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2 changes: 1 addition & 1 deletion HashLib/src/KDF/HlpScryptDispatch.pas
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Expand Up @@ -210,7 +210,7 @@ procedure InitDispatch();
end;
{$ENDIF}
{$IFDEF HASHLIB_X86_64_ASM}
case TCpuFeatures.X86.GetSimdLevel() of
case TCpuFeatures.X86.GetActiveSimdLevel() of
TX86SimdLevel.AVX2:
begin
Scrypt_SalsaXor := @Scrypt_SalsaXor_Avx2;
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2 changes: 2 additions & 0 deletions HashLib/src/Packages/Delphi/HashLib4PascalPackage.dpk
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Expand Up @@ -154,6 +154,8 @@ contains
HlpX86SimdFeatures in '..\..\Utils\HlpX86SimdFeatures.pas',
HlpArmSimdFeatures in '..\..\Utils\HlpArmSimdFeatures.pas',
HlpSimdLevels in '..\..\Utils\HlpSimdLevels.pas',
HlpArmHwCapProvider in '..\..\Utils\HlpArmHwCapProvider.pas',
HlpDarwinSysCtl in '..\..\Utils\HlpDarwinSysCtl.pas',
HlpHashLibTypes in '..\..\Utils\HlpHashLibTypes.pas',
HlpArrayUtils in '..\..\Utils\HlpArrayUtils.pas';

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10 changes: 9 additions & 1 deletion HashLib/src/Packages/FPC/HashLib4PascalPackage.lpk
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Expand Up @@ -29,7 +29,7 @@
"/>
<License Value="MIT License"/>
<Version Major="4" Minor="2"/>
<Files Count="123">
<Files Count="125">
<Item1>
<Filename Value="..\..\Base\HlpHash.pas"/>
<UnitName Value="HlpHash"/>
Expand Down Expand Up @@ -522,6 +522,14 @@
<Filename Value="..\..\Utils\HlpX86SimdFeatures.pas"/>
<UnitName Value="HlpX86SimdFeatures"/>
</Item123>
<Item124>
<Filename Value="..\..\Utils\HlpArmHwCapProvider.pas"/>
<UnitName Value="HlpArmHwCapProvider"/>
</Item124>
<Item125>
<Filename Value="..\..\Utils\HlpDarwinSysCtl.pas"/>
<UnitName Value="HlpDarwinSysCtl"/>
</Item125>
</Files>
<CompatibilityMode Value="True"/>
<LazDoc PackageName="(default)"/>
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3 changes: 2 additions & 1 deletion HashLib/src/Packages/FPC/HashLib4PascalPackage.pas
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Expand Up @@ -33,7 +33,8 @@ interface
HlpArgon2Dispatch, HlpScryptDispatch, HlpBlake3Dispatch,
HlpSHA2_256Dispatch, HlpSHA2_512Dispatch, HlpSHA1Dispatch,
HlpAdler32Dispatch, HlpGF2, HlpCRCDispatch, HlpSHA3Dispatch,
HlpArmSimdFeatures, HlpSimdLevels, HlpX86SimdFeatures;
HlpArmSimdFeatures, HlpSimdLevels, HlpX86SimdFeatures, HlpArmHwCapProvider,
HlpDarwinSysCtl;

implementation

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