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Merged
Xor-el merged 4 commits into from
Apr 12, 2026
Merged

Refactor CPU feature detection: split x86 and ARM into separate units with shared SIMD level types #61

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737767f
initial cpu refactor features
Xor-el Apr 11, 2026
55710cb
Add AesNI check for X86
Xor-el Apr 11, 2026
8b59c30
update defines
Xor-el Apr 11, 2026
d99c752
update defines
Xor-el Apr 11, 2026
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3 changes: 3 additions & 0 deletions HashLib.Benchmark/Delphi/PerformanceBenchmarkConsole.dpr
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Original file line number Diff line number Diff line change
Expand Up @@ -125,6 +125,9 @@ uses
HlpBitConverter in '..\..\HashLib\src\Utils\HlpBitConverter.pas',
HlpBits in '..\..\HashLib\src\Utils\HlpBits.pas',
HlpCpuFeatures in '..\..\HashLib\src\Utils\HlpCpuFeatures.pas',
HlpX86SimdFeatures in '..\..\HashLib\src\Utils\HlpX86SimdFeatures.pas',
HlpArmSimdFeatures in '..\..\HashLib\src\Utils\HlpArmSimdFeatures.pas',
HlpSimdLevels in '..\..\HashLib\src\Utils\HlpSimdLevels.pas',
HlpHashLibTypes in '..\..\HashLib\src\Utils\HlpHashLibTypes.pas',
HlpArrayUtils in '..\..\HashLib\src\Utils\HlpArrayUtils.pas';

Expand Down
3 changes: 3 additions & 0 deletions HashLib.Benchmark/Delphi/PerformanceBenchmarkFMX.dpr
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Original file line number Diff line number Diff line change
Expand Up @@ -124,6 +124,9 @@ uses
HlpBitConverter in '..\..\HashLib\src\Utils\HlpBitConverter.pas',
HlpBits in '..\..\HashLib\src\Utils\HlpBits.pas',
HlpCpuFeatures in '..\..\HashLib\src\Utils\HlpCpuFeatures.pas',
HlpX86SimdFeatures in '..\..\HashLib\src\Utils\HlpX86SimdFeatures.pas',
HlpArmSimdFeatures in '..\..\HashLib\src\Utils\HlpArmSimdFeatures.pas',
HlpSimdLevels in '..\..\HashLib\src\Utils\HlpSimdLevels.pas',
HlpHashLibTypes in '..\..\HashLib\src\Utils\HlpHashLibTypes.pas',
HlpArrayUtils in '..\..\HashLib\src\Utils\HlpArrayUtils.pas';

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3 changes: 3 additions & 0 deletions HashLib.Tests/Delphi.Tests/HashLib.Tests.dpr
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Original file line number Diff line number Diff line change
Expand Up @@ -143,6 +143,9 @@ uses
HlpBitConverter in '..\..\HashLib\src\Utils\HlpBitConverter.pas',
HlpBits in '..\..\HashLib\src\Utils\HlpBits.pas',
HlpCpuFeatures in '..\..\HashLib\src\Utils\HlpCpuFeatures.pas',
HlpX86SimdFeatures in '..\..\HashLib\src\Utils\HlpX86SimdFeatures.pas',
HlpArmSimdFeatures in '..\..\HashLib\src\Utils\HlpArmSimdFeatures.pas',
HlpSimdLevels in '..\..\HashLib\src\Utils\HlpSimdLevels.pas',
HlpHashLibTypes in '..\..\HashLib\src\Utils\HlpHashLibTypes.pas',
HlpArrayUtils in '..\..\HashLib\src\Utils\HlpArrayUtils.pas',
HashLibTestBase in '..\src\HashLibTestBase.pas',
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17 changes: 9 additions & 8 deletions HashLib/src/Checksum/HlpAdler32Dispatch.pas
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Expand Up @@ -13,7 +13,8 @@ interface
implementation

uses
HlpCpuFeatures;
HlpCpuFeatures,
HlpSimdLevels;

const
ModAdler = UInt32(65521);
Expand Down Expand Up @@ -188,28 +189,28 @@ procedure InitDispatch();
begin
Adler32_Update := @Adler32_Update_Scalar;
{$IFDEF HASHLIB_I386_ASM}
case TCpuFeatures.GetActiveLevel() of
TCpuSimdLevel.SSSE3:
case TCpuFeatures.X86.GetSimdLevel() of
TX86SimdLevel.SSSE3:
begin
Adler32_Update := @Adler32_Update_Ssse3;
end;
TCpuSimdLevel.SSE2:
TX86SimdLevel.SSE2:
begin
Adler32_Update := @Adler32_Update_Sse2;
end;
end;
{$ENDIF}
{$IFDEF HASHLIB_X86_64_ASM}
case TCpuFeatures.GetActiveLevel() of
TCpuSimdLevel.AVX2:
case TCpuFeatures.X86.GetSimdLevel() of
TX86SimdLevel.AVX2:
begin
Adler32_Update := @Adler32_Update_Avx2;
end;
TCpuSimdLevel.SSSE3:
TX86SimdLevel.SSSE3:
begin
Adler32_Update := @Adler32_Update_Ssse3;
end;
TCpuSimdLevel.SSE2:
TX86SimdLevel.SSE2:
begin
Adler32_Update := @Adler32_Update_Sse2;
end;
Expand Down
15 changes: 8 additions & 7 deletions HashLib/src/Checksum/HlpCRCDispatch.pas
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Original file line number Diff line number Diff line change
Expand Up @@ -78,7 +78,8 @@ implementation

uses
HlpConverters,
HlpCpuFeatures;
HlpCpuFeatures,
HlpSimdLevels;

// =============================================================================
// Scalar fallback implementation
Expand Down Expand Up @@ -494,15 +495,15 @@ procedure InitDispatch();
CRC_Fold_UsesPclmul := False;

{$IFDEF HASHLIB_X86_64_ASM}
if TCpuFeatures.HasVPCLMULQDQ() then
if TCpuFeatures.X86.HasVPCLMULQDQ() then
begin
CRC_Fold_Lsb := @CRC_Fold_Vpclmul;
CRC_Fold_Msb := @CRC_Fold_Vpclmul_Msb;
CRC_Fold_Lsb32 := @CRC_Fold_Vpclmul;
CRC_Fold_UsesPclmul := True;
Exit;
end;
if TCpuFeatures.HasPCLMULQDQ() then
if TCpuFeatures.X86.HasPCLMULQDQ() then
begin
CRC_Fold_Lsb := @CRC_Fold_Pclmul;
CRC_Fold_Msb := @CRC_Fold_Pclmul_Msb;
Expand All @@ -514,14 +515,14 @@ procedure InitDispatch();

{$IFDEF HASHLIB_X86_SIMD}
{$IFDEF HASHLIB_I386_ASM}
case TCpuFeatures.GetActiveLevel() of
TCpuSimdLevel.SSSE3, TCpuSimdLevel.SSE2:
case TCpuFeatures.X86.GetSimdLevel() of
TX86SimdLevel.SSSE3, TX86SimdLevel.SSE2:
BindSse2CrcFold;
end;
{$ENDIF HASHLIB_I386_ASM}
{$IFDEF HASHLIB_X86_64_ASM}
case TCpuFeatures.GetActiveLevel() of
TCpuSimdLevel.AVX2, TCpuSimdLevel.SSSE3, TCpuSimdLevel.SSE2:
case TCpuFeatures.X86.GetSimdLevel() of
TX86SimdLevel.AVX2, TX86SimdLevel.SSSE3, TX86SimdLevel.SSE2:
BindSse2CrcFold;
end;
{$ENDIF HASHLIB_X86_64_ASM}
Expand Down
13 changes: 7 additions & 6 deletions HashLib/src/Crypto/HlpBlake2BDispatch.pas
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Original file line number Diff line number Diff line change
Expand Up @@ -22,7 +22,8 @@ implementation

uses
HlpBits,
HlpCpuFeatures;
HlpCpuFeatures,
HlpSimdLevels;

const
Blake2BSigma: array [0 .. 11, 0 .. 15] of Int32 = (
Expand Down Expand Up @@ -131,20 +132,20 @@ procedure InitDispatch();
begin
Blake2B_Compress := @Blake2B_Compress_Scalar;
{$IFDEF HASHLIB_I386_ASM}
case TCpuFeatures.GetActiveLevel() of
TCpuSimdLevel.SSE2, TCpuSimdLevel.SSSE3:
case TCpuFeatures.X86.GetSimdLevel() of
TX86SimdLevel.SSE2, TX86SimdLevel.SSSE3:
begin
Blake2B_Compress := @Blake2B_Compress_Sse2;
end;
end;
{$ENDIF}
{$IFDEF HASHLIB_X86_64_ASM}
case TCpuFeatures.GetActiveLevel() of
TCpuSimdLevel.AVX2:
case TCpuFeatures.X86.GetSimdLevel() of
TX86SimdLevel.AVX2:
begin
Blake2B_Compress := @Blake2B_Compress_Avx2;
end;
TCpuSimdLevel.SSE2, TCpuSimdLevel.SSSE3:
TX86SimdLevel.SSE2, TX86SimdLevel.SSSE3:
begin
Blake2B_Compress := @Blake2B_Compress_Sse2;
end;
Expand Down
13 changes: 7 additions & 6 deletions HashLib/src/Crypto/HlpBlake2SDispatch.pas
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Original file line number Diff line number Diff line change
Expand Up @@ -22,7 +22,8 @@ implementation

uses
HlpBits,
HlpCpuFeatures;
HlpCpuFeatures,
HlpSimdLevels;

const
Blake2SSigma: array [0 .. 9, 0 .. 15] of Int32 = (
Expand Down Expand Up @@ -129,20 +130,20 @@ procedure InitDispatch();
begin
Blake2S_Compress := @Blake2S_Compress_Scalar;
{$IFDEF HASHLIB_I386_ASM}
case TCpuFeatures.GetActiveLevel() of
TCpuSimdLevel.SSE2, TCpuSimdLevel.SSSE3:
case TCpuFeatures.X86.GetSimdLevel() of
TX86SimdLevel.SSE2, TX86SimdLevel.SSSE3:
begin
Blake2S_Compress := @Blake2S_Compress_Sse2;
end;
end;
{$ENDIF}
{$IFDEF HASHLIB_X86_64_ASM}
case TCpuFeatures.GetActiveLevel() of
TCpuSimdLevel.AVX2:
case TCpuFeatures.X86.GetSimdLevel() of
TX86SimdLevel.AVX2:
begin
Blake2S_Compress := @Blake2S_Compress_Avx2;
end;
TCpuSimdLevel.SSE2, TCpuSimdLevel.SSSE3:
TX86SimdLevel.SSE2, TX86SimdLevel.SSSE3:
begin
Blake2S_Compress := @Blake2S_Compress_Sse2;
end;
Expand Down
13 changes: 7 additions & 6 deletions HashLib/src/Crypto/HlpBlake3Dispatch.pas
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Original file line number Diff line number Diff line change
Expand Up @@ -26,7 +26,8 @@ implementation

uses
HlpBits,
HlpCpuFeatures;
HlpCpuFeatures,
HlpSimdLevels;

const
Blake3IV: array [0 .. 3] of UInt32 = (
Expand Down Expand Up @@ -712,8 +713,8 @@ procedure InitDispatch();
Blake3_HashMany := @Blake3_HashMany_Scalar;
Blake3_ParallelDegree := 1;
{$IFDEF HASHLIB_I386_ASM}
case TCpuFeatures.GetActiveLevel() of
TCpuSimdLevel.SSE2, TCpuSimdLevel.SSSE3:
case TCpuFeatures.X86.GetSimdLevel() of
TX86SimdLevel.SSE2, TX86SimdLevel.SSSE3:
begin
Blake3_Compress := @Blake3_Compress_Sse2;
Blake3_HashMany := @Blake3_HashMany_Sse2;
Expand All @@ -722,14 +723,14 @@ procedure InitDispatch();
end;
{$ENDIF}
{$IFDEF HASHLIB_X86_64_ASM}
case TCpuFeatures.GetActiveLevel() of
TCpuSimdLevel.AVX2:
case TCpuFeatures.X86.GetSimdLevel() of
TX86SimdLevel.AVX2:
begin
Blake3_Compress := @Blake3_Compress_Avx2;
Blake3_HashMany := @Blake3_HashMany_Avx2;
Blake3_ParallelDegree := 8;
end;
TCpuSimdLevel.SSE2, TCpuSimdLevel.SSSE3:
TX86SimdLevel.SSE2, TX86SimdLevel.SSSE3:
begin
Blake3_Compress := @Blake3_Compress_Sse2;
Blake3_HashMany := @Blake3_HashMany_Sse2;
Expand Down
19 changes: 10 additions & 9 deletions HashLib/src/Crypto/HlpSHA1Dispatch.pas
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Original file line number Diff line number Diff line change
Expand Up @@ -27,7 +27,8 @@ implementation
uses
HlpBits,
HlpConverters,
HlpCpuFeatures;
HlpCpuFeatures,
HlpSimdLevels;

// =============================================================================
// Scalar fallback implementation
Expand Down Expand Up @@ -175,33 +176,33 @@ procedure InitDispatch();
begin
SHA1_Compress := @SHA1_Compress_Scalar;
{$IFDEF HASHLIB_I386_ASM}
case TCpuFeatures.GetActiveLevel() of
TCpuSimdLevel.SSSE3:
case TCpuFeatures.X86.GetSimdLevel() of
TX86SimdLevel.SSSE3:
begin
SHA1_Compress := @SHA1_Compress_Ssse3_Wrap;
end;
TCpuSimdLevel.SSE2:
TX86SimdLevel.SSE2:
begin
SHA1_Compress := @SHA1_Compress_Sse2;
end;
end;
{$ENDIF}
{$IFDEF HASHLIB_X86_64_ASM}
if TCpuFeatures.HasSHANI() then
if TCpuFeatures.X86.HasSHANI() then
begin
SHA1_Compress := @SHA1_Compress_ShaNi_Wrap;
Exit;
end;
case TCpuFeatures.GetActiveLevel() of
TCpuSimdLevel.AVX2:
case TCpuFeatures.X86.GetSimdLevel() of
TX86SimdLevel.AVX2:
begin
SHA1_Compress := @SHA1_Compress_Avx2_Wrap;
end;
TCpuSimdLevel.SSSE3:
TX86SimdLevel.SSSE3:
begin
SHA1_Compress := @SHA1_Compress_Ssse3_Wrap;
end;
TCpuSimdLevel.SSE2:
TX86SimdLevel.SSE2:
begin
SHA1_Compress := @SHA1_Compress_Sse2;
end;
Expand Down
19 changes: 10 additions & 9 deletions HashLib/src/Crypto/HlpSHA2_256Dispatch.pas
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Original file line number Diff line number Diff line change
Expand Up @@ -39,7 +39,8 @@ implementation
uses
HlpBits,
HlpConverters,
HlpCpuFeatures;
HlpCpuFeatures,
HlpSimdLevels;

// =============================================================================
// Scalar fallback implementation
Expand Down Expand Up @@ -185,33 +186,33 @@ procedure InitDispatch();
begin
SHA256_Compress := @SHA256_Compress_Scalar;
{$IFDEF HASHLIB_I386_ASM}
case TCpuFeatures.GetActiveLevel() of
TCpuSimdLevel.SSSE3:
case TCpuFeatures.X86.GetSimdLevel() of
TX86SimdLevel.SSSE3:
begin
SHA256_Compress := @SHA256_Compress_Ssse3_Wrap;
end;
TCpuSimdLevel.SSE2:
TX86SimdLevel.SSE2:
begin
SHA256_Compress := @SHA256_Compress_Sse2_Wrap;
end;
end;
{$ENDIF}
{$IFDEF HASHLIB_X86_64_ASM}
if TCpuFeatures.HasSHANI() then
if TCpuFeatures.X86.HasSHANI() then
begin
SHA256_Compress := @SHA256_Compress_ShaNi_Wrap;
Exit;
end;
case TCpuFeatures.GetActiveLevel() of
TCpuSimdLevel.AVX2:
case TCpuFeatures.X86.GetSimdLevel() of
TX86SimdLevel.AVX2:
begin
SHA256_Compress := @SHA256_Compress_Avx2_Wrap;
end;
TCpuSimdLevel.SSSE3:
TX86SimdLevel.SSSE3:
begin
SHA256_Compress := @SHA256_Compress_Ssse3_Wrap;
end;
TCpuSimdLevel.SSE2:
TX86SimdLevel.SSE2:
begin
SHA256_Compress := @SHA256_Compress_Sse2_Wrap;
end;
Expand Down
17 changes: 9 additions & 8 deletions HashLib/src/Crypto/HlpSHA2_512Dispatch.pas
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Expand Up @@ -63,7 +63,8 @@ implementation
uses
HlpBits,
HlpConverters,
HlpCpuFeatures;
HlpCpuFeatures,
HlpSimdLevels;

// =============================================================================
// Scalar fallback implementation
Expand Down Expand Up @@ -194,28 +195,28 @@ procedure InitDispatch();
begin
SHA512_Compress := @SHA512_Compress_Scalar;
{$IFDEF HASHLIB_I386_ASM}
case TCpuFeatures.GetActiveLevel() of
TCpuSimdLevel.SSSE3:
case TCpuFeatures.X86.GetSimdLevel() of
TX86SimdLevel.SSSE3:
begin
SHA512_Compress := @SHA512_Compress_Ssse3_Wrap;
end;
TCpuSimdLevel.SSE2:
TX86SimdLevel.SSE2:
begin
SHA512_Compress := @SHA512_Compress_Sse2_Wrap;
end;
end;
{$ENDIF}
{$IFDEF HASHLIB_X86_64_ASM}
case TCpuFeatures.GetActiveLevel() of
TCpuSimdLevel.AVX2:
case TCpuFeatures.X86.GetSimdLevel() of
TX86SimdLevel.AVX2:
begin
SHA512_Compress := @SHA512_Compress_Avx2_Wrap;
end;
TCpuSimdLevel.SSSE3:
TX86SimdLevel.SSSE3:
begin
SHA512_Compress := @SHA512_Compress_Ssse3_Wrap;
end;
TCpuSimdLevel.SSE2:
TX86SimdLevel.SSE2:
begin
SHA512_Compress := @SHA512_Compress_Sse2_Wrap;
end;
Expand Down
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