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Add src parameter to WireVector, Output, and Register - #512

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feature/wirevector-src-param
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Add src parameter to WireVector, Output, and Register#512
timsherwood wants to merge 1 commit into
developmentfrom
feature/wirevector-src-param

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@timsherwood

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Summary

  • Adds an optional src parameter to WireVector, Output, and Register constructors, allowing wire connections at construction time.
  • For WireVector and Output, src=x is equivalent to wire <<= x.
  • For Register, src=x is equivalent to reg.next <<= x.

Example

a = pyrtl.Input(name="a", bitwidth=8)
b = pyrtl.Input(name="b", bitwidth=8)
begin = pyrtl.Input(name="begin", bitwidth=1)

x, done = gcd(a, b, begin)

x = pyrtl.Output(name="x", src=x)
done = pyrtl.Output(name="done", src=done)

Notes

  • Input and Const do not accept src (raises TypeError).
  • Self-referencing register patterns like reg = Register(src=reg + 1) are not possible; use reg.next <<= reg + 1 for those cases.
  • The block parameter is moved to the last position in all affected constructors for consistency.

Test plan

  • All 1382 existing tests pass
  • 11 new tests covering WireVector, Output, and Register src usage, bitwidth inference, coercion, and negative cases

@timsherwood
timsherwood changed the base branch from master to development August 12, 2026 23:06
@timsherwood
timsherwood force-pushed the feature/wirevector-src-param branch from d4d3b26 to 60185e6 Compare August 13, 2026 01:50
@timsherwood
timsherwood force-pushed the feature/wirevector-src-param branch from 60185e6 to 5c9666c Compare August 13, 2026 01:53
@codecov

codecov Bot commented Aug 13, 2026

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Codecov Report

✅ All modified and coverable lines are covered by tests.
✅ Project coverage is 93.8%. Comparing base (d0021d4) to head (5c9666c).

Additional details and impacted files
@@              Coverage Diff              @@
##           development    #512     +/-   ##
=============================================
+ Coverage         93.8%   93.8%   +0.1%     
=============================================
  Files               30      30             
  Lines             7174    7178      +4     
=============================================
+ Hits              6724    6729      +5     
+ Misses             450     449      -1     

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@fdxmw

fdxmw commented Aug 17, 2026

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Thanks for putting this together! Some questions/comments:

  • I think it's better to leave the block argument where it was, currently this change is not backwards-compatible. Users depending on positional argument order will likely have problems after this change.
  • What do you think about renaming src to source? IMO three vowels are a small cost for dictionary-safety :)
  • What about naming Register's constructor argument next, to match Register.next?
  • What do you think about making these new constructor arguments keyword-only? IMO that would improve readability, I think it's quite hard to figure out what this code does, without consulting the documentation:
    wire = WireVector(2, "three", 3)
  • Along those lines, this change makes it easier to write inefficient code, like the example above, which should just be Const(3, name="three"), rather than a Const connected to a WireVector. Here's another:
    wire = WireVector(src=other)
    It is a little annoying that we can't skip construction of these useless objects. Should we emit a warning when we can detect cases like these?

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2 participants