Implementing output wave trace of the emulation in VCD format#17
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Implementing output wave trace of the emulation in VCD format#17
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This will just run a rom in the interpreter for a given amount of time/cycles. Useful for generating vcd traces or testing something else quickly. It compiles much faster than the gui or the unit tstes, because it has zero dependencies.
VCD (value change dump) is a format used by EDA tools (like verilog simulators) that shows the change of signals over time. This will dump the change of every register and internal state of the emulator over time. This will create a file in `wave_trace/trace.vcd`, which can be opened on GTKWave or Surfer for example I have the idea of implementing it while playing with msinger/dmg-sim simulation of DMG CPU B in verilog. This will make it easier to compare my emulator with a simulation of the original hardware.
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VCD (value change dump) is a format used by EDA tools (like Verilog simulators) that shows the change of signals over time. This will dump the change of every register and internal state of the emulator over time.
This will create a file in
wave_trace/trace.vcd, which can be opened on GTKWave or Surfer for exampleI have the idea of implementing it while playing with msinger/dmg-sim simulation of DMG CPU B in Verilog, and later by emu-russia/dmgcpu. This will make it easier to compare my emulator with a simulation of the original hardware.
Example usage: