fix(rocm): route tensor parallel communication through RCCL - #135
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zihaomu wants to merge 9 commits into
Draft
fix(rocm): route tensor parallel communication through RCCL#135zihaomu wants to merge 9 commits into
zihaomu wants to merge 9 commits into
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- Add hip_compat.h shim mapping CUDA runtime API to HIP equivalents - Update pinned_tensor.cpp to compile under both nvcc and hipcc - Add ROCm detection in arch.py (is_rocm, get_rocm_gfx_arch, is_gfx11xx_family) - Guard NVIDIA arch checks to return None on ROCm - Skip nvcc version check in _toolchain.py when on ROCm - Add ROCm build path in setup.py (ROCM_HOME, amdhip64, --offload-arch) - Add _hip_cflags() in kernel/utils.py for JIT compilation on ROCm - Add is_rocm() and driver_hip_version() in backend.py - Add rocm-smi fallback in __main__.py for clangd generation - Add TODO(ROCm) for NCCL->RCCL, flashinfer/sgl_kernel ROCm builds, Triton autotune RDNA3 tuning, PDL equivalent, hiprtc JIT cache - Add AMD ROCm classifier in pyproject.toml
This was referenced Aug 24, 2026
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nekomario28
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Integrate exact upstream FlashML-org#135 semantics onto the current-main corrected ROCm composition while preserving FlashML-org#136. Temporary PR used only as a 3-way merge carrier.
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Summary
nccl, which the ROCm wheel implements through RCCL;Incremental review scope
Relative to
zihaomu:feat/rocm-rdna3-rdna4-foundation:python/freetoken/engine/engine.pytests/engine/test_rocm_communication.pyDiff size: 85 additions, 1 deletion.
Dependency
Validation
2 passedgfx1201) GPUs, two ranks, RCCL all-reduce: rank 0 and rank 1 both produced3.054 passedKnown limitation
This validates communication selection and an RCCL collective. Full multi-GPU model serving with real weights is not claimed yet. The PR remains Draft until #132 establishes the common ROCm foundation.