Topic 00: reading-drepper — Steps 5-6 rewritten, plus a concept→profiler map

[AviAvni]

Reader feedback on reading-drepper.md: Step 5 was unclear, Step 6's page-walk diagram was under-explained, and neither answered the general question — how do you identify these eight concepts in a program you did not write?

No new measurements. Every figure below already existed in topic 0's notes.md; it is now cross-referenced from the concept that explains it.

Step 5 — dependent loads

The old text asserted memory-level parallelism in one sentence and jumped to code. Now:

• What "dependent" means at the instruction level — chain[idx], node->next->next, a B-tree child pointer inside the parent you are still waiting for — and the idea it turns on: the cost of a miss is a property of how many other misses can keep it company, not of the miss.
• An ASCII timeline for both cases: three overlapping misses ≈ 105 ns total (~35 ns apiece) vs three serialized ≈ 300 ns (100 ns apiece).
• The distinction the step existed to teach and never stated: latency-bound and bandwidth-bound are opposites. A chase moves one 128 B line per ~104 ns ≈ 1.2 GB/s, against the 24–57 GB/s a single core reaches on topic 12's streaming scan — slow while the bus idles, so no layout fix touches it.
• Both sides priced from this repo's own numbers: lookup_shootout hashmap at n=1e7 with 1024 independent probes → 9.3 ns; cache_ladder at 128 MB, a dependent chase → 104 ns. Same DRAM, same misses, 11× apart on overlap alone — which is the real explanation for why the hash table looked suspiciously flat at ten million keys.
• Each of cache_ladder's three construction choices justified separately: the dependency lives in the data so nothing can speculate around it; the cyclic permutation both defeats the prefetcher and stops a short sub-cycle living in L1; the cursor carried across criterion iterations, with the original ~25 ns "DRAM" reading cited as the failure it prevents.

Step 6 — virtual memory

The diagram now has the reasoning it assumed:

• Why a tree at all — a flat table for a 47-bit space at 16 KB pages is 2³³ × 8 B = 64 GB per process.
• A bit-field diagram of one x86-64 address showing why 9-bit indices (one table = one 4 KB page = 512 entries), with each arrow annotated as a real load whose address comes from the entry just fetched — Step 5's chain, in silicon, before your access can issue.
• The three naming vocabularies (PML4/PDPT/PD/PT = PGD/PUD/PMD/PTE = L0–L3), since all three appear in the sources.
• The Apple Silicon variant derived, not asserted: 16 KB granule → 2048-entry tables → 11-bit indices, and 14 + 11 + 11 + 11 = 47, so the walk is three levels, not four.
• Four reasons it isn't catastrophic: hardware walks it (a page fault is the kernel, microseconds — a different event), the tables are cacheable, walk caches hold partial translations, huge pages turn an L2/PMD entry into a block descriptor.
• Closed against the measurement: cache_ladder's 87 → 113 ns tail is +26 ns of walk once 32K pages overflow the TLB — not the +400 ns of a fully cold walk, not zero.

New section — "Finding these concepts in a real program"

The general question, answered as a method. Three instruments in reach-for order, leading with the trap: a sampling profiler attributes stall time to the waiting instruction, so memory-bound and compute-bound loops look identical — and this repo has the exhibit (the lookup_shootout flamegraph's 21% SipHash / ~79% inlined probe loop, which no amount of staring could split). Counters name the wall; a differential experiment is the only portable instrument and the one this repo leans on, because a counter says a number is high while a differential proves fixing it would help.

• A mermaid decision funnel: IPC → branch-miss rate → achieved GB/s → dTLB misses → one of five verdicts (compute / branch / bandwidth / translation / latency-bound), with the last split — same flamegraph, opposite fixes — as its point.
• An eight-row table: concept → signature in a profile → Linux counter → the differential that proves it. Pad a stride by one line to separate conflict from capacity; sorted vs shuffled indices to price the prefetcher; k interleaved cursors to prove spare MLP (what batched lookup APIs collect); perf c2c plus a 128 B pad for false sharing.
• Two closing habits: always pair a counter with a differential, and compute useful-bytes ÷ bytes-moved by hand — it needs no profiler and decides row-vs-column in topic 12.

Also

A fourth notes.md question (make lookup_shootout's 1e7 probes dependent and report the new ns/probe — prove the MLP claim with the differential, don't reason it), two new Done when items, a Tools block in the references, and a SESSION-LOG entry.

Verification

• mdbook build clean.
• The new flowchart renders to a real SVG under headless Chrome with no syntax error (all five verdict nodes and edge labels present in the rendered DOM).
• Every relative link on the rendered page resolves, including experiments/benches/cache_ladder.rs, which mdbook copies verbatim.
• No verify.sh lane or FINDINGS.md row changes — no new measurement was produced.

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