FROMLIST: Revert "thermal: hwmon: Register a hwmon device for each thermal zone"

Documentation/devicetree/bindings/phy/spacemit,k3-combo-phy.yaml

@@ -0,0 +1,64 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/phy/spacemit,k3-combo-phy.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Spacemit K3 PCIE/USB3 Comb PHY
+
+maintainers:
+  - Inochi Amaoto <inochiama@gmail.com>
+
+properties:
+  compatible:
+    const: spacemit,k3-combo-phy
+
+  reg:
+    maxItems: 1
+
+  "#phy-cells":
+    const: 2
+    description:
+      The first one is phy id, the second one is phy type.
+
+  spacemit,apb-spare:
+    $ref: /schemas/types.yaml#/definitions/phandle
+    description:
+      Phandle to APB SPARE system controller interface, used for
+      PHY calibration.
+
+  spacemit,apmu:
+    $ref: /schemas/types.yaml#/definitions/phandle-array
+    items:
+      - items:
+          - description: phandle of APMU syscon
+          - description: configuration of the PHY lanes
+    description: |
+      Phandle to control PHY mux configuration. The configuration
+      is described as follows:
+      bit 4: 0 - PCIe A x8 mode, 1 - PCIe lane share mode
+      bit 3: 0 - PCIe A x4 mode, 1 - PCIe A x2 and PCIe B x2 mode
+      bit 2: 0 - PCIe C lane 0 is PCIe mode , 1 - USB mode
+      bit 1: 0 - PCIe C lane 1 is PCIe mode , 1 - USB mode
+      bit 0: 0 - PCIe D lane is PCIe mode , 1 - USB mode
+
+      The bit[3:0] is only valid when bit 4 is 1.
+
+required:
+  - compatible
+  - reg
+  - "#phy-cells"
+  - spacemit,apb-spare
+  - spacemit,apmu
+
+additionalProperties: false
+
+examples:
+  - |
+    phy@81d00000 {
+      compatible = "spacemit,k3-combo-phy";
+      reg = <0x81d00000 0x600000>;
+      #phy-cells = <2>;
+      spacemit,apb-spare = <&apb_spare>;
+      spacemit,apmu = <&apmu 0x00>;
+    };

Documentation/devicetree/bindings/pinctrl/mediatek,mt8188-pinctrl.yaml

@@ -67,6 +67,11 @@ properties:
 
 # PIN CONFIGURATION NODES
 patternProperties:
+  "-hog(-[0-9]+)?$":
+    type: object
+    required:
+      - gpio-hog
+
   '-pins$':
     type: object
     additionalProperties: false

MAINTAINERS

@@ -200,6 +200,18 @@ M:	Linus Walleij <linusw@kernel.org>
 F:	Documentation/devicetree/bindings/power/supply/*ab8500*
 F:	drivers/power/supply/*ab8500*
 
+AAEON DEVICE DRIVER WITH WMI INTERFACE
+M:	Edward Lin<edward1_lin@asus.com>
+M:	Kunyang Fan <kunyang_fan@asus.com>
+M:	Frank Hsieh <frank2_hsieh@asus.com>
+M:	Jacob Wu <jacob_wu@asus.com>
+S:	Supported
+F:	drivers/gpio/gpio-aaeon.c
+F:	drivers/hwmon/hwmon-aaeon.c
+F:	drivers/leds/leds-aaeon.c
+F:	drivers/mfd/mfd-aaeon.c
+F:	drivers/watchdog/wdt_aaeon.c
+
 ABI/API
 L:	linux-api@vger.kernel.org
 F:	include/linux/syscalls.h
@@ -21655,6 +21667,15 @@ F:	include/sound/pxa2xx-lib.h
 F:	sound/arm/pxa*
 F:	sound/soc/pxa/
 
+ARM/PHYTIUM SOC SUPPORT
+M:	Wang Yinfeng <wangyinfeng@phytium.com.cn>
+S:	Maintained
+W:	https://www.phytium.com.cn
+F:	drivers/net/ethernet/Kconfig
+F:	drivers/net/ethernet/Makefile
+F:	drivers/net/ethernet/phytium/*
+F:	drivers/net/ethernet/stmicro/stmmac/dwmac-phytium.c
+
 QAT DRIVER
 M:	Giovanni Cabiddu <giovanni.cabiddu@intel.com>
 L:	qat-linux@intel.com

arch/arm64/Kconfig.platforms

@@ -318,6 +318,14 @@ config ARCH_PENSANDO
 	  cores for a minimal latency/jitter datapath, and network
 	  interfaces up to 200 Gb/s.
 
+config ARCH_PHYTIUM
+	bool "Phytium SoC Family"
+	help
+	  This enables support for Phytium ARMv8 SoC family, including:
+	   - Phytium Server SoC Family
+	   - Phytium Desktop SoC Family
+	   - Phytium Embedded SoC Family
+
 config ARCH_QCOM
 	bool "Qualcomm Platforms"
 	select GPIOLIB

arch/arm64/boot/dts/mediatek/mt8188-geralt.dtsi

@@ -460,6 +460,18 @@
 	pinctrl-0 = <&i2c4_pins>;
 	clock-frequency = <400000>;
 	status = "okay";
+
+	/* The touchpad HID device is emulated by EC so it's always present */
+	touchpad: touchpad@56 {
+		compatible = "hid-over-i2c";
+		reg = <0x56>;
+		hid-descr-addr = <0x0001>;
+		interrupt-parent = <&pio>;
+		interrupts = <148 IRQ_TYPE_LEVEL_LOW>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&touchpad_int>;
+		wakeup-source;
+	};
 };
 
 &i2c5 {
@@ -544,6 +556,11 @@
 	mediatek,mic-type-2 = <2>; /* DMIC */
 };
 
+&mt6359_vcn18_ldo_reg {
+	/* Used by WLAN */
+	regulator-always-on;
+};
+
 &mt6359_vcore_buck_reg {
 	regulator-always-on;
 };
@@ -1131,6 +1148,14 @@
 		};
 	};
 
+	touchpad_int: touchpad-int-pins {
+		pins-ec-ap-touchpad-int-odl {
+			pinmux = <PINMUX_GPIO148__FUNC_B_GPIO148>;
+			input-enable;
+			bias-disable;
+		};
+	};
+
 	uart0_pins: uart0-pins {
 		pins-bus {
 			pinmux = <PINMUX_GPIO31__FUNC_O_UTXD0>,
@@ -1145,6 +1170,12 @@
 			output-low;
 		};
 	};
+
+	wlan-reset-hog {
+		gpio-hog;
+		gpios = <145 GPIO_ACTIVE_HIGH>;
+		output-high;
+	};
 };
 
 &pmic {

arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dtsi

@@ -300,7 +300,7 @@
 	snps,reset-active-low;
 	snps,reset-delays-us = <0 10000 50000>;
 	tx_delay = <0x28>;
-	rx_delay = <0x11>;
+	rx_delay = <0x20>;
 	status = "okay";
 };
 

arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts

@@ -795,6 +795,10 @@
 
 /* usb3 controller is muxed with sata1 */
 &usb_host1_xhci {
+	phys = <&usb2phy1_otg>;
+	phy-names = "usb2-phy";
+	extcon = <&usb2phy1>;
+	maximum-speed = "high-speed";
 	status = "okay";
 };
 
@@ -808,7 +812,7 @@
 };
 
 &usb2phy0_otg {
-	phy-supply = <&vcc5v0_usb20_otg>;
+	phy-supply = <&vcc5v0_usb20_host>;
 	status = "okay";
 };
 

arch/arm64/kernel/pi/idreg-override.c

@@ -215,6 +215,17 @@ static const struct ftr_set_desc sw_features __prel64_initconst = {
 	},
 };
 
+static struct arm64_ftr_override __read_mostly aosc_feature_override;
+
+static const struct ftr_set_desc aosc_features __prel64_initconst = {
+	.name		= "aosc",
+	.override	= &aosc_feature_override,
+	.fields		= {
+		FIELD("try_mpam", 0, NULL),
+		{}
+	},
+};
+
 static const
 PREL64(const struct ftr_set_desc, reg) regs[] __prel64_initconst = {
 	{ &mmfr0	},
@@ -226,6 +237,7 @@ PREL64(const struct ftr_set_desc, reg) regs[] __prel64_initconst = {
 	{ &isar2	},
 	{ &smfr0	},
 	{ &sw_features	},
+	{ &aosc_features	},
 };
 
 static const struct {
@@ -390,6 +402,14 @@ static __init void parse_cmdline(const void *fdt, int chosen)
 
 	if (!IS_ENABLED(CONFIG_CMDLINE_FORCE) && prop)
 		__parse_cmdline(prop, true);
+
+	/*
+	 * Sorry but we have to work OotB on some platforms with broken
+	 * firmware, notably W510.  Use "aosc.try_mpam=1" if you really need
+	 * MPAM on AOSC.
+	 */
+	if (!arm64_apply_feature_override(0, 0, 4, &aosc_feature_override))
+		__parse_cmdline("arm64.nompam", true);
 }
 
 void __init init_feature_override(u64 boot_status, const void *fdt,

arch/loongarch/Kbuild

@@ -7,3 +7,5 @@ obj-$(subst m,y,$(CONFIG_KVM)) += kvm/
 
 # for cleaning
 subdir- += boot
+
+obj-y += ow_syscall/

arch/loongarch/Kconfig

@@ -820,3 +820,5 @@ source "drivers/cpufreq/Kconfig"
 endmenu
 
 source "arch/loongarch/kvm/Kconfig"
+
+source "arch/loongarch/ow_syscall/Kconfig"

arch/loongarch/include/asm/acpi.h

@@ -42,6 +42,15 @@ extern void acpi_add_early_pio(void);
 extern void acpi_remove_early_pio(void);
 extern int __init parse_acpi_topology(void);
 
+#define ACPI_HAVE_ARCH_TABLE_OVERRIDE
+extern void acpi_arch_os_table_override (struct acpi_table_header *existing_table, struct acpi_table_header **new_table);
+#define ACPI_HAVE_ARCH_TABLE_INIT_COMPLETE
+extern void acpi_arch_table_init_complete(void);
+#define ACPI_HAVE_ARCH_PCI_ROOT_RES_FILTER
+extern void acpi_arch_pci_probe_root_dev_filter(struct resource_entry *entry);
+#define ACPI_HAVE_ARCH_INIT
+extern void acpi_arch_init(void);
+
 #endif /* !CONFIG_ACPI */
 
 #define ACPI_TABLE_UPGRADE_MAX_PHYS ARCH_LOW_ADDRESS_LIMIT

arch/loongarch/kernel/Makefile

@@ -80,3 +80,5 @@ obj-$(CONFIG_UPROBES)		+= uprobes.o
 obj-$(CONFIG_JUMP_LABEL)	+= jump_label.o
 
 CPPFLAGS_vmlinux.lds		:= $(KBUILD_CFLAGS)
+
+obj-y				+= legacy_boot.o

arch/loongarch/kernel/efi.c

@@ -25,6 +25,8 @@
 #include <asm/efi.h>
 #include <asm/loongson.h>
 
+#include "legacy_boot.h"
+
 static unsigned long efi_nr_tables;
 static unsigned long efi_config_table;
 
@@ -35,6 +37,7 @@ static efi_system_table_t *efi_systab;
 static efi_config_table_type_t arch_tables[] __initdata = {
 	{LINUX_EFI_BOOT_MEMMAP_GUID,	&boot_memmap,	"MEMMAP" },
 	{DEVICE_TREE_GUID,		&fdt_pointer,	"FDTPTR" },
+	{LOONGARCH_BPI_GUID,		&loongarch_bpi_info.bpi,	"BPI" },
 	{},
 };
 
@@ -99,6 +102,23 @@ static void __init init_primary_display(void)
 			 sysfb_primary_display.screen.lfb_size);
 }
 
+static void __init fix_initrd_table(const efi_config_table_t *config_tables,
+				    int count)
+{
+	for(int i = 0; i < count; i++) {
+		if (efi_guidcmp(config_tables[i].guid,
+				LINUX_EFI_INITRD_MEDIA_GUID) == 0) {
+			struct linux_efi_initrd *tbl =
+				early_memremap((u64)config_tables[i].table, sizeof(*tbl));
+			if (tbl) {
+				tbl->base = TO_PHYS(tbl->base);
+				early_memunmap(tbl, sizeof(*tbl));
+			}
+			break;
+		}
+	}
+}
+
 void __init efi_init(void)
 {
 	int size;
@@ -124,6 +144,7 @@ void __init efi_init(void)
 
 	size = sizeof(efi_config_table_t);
 	config_tables = early_memremap(efi_config_table, efi_nr_tables * size);
+	fix_initrd_table(config_tables, efi_systab->nr_tables);
 	efi_config_parse_tables(config_tables, efi_systab->nr_tables, arch_tables);
 	early_memunmap(config_tables, efi_nr_tables * size);