parameterized_scrambler.v

/**
 * Parameterized Scrambler/Descrambler
 * 
 * This module implements a configurable scrambler/descrambler based on Linear
 * Feedback Shift Registers (LFSR). Scrambling is used in communications to
 * randomize data patterns, improve clock recovery, and reduce electromagnetic
 * interference (EMI).
 * 
 * Key Features:
 * - Configurable polynomial: Any LFSR polynomial via POLYNOMIAL parameter
 * - Self-synchronized mode: Can operate without reset synchronization
 * - Reset-based mode: Traditional LFSR operation
 * - Data whitening: Randomizes data patterns
 * - Same module for scramble/descramble: XOR operation is self-inverse
 * 
 * Scrambling Operation:
 * - Input data XORed with LFSR output
 * - LFSR advances based on polynomial taps
 * - Output is scrambled data
 * - Descrambling: Same operation (XOR is self-inverse)
 * 
 * Modes:
 * - Reset-based (SELF_SYNCHRONIZED=0): LFSR feedback from its own state
 * - Self-synchronized (SELF_SYNCHRONIZED=1): LFSR feedback from input data
 * 
 * Self-Synchronization:
 * - Scrambler and descrambler automatically synchronize
 * - No need for explicit synchronization signals
 * - Useful in communication systems
 * 
 * Polynomial:
 * - POLYNOMIAL bits indicate tap positions
 * - Example: 0x71 = 0b01110001 → taps at positions 7, 6, 0
 * - Represents polynomial: x^7 + x^6 + x^0
 * 
 * Use Cases:
 * - Data whitening in communication protocols
 * - Clock recovery improvement
 * - EMI reduction
 * - Pattern randomization
 * - Serial communication (PCIe, USB, etc.)
 * 
 * @param WIDTH LFSR width (default: 8 bits)
 * @param POLYNOMIAL LFSR polynomial (default: 0x71, x^7+x^6+x^0)
 * @param INITIAL_SEED Initial LFSR seed (default: all ones)
 * @param SELF_SYNCHRONIZED 0=reset-based, 1=self-synchronized (default: 0)
 * 
 * @input clk Clock signal
 * @input rst_n Active-low reset signal
 * @input enable Enable scrambling operation
 * @input data_in Input data bit (to be scrambled)
 * @output data_out Scrambled/descrambled output bit
 * @output lfsr_state[WIDTH-1:0] LFSR state (for debugging)
 */
module parameterized_scrambler #(
    parameter WIDTH = 8,             // LFSR width
    parameter [WIDTH-1:0] POLYNOMIAL = 8'h71,  // x^7 + x^6 + x^0 (0b01110001)
    parameter [WIDTH-1:0] INITIAL_SEED = {WIDTH{1'b1}},  // All ones initial seed
    parameter SELF_SYNCHRONIZED = 0   // 0 = reset based, 1 = self-synchronized
)(
    input wire clk,                  // Clock signal
    input wire rst_n,                // Active-low reset
    input wire enable,               // Enable signal
    input wire data_in,              // Input data bit
    output wire data_out,            // Output scrambled/descrambled data
    output wire [WIDTH-1:0] lfsr_state // LFSR state (for debugging)
);

    // LFSR register
    reg [WIDTH-1:0] lfsr_reg;
    
    // Next state logic
    wire feedback;
    wire next_input;
    
    // Reset based or self-synchronized mode selection
    generate
        if (SELF_SYNCHRONIZED) begin : gen_self_sync_mode
            // Self-synchronized mode: feedback from input data
            assign next_input = data_in;
        end else begin : gen_reset_based_mode
            // Reset based mode: feedback from LFSR
            assign next_input = lfsr_reg[0];
        end
    endgenerate
    
    // ============================================================================
    // Feedback Calculation
    // ============================================================================
    // Calculate feedback bit based on polynomial taps
    // XOR reduction of (LFSR register AND polynomial)
    // This implements the linear feedback: XOR of tapped bits
    assign feedback = ^(lfsr_reg & POLYNOMIAL);
    
    // ============================================================================
    // LFSR State Register Update
    // ============================================================================
    // Updates LFSR state on each clock cycle
    always @(posedge clk or negedge rst_n) begin
        if (!rst_n) begin
            // ====================================================================
            // Reset State
            // ====================================================================
            // Initialize LFSR to seed value
            lfsr_reg <= INITIAL_SEED;
        end else if (enable) begin
            // ====================================================================
            // LFSR Shift Operation
            // ====================================================================
            // Shift right: feedback XOR next_input enters at MSB
            // next_input depends on mode:
            // - Reset-based: LFSR LSB (standard LFSR)
            // - Self-synchronized: input data (for synchronization)
            lfsr_reg <= {feedback ^ next_input, lfsr_reg[WIDTH-1:1]};
        end
    end
    
    // ============================================================================
    // Scrambling Output
    // ============================================================================
    // Output is XOR of input data and LFSR LSB
    // This scrambles the data (XOR with pseudo-random sequence)
    // Note: XOR is self-inverse, so same operation descrambles
    assign data_out = data_in ^ lfsr_reg[0];
    
    // Expose LFSR state for debugging
    assign lfsr_state = lfsr_reg;

endmodule