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jackpot51crawfxrd
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Add bonw16
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# SPDX-License-Identifier: GPL-3.0-only
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board-y += board.c
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board-y += gpio.c
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EC = ite
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CONFIG_EC_ITE_IT5570E = y
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CONFIG_EC_FLASH_SIZE_256K = y
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# Intel-based host
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CONFIG_PLATFORM_INTEL = y
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CONFIG_BUS_ESPI = y
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# Enable firmware security
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CONFIG_SECURITY = y
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# Include keyboard
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KEYBOARD = 15in_102
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# Set keyboard LED mechanism
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CONFIG_HAVE_KBLED = y
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CONFIG_KBLED = bonw14
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# Set battery I2C bus
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CONFIG_I2C_SMBUS = I2C_4
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# Set touchpad PS2 bus
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CONFIG_PS2_TOUCHPAD = PS2_3
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# Set smart charger parameters
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# XXX: PRS1 and PRS2 are in parallel for adapter Rsense?
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CONFIG_CHARGER = oz26786
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CONFIG_CHARGER_ADAPTER_RSENSE = 5
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CONFIG_CHARGER_BATTERY_RSENSE = 5
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CONFIG_CHARGER_CHARGE_CURRENT = 3072
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CONFIG_CHARGER_CHARGE_VOLTAGE = 17100
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CONFIG_CHARGER_INPUT_CURRENT = 16500
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# Set USB-PD parameters
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CONFIG_HAVE_USBPD = y
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CONFIG_USBPD_TPS65987 = y
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CONFIG_I2C_USBPD = I2C_1
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# Set CPU power limits in watts
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CONFIG_POWER_LIMIT_AC = 330
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CONFIG_POWER_LIMIT_DC = 55
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# Enable dGPU support
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CONFIG_HAVE_DGPU = y
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CONFIG_I2C_DGPU = I2C_1
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# Fan configs
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CONFIG_FAN1_PWM = DCR2
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CONFIG_FAN1_POINTS = " \
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FAN_POINT(60, 40), \
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FAN_POINT(65, 60), \
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FAN_POINT(70, 75), \
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FAN_POINT(75, 90), \
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FAN_POINT(80, 100), \
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"
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CONFIG_FAN2_PWM = DCR4
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CONFIG_FAN2_POINTS = " \
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FAN_POINT(60, 40), \
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FAN_POINT(65, 60), \
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FAN_POINT(70, 75), \
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FAN_POINT(75, 90), \
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FAN_POINT(80, 100), \
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"
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# Add system76 common code
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include src/board/system76/common/Makefile.mk

src/board/system76/bonw16/board.c

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// SPDX-License-Identifier: GPL-3.0-only
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#include <board/battery.h>
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#include <board/board.h>
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#include <board/espi.h>
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#include <board/gpio.h>
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#include <ec/ec.h>
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void board_init(void) {
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espi_init();
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// Make sure charger is in off state, also enables PSYS
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battery_charger_disable();
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// Allow backlight to be turned on
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gpio_set(&BKL_EN, true);
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// Enable camera
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gpio_set(&CCD_EN, true);
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}
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void board_event(void) {
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espi_event();
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ec_read_post_codes();
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}

src/board/system76/bonw16/gpio.c

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// SPDX-License-Identifier: GPL-3.0-only
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#include <board/gpio.h>
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#include <common/macro.h>
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// uncrustify:off
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struct Gpio __code ACIN_N = GPIO(B, 0);
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struct Gpio __code AC_PRESENT = GPIO(E, 1);
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struct Gpio __code ALL_SYS_PWRGD = GPIO(C, 0);
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struct Gpio __code BKL_EN = GPIO(C, 7);
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struct Gpio __code BUF_PLT_RST_N = GPIO(D, 2); // renamed to ESPI_RESET_N
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struct Gpio __code CCD_EN = GPIO(D, 1);
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struct Gpio __code DD_ON = GPIO(E, 4);
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struct Gpio __code DGPU_PWR_EN = GPIO(J, 2);
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struct Gpio __code EC_EN = GPIO(B, 6); // renamed to SUSBC_EC#
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struct Gpio __code EC_RSMRST_N = GPIO(E, 5);
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struct Gpio __code GC6_FB_EN = GPIO(J, 3);
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struct Gpio __code JACK_IN_N = GPIO(E, 6);
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struct Gpio __code LAN_WAKEUP_N = GPIO(B, 2);
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struct Gpio __code LED_ACIN = GPIO(H, 2);
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struct Gpio __code LED_BAT_CHG = GPIO(H, 5);
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struct Gpio __code LED_BAT_FULL = GPIO(J, 0);
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struct Gpio __code LED_PWR = GPIO(D, 0);
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struct Gpio __code LID_SW_N = GPIO(B, 1);
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struct Gpio __code ME_WE = GPIO(I, 2);
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struct Gpio __code PCH_DPWROK_EC = GPIO(F, 3);
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struct Gpio __code PCH_PWROK_EC = GPIO(C, 6); // renamed to PM_PWROK_EC
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struct Gpio __code PWR_BTN_N = GPIO(D, 5);
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struct Gpio __code PWR_SW_N = GPIO(B, 3);
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struct Gpio __code SINK_CTRL = GPIO(H, 0);
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struct Gpio __code SLP_SUS_N = GPIO(H, 7);
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struct Gpio __code VA_EC_EN = GPIO(J, 4);
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struct Gpio __code WLAN_PWR_EN = GPIO(B, 5);
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struct Gpio __code XLP_OUT = GPIO(B, 4);
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// uncrustify:on
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static const struct GpioInit __code gpio_cfg_init[] = {
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// General control
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//TODO!!
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{ &GCR9, BIT(5) }, // PWRSW WDT 2 Enable 2
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{ &GCR8, BIT(4) }, // PWRSW WDT 2 Enable 1
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{ &GCR, 0x04 }, // Enable LPC reset on GPD2
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{ &GCR6, 0 }, // Disable UARTs
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{ &GCR15, BIT(4) }, // Enable SMBus channel 4
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{ &GCR19, BIT(0) }, // Set GPD2 to 1.8V
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{ &GCR20, 0 }, // Set GPF2 and GPF3 to 3.3V
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{ &GCR1, 0 },
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{ &GCR2, 0 },
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{ &GCR10, 0x02 },
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{ &GCR21, 0 },
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{ &GCR22, 0x80 },
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{ &GCR23, BIT(0) }, // Set GPM6 power domain to VCC
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// Port data
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{ &GPDRA, 0 },
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{ &GPDRB, BIT(4) | BIT(3) }, // XLP_OUT, PWR_SW#
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{ &GPDRC, 0 },
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{ &GPDRD, BIT(3) }, // BL_PWM_EN_EC
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{ &GPDRE, BIT(3) }, // USB_PWR_EN# (inverted)
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{ &GPDRF, BIT(3) }, // PCH_DPWROK_EC
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{ &GPDRG, BIT(6) | BIT(0) }, // H_PROCHOT#_EC, PLVDD_RST_EC
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{ &GPDRH, BIT(6) }, // EC_AMP_EN
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{ &GPDRI, 0 },
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{ &GPDRJ, BIT(1) }, // KBC_MUTE#
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// Port control
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{ &GPCRA0, GPIO_IN }, // EC_PWM_PIN_24
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{ &GPCRA1, GPIO_IN }, // LG_DET#
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{ &GPCRA2, GPIO_ALT }, // CPU_FAN
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{ &GPCRA3, GPIO_ALT }, // DDS_EC_PWM
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{ &GPCRA4, GPIO_ALT }, // VGA_FAN
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{ &GPCRA5, GPIO_ALT }, // EC_PWM_LED_R
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{ &GPCRA6, GPIO_ALT }, // EC_PWM_LED_G
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{ &GPCRA7, GPIO_ALT }, // EC_PWM_LED_B
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{ &GPCRB0, GPIO_IN | GPIO_UP }, // AC_IN#
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{ &GPCRB1, GPIO_IN | GPIO_UP }, // LID_SW#
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{ &GPCRB2, GPIO_IN | GPIO_UP }, // EC_LAN_WAKEUP#
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{ &GPCRB3, GPIO_IN }, // PWR_SW#
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{ &GPCRB4, GPIO_OUT }, // XLP_OUT
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{ &GPCRB5, GPIO_OUT }, // WLAN_PWR_EN
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{ &GPCRB6, GPIO_OUT | GPIO_UP }, // SUSBC_EC#
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{ &GPCRC0, GPIO_IN }, // ALL_SYS_PWRGD
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{ &GPCRC1, GPIO_ALT | GPIO_UP }, // SMC_VGA_THERM
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{ &GPCRC2, GPIO_ALT | GPIO_UP }, // SMD_VGA_THERM
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{ &GPCRC3, GPIO_ALT | GPIO_UP }, // KB-SO16
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{ &GPCRC4, GPIO_IN | GPIO_UP }, // CNVI_DET#
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{ &GPCRC5, GPIO_ALT | GPIO_UP }, // KB-SO17
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{ &GPCRC6, GPIO_OUT }, // PM_PWROK_EC
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{ &GPCRC7, GPIO_OUT | GPIO_UP }, // BKL_EN
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{ &GPCRD0, GPIO_OUT }, // LED_PWR
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{ &GPCRD1, GPIO_OUT | GPIO_UP }, // CCD_EN
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{ &GPCRD2, GPIO_ALT }, // ESPI_RESET_N
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{ &GPCRD3, GPIO_OUT }, // BL_PWM_EN_EC
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{ &GPCRD4, GPIO_OUT }, // MUX_CTRL_BIOS
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{ &GPCRD5, GPIO_OUT | GPIO_UP }, // PWR_BTN#
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{ &GPCRD6, GPIO_ALT | GPIO_DOWN }, // CPU_FANSEN
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{ &GPCRD7, GPIO_ALT | GPIO_DOWN }, // VGA_FANSEN
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{ &GPCRE0, GPIO_ALT | GPIO_UP }, // SMC_BAT
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{ &GPCRE1, GPIO_OUT | GPIO_UP }, // AC_PRESENT
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{ &GPCRE2, GPIO_IN }, // N/C
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{ &GPCRE3, GPIO_OUT }, // USB_PWR_EN#
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{ &GPCRE4, GPIO_OUT | GPIO_DOWN }, // DD_ON
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{ &GPCRE5, GPIO_OUT }, // EC_RSMRST#
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{ &GPCRE6, GPIO_IN }, // JACK_IN#_EC
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{ &GPCRE7, GPIO_ALT | GPIO_UP }, // SMD_BAT
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{ &GPCRF0, GPIO_OUT | GPIO_UP }, // 80CLK
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{ &GPCRF1, GPIO_OUT | GPIO_UP }, // USB_CHARGE_EN
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{ &GPCRF2, GPIO_OUT | GPIO_UP }, // 3IN1
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{ &GPCRF3, GPIO_OUT }, // PCH_DPWROK_EC
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{ &GPCRF4, GPIO_ALT | GPIO_UP }, // TP_CLK
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{ &GPCRF5, GPIO_ALT | GPIO_UP }, // TP_DATA
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{ &GPCRF6, GPIO_ALT }, // SLP_S0_N
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{ &GPCRF7, GPIO_IN }, // CPU_C10_GATE_N
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{ &GPCRG0, GPIO_OUT }, // PLVDD_RST_EC
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{ &GPCRG1, GPIO_OUT }, // PD_VIN_3V3_EC
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{ &GPCRG2, GPIO_IN }, // 100k pull-up
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{ &GPCRG3, GPIO_ALT }, // ALSPI_CE#_L
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{ &GPCRG4, GPIO_ALT }, // ALSPI_MSI_L
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{ &GPCRG5, GPIO_ALT }, // ALSPI_MSO_L
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{ &GPCRG6, GPIO_OUT | GPIO_UP }, // H_PROCHOT#_EC
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{ &GPCRG7, GPIO_ALT }, // ALSPI_SCLK_L
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{ &GPCRH0, GPIO_IN }, // SINK_CTRL
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{ &GPCRH1, GPIO_OUT }, // PD_PWR_EC_EN#
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{ &GPCRH2, GPIO_OUT | GPIO_UP }, // LED_ACIN
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{ &GPCRH3, GPIO_IN }, // PD_I2C_IRQ#
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{ &GPCRH4, GPIO_IN }, // dGPU_OVERT_EC
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{ &GPCRH5, GPIO_OUT | GPIO_UP }, // LED_BAT_CHG
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{ &GPCRH6, GPIO_OUT }, // EC_AMP_EN
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{ &GPCRH7, GPIO_IN }, // SLP_SUS#
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{ &GPCRI0, GPIO_ALT }, // BAT_DET
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{ &GPCRI1, GPIO_ALT }, // BAT_VOLT
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{ &GPCRI2, GPIO_IN | GPIO_DOWN }, // ME_WE
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{ &GPCRI3, GPIO_ALT }, // THERM_VOLT_CPU
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{ &GPCRI4, GPIO_ALT }, // TOTAL_CUR
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{ &GPCRI5, GPIO_ALT }, // THERM_VOLT_DDR
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{ &GPCRI6, GPIO_ALT }, // THERM_VOLT_GPU
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{ &GPCRI7, GPIO_ALT }, // BOARD_ID_ADC
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{ &GPCRJ0, GPIO_OUT | GPIO_UP }, // LED_BAT_FULL
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{ &GPCRJ1, GPIO_OUT }, // KBC_MUTE#
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{ &GPCRJ2, GPIO_IN }, // DGPU_PWR_EN
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{ &GPCRJ3, GPIO_IN }, // GPIO1_GC6_FB_EN_3V3
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{ &GPCRJ4, GPIO_OUT }, // VA_EC_EN
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{ &GPCRJ5, GPIO_IN }, // VBATT_BOOST#
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{ &GPCRJ6, GPIO_OUT | GPIO_UP }, // EC_GPIO
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{ &GPCRJ7, GPIO_IN | GPIO_UP }, // PERKB_DET#
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{ &GPCRM0, GPIO_ALT | GPIO_UP | GPIO_DOWN }, // ESPI_IO0_EC
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{ &GPCRM1, GPIO_ALT | GPIO_UP | GPIO_DOWN }, // ESPI_IO1_EC
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{ &GPCRM2, GPIO_ALT | GPIO_UP | GPIO_DOWN }, // ESPI_IO2_EC
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{ &GPCRM3, GPIO_ALT | GPIO_UP | GPIO_DOWN }, // ESPI_IO3_EC
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{ &GPCRM4, GPIO_ALT | GPIO_UP | GPIO_DOWN }, // ESPI_CLK_EC
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{ &GPCRM5, GPIO_ALT }, // ESPI_CS_EC#
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{ &GPCRM6, GPIO_IN | GPIO_UP | GPIO_DOWN }, // ESPI_ALERT0#
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};
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void gpio_init(void) {
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for (uint8_t i = 0; i < ARRAY_SIZE(gpio_cfg_init); i++) {
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*gpio_cfg_init[i].reg = gpio_cfg_init[i].data;
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}
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}
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// SPDX-License-Identifier: GPL-3.0-only
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#ifndef _BOARD_GPIO_H
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#define _BOARD_GPIO_H
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#include <ec/gpio.h>
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void gpio_init(void);
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extern struct Gpio __code ACIN_N;
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extern struct Gpio __code AC_PRESENT;
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extern struct Gpio __code ALL_SYS_PWRGD;
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extern struct Gpio __code BKL_EN;
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#define HAVE_BT_EN 0
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extern struct Gpio __code BUF_PLT_RST_N;
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extern struct Gpio __code CCD_EN;
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extern struct Gpio __code CPU_C10_GATE_N;
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extern struct Gpio __code DD_ON;
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extern struct Gpio __code DGPU_PWR_EN;
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extern struct Gpio __code EC_EN;
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extern struct Gpio __code EC_RSMRST_N;
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extern struct Gpio __code GC6_FB_EN;
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extern struct Gpio __code JACK_IN_N;
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extern struct Gpio __code LAN_WAKEUP_N;
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extern struct Gpio __code LED_ACIN;
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#define HAVE_LED_AIRPLANE_N 0
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extern struct Gpio __code LED_BAT_CHG;
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extern struct Gpio __code LED_BAT_FULL;
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extern struct Gpio __code LED_PWR;
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extern struct Gpio __code LID_SW_N;
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extern struct Gpio __code ME_WE;
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extern struct Gpio __code PCH_DPWROK_EC;
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extern struct Gpio __code PCH_PWROK_EC;
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#define HAVE_PM_PWROK 0
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extern struct Gpio __code PWR_BTN_N;
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extern struct Gpio __code PWR_SW_N;
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extern struct Gpio __code SINK_CTRL;
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extern struct Gpio __code SLP_SUS_N;
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#define HAVE_SUS_PWR_ACK 0
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extern struct Gpio __code VA_EC_EN;
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#define HAVE_WLAN_EN 0
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extern struct Gpio __code WLAN_PWR_EN;
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extern struct Gpio __code XLP_OUT;
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#endif // _BOARD_GPIO_H

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