Add Phoque1 and Phoque2 brushless driver variants

Author: Moddingear

variants/STM32G4xx/G431C(6-8-B)U_G441CBU/CMakeLists.txt

@@ -23,6 +23,7 @@ add_library(variant_bin STATIC EXCLUDE_FROM_ALL
   PeripheralPins.c
   PeripheralPins_B_G431B_ESC1.c
   variant_B_G431B_ESC1.cpp
+  variant_PHOQUE2.cpp
   variant_generic.cpp
 )
 target_link_libraries(variant_bin PUBLIC variant_usage)

variants/STM32G4xx/G431C(6-8-B)U_G441CBU/boards_entry.txt

@@ -39,3 +39,12 @@ GenG4.menu.pnum.GENERIC_G441CBUX.build.product_line=STM32G441xx
 GenG4.menu.pnum.GENERIC_G441CBUX.build.variant=STM32G4xx/G431C(6-8-B)U_G441CBU
 GenG4.menu.pnum.GENERIC_G441CBUX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32G4xx/STM32G441.svd
 
+# Phoque 2 Brushless Motor Driver
+GenG4.menu.pnum.PHOQUE2=Phoque 2
+GenG4.menu.pnum.PHOQUE2.upload.maximum_size=131072
+GenG4.menu.pnum.PHOQUE2.upload.maximum_data_size=32768
+GenG4.menu.pnum.PHOQUE2.build.board=PHOQUE2
+GenG4.menu.pnum.PHOQUE2.build.product_line=STM32G431xx
+GenG4.menu.pnum.PHOQUE2.build.variant=STM32G4xx/G431C(6-8-B)U_G441CBU
+GenG4.menu.pnum.PHOQUE2.build.variant_h=variant_{build.board}.h
+GenG4.menu.pnum.PHOQUE2.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32G4xx/STM32G431.svd

variants/STM32G4xx/G431C(6-8-B)U_G441CBU/variant_PHOQUE2.cpp

@@ -0,0 +1,147 @@
+/*
+ *******************************************************************************
+ * Copyright (c) 2020, STMicroelectronics
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ *                        opensource.org/licenses/BSD-3-Clause
+ *
+ *******************************************************************************
+ */
+#if defined(ARDUINO_PHOQUE2)
+#include "pins_arduino.h"
+#include "pinmap.h"
+
+// Digital PinName array
+extern "C" const PinName digitalPin[] = {
+  PA_0,   // D0/A0
+  PA_1,   // D1/A1
+  PA_2,   // D2/A2
+  PA_3,   // D3/A3
+  PA_4,   // D4/A4
+  PA_5,   // D5/A5
+  PA_6,   // D6/A6
+  PA_7,   // D7/A7
+  PA_8,   // D8
+  PA_9,   // D9
+  PA_10,  // D10
+  PA_11,  // D11
+  PA_12,  // D12
+  PA_13,  // D13
+  PA_14,  // D14
+  PA_15,  // D15
+  PB_0,   // D16/A8
+  PB_1,   // D17/A9
+  PB_2,   // D18/A10
+  PB_3,   // D19
+  PB_4,   // D20
+  PB_5,   // D21
+  PB_6,   // D22
+  PB_7,   // D23
+  PB_8,   // D24
+  PB_9,   // D25
+  PB_10,  // D26
+  PB_11,  // D27/A11
+  PB_12,  // D28/A12
+  PB_13,  // D29
+  PB_14,  // D30/A13
+  PB_15,  // D31/A14
+  PC_4,   // D32/A15
+  PC_6,   // D33
+  PC_10,  // D34
+  PC_11,  // D35
+  PC_13,  // D36
+  PC_14,  // D37
+  PC_15,  // D38
+  PF_0,   // D39/A16
+  PF_1,   // D40/A17
+  PG_10   // D41
+};
+
+// Analog (Ax) pin number array
+extern "C" const uint32_t analogInputPin[] = {
+  0,  // A0,  PA0
+  1,  // A1,  PA1
+  2,  // A2,  PA2
+  3,  // A3,  PA3
+  4,  // A4,  PA4
+  5,  // A5,  PA5
+  6,  // A6,  PA6
+  7,  // A7,  PA7
+  16, // A8,  PB0
+  17, // A9,  PB1
+  18, // A10, PB2
+  27, // A11, PB11
+  28, // A12, PB12
+  30, // A13, PB14
+  31, // A14, PB15
+  32, // A15, PC4
+  39, // A16, PF0
+  40  // A17, PF1
+};
+
+__weak void SystemClock_Config(void)
+{
+	RCC_OscInitTypeDef RCC_OscInitStruct = {};
+	RCC_ClkInitTypeDef RCC_ClkInitStruct = {};
+
+	/** Configure the main internal regulator output voltage
+	*/
+	HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1_BOOST);
+
+	/** Initializes the RCC Oscillators according to the specified parameters
+	* in the RCC_OscInitTypeDef structure.
+	*/
+	RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI|RCC_OSCILLATORTYPE_HSI48|RCC_OSCILLATORTYPE_HSE;
+	RCC_OscInitStruct.HSIState = RCC_HSI_ON;
+	RCC_OscInitStruct.HSEState = RCC_HSE_ON;
+	RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
+	RCC_OscInitStruct.HSI48State = RCC_HSI48_ON;
+	RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+	#if PHOQUE_PLL_HSI
+	RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
+	RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV4;
+	#else
+	RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
+	RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV2;
+	#endif
+	RCC_OscInitStruct.PLL.PLLN = 85;
+	RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
+	RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
+	RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
+	if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+	{
+		Error_Handler();
+	}
+
+	/** Initializes the CPU, AHB and APB buses clocks
+	*/
+	RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
+															|RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
+	RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+	RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+	RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
+	RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+
+	if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK)
+	{
+		Error_Handler();
+	}
+
+	RCC_PeriphCLKInitTypeDef PeriphClkInit;
+	PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_FDCAN | RCC_PERIPHCLK_USB | RCC_PERIPHCLK_RNG | RCC_PERIPHCLK_LPUART1 | RCC_PERIPHCLK_I2C1; 
+	PeriphClkInit.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_PCLK1;
+	PeriphClkInit.FdcanClockSelection = RCC_FDCANCLKSOURCE_PLL; //CAN will run at 170MHz (PLLQ)
+	PeriphClkInit.I2c1ClockSelection = RCC_I2C1CLKSOURCE_PCLK1; //I2C1 at 170MHz
+	PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_HSI48;
+	PeriphClkInit.RngClockSelection = RCC_RNGCLKSOURCE_HSI48;
+	if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
+	{
+		Error_Handler();
+	}
+
+}
+
+#endif /* ARDUINO_PHOQUE2* */