From d0f3c8d8b2684e4891be02e9dd7796d8ed063287 Mon Sep 17 00:00:00 2001 From: gordon-nexthop Date: Tue, 17 Mar 2026 20:15:08 -0700 Subject: [PATCH 1/2] NOS-4523: Blackmamba: Fintek F81214E driver support (#126) MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Black Mamba uses Finetk F81214E for UART. Ravi has submitted the patch to upstream linux and is trying to get it included in v6.12 This is a stop gap for until this upstream request merges so builds for black mamba we do internally has everything that we need. [NOS-4523](https://nexthopai.atlassian.net/browse/NOS-4523?atlOrigin=eyJpIjoiMjRhZGVmMmY0NDg3NDE0Mzg3Nzk2MmU4ZjIzOWQxNzciLCJwIjoiaiJ9) is tracking support in upstream linux. I think merge latency is relatively high here anyway… I’m interested in what we do with regards to SONiC upstream here... Build with this patch applied: https://github.com/nexthop-ai/private-sonic-buildimage/actions/runs/23200968066 build succeeded - merging. [NOS-4523](https://nexthopai.atlassian.net/browse/NOS-4523?atlOrigin=eyJpIjoiNWRkNTljNzYxNjVmNDY3MDlhMDU5Y2ZhYzA5YTRkZjUiLCJwIjoiZ2l0aHViLWNvbS1KU1cifQ) - [x] Yes - [ ] No - [ ] 202505 - [ ] 202511 [NOS-4523]: https://nexthopai.atlassian.net/browse/NOS-4523?atlOrigin=eyJpIjoiNWRkNTljNzYxNjVmNDY3MDlhMDU5Y2ZhYzA5YTRkZjUiLCJwIjoiZ2l0aHViLWNvbS1KU1cifQ [NOS-4523]: https://nexthopai.atlassian.net/browse/NOS-4523?atlOrigin=eyJpIjoiNWRkNTljNzYxNjVmNDY3MDlhMDU5Y2ZhYzA5YTRkZjUiLCJwIjoiZ2l0aHViLWNvbS1KU1cifQ --------- Signed-off-by: gordon-nexthop --- ...-8250-add-support-for-fintek-F81214E.patch | 77 +++++++++++++++++++ patches-sonic/series | 1 + 2 files changed, 78 insertions(+) create mode 100644 patches-sonic/driver-tty-serial-8250-add-support-for-fintek-F81214E.patch diff --git a/patches-sonic/driver-tty-serial-8250-add-support-for-fintek-F81214E.patch b/patches-sonic/driver-tty-serial-8250-add-support-for-fintek-F81214E.patch new file mode 100644 index 000000000..4beb39781 --- /dev/null +++ b/patches-sonic/driver-tty-serial-8250-add-support-for-fintek-F81214E.patch @@ -0,0 +1,77 @@ +serial: 8250_fintek: Add support for F81214EThe F81214E is a LPC/eSPI to 2 UART Super I/O. +Functionally, it is the same as the F81216E.The only difference is that the F81216E +has 4 UART ports, whereas the F81214E has 2 UART ports. + +Signed-off-by: Ravi Rama +diff --git a/drivers/tty/serial/8250/8250_fintek.c b/drivers/tty/serial/8250/8250_fintek.c +index ecbce226b..880e12586 100644 +--- a/drivers/tty/serial/8250/8250_fintek.c ++++ b/drivers/tty/serial/8250/8250_fintek.c +@@ -21,6 +21,7 @@ + #define CHIP_ID_F81866 0x1010 + #define CHIP_ID_F81966 0x0215 + #define CHIP_ID_F81216AD 0x1602 ++#define CHIP_ID_F81214E 0x1417 + #define CHIP_ID_F81216E 0x1617 + #define CHIP_ID_F81216H 0x0501 + #define CHIP_ID_F81216 0x0802 +@@ -159,6 +160,7 @@ static int fintek_8250_check_id(struct fintek_8250 *pdata) + case CHIP_ID_F81866: + case CHIP_ID_F81966: + case CHIP_ID_F81216AD: ++ case CHIP_ID_F81214E: + case CHIP_ID_F81216E: + case CHIP_ID_F81216H: + case CHIP_ID_F81216: +@@ -183,6 +185,7 @@ static int fintek_8250_get_ldn_range(struct fintek_8250 *pdata, int *min, + return 0; + + case CHIP_ID_F81216AD: ++ case CHIP_ID_F81214E: + case CHIP_ID_F81216E: + case CHIP_ID_F81216H: + case CHIP_ID_F81216: +@@ -253,6 +256,7 @@ static void fintek_8250_set_irq_mode(struct fintek_8250 *pdata, bool is_level) + break; + + case CHIP_ID_F81216AD: ++ case CHIP_ID_F81214E: + case CHIP_ID_F81216E: + case CHIP_ID_F81216H: + case CHIP_ID_F81216: +@@ -267,7 +271,8 @@ static void fintek_8250_set_irq_mode(struct fintek_8250 *pdata, bool is_level) + static void fintek_8250_set_max_fifo(struct fintek_8250 *pdata) + { + switch (pdata->pid) { +- case CHIP_ID_F81216E: /* 128Bytes FIFO */ ++ case CHIP_ID_F81214E: /* 128Bytes FIFO */ ++ case CHIP_ID_F81216E: + case CHIP_ID_F81216H: + case CHIP_ID_F81966: + case CHIP_ID_F81866: +@@ -302,6 +307,7 @@ static void fintek_8250_set_termios(struct uart_port *port, + goto exit; + + switch (pdata->pid) { ++ case CHIP_ID_F81214E: + case CHIP_ID_F81216E: + case CHIP_ID_F81216H: + reg = RS485; +@@ -352,6 +358,7 @@ static void fintek_8250_set_termios_handler(struct uart_8250_port *uart) + struct fintek_8250 *pdata = uart->port.private_data; + + switch (pdata->pid) { ++ case CHIP_ID_F81214E: + case CHIP_ID_F81216E: + case CHIP_ID_F81216H: + case CHIP_ID_F81966: +@@ -445,7 +452,8 @@ static void fintek_8250_set_rs485_handler(struct uart_8250_port *uart) + uart->port.rs485_supported = fintek_8250_rs485_supported; + break; + +- case CHIP_ID_F81216E: /* F81216E does not support RS485 delays */ ++ case CHIP_ID_F81214E: /* F81216E does not support RS485 delays */ ++ case CHIP_ID_F81216E: + uart->port.rs485_config = fintek_8250_rs485_config; + uart->port.rs485_supported = fintek_8250_rs485_supported; + break; diff --git a/patches-sonic/series b/patches-sonic/series index 068174c3d..117bfbd23 100644 --- a/patches-sonic/series +++ b/patches-sonic/series @@ -204,6 +204,7 @@ cisco-npu-disable-other-bars.patch # Nexthop patches 0001-x86-CPU-AMD-Print-the-reason-for-the-last-reset.patch 0002-x86-CPU-AMD-Ignore-invalid-reset-reason-value.patch +driver-tty-serial-8250-add-support-for-fintek-F81214E.patch # Linux upstream pending # Fix to avoid kernel panic on Kernel 6.1.94 # https://github.com/sonic-net/sonic-buildimage/issues/20901 From 21a3f6fa5cb6368322e07d900b89bb85f007abe0 Mon Sep 17 00:00:00 2001 From: gordon-nexthop Date: Fri, 20 Mar 2026 03:58:34 +0000 Subject: [PATCH 2/2] Fixing patch to exactly match email thread Signed-off-by: gordon-nexthop --- ...-8250-add-support-for-fintek-F81214E.patch | 95 +++++++++++-------- 1 file changed, 55 insertions(+), 40 deletions(-) diff --git a/patches-sonic/driver-tty-serial-8250-add-support-for-fintek-F81214E.patch b/patches-sonic/driver-tty-serial-8250-add-support-for-fintek-F81214E.patch index 4beb39781..be690282c 100644 --- a/patches-sonic/driver-tty-serial-8250-add-support-for-fintek-F81214E.patch +++ b/patches-sonic/driver-tty-serial-8250-add-support-for-fintek-F81214E.patch @@ -1,77 +1,92 @@ -serial: 8250_fintek: Add support for F81214EThe F81214E is a LPC/eSPI to 2 UART Super I/O. -Functionally, it is the same as the F81216E.The only difference is that the F81216E -has 4 UART ports, whereas the F81214E has 2 UART ports. +From mboxrd@z Thu Jan 1 00:00:00 1970 +From: Ravi Rama +Date: Fri, 13 Mar 2026 14:47:27 -0500 +Subject: [PATCH] serial: 8250_fintek: Add support for F81214E + +The F81214E is a LPC/eSPI to 2 UART Super I/O chip. + +Functionally, it is the same as the F81216E. The only difference +is that the F81216E has 4 UART ports, whereas the F81214E has 2 +UART ports. Signed-off-by: Ravi Rama +--- + drivers/tty/serial/8250/8250_fintek.c | 10 +++++++++- + 1 file changed, 9 insertions(+), 1 deletion(-) + diff --git a/drivers/tty/serial/8250/8250_fintek.c b/drivers/tty/serial/8250/8250_fintek.c -index ecbce226b..880e12586 100644 +index b4461a89b8d0..976c5748905c 100644 --- a/drivers/tty/serial/8250/8250_fintek.c +++ b/drivers/tty/serial/8250/8250_fintek.c -@@ -21,6 +21,7 @@ - #define CHIP_ID_F81866 0x1010 - #define CHIP_ID_F81966 0x0215 +@@ -1,6 +1,6 @@ + // SPDX-License-Identifier: GPL-2.0 + /* +- * Probe for F81216A LPC to 4 UART ++ * Probe for F81216A LPC to 4 UART and F81214E LPC/eSPI to 2 UART + * + * Copyright (C) 2014-2016 Ricardo Ribalda, Qtechnology A/S + */ +@@ -23,6 +23,7 @@ #define CHIP_ID_F81216AD 0x1602 -+#define CHIP_ID_F81214E 0x1417 #define CHIP_ID_F81216E 0x1617 #define CHIP_ID_F81216H 0x0501 ++#define CHIP_ID_F81214E 0x1417 #define CHIP_ID_F81216 0x0802 -@@ -159,6 +160,7 @@ static int fintek_8250_check_id(struct fintek_8250 *pdata) - case CHIP_ID_F81866: - case CHIP_ID_F81966: + #define VENDOR_ID1 0x23 + #define VENDOR_ID1_VAL 0x19 +@@ -161,6 +162,7 @@ static int fintek_8250_check_id(struct fintek_8250 *pdata) case CHIP_ID_F81216AD: -+ case CHIP_ID_F81214E: case CHIP_ID_F81216E: case CHIP_ID_F81216H: ++ case CHIP_ID_F81214E: case CHIP_ID_F81216: -@@ -183,6 +185,7 @@ static int fintek_8250_get_ldn_range(struct fintek_8250 *pdata, int *min, - return 0; - + break; + default: +@@ -185,6 +187,7 @@ static int fintek_8250_get_ldn_range(struct fintek_8250 *pdata, int *min, case CHIP_ID_F81216AD: -+ case CHIP_ID_F81214E: case CHIP_ID_F81216E: case CHIP_ID_F81216H: ++ case CHIP_ID_F81214E: case CHIP_ID_F81216: -@@ -253,6 +256,7 @@ static void fintek_8250_set_irq_mode(struct fintek_8250 *pdata, bool is_level) - break; - + *min = F81216_LDN_LOW; + *max = F81216_LDN_HIGH; +@@ -255,6 +258,7 @@ static void fintek_8250_set_irq_mode(struct fintek_8250 *pdata, bool is_level) case CHIP_ID_F81216AD: -+ case CHIP_ID_F81214E: case CHIP_ID_F81216E: case CHIP_ID_F81216H: ++ case CHIP_ID_F81214E: case CHIP_ID_F81216: -@@ -267,7 +271,8 @@ static void fintek_8250_set_irq_mode(struct fintek_8250 *pdata, bool is_level) - static void fintek_8250_set_max_fifo(struct fintek_8250 *pdata) - { + sio_write_mask_reg(pdata, FINTEK_IRQ_MODE, IRQ_SHARE, + IRQ_SHARE); +@@ -269,6 +273,7 @@ static void fintek_8250_set_max_fifo(struct fintek_8250 *pdata) switch (pdata->pid) { -- case CHIP_ID_F81216E: /* 128Bytes FIFO */ -+ case CHIP_ID_F81214E: /* 128Bytes FIFO */ -+ case CHIP_ID_F81216E: + case CHIP_ID_F81216E: /* 128Bytes FIFO */ case CHIP_ID_F81216H: ++ case CHIP_ID_F81214E: case CHIP_ID_F81966: case CHIP_ID_F81866: -@@ -302,6 +307,7 @@ static void fintek_8250_set_termios(struct uart_port *port, - goto exit; - + sio_write_mask_reg(pdata, FIFO_CTRL, +@@ -304,6 +309,7 @@ static void fintek_8250_set_termios(struct uart_port *port, switch (pdata->pid) { -+ case CHIP_ID_F81214E: case CHIP_ID_F81216E: case CHIP_ID_F81216H: ++ case CHIP_ID_F81214E: reg = RS485; -@@ -352,6 +358,7 @@ static void fintek_8250_set_termios_handler(struct uart_8250_port *uart) - struct fintek_8250 *pdata = uart->port.private_data; - + break; + case CHIP_ID_F81966: +@@ -354,6 +360,7 @@ static void fintek_8250_set_termios_handler(struct uart_8250_port *uart) switch (pdata->pid) { -+ case CHIP_ID_F81214E: case CHIP_ID_F81216E: case CHIP_ID_F81216H: ++ case CHIP_ID_F81214E: case CHIP_ID_F81966: -@@ -445,7 +452,8 @@ static void fintek_8250_set_rs485_handler(struct uart_8250_port *uart) - uart->port.rs485_supported = fintek_8250_rs485_supported; + case CHIP_ID_F81866: + uart->port.set_termios = fintek_8250_set_termios; +@@ -446,6 +453,7 @@ static void fintek_8250_set_rs485_handler(struct uart_8250_port *uart) break; - -- case CHIP_ID_F81216E: /* F81216E does not support RS485 delays */ -+ case CHIP_ID_F81214E: /* F81216E does not support RS485 delays */ -+ case CHIP_ID_F81216E: + + case CHIP_ID_F81216E: /* F81216E does not support RS485 delays */ ++ case CHIP_ID_F81214E: /* F81214E does not support RS485 delays */ uart->port.rs485_config = fintek_8250_rs485_config; uart->port.rs485_supported = fintek_8250_rs485_supported; break;