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inline assert_instr tests
1 parent 44f4069 commit 709ece1

2 files changed

Lines changed: 14 additions & 68 deletions

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crates/core_arch/src/aarch64/mte.rs

Lines changed: 9 additions & 48 deletions
Original file line numberDiff line numberDiff line change
@@ -2,6 +2,9 @@
22
//!
33
//! [ACLE documentation](https://arm-software.github.io/acle/main/acle.html#markdown-toc-mte-intrinsics)
44
5+
#[cfg(test)]
6+
use stdarch_test::assert_instr;
7+
58
unsafe extern "unadjusted" {
69
#[link_name = "llvm.aarch64.irg"]
710
fn irg_(ptr: *const (), exclude: i64) -> *const ();
@@ -33,6 +36,7 @@ unsafe extern "unadjusted" {
3336
/// and Undefined Behavior to dereference it.
3437
#[inline]
3538
#[target_feature(enable = "mte")]
39+
#[cfg_attr(test, assert_instr(irg))]
3640
#[unstable(feature = "stdarch_aarch64_mte", issue = "129010")]
3741
pub unsafe fn __arm_mte_create_random_tag<T>(src: *const T, mask: u64) -> *const T {
3842
irg_(src as *const (), mask as i64) as *const T
@@ -49,6 +53,7 @@ pub unsafe fn __arm_mte_create_random_tag<T>(src: *const T, mask: u64) -> *const
4953
/// SAFETY: See `__arm_mte_create_random_tag`.
5054
#[inline]
5155
#[target_feature(enable = "mte")]
56+
#[cfg_attr(test, assert_instr(addg))]
5257
#[unstable(feature = "stdarch_aarch64_mte", issue = "129010")]
5358
pub unsafe fn __arm_mte_increment_tag<const OFFSET: i64, T>(src: *const T) -> *const T {
5459
addg_(src as *const (), OFFSET) as *const T
@@ -64,6 +69,7 @@ pub unsafe fn __arm_mte_increment_tag<const OFFSET: i64, T>(src: *const T) -> *c
6469
/// the result.
6570
#[inline]
6671
#[target_feature(enable = "mte")]
72+
#[cfg_attr(test, assert_instr(gmi))]
6773
#[unstable(feature = "stdarch_aarch64_mte", issue = "129010")]
6874
pub unsafe fn __arm_mte_exclude_tag<T>(src: *const T, excluded: u64) -> u64 {
6975
gmi_(src as *const (), excluded as i64) as u64
@@ -78,6 +84,7 @@ pub unsafe fn __arm_mte_exclude_tag<T>(src: *const T, excluded: u64) -> u64 {
7884
/// entire 16-byte memory granule.
7985
#[inline]
8086
#[target_feature(enable = "mte")]
87+
#[cfg_attr(test, assert_instr(stg))]
8188
#[unstable(feature = "stdarch_aarch64_mte", issue = "129010")]
8289
pub unsafe fn __arm_mte_set_tag<T>(tag_address: *const T) {
8390
stg_(tag_address as *const (), tag_address as *const ());
@@ -90,6 +97,7 @@ pub unsafe fn __arm_mte_set_tag<T>(tag_address: *const T) {
9097
/// is read. This does not need to be 16-byte aligned.
9198
#[inline]
9299
#[target_feature(enable = "mte")]
100+
#[cfg_attr(test, assert_instr(ldg))]
93101
#[unstable(feature = "stdarch_aarch64_mte", issue = "129010")]
94102
pub unsafe fn __arm_mte_get_tag<T>(address: *const T) -> *const T {
95103
ldg_(address as *const (), address as *const ()) as *const T
@@ -99,55 +107,8 @@ pub unsafe fn __arm_mte_get_tag<T>(address: *const T) -> *const T {
99107
/// the tags, and sign-extending the result.
100108
#[inline]
101109
#[target_feature(enable = "mte")]
110+
#[cfg_attr(test, assert_instr(subp))]
102111
#[unstable(feature = "stdarch_aarch64_mte", issue = "129010")]
103112
pub unsafe fn __arm_mte_ptrdiff<T, U>(a: *const T, b: *const U) -> i64 {
104113
subp_(a as *const (), b as *const ())
105114
}
106-
107-
#[cfg(test)]
108-
mod test {
109-
use super::*;
110-
use stdarch_test::assert_instr;
111-
112-
#[cfg_attr(all(test, not(target_env = "msvc")), assert_instr(irg))] // FIXME: MSVC `dumpbin` doesn't support MTE
113-
#[allow(dead_code)]
114-
#[target_feature(enable = "mte")]
115-
unsafe fn test_arm_mte_create_random_tag(src: *const (), mask: u64) -> *const () {
116-
__arm_mte_create_random_tag(src, mask)
117-
}
118-
119-
#[cfg_attr(all(test, not(target_env = "msvc")), assert_instr(addg))]
120-
#[allow(dead_code)]
121-
#[target_feature(enable = "mte")]
122-
unsafe fn test_arm_mte_increment_tag(src: *const ()) -> *const () {
123-
__arm_mte_increment_tag::<1, _>(src)
124-
}
125-
126-
#[cfg_attr(all(test, not(target_env = "msvc")), assert_instr(gmi))]
127-
#[allow(dead_code)]
128-
#[target_feature(enable = "mte")]
129-
unsafe fn test_arm_mte_exclude_tag(src: *const (), excluded: u64) -> u64 {
130-
__arm_mte_exclude_tag(src, excluded)
131-
}
132-
133-
#[cfg_attr(all(test, not(target_env = "msvc")), assert_instr(stg))]
134-
#[allow(dead_code)]
135-
#[target_feature(enable = "mte")]
136-
unsafe fn test_arm_mte_set_tag(src: *const ()) {
137-
__arm_mte_set_tag(src)
138-
}
139-
140-
#[cfg_attr(all(test, not(target_env = "msvc")), assert_instr(ldg))]
141-
#[allow(dead_code)]
142-
#[target_feature(enable = "mte")]
143-
unsafe fn test_arm_mte_get_tag(src: *const ()) -> *const () {
144-
__arm_mte_get_tag(src)
145-
}
146-
147-
#[cfg_attr(all(test, not(target_env = "msvc")), assert_instr(subp))]
148-
#[allow(dead_code)]
149-
#[target_feature(enable = "mte")]
150-
unsafe fn test_arm_mte_ptrdiff(a: *const (), b: *const ()) -> i64 {
151-
__arm_mte_ptrdiff(a, b)
152-
}
153-
}

crates/core_arch/src/aarch64/rand.rs

Lines changed: 5 additions & 20 deletions
Original file line numberDiff line numberDiff line change
@@ -2,6 +2,9 @@
22
//!
33
//! [ACLE documentation](https://arm-software.github.io/acle/main/acle.html#random-number-generation-intrinsics)
44
5+
#[cfg(test)]
6+
use stdarch_test::assert_instr;
7+
58
unsafe extern "unadjusted" {
69
#[link_name = "llvm.aarch64.rndr"]
710
fn rndr_() -> Tuple;
@@ -22,6 +25,7 @@ struct Tuple {
2225
/// is returned.
2326
#[inline]
2427
#[target_feature(enable = "rand")]
28+
#[cfg_attr(test, assert_instr(mrs))]
2529
#[unstable(feature = "stdarch_aarch64_rand", issue = "153514")]
2630
pub unsafe fn __rndr(value: *mut u64) -> i32 {
2731
let Tuple { bits, status } = rndr_();
@@ -35,29 +39,10 @@ pub unsafe fn __rndr(value: *mut u64) -> i32 {
3539
/// to by the input is set to zero and a non-zero value is returned.
3640
#[inline]
3741
#[target_feature(enable = "rand")]
42+
#[cfg_attr(test, assert_instr(mrs))]
3843
#[unstable(feature = "stdarch_aarch64_rand", issue = "153514")]
3944
pub unsafe fn __rndrrs(value: *mut u64) -> i32 {
4045
let Tuple { bits, status } = rndrrs_();
4146
unsafe { *value = bits };
4247
status as i32
4348
}
44-
45-
#[cfg(test)]
46-
mod test {
47-
use super::*;
48-
use stdarch_test::assert_instr;
49-
50-
#[cfg_attr(test, assert_instr(mrs))]
51-
#[allow(dead_code)]
52-
#[target_feature(enable = "rand")]
53-
unsafe fn test_rndr(value: &mut u64) -> i32 {
54-
__rndr(value)
55-
}
56-
57-
#[cfg_attr(test, assert_instr(mrs))]
58-
#[allow(dead_code)]
59-
#[target_feature(enable = "rand")]
60-
unsafe fn test_rndrrs(value: &mut u64) -> i32 {
61-
__rndrrs(value)
62-
}
63-
}

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