inline assert_instr tests

Author: folkertdev

crates/core_arch/src/aarch64/mte.rs

@@ -2,6 +2,8 @@
 //!
 //! [ACLE documentation](https://arm-software.github.io/acle/main/acle.html#markdown-toc-mte-intrinsics)
 
+use stdarch_test::assert_instr;
+
 unsafe extern "unadjusted" {
     #[link_name = "llvm.aarch64.irg"]
     fn irg_(ptr: *const (), exclude: i64) -> *const ();
@@ -33,6 +35,7 @@ unsafe extern "unadjusted" {
 /// and Undefined Behavior to dereference it.
 #[inline]
 #[target_feature(enable = "mte")]
+#[cfg_attr(test, assert_instr(irg))]
 #[unstable(feature = "stdarch_aarch64_mte", issue = "129010")]
 pub unsafe fn __arm_mte_create_random_tag<T>(src: *const T, mask: u64) -> *const T {
     irg_(src as *const (), mask as i64) as *const T
@@ -49,6 +52,7 @@ pub unsafe fn __arm_mte_create_random_tag<T>(src: *const T, mask: u64) -> *const
 /// SAFETY: See `__arm_mte_create_random_tag`.
 #[inline]
 #[target_feature(enable = "mte")]
+#[cfg_attr(test, assert_instr(addg))]
 #[unstable(feature = "stdarch_aarch64_mte", issue = "129010")]
 pub unsafe fn __arm_mte_increment_tag<const OFFSET: i64, T>(src: *const T) -> *const T {
     addg_(src as *const (), OFFSET) as *const T
@@ -64,6 +68,7 @@ pub unsafe fn __arm_mte_increment_tag<const OFFSET: i64, T>(src: *const T) -> *c
 /// the result.
 #[inline]
 #[target_feature(enable = "mte")]
+#[cfg_attr(test, assert_instr(gmi))]
 #[unstable(feature = "stdarch_aarch64_mte", issue = "129010")]
 pub unsafe fn __arm_mte_exclude_tag<T>(src: *const T, excluded: u64) -> u64 {
     gmi_(src as *const (), excluded as i64) as u64
@@ -78,6 +83,7 @@ pub unsafe fn __arm_mte_exclude_tag<T>(src: *const T, excluded: u64) -> u64 {
 /// entire 16-byte memory granule.
 #[inline]
 #[target_feature(enable = "mte")]
+#[cfg_attr(test, assert_instr(stg))]
 #[unstable(feature = "stdarch_aarch64_mte", issue = "129010")]
 pub unsafe fn __arm_mte_set_tag<T>(tag_address: *const T) {
     stg_(tag_address as *const (), tag_address as *const ());
@@ -90,6 +96,7 @@ pub unsafe fn __arm_mte_set_tag<T>(tag_address: *const T) {
 ///            is read. This does not need to be 16-byte aligned.
 #[inline]
 #[target_feature(enable = "mte")]
+#[cfg_attr(test, assert_instr(ldg))]
 #[unstable(feature = "stdarch_aarch64_mte", issue = "129010")]
 pub unsafe fn __arm_mte_get_tag<T>(address: *const T) -> *const T {
     ldg_(address as *const (), address as *const ()) as *const T
@@ -99,55 +106,8 @@ pub unsafe fn __arm_mte_get_tag<T>(address: *const T) -> *const T {
 /// the tags, and sign-extending the result.
 #[inline]
 #[target_feature(enable = "mte")]
+#[cfg_attr(test, assert_instr(subp))]
 #[unstable(feature = "stdarch_aarch64_mte", issue = "129010")]
 pub unsafe fn __arm_mte_ptrdiff<T, U>(a: *const T, b: *const U) -> i64 {
     subp_(a as *const (), b as *const ())
 }
-
-#[cfg(test)]
-mod test {
-    use super::*;
-    use stdarch_test::assert_instr;
-
-    #[cfg_attr(all(test, not(target_env = "msvc")), assert_instr(irg))] // FIXME: MSVC  `dumpbin` doesn't support MTE
-    #[allow(dead_code)]
-    #[target_feature(enable = "mte")]
-    unsafe fn test_arm_mte_create_random_tag(src: *const (), mask: u64) -> *const () {
-        __arm_mte_create_random_tag(src, mask)
-    }
-
-    #[cfg_attr(all(test, not(target_env = "msvc")), assert_instr(addg))]
-    #[allow(dead_code)]
-    #[target_feature(enable = "mte")]
-    unsafe fn test_arm_mte_increment_tag(src: *const ()) -> *const () {
-        __arm_mte_increment_tag::<1, _>(src)
-    }
-
-    #[cfg_attr(all(test, not(target_env = "msvc")), assert_instr(gmi))]
-    #[allow(dead_code)]
-    #[target_feature(enable = "mte")]
-    unsafe fn test_arm_mte_exclude_tag(src: *const (), excluded: u64) -> u64 {
-        __arm_mte_exclude_tag(src, excluded)
-    }
-
-    #[cfg_attr(all(test, not(target_env = "msvc")), assert_instr(stg))]
-    #[allow(dead_code)]
-    #[target_feature(enable = "mte")]
-    unsafe fn test_arm_mte_set_tag(src: *const ()) {
-        __arm_mte_set_tag(src)
-    }
-
-    #[cfg_attr(all(test, not(target_env = "msvc")), assert_instr(ldg))]
-    #[allow(dead_code)]
-    #[target_feature(enable = "mte")]
-    unsafe fn test_arm_mte_get_tag(src: *const ()) -> *const () {
-        __arm_mte_get_tag(src)
-    }
-
-    #[cfg_attr(all(test, not(target_env = "msvc")), assert_instr(subp))]
-    #[allow(dead_code)]
-    #[target_feature(enable = "mte")]
-    unsafe fn test_arm_mte_ptrdiff(a: *const (), b: *const ()) -> i64 {
-        __arm_mte_ptrdiff(a, b)
-    }
-}

crates/core_arch/src/aarch64/rand.rs

@@ -2,6 +2,8 @@
 //!
 //! [ACLE documentation](https://arm-software.github.io/acle/main/acle.html#random-number-generation-intrinsics)
 
+use stdarch_test::assert_instr;
+
 unsafe extern "unadjusted" {
     #[link_name = "llvm.aarch64.rndr"]
     fn rndr_() -> Tuple;
@@ -22,6 +24,7 @@ struct Tuple {
 /// is returned.
 #[inline]
 #[target_feature(enable = "rand")]
+#[cfg_attr(test, assert_instr(mrs))]
 #[unstable(feature = "stdarch_aarch64_rand", issue = "153514")]
 pub unsafe fn __rndr(value: *mut u64) -> i32 {
     let Tuple { bits, status } = rndr_();
@@ -35,29 +38,10 @@ pub unsafe fn __rndr(value: *mut u64) -> i32 {
 /// to by the input is set to zero and a non-zero value is returned.
 #[inline]
 #[target_feature(enable = "rand")]
+#[cfg_attr(test, assert_instr(mrs))]
 #[unstable(feature = "stdarch_aarch64_rand", issue = "153514")]
 pub unsafe fn __rndrrs(value: *mut u64) -> i32 {
     let Tuple { bits, status } = rndrrs_();
     unsafe { *value = bits };
     status as i32
 }
-
-#[cfg(test)]
-mod test {
-    use super::*;
-    use stdarch_test::assert_instr;
-
-    #[cfg_attr(test, assert_instr(mrs))]
-    #[allow(dead_code)]
-    #[target_feature(enable = "rand")]
-    unsafe fn test_rndr(value: &mut u64) -> i32 {
-        __rndr(value)
-    }
-
-    #[cfg_attr(test, assert_instr(mrs))]
-    #[allow(dead_code)]
-    #[target_feature(enable = "rand")]
-    unsafe fn test_rndrrs(value: &mut u64) -> i32 {
-        __rndrrs(value)
-    }
-}