Auto merge of #149351 - Zalathar:rollup-ee06zha, r=Zalathar

Rollup of 12 pull requests

Successful merges:

 - #147936 (Offload intrinsic)
 - #148358 (Fix some issues around `rustc_public`)
 - #148452 (Mangle symbols with a mangled name close to PDB limits with v0 instead of legacy mangling to avoid linker errors)
 - #148751 (Build gnullvm toolchains on Windows natively)
 - #148951 (rustc_target: aarch64: Remove deprecated FEAT_TME)
 - #149149 ([rustdoc] misc search index cleanups)
 - #149173 (Use rust rather than LLVM target features in the target spec)
 - #149307 (Deny const auto traits)
 - #149312 (Mark riscv64gc-unknown-linux-musl as tier 2 target)
 - #149317 (Handle inline asm in has_ffi_unwind_calls)
 - #149326 (Remove unused `Clone` derive on `DelayedLint`)
 - #149341 (Add `Copy` to some AST enums.)

r? `@ghost`
`@rustbot` modify labels: rollup

Author: bors

compiler/rustc_ast/src/ast.rs

@@ -857,15 +857,15 @@ impl BindingMode {
     }
 }
 
-#[derive(Clone, Encodable, Decodable, Debug, Walkable)]
+#[derive(Clone, Copy, Encodable, Decodable, Debug, Walkable)]
 pub enum RangeEnd {
     /// `..=` or `...`
     Included(RangeSyntax),
     /// `..`
     Excluded,
 }
 
-#[derive(Clone, Encodable, Decodable, Debug, Walkable)]
+#[derive(Clone, Copy, Encodable, Decodable, Debug, Walkable)]
 pub enum RangeSyntax {
     /// `...`
     DotDotDot,
@@ -1915,7 +1915,7 @@ pub enum ForLoopKind {
 }
 
 /// Used to differentiate between `async {}` blocks and `gen {}` blocks.
-#[derive(Clone, Encodable, Decodable, Debug, PartialEq, Eq, Walkable)]
+#[derive(Clone, Copy, Encodable, Decodable, Debug, PartialEq, Eq, Walkable)]
 pub enum GenBlockKind {
     Async,
     Gen,

compiler/rustc_ast_passes/messages.ftl

@@ -89,6 +89,9 @@ ast_passes_const_and_coroutine = functions cannot be both `const` and `{$corouti
     .coroutine = `{$coroutine_kind}` because of this
     .label = {""}
 
+ast_passes_const_auto_trait = auto traits cannot be const
+    .help = remove the `const` keyword
+
 ast_passes_const_bound_trait_object = const trait bounds are not allowed in trait object types
 
 ast_passes_const_without_body =

compiler/rustc_ast_passes/src/ast_validation.rs

@@ -820,6 +820,12 @@ impl<'a> AstValidator<'a> {
         self.dcx().emit_err(errors::ModuleNonAscii { span: ident.span, name: ident.name });
     }
 
+    fn deny_const_auto_traits(&self, constness: Const) {
+        if let Const::Yes(span) = constness {
+            self.dcx().emit_err(errors::ConstAutoTrait { span });
+        }
+    }
+
     fn deny_generic_params(&self, generics: &Generics, ident_span: Span) {
         if !generics.params.is_empty() {
             self.dcx()
@@ -1257,6 +1263,8 @@ impl<'a> Visitor<'a> for AstValidator<'a> {
             }) => {
                 self.visit_attrs_vis_ident(&item.attrs, &item.vis, ident);
                 if *is_auto == IsAuto::Yes {
+                    // For why we reject `const auto trait`, see rust-lang/rust#149285.
+                    self.deny_const_auto_traits(*constness);
                     // Auto traits cannot have generics, super traits nor contain items.
                     self.deny_generic_params(generics, ident.span);
                     self.deny_super_traits(bounds, ident.span);

compiler/rustc_ast_passes/src/errors.rs

@@ -429,6 +429,14 @@ pub(crate) struct AutoTraitItems {
     pub ident: Span,
 }
 
+#[derive(Diagnostic)]
+#[diag(ast_passes_const_auto_trait)]
+#[help]
+pub(crate) struct ConstAutoTrait {
+    #[primary_span]
+    pub span: Span,
+}
+
 #[derive(Diagnostic)]
 #[diag(ast_passes_generic_before_constraints)]
 pub(crate) struct ArgsBeforeConstraint {

compiler/rustc_codegen_gcc/src/gcc_util.rs

@@ -33,11 +33,7 @@ pub(crate) fn global_gcc_features(sess: &Session) -> Vec<String> {
     // should be taken in cases like these.
     let mut features = vec![];
 
-    // Features implied by an implicit or explicit `--target`.
-    features.extend(sess.target.features.split(',').filter(|v| !v.is_empty()).map(String::from));
-
-    // -Ctarget-features
-    target_features::flag_to_backend_features(sess, |feature, enable| {
+    let mut extend_backend_features = |feature: &str, enable: bool| {
         // We run through `to_gcc_features` when
         // passing requests down to GCC. This means that all in-language
         // features also work on the command line instead of having two
@@ -48,7 +44,13 @@ pub(crate) fn global_gcc_features(sess: &Session) -> Vec<String> {
                 .flat_map(|feat| to_gcc_features(sess, feat).into_iter())
                 .map(|feature| if !enable { format!("-{}", feature) } else { feature.to_string() }),
         );
-    });
+    };
+
+    // Features implied by an implicit or explicit `--target`.
+    target_features::target_spec_to_backend_features(sess, &mut extend_backend_features);
+
+    // -Ctarget-features
+    target_features::flag_to_backend_features(sess, extend_backend_features);
 
     gcc_features_by_flags(sess, &mut features);
 
@@ -66,6 +68,7 @@ pub fn to_gcc_features<'a>(sess: &Session, s: &'a str) -> SmallVec<[&'a str; 2]>
         (&Arch::X86 | &Arch::X86_64, "rdrand") => smallvec!["rdrnd"],
         (&Arch::X86 | &Arch::X86_64, "bmi1") => smallvec!["bmi"],
         (&Arch::X86 | &Arch::X86_64, "cmpxchg16b") => smallvec!["cx16"],
+        (&Arch::X86 | &Arch::X86_64, "lahfsahf") => smallvec!["sahf"],
         (&Arch::X86 | &Arch::X86_64, "avx512vaes") => smallvec!["vaes"],
         (&Arch::X86 | &Arch::X86_64, "avx512gfni") => smallvec!["gfni"],
         (&Arch::X86 | &Arch::X86_64, "avx512vpclmulqdq") => smallvec!["vpclmulqdq"],

compiler/rustc_codegen_llvm/messages.ftl

@@ -18,6 +18,9 @@ codegen_llvm_lto_bitcode_from_rlib = failed to get bitcode from object file for
 codegen_llvm_mismatch_data_layout =
     data-layout for target `{$rustc_target}`, `{$rustc_layout}`, differs from LLVM target's `{$llvm_target}` default layout, `{$llvm_layout}`
 
+codegen_llvm_offload_without_enable = using the offload feature requires -Z offload=Enable
+codegen_llvm_offload_without_fat_lto = using the offload feature requires -C lto=fat
+
 codegen_llvm_parse_bitcode = failed to parse bitcode for LTO module
 codegen_llvm_parse_bitcode_with_llvm_err = failed to parse bitcode for LTO module: {$llvm_err}
 

compiler/rustc_codegen_llvm/src/attributes.rs

@@ -30,6 +30,14 @@ pub(crate) fn apply_to_callsite(callsite: &Value, idx: AttributePlace, attrs: &[
     }
 }
 
+pub(crate) fn has_string_attr(llfn: &Value, name: &str) -> bool {
+    llvm::HasStringAttribute(llfn, name)
+}
+
+pub(crate) fn remove_string_attr_from_llfn(llfn: &Value, name: &str) {
+    llvm::RemoveStringAttrFromFn(llfn, name);
+}
+
 /// Get LLVM attribute for the provided inline heuristic.
 pub(crate) fn inline_attr<'ll, 'tcx>(
     cx: &SimpleCx<'ll>,
@@ -408,6 +416,10 @@ pub(crate) fn llfn_attrs_from_instance<'ll, 'tcx>(
         to_add.push(llvm::CreateAttrString(cx.llcx, "no-builtins"));
     }
 
+    if codegen_fn_attrs.flags.contains(CodegenFnAttrFlags::OFFLOAD_KERNEL) {
+        to_add.push(llvm::CreateAttrString(cx.llcx, "offload-kernel"))
+    }
+
     if codegen_fn_attrs.flags.contains(CodegenFnAttrFlags::COLD) {
         to_add.push(AttributeKind::Cold.create_attr(cx.llcx));
     }

compiler/rustc_codegen_llvm/src/back/lto.rs

@@ -26,7 +26,7 @@ use crate::back::write::{
 };
 use crate::errors::{LlvmError, LtoBitcodeFromRlib};
 use crate::llvm::{self, build_string};
-use crate::{LlvmCodegenBackend, ModuleLlvm, SimpleCx};
+use crate::{LlvmCodegenBackend, ModuleLlvm};
 
 /// We keep track of the computed LTO cache keys from the previous
 /// session to determine which CGUs we can reuse.
@@ -601,7 +601,6 @@ pub(crate) fn run_pass_manager(
     // We then run the llvm_optimize function a second time, to optimize the code which we generated
     // in the enzyme differentiation pass.
     let enable_ad = config.autodiff.contains(&config::AutoDiff::Enable);
-    let enable_gpu = config.offload.contains(&config::Offload::Enable);
     let stage = if thin {
         write::AutodiffStage::PreAD
     } else {
@@ -616,13 +615,6 @@ pub(crate) fn run_pass_manager(
         write::llvm_optimize(cgcx, dcx, module, None, config, opt_level, opt_stage, stage);
     }
 
-    // Here we only handle the GPU host (=cpu) code.
-    if enable_gpu && !thin && !cgcx.target_is_like_gpu {
-        let cx =
-            SimpleCx::new(module.module_llvm.llmod(), &module.module_llvm.llcx, cgcx.pointer_size);
-        crate::builder::gpu_offload::handle_gpu_code(cgcx, &cx);
-    }
-
     if cfg!(feature = "llvm_enzyme") && enable_ad && !thin {
         let opt_stage = llvm::OptStage::FatLTO;
         let stage = write::AutodiffStage::PostAD;

compiler/rustc_codegen_llvm/src/back/write.rs

@@ -43,7 +43,7 @@ use crate::errors::{
 use crate::llvm::diagnostic::OptimizationDiagnosticKind::*;
 use crate::llvm::{self, DiagnosticInfo};
 use crate::type_::llvm_type_ptr;
-use crate::{LlvmCodegenBackend, ModuleLlvm, SimpleCx, base, common, llvm_util};
+use crate::{LlvmCodegenBackend, ModuleLlvm, SimpleCx, attributes, base, common, llvm_util};
 
 pub(crate) fn llvm_err<'a>(dcx: DiagCtxtHandle<'_>, err: LlvmError<'a>) -> ! {
     match llvm::last_error() {
@@ -712,11 +712,12 @@ pub(crate) unsafe fn llvm_optimize(
             SimpleCx::new(module.module_llvm.llmod(), module.module_llvm.llcx, cgcx.pointer_size);
         // For now we only support up to 10 kernels named kernel_0 ... kernel_9, a follow-up PR is
         // introducing a proper offload intrinsic to solve this limitation.
-        for num in 0..9 {
-            let name = format!("kernel_{num}");
-            if let Some(kernel) = cx.get_function(&name) {
-                handle_offload(&cx, kernel);
+        for func in cx.get_functions() {
+            let offload_kernel = "offload-kernel";
+            if attributes::has_string_attr(func, offload_kernel) {
+                handle_offload(&cx, func);
             }
+            attributes::remove_string_attr_from_llfn(func, offload_kernel);
         }
     }