From b81f6e2771c26a8b30626ee4e6c97640fd5d3f31 Mon Sep 17 00:00:00 2001 From: lzunspp Date: Sat, 9 May 2026 13:58:22 +0800 Subject: [PATCH] =?UTF-8?q?eadtec=20Open=20Source=E2=80=8C=20HMI=20panel?= =?UTF-8?q?=20driver?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- arch/arm/boot/dts/overlays/Makefile | 4 +- .../vc4-kms-dsi-edatec-panel-070c-overlay.dts | 105 ++++ .../vc4-kms-dsi-edatec-panel-101c-overlay.dts | 131 ++++ drivers/gpu/drm/panel/Kconfig | 10 + drivers/gpu/drm/panel/Makefile | 1 + drivers/gpu/drm/panel/panel-edatec-dsi.c | 565 ++++++++++++++++++ drivers/gpu/drm/panel/panel-ilitek-ili9881c.c | 547 ++++++++++++++++- drivers/regulator/Kconfig | 9 + drivers/regulator/Makefile | 1 + drivers/regulator/edatec-panel-regulator.c | 355 +++++++++++ 10 files changed, 1725 insertions(+), 3 deletions(-) create mode 100755 arch/arm/boot/dts/overlays/vc4-kms-dsi-edatec-panel-070c-overlay.dts create mode 100755 arch/arm/boot/dts/overlays/vc4-kms-dsi-edatec-panel-101c-overlay.dts create mode 100755 drivers/gpu/drm/panel/panel-edatec-dsi.c create mode 100755 drivers/regulator/edatec-panel-regulator.c diff --git a/arch/arm/boot/dts/overlays/Makefile b/arch/arm/boot/dts/overlays/Makefile index 261dfb885a0362..28e93efb8d8802 100644 --- a/arch/arm/boot/dts/overlays/Makefile +++ b/arch/arm/boot/dts/overlays/Makefile @@ -370,7 +370,9 @@ dtbo-$(CONFIG_ARCH_BCM2835) += \ wifimac.dtbo \ wittypi.dtbo \ wm8960-soundcard.dtbo \ - ws2812-pio.dtbo + ws2812-pio.dtbo \ + vc4-kms-dsi-edatec-panel-070c.dtbo \ + vc4-kms-dsi-edatec-panel-101c.dtbo targets += dtbs dtbs_install targets += $(dtbo-y) diff --git a/arch/arm/boot/dts/overlays/vc4-kms-dsi-edatec-panel-070c-overlay.dts b/arch/arm/boot/dts/overlays/vc4-kms-dsi-edatec-panel-070c-overlay.dts new file mode 100755 index 00000000000000..09fbb730cd7642 --- /dev/null +++ b/arch/arm/boot/dts/overlays/vc4-kms-dsi-edatec-panel-070c-overlay.dts @@ -0,0 +1,105 @@ +/dts-v1/; +/plugin/; + +/ { + compatible = "brcm,bcm2835"; + + i2c_frag: fragment@0 { + target = <&i2c_csi_dsi>; + __overlay__ { + #gpio-cells = <2>; + #address-cells = <1>; + #size-cells = <0>; + status = "okay"; + + reg_display: reg_display@27 { + reg = <0x27>; + compatible = "rzw,t70p383rk-v2"; + + gpio-controller; + #gpio-cells = <2>; + + port { + panel_in: endpoint { + remote-endpoint = <&dsi_out>; + }; + }; + }; + + gt911: gt911@14 { + compatible = "goodix,gt911"; + reg = <0x14>; + + reset-gpios = <®_display 3 0>; + interrupt-parent = <&gpio>; + interrupts = <2 2>; + irq-gpios = <&gpio 2 0>; + }; + }; + }; + + fragment@1 { + target = <&dsi1>; + __overlay__ { + status = "okay"; + port { + dsi_out: endpoint { + remote-endpoint = <&panel_in>; + }; + }; + }; + }; + + fragment@2 { + target = <&i2c0if>; + __overlay__ { + status = "okay"; + }; + }; + + fragment@3 { + target = <&i2c0mux>; + __overlay__ { + status = "okay"; + }; + }; + + fragment@4 { + target = <&i2c_arm>; + __dormant__ { + status = "okay"; + }; + }; + + fragment@5 { + target = <&gpio>; + __overlay__ { + gt911_pins: gt911_pins { + brcm,pins = <2>; + brcm,function = <0>; + brcm,pull = <2>; + }; + }; + }; + + fragment@6 { + target = <®_display>; + __dormant__ { + compatible = "rzw,t70p383rk-lite"; + }; + }; + + __overrides__ { + i2c1 = <&i2c_frag>, "target:0=",<&i2c1>, + <0>,"-2-3+4"; + interrupt = <>911_pins>,"brcm,pins:0", + <>911>,"interrupts:0", + <>911>,"irq-gpios:4"; + + pi4 = <&i2c_frag>, "target:0=",<&i2c_csi_dsi>; + cm4 = <&i2c_frag>, "target:0=",<&i2c_csi_dsi>; + pi5 = <&i2c_frag>, "target:0=",<&i2c_csi_dsi>; + cm5 = <&i2c_frag>, "target:0=",<&i2c_csi_dsi0>; + cm0 = <&i2c_frag>, "target:0=",<&i2c_csi_dsi>,<0>, "+6"; + }; +}; diff --git a/arch/arm/boot/dts/overlays/vc4-kms-dsi-edatec-panel-101c-overlay.dts b/arch/arm/boot/dts/overlays/vc4-kms-dsi-edatec-panel-101c-overlay.dts new file mode 100755 index 00000000000000..252edc5c4c12e9 --- /dev/null +++ b/arch/arm/boot/dts/overlays/vc4-kms-dsi-edatec-panel-101c-overlay.dts @@ -0,0 +1,131 @@ +/dts-v1/; +/plugin/; + +/ { + compatible = "brcm,bcm2835"; + + fragment@0 { + target-path = "/"; + __overlay__ { + vdd_lcd: fixedregulator_lcd { + compatible = "regulator-fixed"; + regulator-name = "vdd_lcd"; + regulator-max-microvolt = <5000000>; + regulator-min-microvolt = <5000000>; + + gpios = <®_display 4 0>; + regulator-boot-on; + enable-active-high; + }; + }; + }; + + fragment@1 { + target = <&dsi1>; + __overlay__{ + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; + port { + dsi_out_port:endpoint { + remote-endpoint = <&panel_dsi_port>; + }; + }; + + ili9881c:ili9881c@0 { + compatible = "rzw,t101p136cq-rpi4"; + status = "okay"; + reg = <0>; + + reset-gpios = <®_display 2 0>; + backlight = <®_display>; + power-supply = <&vdd_lcd>; + rotation = <270>; + + port { + panel_dsi_port: endpoint { + remote-endpoint = <&dsi_out_port>; + }; + }; + }; + }; + }; + + fragment@2 { + target = <&i2c0if>; + __overlay__ { + status = "okay"; + }; + }; + + fragment@3 { + target = <&i2c0mux>; + __overlay__ { + status = "okay"; + }; + }; + + fragment@4 { + target = <&gpio>; + __overlay__ { + gt928_pins: gt928_pins { + brcm,pins = <16>; + brcm,function = <0>; + brcm,pull = <2>; + }; + }; + }; + + i2c_frag: fragment@5 { + target = <&i2c_csi_dsi>; + __overlay__ { + #address-cells = <1>; + #size-cells = <0>; + status = "okay"; + + reg_display: reg_display@27 { + compatible = "edatec,disp-regulator"; + reg = <0x27>; + gpio-controller; + #gpio-cells = <2>; + }; + + gt928:gt928@14 { + compatible = "goodix,gt928"; + reg = <0x14>; + + reset-gpios = <®_display 3 0>; + interrupt-parent = <&gpio>; + interrupts = <16 2>; + irq-gpios = <&gpio 16 0>; + }; + }; + }; + + fragment@6 { + target = <&ili9881c>; + __dormant__ { + compatible = "rzw,t101p136cq-rpi4-lite"; + }; + }; + + fragment@7 { + target = <&ili9881c>; + __dormant__ { + compatible = "rzw,t101p136cq-rpi5"; + }; + }; + + __overrides__ { + interrupt = <>928_pins>,"brcm,pins:0", + <>928>,"interrupts:0", + <>928>,"irq-gpios:4"; + rotation = <&ili9881c>,"rotation:0"; + + pi4 = <&i2c_frag>, "target:0=",<&i2c_csi_dsi>,<0>, "+6"; + cm4 = <&i2c_frag>, "target:0=",<&i2c_csi_dsi>; + pi5 = <&i2c_frag>, "target:0=",<&i2c_csi_dsi>,<0>, "+7"; + cm5 = <&i2c_frag>, "target:0=",<&i2c_csi_dsi0>,<0>, "+7"; + cm0 = <&i2c_frag>, "target:0=",<&i2c_csi_dsi>,<0>, "+6"; + }; +}; diff --git a/drivers/gpu/drm/panel/Kconfig b/drivers/gpu/drm/panel/Kconfig index 71b550a06ab01a..127166632e0c45 100644 --- a/drivers/gpu/drm/panel/Kconfig +++ b/drivers/gpu/drm/panel/Kconfig @@ -1221,4 +1221,14 @@ config DRM_PANEL_XINPENG_XPP055C272 Say Y here if you want to enable support for the Xinpeng XPP055C272 controller for 720x1280 LCD panels with MIPI/RGB/SPI system interfaces. + +config DRM_PANEL_EDATEC_7INCH + tristate "EDATEC 7INCH TFT LCD panel driver" + depends on OF + depends on DRM_MIPI_DSI + depends on BACKLIGHT_CLASS_DEVICE + help + Say Y here if you want to enable support for the EDATEC + 7inch Touchscreens. To compile this driver as a module, + choose M here. endmenu diff --git a/drivers/gpu/drm/panel/Makefile b/drivers/gpu/drm/panel/Makefile index 75f6bf2729a602..3779b813279587 100644 --- a/drivers/gpu/drm/panel/Makefile +++ b/drivers/gpu/drm/panel/Makefile @@ -122,3 +122,4 @@ obj-$(CONFIG_DRM_PANEL_WAVESHARE_TOUCHSCREEN) += panel-waveshare-dsi.o obj-$(CONFIG_DRM_PANEL_WAVESHARE_TOUCHSCREEN_V2) += panel-waveshare-dsi-v2.o obj-$(CONFIG_DRM_PANEL_WIDECHIPS_WS2401) += panel-widechips-ws2401.o obj-$(CONFIG_DRM_PANEL_XINPENG_XPP055C272) += panel-xinpeng-xpp055c272.o +obj-$(CONFIG_DRM_PANEL_EDATEC_7INCH) += panel-edatec-dsi.o diff --git a/drivers/gpu/drm/panel/panel-edatec-dsi.c b/drivers/gpu/drm/panel/panel-edatec-dsi.c new file mode 100755 index 00000000000000..eafa89f54a3f30 --- /dev/null +++ b/drivers/gpu/drm/panel/panel-edatec-dsi.c @@ -0,0 +1,565 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright © 2023 Raspberry Pi Ltd + * + * Based on panel-raspberrypi-touchscreen by Broadcom + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include + +#define ED_DSI_DRIVER_NAME "ed-ts-dsi" + +#define REG_PWM 0x01 +#define REG_IODIR 0x02 +#define REG_PWR 0x03 +#define REG_OUTPUT 0x0A + +#define CMD_BRIDGE_INIT 0x11 +#define CMD_BACKLIGHT_EN 0x12 +#define CMD_FW_VERSION 0xE1 + +#define PIN_LCD_BL_EN BIT(0) +#define PIN_LCD_BL_PWM BIT(1) +#define PIN_LCD_RST BIT(2) +#define PIN_TP_RST BIT(3) + +static int bl_power = 0; + +enum gpio_signals { + LCD_BL_EN_N, + LCD_BL_PWM_N, + LCD_RST_N, + TP_RST_N, + NUM_GPIO +}; + +struct gpio_signal_mappings { + unsigned int reg; + unsigned int mask; +}; + +static const struct gpio_signal_mappings mappings[NUM_GPIO] = { + [LCD_BL_EN_N] = { REG_OUTPUT, PIN_LCD_BL_EN }, + [LCD_BL_PWM_N] = { REG_OUTPUT, PIN_LCD_BL_PWM }, + [LCD_RST_N] = { REG_OUTPUT, PIN_LCD_RST }, + [TP_RST_N] = { REG_OUTPUT, PIN_TP_RST }, +}; + +struct ed_panel { + struct drm_panel base; + struct mipi_dsi_device *dsi; + struct i2c_client *i2c; + const struct drm_display_mode *mode; + + struct mutex lock; + struct regmap *regmap; + bool gpio_states[NUM_GPIO]; + u8 port_states; + struct gpio_chip gc; + + enum drm_panel_orientation orientation; +}; + +static const struct regmap_config ed_regmap_config = { + .reg_bits = 8, + .val_bits = 8, + .disable_locking = 1, + .max_register = REG_OUTPUT, + .cache_type = REGCACHE_RBTREE, +}; + +static int ed_set_port_state(struct ed_panel *ts, int reg, u8 val) +{ + ts->port_states = val; + return regmap_write(ts->regmap, reg, val); +}; + +static u8 ed_get_port_state(struct ed_panel *ts, int reg) +{ + return ts->port_states; +}; + +/* 7.0inch 1024x600 */ +static const struct drm_display_mode ed_panel_7_0_mode = { + .clock = 50000, + .hdisplay = 1024, + .hsync_start = 1024 + 160, + .hsync_end = 1024 + 160 + 20, + .htotal = 1024 + 160 + 20 + 140, + .vdisplay = 600, + .vsync_start = 600 + 12, + .vsync_end = 600 + 12 + 3, + .vtotal = 600 + 12 + 3 + 20, +}; + +static const struct drm_display_mode ed_panel_7_0_cm0_mode = { + .clock = 41000, + .hdisplay = 1024, + .hsync_start = 1024 + 40, + .hsync_end = 1024 + 40 + 10, + .htotal = 1024 + 40 + 10 + 40, + .vdisplay = 600, + .vsync_start = 600 + 4, + .vsync_end = 600 + 4 + 2, + .vtotal = 600 + 4 + 2 + 4, +}; + +static struct ed_panel *panel_to_ts(struct drm_panel *panel) +{ + return container_of(panel, struct ed_panel, base); +} + +static void ed_panel_i2c_write(struct ed_panel *ts, u8 reg, u8 val) +{ + int ret; + + ret = i2c_smbus_write_byte_data(ts->i2c, reg, val); + if (ret) + dev_err(&ts->i2c->dev, "I2C write failed: %d\n", ret); +} + +static int ed_panel_disable(struct drm_panel *panel) +{ + struct ed_panel *ts = panel_to_ts(panel); + ed_panel_i2c_write(ts, CMD_BACKLIGHT_EN, 0x00); + + return 0; +} + +static int ed_panel_unprepare(struct drm_panel *panel) +{ + return 0; +} + +static int ed_panel_prepare(struct drm_panel *panel) +{ + return 0; +} + +static int ed_panel_enable(struct drm_panel *panel) +{ + struct ed_panel *ts = panel_to_ts(panel); + ed_panel_i2c_write(ts, CMD_BACKLIGHT_EN, 0x01); + + return 0; +} + +static int ed_panel_get_modes(struct drm_panel *panel, + struct drm_connector *connector) +{ + static const u32 bus_format = MEDIA_BUS_FMT_RGB888_1X24; + struct ed_panel *ts = panel_to_ts(panel); + struct drm_display_mode *mode; + + mode = drm_mode_duplicate(connector->dev, ts->mode); + if (!mode) { + dev_err(panel->dev, "failed to add mode %ux%u@%u\n", + ts->mode->hdisplay, + ts->mode->vdisplay, + drm_mode_vrefresh(ts->mode)); + } + + mode->type |= DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED; + + drm_mode_set_name(mode); + + drm_mode_probed_add(connector, mode); + + connector->display_info.bpc = 8; + connector->display_info.width_mm = 154; + connector->display_info.height_mm = 86; + drm_display_info_set_bus_formats(&connector->display_info, + &bus_format, 1); + + /* + * TODO: Remove once all drm drivers call + * drm_connector_set_orientation_from_panel() + */ + drm_connector_set_panel_orientation(connector, ts->orientation); + + return 1; +} + +static enum drm_panel_orientation ed_panel_get_orientation(struct drm_panel *panel) +{ + struct ed_panel *ts = panel_to_ts(panel); + + return ts->orientation; +} + +static const struct drm_panel_funcs ed_panel_funcs = { + .disable = ed_panel_disable, + .unprepare = ed_panel_unprepare, + .prepare = ed_panel_prepare, + .enable = ed_panel_enable, + .get_modes = ed_panel_get_modes, + .get_orientation = ed_panel_get_orientation, +}; + +static int ed_panel_bl_update_status(struct backlight_device *bl) +{ + struct backlight_properties *props = &(bl->props); + struct ed_panel *ts = bl_get_data(bl); + int bl_power_new = props->power; + + mutex_lock(&ts->lock); + if (bl_power_new != bl_power) { + ed_panel_i2c_write(ts, REG_PWR, bl_power_new); + bl_power = bl_power_new; + } else { + ed_panel_i2c_write(ts, REG_PWM, backlight_get_brightness(bl)); + } + mutex_unlock(&ts->lock); + + return 0; +} + +static const struct backlight_ops ed_panel_bl_ops = { + .update_status = ed_panel_bl_update_status, +}; + +static struct backlight_device * +ed_panel_create_backlight(struct ed_panel *ts) +{ + struct device *dev = ts->base.dev; + const struct backlight_properties props = { + .type = BACKLIGHT_RAW, + .brightness = 255, + .max_brightness = 255, + }; + + return devm_backlight_device_register(dev, dev_name(dev), dev, ts, + &ed_panel_bl_ops, &props); +} + +static int ed_gpio_get_direction(struct gpio_chip *gc, unsigned int off) +{ + return GPIO_LINE_DIRECTION_OUT; +} + +static int ed_set_bit(struct ed_panel *ts, unsigned int reg, unsigned int pin, bool enabled) +{ + unsigned int mask = BIT(pin); + unsigned int val = enabled ? 0xffff : 0x0000; + + return regmap_update_bits(ts->regmap, reg, mask, val); +} + +static int ed_direction_input(struct gpio_chip *gc, unsigned int off) +{ + struct ed_panel *ts = gpiochip_get_data(gc); + int status; + + mutex_lock(&ts->lock); + status = ed_set_bit(ts, REG_IODIR, off, true); + mutex_unlock(&ts->lock); + + return status; +} + +static int ed_direction_output(struct gpio_chip *gc, unsigned int off, int value) +{ + struct ed_panel *ts = gpiochip_get_data(gc); + int status; + u8 last_val; + + mutex_lock(&ts->lock); + status = ed_set_bit(ts, REG_IODIR, off, false); + + last_val = ed_get_port_state(ts, mappings[off].reg); + if (value) + last_val |= mappings[off].mask; + else + last_val &= ~mappings[off].mask; + + ed_set_port_state(ts, mappings[off].reg, last_val); + + mutex_unlock(&ts->lock); + + return status; +} + +static int ed_gpio_set(struct gpio_chip *gc, unsigned int off, int val) +{ + struct ed_panel *ts = gpiochip_get_data(gc); + u8 last_val; + + if (off >= NUM_GPIO) + return -1; + + mutex_lock(&ts->lock); + + last_val = ed_get_port_state(ts, mappings[off].reg); + if (val) + last_val |= mappings[off].mask; + else + last_val &= ~mappings[off].mask; + + ed_set_port_state(ts, mappings[off].reg, last_val); + + mutex_unlock(&ts->lock); + return 0; +} + +static int ed_gpio_get(struct gpio_chip *gc, unsigned int off) +{ + struct ed_panel *ts = gpiochip_get_data(gc); + u8 last_val; + int status; + + if (off >= NUM_GPIO) + return -1; + + mutex_lock(&ts->lock); + last_val = ed_get_port_state(ts, mappings[off].reg); + status = !!(last_val & BIT(off)); + mutex_unlock(&ts->lock); + + return status; +} + + +static int ed_firmware_version(struct i2c_client *i2c) +{ + struct i2c_msg msgs[1]; + u8 addr_buf[1] = { CMD_FW_VERSION }; + u8 data_buf[16] = { 0 }; + int ret; + + /* Write register address */ + msgs[0].addr = i2c->addr; + msgs[0].flags = 0; + msgs[0].len = 1; + msgs[0].buf = addr_buf; + + ret = i2c_transfer(i2c->adapter, msgs, ARRAY_SIZE(msgs)); + if (ret != ARRAY_SIZE(msgs)) + return -EIO; + + usleep_range(200, 400); + + /* Read data from register */ + msgs[0].addr = i2c->addr; + msgs[0].flags = I2C_M_RD; + msgs[0].len = 16; + msgs[0].buf = data_buf; + + ret = i2c_transfer(i2c->adapter, msgs, ARRAY_SIZE(msgs)); + if (ret != ARRAY_SIZE(msgs)) + return -EIO; + + dev_info(&i2c->dev, "Firmware version: %s\n", data_buf); + + return 0; +} + +static int ed_panel_probe(struct i2c_client *i2c) +{ + struct device *dev = &i2c->dev; + struct ed_panel *ts; + struct regmap *regmap; + struct device_node *endpoint, *dsi_host_node; + struct mipi_dsi_host *host; + struct mipi_dsi_device_info info = { + .type = ED_DSI_DRIVER_NAME, + .channel = 0, + .node = NULL, + }; + int ret; + + ts = devm_kzalloc(dev, sizeof(*ts), GFP_KERNEL); + if (!ts) + return -ENOMEM; + + ts->mode = of_device_get_match_data(dev); + if (!ts->mode) + return -EINVAL; + + ed_firmware_version(i2c); + + mutex_init(&ts->lock); + i2c_set_clientdata(i2c, ts); + + ts->i2c = i2c; + + regmap = devm_regmap_init_i2c(i2c, &ed_regmap_config); + if (IS_ERR(regmap)) { + ret = PTR_ERR(regmap); + dev_err(&i2c->dev, "Failed to allocate register map: %d\n", + ret); + goto error; + } + + ts->regmap = regmap; + + ret = of_drm_get_panel_orientation(dev->of_node, &ts->orientation); + if (ret) { + dev_err(dev, "%pOF: failed to get orientation %d\n", dev->of_node, ret); + goto error; + } + + /* Look up the DSI host. It needs to probe before we do. */ + endpoint = of_graph_get_next_endpoint(dev->of_node, NULL); + if (!endpoint) + { + ret = -ENODEV; + goto error; + } + + dsi_host_node = of_graph_get_remote_port_parent(endpoint); + if (!dsi_host_node) + { + of_node_put(endpoint); + ret = -ENODEV; + goto error; + } + + host = of_find_mipi_dsi_host_by_node(dsi_host_node); + of_node_put(dsi_host_node); + if (!host) { + of_node_put(endpoint); + ret = -EPROBE_DEFER; + goto error; + } + + info.node = of_graph_get_remote_port(endpoint); + if (!info.node) + { + of_node_put(endpoint); + ret = -ENODEV; + goto error; + } + + of_node_put(endpoint); + + ts->dsi = devm_mipi_dsi_device_register_full(dev, host, &info); + if (IS_ERR(ts->dsi)) { + dev_err(dev, "DSI device registration failed: %ld\n", + PTR_ERR(ts->dsi)); + ret = PTR_ERR(ts->dsi); + goto error; + } + + if(ts->mode->clock > 42000) + { + ed_panel_i2c_write(ts, CMD_BRIDGE_INIT, 0x01); + } + else + { + ed_panel_i2c_write(ts, CMD_BRIDGE_INIT, 0x02); + } + msleep(20); + + drm_panel_init(&ts->base, dev, &ed_panel_funcs, + DRM_MODE_CONNECTOR_DSI); + + ts->base.backlight = ed_panel_create_backlight(ts); + if (IS_ERR(ts->base.backlight)) { + ret = PTR_ERR(ts->base.backlight); + dev_err(dev, "Failed to create backlight: %d\n", ret); + goto error; + } + + /* This appears last, as it's what will unblock the DSI host + * driver's component bind function. + */ + drm_panel_add(&ts->base); + + ts->dsi->mode_flags = (MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE | MIPI_DSI_MODE_LPM); + + ts->dsi->format = MIPI_DSI_FMT_RGB888; + ts->dsi->lanes = 2; + + ret = devm_mipi_dsi_attach(dev, ts->dsi); + if (ret) { + dev_err(dev, "failed to attach dsi to host: %d\n", ret); + goto error; + } + ts->gc.parent = &i2c->dev; + ts->gc.label = i2c->name; + ts->gc.owner = THIS_MODULE; + ts->gc.base = -1; + ts->gc.ngpio = NUM_GPIO; + + ts->gc.set = ed_gpio_set; + ts->gc.get = ed_gpio_get; + ts->gc.get_direction = ed_gpio_get_direction; + ts->gc.direction_input = ed_direction_input; + ts->gc.direction_output = ed_direction_output; + ts->gc.can_sleep = true; + + ret = devm_gpiochip_add_data(&i2c->dev, &ts->gc, ts); + if (ret) { + dev_err(&i2c->dev, "Failed to create gpiochip: %d\n", ret); + goto error; + } + + return 0; + +error: + + mutex_destroy(&ts->lock); + return ret; +} + +static void ed_panel_remove(struct i2c_client *i2c) +{ + struct ed_panel *ts = i2c_get_clientdata(i2c); + + drm_panel_remove(&ts->base); + mutex_destroy(&ts->lock); +} + +static void ed_panel_shutdown(struct i2c_client *i2c) +{ + struct ed_panel *ts = i2c_get_clientdata(i2c); + + ed_panel_i2c_write(ts, CMD_BACKLIGHT_EN, 0x00); +} + +static const struct of_device_id ed_panel_of_ids[] = { + { + .compatible = "rzw,t70p383rk-v2", + .data = &ed_panel_7_0_mode, + }, + { + .compatible = "rzw,t70p383rk-lite", + .data = &ed_panel_7_0_cm0_mode, + }, { + /* sentinel */ + } +}; +MODULE_DEVICE_TABLE(of, ed_panel_of_ids); + +static struct i2c_driver ed_panel_driver = { + .driver = { + .name = "edatec_disp_070c", + .of_match_table = ed_panel_of_ids, + }, + .probe = ed_panel_probe, + .remove = ed_panel_remove, + .shutdown = ed_panel_shutdown, +}; +module_i2c_driver(ed_panel_driver); + +MODULE_AUTHOR("EDATEC"); +MODULE_DESCRIPTION("EDATEC TFT LCD panel driver"); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/gpu/drm/panel/panel-ilitek-ili9881c.c b/drivers/gpu/drm/panel/panel-ilitek-ili9881c.c index fe8964d9f8f04f..ccce878d717869 100644 --- a/drivers/gpu/drm/panel/panel-ilitek-ili9881c.c +++ b/drivers/gpu/drm/panel/panel-ilitek-ili9881c.c @@ -2230,11 +2230,464 @@ static const struct ili9881c_instr bsd1218_a101kl68_init[] = { ILI9881C_COMMAND_INSTR(0xd3, 0x3f), }; + +static const struct ili9881c_instr t101p136cq_init[] = { + //ILI9881C PAGE3 + ILI9881C_SWITCH_PAGE_INSTR(3), + //GIP_1 + ILI9881C_COMMAND_INSTR(0x01, 0x00), //added + ILI9881C_COMMAND_INSTR(0x02, 0x00), + ILI9881C_COMMAND_INSTR(0x03, 0x53), + ILI9881C_COMMAND_INSTR(0x04, 0x53), + ILI9881C_COMMAND_INSTR(0x05, 0x13), + ILI9881C_COMMAND_INSTR(0x06, 0x04), + ILI9881C_COMMAND_INSTR(0x07, 0x02), + ILI9881C_COMMAND_INSTR(0x08, 0x02), + ILI9881C_COMMAND_INSTR(0x09, 0x00), + ILI9881C_COMMAND_INSTR(0x0A, 0x00), + ILI9881C_COMMAND_INSTR(0x0B, 0x00), + ILI9881C_COMMAND_INSTR(0x0C, 0x00), + ILI9881C_COMMAND_INSTR(0x0D, 0x00), + ILI9881C_COMMAND_INSTR(0x0E, 0x00), + ILI9881C_COMMAND_INSTR(0x0F, 0x00), + ILI9881C_COMMAND_INSTR(0x10, 0x00), + ILI9881C_COMMAND_INSTR(0x11, 0x00), + ILI9881C_COMMAND_INSTR(0x12, 0x00), + ILI9881C_COMMAND_INSTR(0x13, 0x00), + ILI9881C_COMMAND_INSTR(0x14, 0x00), + ILI9881C_COMMAND_INSTR(0x15, 0x05), + ILI9881C_COMMAND_INSTR(0x16, 0x05), + ILI9881C_COMMAND_INSTR(0x17, 0x03), + ILI9881C_COMMAND_INSTR(0x18, 0x03), + ILI9881C_COMMAND_INSTR(0x19, 0x00), + ILI9881C_COMMAND_INSTR(0x1A, 0x00), + ILI9881C_COMMAND_INSTR(0x1B, 0x00), + ILI9881C_COMMAND_INSTR(0x1C, 0x00), + ILI9881C_COMMAND_INSTR(0x1D, 0x00), + ILI9881C_COMMAND_INSTR(0x1E, 0xC0), + ILI9881C_COMMAND_INSTR(0x1F, 0x80), + ILI9881C_COMMAND_INSTR(0x20, 0x02), + ILI9881C_COMMAND_INSTR(0x21, 0x09), + ILI9881C_COMMAND_INSTR(0x22, 0x00), + ILI9881C_COMMAND_INSTR(0x23, 0x00), + ILI9881C_COMMAND_INSTR(0x24, 0x00), + ILI9881C_COMMAND_INSTR(0x25, 0x00), + ILI9881C_COMMAND_INSTR(0x26, 0x00), + ILI9881C_COMMAND_INSTR(0x27, 0x00), + ILI9881C_COMMAND_INSTR(0x28, 0x55), + ILI9881C_COMMAND_INSTR(0x29, 0x03), + ILI9881C_COMMAND_INSTR(0x2A, 0x00), + ILI9881C_COMMAND_INSTR(0x2B, 0x00), + ILI9881C_COMMAND_INSTR(0x2C, 0x00), + ILI9881C_COMMAND_INSTR(0x2D, 0x00), + ILI9881C_COMMAND_INSTR(0x2E, 0x00), + ILI9881C_COMMAND_INSTR(0x2F, 0x00), + ILI9881C_COMMAND_INSTR(0x30, 0x00), + ILI9881C_COMMAND_INSTR(0x31, 0x00), + ILI9881C_COMMAND_INSTR(0x32, 0x00), + ILI9881C_COMMAND_INSTR(0x33, 0x00), + ILI9881C_COMMAND_INSTR(0x34, 0x00), + ILI9881C_COMMAND_INSTR(0x35, 0x00), + ILI9881C_COMMAND_INSTR(0x36, 0x00), + ILI9881C_COMMAND_INSTR(0x37, 0x00), + ILI9881C_COMMAND_INSTR(0x38, 0x3C), + ILI9881C_COMMAND_INSTR(0x39, 0x00), + ILI9881C_COMMAND_INSTR(0x3A, 0x00), + ILI9881C_COMMAND_INSTR(0x3B, 0x00), + ILI9881C_COMMAND_INSTR(0x3C, 0x00), + ILI9881C_COMMAND_INSTR(0x3D, 0x00), + ILI9881C_COMMAND_INSTR(0x3E, 0x00), + ILI9881C_COMMAND_INSTR(0x3F, 0x00), + ILI9881C_COMMAND_INSTR(0x40, 0x00), + ILI9881C_COMMAND_INSTR(0x41, 0x00), + ILI9881C_COMMAND_INSTR(0x42, 0x00), + ILI9881C_COMMAND_INSTR(0x43, 0x00), + ILI9881C_COMMAND_INSTR(0x44, 0x00), + + //GIP_2 + ILI9881C_COMMAND_INSTR(0x50, 0x01), + ILI9881C_COMMAND_INSTR(0x51, 0x23), + ILI9881C_COMMAND_INSTR(0x52, 0x45), + ILI9881C_COMMAND_INSTR(0x53, 0x67), + ILI9881C_COMMAND_INSTR(0x54, 0x89), + ILI9881C_COMMAND_INSTR(0x55, 0xAB), + ILI9881C_COMMAND_INSTR(0x56, 0x01), + ILI9881C_COMMAND_INSTR(0x57, 0x23), + ILI9881C_COMMAND_INSTR(0x58, 0x45), + ILI9881C_COMMAND_INSTR(0x59, 0x67), + ILI9881C_COMMAND_INSTR(0x5A, 0x89), + ILI9881C_COMMAND_INSTR(0x5B, 0xAB), + ILI9881C_COMMAND_INSTR(0x5C, 0xCD), + ILI9881C_COMMAND_INSTR(0x5D, 0xEF), + //GIP_3 + ILI9881C_COMMAND_INSTR(0x5E, 0x01), + ILI9881C_COMMAND_INSTR(0x5F, 0x0A), + ILI9881C_COMMAND_INSTR(0x60, 0x02), + ILI9881C_COMMAND_INSTR(0x61, 0x02), + ILI9881C_COMMAND_INSTR(0x62, 0x08), + ILI9881C_COMMAND_INSTR(0x63, 0x15), + ILI9881C_COMMAND_INSTR(0x64, 0x14), + ILI9881C_COMMAND_INSTR(0x65, 0x02), + ILI9881C_COMMAND_INSTR(0x66, 0x11), + ILI9881C_COMMAND_INSTR(0x67, 0x10), + ILI9881C_COMMAND_INSTR(0x68, 0x02), + ILI9881C_COMMAND_INSTR(0x69, 0x0F), + ILI9881C_COMMAND_INSTR(0x6A, 0x0E), + ILI9881C_COMMAND_INSTR(0x6B, 0x02), + ILI9881C_COMMAND_INSTR(0x6C, 0x0D), + ILI9881C_COMMAND_INSTR(0x6D, 0x0C), + ILI9881C_COMMAND_INSTR(0x6E, 0x06), + ILI9881C_COMMAND_INSTR(0x6F, 0x02), + ILI9881C_COMMAND_INSTR(0x70, 0x02), + ILI9881C_COMMAND_INSTR(0x71, 0x02), + ILI9881C_COMMAND_INSTR(0x72, 0x02), + ILI9881C_COMMAND_INSTR(0x73, 0x02), + ILI9881C_COMMAND_INSTR(0x74, 0x02), + ILI9881C_COMMAND_INSTR(0x75, 0x0A), + ILI9881C_COMMAND_INSTR(0x76, 0x02), + ILI9881C_COMMAND_INSTR(0x77, 0x02), + ILI9881C_COMMAND_INSTR(0x78, 0x06), + ILI9881C_COMMAND_INSTR(0x79, 0x15), + ILI9881C_COMMAND_INSTR(0x7A, 0x14), + ILI9881C_COMMAND_INSTR(0x7B, 0x02), + ILI9881C_COMMAND_INSTR(0x7C, 0x10), + ILI9881C_COMMAND_INSTR(0x7D, 0x11), + ILI9881C_COMMAND_INSTR(0x7E, 0x02), + ILI9881C_COMMAND_INSTR(0x7F, 0x0C), + ILI9881C_COMMAND_INSTR(0x80, 0x0D), + ILI9881C_COMMAND_INSTR(0x81, 0x02), + ILI9881C_COMMAND_INSTR(0x82, 0x0E), + ILI9881C_COMMAND_INSTR(0x83, 0x0F), + ILI9881C_COMMAND_INSTR(0x84, 0x08), + ILI9881C_COMMAND_INSTR(0x85, 0x02), + ILI9881C_COMMAND_INSTR(0x86, 0x02), + ILI9881C_COMMAND_INSTR(0x87, 0x02), + ILI9881C_COMMAND_INSTR(0x88, 0x02), + ILI9881C_COMMAND_INSTR(0x89, 0x02), + ILI9881C_COMMAND_INSTR(0x8A, 0x02), + //ILI9881C PAGE4 + ILI9881C_SWITCH_PAGE_INSTR(4), + ILI9881C_COMMAND_INSTR(0x3B, 0x98), + ILI9881C_COMMAND_INSTR(0x6C, 0x15), + ILI9881C_COMMAND_INSTR(0x6E, 0x30), + // VGH & VGL OUTPUT + ILI9881C_COMMAND_INSTR(0x6F, 0x45), + ILI9881C_COMMAND_INSTR(0x8D, 0x1F), + ILI9881C_COMMAND_INSTR(0x87, 0xBA), + ILI9881C_COMMAND_INSTR(0x26, 0x76), + //Reload Gamma setting + ILI9881C_COMMAND_INSTR(0xB2, 0xD1), + ILI9881C_COMMAND_INSTR(0x88, 0x0B), + ILI9881C_COMMAND_INSTR(0x21, 0xB0), + ILI9881C_COMMAND_INSTR(0x35, 0x17), + ILI9881C_COMMAND_INSTR(0x30, 0x01), + ILI9881C_COMMAND_INSTR(0x31, 0x75), + ILI9881C_COMMAND_INSTR(0xB5, 0x07), + ILI9881C_COMMAND_INSTR(0x8A, 0xD8), + ILI9881C_COMMAND_INSTR(0x3A, 0x8A), + + //ILI9881C PAGE1 + ILI9881C_SWITCH_PAGE_INSTR(1), + ILI9881C_COMMAND_INSTR(0x22, 0x0A), + //Column inversion + ILI9881C_COMMAND_INSTR(0x31, 0x09), + ILI9881C_COMMAND_INSTR(0x40, 0x33), + ILI9881C_COMMAND_INSTR(0x42, 0x44), + ILI9881C_COMMAND_INSTR(0x53, 0x3E), + ILI9881C_COMMAND_INSTR(0x55, 0x45), + ILI9881C_COMMAND_INSTR(0x56, 0x00), + ILI9881C_COMMAND_INSTR(0x50, 0x95), + ILI9881C_COMMAND_INSTR(0x51, 0x95), + ILI9881C_COMMAND_INSTR(0x60, 0x09), + ILI9881C_COMMAND_INSTR(0x2E, 0xC8), + ILI9881C_COMMAND_INSTR(0x35, 0x07), + ILI9881C_COMMAND_INSTR(0x63, 0x00), + //---P-GAMMA START--- + ILI9881C_COMMAND_INSTR(0xA0, 0x00), + ILI9881C_COMMAND_INSTR(0xA1, 0x14), + ILI9881C_COMMAND_INSTR(0xA2, 0x24), + ILI9881C_COMMAND_INSTR(0xA3, 0x17), + ILI9881C_COMMAND_INSTR(0xA4, 0x1A), + ILI9881C_COMMAND_INSTR(0xA5, 0x2C), + ILI9881C_COMMAND_INSTR(0xA6, 0x20), + ILI9881C_COMMAND_INSTR(0xA7, 0x1F), + ILI9881C_COMMAND_INSTR(0xA8, 0x81), + ILI9881C_COMMAND_INSTR(0xA9, 0x1E), + ILI9881C_COMMAND_INSTR(0xAA, 0x2A), + ILI9881C_COMMAND_INSTR(0xAB, 0x71), + ILI9881C_COMMAND_INSTR(0xAC, 0x19), + ILI9881C_COMMAND_INSTR(0xAD, 0x17), + ILI9881C_COMMAND_INSTR(0xAE, 0x4C), + ILI9881C_COMMAND_INSTR(0xAF, 0x1F), + ILI9881C_COMMAND_INSTR(0xB0, 0x26), + ILI9881C_COMMAND_INSTR(0xB1, 0x4D), + ILI9881C_COMMAND_INSTR(0xB2, 0x5D), + ILI9881C_COMMAND_INSTR(0xB3, 0x3F), + + //--- N-GAMMA START--- + ILI9881C_COMMAND_INSTR(0xC0, 0x00), + ILI9881C_COMMAND_INSTR(0xC1, 0x18), + ILI9881C_COMMAND_INSTR(0xC2, 0x24), + ILI9881C_COMMAND_INSTR(0xC3, 0x0E), + ILI9881C_COMMAND_INSTR(0xC4, 0x11), + ILI9881C_COMMAND_INSTR(0xC5, 0x24), + ILI9881C_COMMAND_INSTR(0xC6, 0x1A), + ILI9881C_COMMAND_INSTR(0xC7, 0x1E), + ILI9881C_COMMAND_INSTR(0xC8, 0x76), + ILI9881C_COMMAND_INSTR(0xC9, 0x1B), + ILI9881C_COMMAND_INSTR(0xCA, 0x27), + ILI9881C_COMMAND_INSTR(0xCB, 0x64), + ILI9881C_COMMAND_INSTR(0xCC, 0x19), + ILI9881C_COMMAND_INSTR(0xCD, 0x18), + ILI9881C_COMMAND_INSTR(0xCE, 0x4A), + ILI9881C_COMMAND_INSTR(0xCF, 0x20), + ILI9881C_COMMAND_INSTR(0xD0, 0x28), + ILI9881C_COMMAND_INSTR(0xD1, 0x4A), + ILI9881C_COMMAND_INSTR(0xD2, 0x5C), + ILI9881C_COMMAND_INSTR(0xD3, 0x3F), +}; + +static const struct ili9881c_instr t101p136cq_2lane_init[] = { + //ILI9881C PAGE3 + ILI9881C_SWITCH_PAGE_INSTR(3), + //GIP_1 + ILI9881C_COMMAND_INSTR(0x01, 0x00), //added + ILI9881C_COMMAND_INSTR(0x02, 0x00), + ILI9881C_COMMAND_INSTR(0x03, 0x53), + ILI9881C_COMMAND_INSTR(0x04, 0x53), + ILI9881C_COMMAND_INSTR(0x05, 0x13), + ILI9881C_COMMAND_INSTR(0x06, 0x04), + ILI9881C_COMMAND_INSTR(0x07, 0x02), + ILI9881C_COMMAND_INSTR(0x08, 0x02), + ILI9881C_COMMAND_INSTR(0x09, 0x00), + ILI9881C_COMMAND_INSTR(0x0A, 0x00), + ILI9881C_COMMAND_INSTR(0x0B, 0x00), + ILI9881C_COMMAND_INSTR(0x0C, 0x00), + ILI9881C_COMMAND_INSTR(0x0D, 0x00), + ILI9881C_COMMAND_INSTR(0x0E, 0x00), + ILI9881C_COMMAND_INSTR(0x0F, 0x00), + ILI9881C_COMMAND_INSTR(0x10, 0x00), + ILI9881C_COMMAND_INSTR(0x11, 0x00), + ILI9881C_COMMAND_INSTR(0x12, 0x00), + ILI9881C_COMMAND_INSTR(0x13, 0x00), + ILI9881C_COMMAND_INSTR(0x14, 0x00), + ILI9881C_COMMAND_INSTR(0x15, 0x05), + ILI9881C_COMMAND_INSTR(0x16, 0x05), + ILI9881C_COMMAND_INSTR(0x17, 0x03), + ILI9881C_COMMAND_INSTR(0x18, 0x03), + ILI9881C_COMMAND_INSTR(0x19, 0x00), + ILI9881C_COMMAND_INSTR(0x1A, 0x00), + ILI9881C_COMMAND_INSTR(0x1B, 0x00), + ILI9881C_COMMAND_INSTR(0x1C, 0x00), + ILI9881C_COMMAND_INSTR(0x1D, 0x00), + ILI9881C_COMMAND_INSTR(0x1E, 0xC0), + ILI9881C_COMMAND_INSTR(0x1F, 0x80), + ILI9881C_COMMAND_INSTR(0x20, 0x02), + ILI9881C_COMMAND_INSTR(0x21, 0x09), + ILI9881C_COMMAND_INSTR(0x22, 0x00), + ILI9881C_COMMAND_INSTR(0x23, 0x00), + ILI9881C_COMMAND_INSTR(0x24, 0x00), + ILI9881C_COMMAND_INSTR(0x25, 0x00), + ILI9881C_COMMAND_INSTR(0x26, 0x00), + ILI9881C_COMMAND_INSTR(0x27, 0x00), + ILI9881C_COMMAND_INSTR(0x28, 0x55), + ILI9881C_COMMAND_INSTR(0x29, 0x03), + ILI9881C_COMMAND_INSTR(0x2A, 0x00), + ILI9881C_COMMAND_INSTR(0x2B, 0x00), + ILI9881C_COMMAND_INSTR(0x2C, 0x00), + ILI9881C_COMMAND_INSTR(0x2D, 0x00), + ILI9881C_COMMAND_INSTR(0x2E, 0x00), + ILI9881C_COMMAND_INSTR(0x2F, 0x00), + ILI9881C_COMMAND_INSTR(0x30, 0x00), + ILI9881C_COMMAND_INSTR(0x31, 0x00), + ILI9881C_COMMAND_INSTR(0x32, 0x00), + ILI9881C_COMMAND_INSTR(0x33, 0x00), + ILI9881C_COMMAND_INSTR(0x34, 0x00), + ILI9881C_COMMAND_INSTR(0x35, 0x00), + ILI9881C_COMMAND_INSTR(0x36, 0x00), + ILI9881C_COMMAND_INSTR(0x37, 0x00), + ILI9881C_COMMAND_INSTR(0x38, 0x3C), + ILI9881C_COMMAND_INSTR(0x39, 0x00), + ILI9881C_COMMAND_INSTR(0x3A, 0x00), + ILI9881C_COMMAND_INSTR(0x3B, 0x00), + ILI9881C_COMMAND_INSTR(0x3C, 0x00), + ILI9881C_COMMAND_INSTR(0x3D, 0x00), + ILI9881C_COMMAND_INSTR(0x3E, 0x00), + ILI9881C_COMMAND_INSTR(0x3F, 0x00), + ILI9881C_COMMAND_INSTR(0x40, 0x00), + ILI9881C_COMMAND_INSTR(0x41, 0x00), + ILI9881C_COMMAND_INSTR(0x42, 0x00), + ILI9881C_COMMAND_INSTR(0x43, 0x00), + ILI9881C_COMMAND_INSTR(0x44, 0x00), + + //GIP_2 + ILI9881C_COMMAND_INSTR(0x50, 0x01), + ILI9881C_COMMAND_INSTR(0x51, 0x23), + ILI9881C_COMMAND_INSTR(0x52, 0x45), + ILI9881C_COMMAND_INSTR(0x53, 0x67), + ILI9881C_COMMAND_INSTR(0x54, 0x89), + ILI9881C_COMMAND_INSTR(0x55, 0xAB), + ILI9881C_COMMAND_INSTR(0x56, 0x01), + ILI9881C_COMMAND_INSTR(0x57, 0x23), + ILI9881C_COMMAND_INSTR(0x58, 0x45), + ILI9881C_COMMAND_INSTR(0x59, 0x67), + ILI9881C_COMMAND_INSTR(0x5A, 0x89), + ILI9881C_COMMAND_INSTR(0x5B, 0xAB), + ILI9881C_COMMAND_INSTR(0x5C, 0xCD), + ILI9881C_COMMAND_INSTR(0x5D, 0xEF), + //GIP_3 + ILI9881C_COMMAND_INSTR(0x5E, 0x01), + ILI9881C_COMMAND_INSTR(0x5F, 0x0A), + ILI9881C_COMMAND_INSTR(0x60, 0x02), + ILI9881C_COMMAND_INSTR(0x61, 0x02), + ILI9881C_COMMAND_INSTR(0x62, 0x08), + ILI9881C_COMMAND_INSTR(0x63, 0x15), + ILI9881C_COMMAND_INSTR(0x64, 0x14), + ILI9881C_COMMAND_INSTR(0x65, 0x02), + ILI9881C_COMMAND_INSTR(0x66, 0x11), + ILI9881C_COMMAND_INSTR(0x67, 0x10), + ILI9881C_COMMAND_INSTR(0x68, 0x02), + ILI9881C_COMMAND_INSTR(0x69, 0x0F), + ILI9881C_COMMAND_INSTR(0x6A, 0x0E), + ILI9881C_COMMAND_INSTR(0x6B, 0x02), + ILI9881C_COMMAND_INSTR(0x6C, 0x0D), + ILI9881C_COMMAND_INSTR(0x6D, 0x0C), + ILI9881C_COMMAND_INSTR(0x6E, 0x06), + ILI9881C_COMMAND_INSTR(0x6F, 0x02), + ILI9881C_COMMAND_INSTR(0x70, 0x02), + ILI9881C_COMMAND_INSTR(0x71, 0x02), + ILI9881C_COMMAND_INSTR(0x72, 0x02), + ILI9881C_COMMAND_INSTR(0x73, 0x02), + ILI9881C_COMMAND_INSTR(0x74, 0x02), + ILI9881C_COMMAND_INSTR(0x75, 0x0A), + ILI9881C_COMMAND_INSTR(0x76, 0x02), + ILI9881C_COMMAND_INSTR(0x77, 0x02), + ILI9881C_COMMAND_INSTR(0x78, 0x06), + ILI9881C_COMMAND_INSTR(0x79, 0x15), + ILI9881C_COMMAND_INSTR(0x7A, 0x14), + ILI9881C_COMMAND_INSTR(0x7B, 0x02), + ILI9881C_COMMAND_INSTR(0x7C, 0x10), + ILI9881C_COMMAND_INSTR(0x7D, 0x11), + ILI9881C_COMMAND_INSTR(0x7E, 0x02), + ILI9881C_COMMAND_INSTR(0x7F, 0x0C), + ILI9881C_COMMAND_INSTR(0x80, 0x0D), + ILI9881C_COMMAND_INSTR(0x81, 0x02), + ILI9881C_COMMAND_INSTR(0x82, 0x0E), + ILI9881C_COMMAND_INSTR(0x83, 0x0F), + ILI9881C_COMMAND_INSTR(0x84, 0x08), + ILI9881C_COMMAND_INSTR(0x85, 0x02), + ILI9881C_COMMAND_INSTR(0x86, 0x02), + ILI9881C_COMMAND_INSTR(0x87, 0x02), + ILI9881C_COMMAND_INSTR(0x88, 0x02), + ILI9881C_COMMAND_INSTR(0x89, 0x02), + ILI9881C_COMMAND_INSTR(0x8A, 0x02), + //ILI9881C PAGE4 + ILI9881C_SWITCH_PAGE_INSTR(4), + ILI9881C_COMMAND_INSTR(0x3B, 0x98), + ILI9881C_COMMAND_INSTR(0x6C, 0x15), + ILI9881C_COMMAND_INSTR(0x6E, 0x30), + // VGH & VGL OUTPUT + ILI9881C_COMMAND_INSTR(0x6F, 0x45), + ILI9881C_COMMAND_INSTR(0x8D, 0x1F), + ILI9881C_COMMAND_INSTR(0x87, 0xBA), + ILI9881C_COMMAND_INSTR(0x26, 0x76), + //Reload Gamma setting + ILI9881C_COMMAND_INSTR(0xB2, 0xD1), + ILI9881C_COMMAND_INSTR(0x88, 0x0B), + ILI9881C_COMMAND_INSTR(0x21, 0xB0), + ILI9881C_COMMAND_INSTR(0x35, 0x17), + ILI9881C_COMMAND_INSTR(0x30, 0x01), + ILI9881C_COMMAND_INSTR(0x31, 0x75), + ILI9881C_COMMAND_INSTR(0xB5, 0x07), + ILI9881C_COMMAND_INSTR(0x8A, 0xD8), + ILI9881C_COMMAND_INSTR(0x3A, 0x8A), + +#if 0 //BIST Mode + ILI9881C_COMMAND_INSTR(0x2F, 0x01), +#endif + + //ILI9881C PAGE1 + ILI9881C_SWITCH_PAGE_INSTR(1), + ILI9881C_COMMAND_INSTR(0x22, 0x0A), + //Column inversion + ILI9881C_COMMAND_INSTR(0x31, 0x09), + ILI9881C_COMMAND_INSTR(0x40, 0x33), + ILI9881C_COMMAND_INSTR(0x42, 0x44), + ILI9881C_COMMAND_INSTR(0x53, 0x3E), + ILI9881C_COMMAND_INSTR(0x55, 0x45), + ILI9881C_COMMAND_INSTR(0x56, 0x00), + ILI9881C_COMMAND_INSTR(0x50, 0x95), + ILI9881C_COMMAND_INSTR(0x51, 0x95), + ILI9881C_COMMAND_INSTR(0x60, 0x09), + ILI9881C_COMMAND_INSTR(0x2E, 0xC8), + ILI9881C_COMMAND_INSTR(0x35, 0x07), + ILI9881C_COMMAND_INSTR(0x63, 0x00), + //---P-GAMMA START--- + ILI9881C_COMMAND_INSTR(0xA0, 0x00), + ILI9881C_COMMAND_INSTR(0xA1, 0x14), + ILI9881C_COMMAND_INSTR(0xA2, 0x24), + ILI9881C_COMMAND_INSTR(0xA3, 0x17), + ILI9881C_COMMAND_INSTR(0xA4, 0x1A), + ILI9881C_COMMAND_INSTR(0xA5, 0x2C), + ILI9881C_COMMAND_INSTR(0xA6, 0x20), + ILI9881C_COMMAND_INSTR(0xA7, 0x1F), + ILI9881C_COMMAND_INSTR(0xA8, 0x81), + ILI9881C_COMMAND_INSTR(0xA9, 0x1E), + ILI9881C_COMMAND_INSTR(0xAA, 0x2A), + ILI9881C_COMMAND_INSTR(0xAB, 0x71), + ILI9881C_COMMAND_INSTR(0xAC, 0x19), + ILI9881C_COMMAND_INSTR(0xAD, 0x17), + ILI9881C_COMMAND_INSTR(0xAE, 0x4C), + ILI9881C_COMMAND_INSTR(0xAF, 0x1F), + ILI9881C_COMMAND_INSTR(0xB0, 0x26), + ILI9881C_COMMAND_INSTR(0xB1, 0x4D), + ILI9881C_COMMAND_INSTR(0xB2, 0x5D), + ILI9881C_COMMAND_INSTR(0xB3, 0x3F), + + ILI9881C_COMMAND_INSTR(0xB7, 0x03), + //--- N-GAMMA START--- + ILI9881C_COMMAND_INSTR(0xC0, 0x00), + ILI9881C_COMMAND_INSTR(0xC1, 0x18), + ILI9881C_COMMAND_INSTR(0xC2, 0x24), + ILI9881C_COMMAND_INSTR(0xC3, 0x0E), + ILI9881C_COMMAND_INSTR(0xC4, 0x11), + ILI9881C_COMMAND_INSTR(0xC5, 0x24), + ILI9881C_COMMAND_INSTR(0xC6, 0x1A), + ILI9881C_COMMAND_INSTR(0xC7, 0x1E), + ILI9881C_COMMAND_INSTR(0xC8, 0x76), + ILI9881C_COMMAND_INSTR(0xC9, 0x1B), + ILI9881C_COMMAND_INSTR(0xCA, 0x27), + ILI9881C_COMMAND_INSTR(0xCB, 0x64), + ILI9881C_COMMAND_INSTR(0xCC, 0x19), + ILI9881C_COMMAND_INSTR(0xCD, 0x18), + ILI9881C_COMMAND_INSTR(0xCE, 0x4A), + ILI9881C_COMMAND_INSTR(0xCF, 0x20), + ILI9881C_COMMAND_INSTR(0xD0, 0x28), + ILI9881C_COMMAND_INSTR(0xD1, 0x4A), + ILI9881C_COMMAND_INSTR(0xD2, 0x5C), + ILI9881C_COMMAND_INSTR(0xD3, 0x3F), +}; + static inline struct ili9881c *panel_to_ili9881c(struct drm_panel *panel) { return container_of(panel, struct ili9881c, panel); } +static bool is_rzw_t101p136cq_panel(struct ili9881c *ctx) +{ + struct device_node *np = ctx->dsi->dev.of_node; + static const char * const compatibles[] = { + "rzw,t101p136cq-rpi4", + "rzw,t101p136cq-rpi4-lite", + "rzw,t101p136cq-rpi5", + }; + + if (!np) + return false; + + return of_device_compatible_match(np, compatibles) >= 0; +} + /* * The panel seems to accept some private DCS commands that map * directly to registers. @@ -2266,12 +2719,13 @@ static int ili9881c_prepare(struct drm_panel *panel) struct mipi_dsi_multi_context mctx = { .dsi = ctx->dsi }; unsigned int i; int ret; + bool is_rzw = is_rzw_t101p136cq_panel(ctx); /* Power the panel */ ret = regulator_enable(ctx->power); if (ret) return ret; - msleep(5); + msleep(is_rzw ? 10 : 5); /* And reset it */ gpiod_set_value_cansleep(ctx->reset, 1); @@ -2280,6 +2734,11 @@ static int ili9881c_prepare(struct drm_panel *panel) gpiod_set_value_cansleep(ctx->reset, 0); msleep(20); + if (is_rzw){ + gpiod_set_value_cansleep(ctx->reset, 1); + msleep(120); + } + for (i = 0; i < ctx->desc->init_length; i++) { const struct ili9881c_instr *instr = &ctx->desc->init[i]; @@ -2318,7 +2777,12 @@ static int ili9881c_unprepare(struct drm_panel *panel) mipi_dsi_dcs_set_display_off_multi(&mctx); mipi_dsi_dcs_enter_sleep_mode_multi(&mctx); regulator_disable(ctx->power); - gpiod_set_value_cansleep(ctx->reset, 1); + if(is_rzw_t101p136cq_panel(ctx)){ + gpiod_set_value_cansleep(ctx->reset, 0); + msleep(100); + } else { + gpiod_set_value_cansleep(ctx->reset, 1); + } return 0; } @@ -2511,6 +2975,57 @@ static const struct drm_display_mode bsd1218_a101kl68_default_mode = { .height_mm = 170, }; +static const struct drm_display_mode t101p136cq_default_mode = { + .clock = 78086, //60Hz + + .hdisplay = 800, + .hsync_start = 800 + 120, + .hsync_end = 800 + 120 + 20, + .htotal = 800 + 120 + 20 + 40, + + .vdisplay = 1280, + .vsync_start = 1280 + 16, + .vsync_end = 1280 + 16 + 8, + .vtotal = 1280 + 16 + 8 + 24, + + .width_mm = 135, + .height_mm = 216, +}; + +static const struct drm_display_mode t101p136cq_rpi4_2lane_mode = { + .clock = 78086, //60Hz + + .hdisplay = 800, + .hsync_start = 800 + 80, + .hsync_end = 800 + 80 + 20, + .htotal = 800 + 80 + 20 + 80, + + .vdisplay = 1280, + .vsync_start = 1280 + 16, + .vsync_end = 1280 + 16 + 8, + .vtotal = 1280 + 16 + 8 + 24, + + .width_mm = 135, + .height_mm = 216, +}; + +static const struct drm_display_mode t101p136cq_rpi5_2lane_mode = { + .clock = 78086, //60Hz + + .hdisplay = 800, + .hsync_start = 800 + 80, + .hsync_end = 800 + 80 + 20, + .htotal = 800 + 80 + 20 + 80, + + .vdisplay = 1280, + .vsync_start = 1280 + 16, + .vsync_end = 1280 + 16 + 8, + .vtotal = 1280 + 16 + 8 + 24, + + .width_mm = 135, + .height_mm = 216, +}; + static int ili9881c_get_modes(struct drm_panel *panel, struct drm_connector *connector) { @@ -2624,6 +3139,8 @@ static void ili9881c_dsi_remove(struct mipi_dsi_device *dsi) mipi_dsi_detach(dsi); drm_panel_remove(&ctx->panel); + if(is_rzw_t101p136cq_panel(ctx)) + return; gpiod_set_value_cansleep(ctx->reset, 1); regulator_disable(ctx->power); } @@ -2719,6 +3236,29 @@ static const struct ili9881c_desc bsd1218_a101kl68_desc = { .lanes = 4, }; +static const struct ili9881c_desc t101p136cq_desc = { + .init = t101p136cq_init, + .init_length = ARRAY_SIZE(t101p136cq_init), + .mode = &t101p136cq_default_mode, + .mode_flags = MIPI_DSI_MODE_VIDEO_SYNC_PULSE | MIPI_DSI_MODE_VIDEO | MIPI_DSI_CLOCK_NON_CONTINUOUS | MIPI_DSI_MODE_LPM, + .lanes = 4, +}; + +static const struct ili9881c_desc t101p136cq_rpi4_lite_desc = { + .init = t101p136cq_2lane_init, + .init_length = ARRAY_SIZE(t101p136cq_2lane_init), + .mode = &t101p136cq_rpi4_2lane_mode, + .mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST | MIPI_DSI_MODE_LPM, + .lanes = 2, +}; + +static const struct ili9881c_desc t101p136cq_rpi5_desc = { + .init = t101p136cq_2lane_init, + .init_length = ARRAY_SIZE(t101p136cq_2lane_init), + .mode = &t101p136cq_rpi5_2lane_mode, + .mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_LPM, + .lanes = 2, +}; static const struct of_device_id ili9881c_of_match[] = { { .compatible = "bananapi,lhr050h41", .data = &lhr050h41_desc }, { .compatible = "bestar,bsd1218-a101kl68", .data = &bsd1218_a101kl68_desc }, @@ -2731,6 +3271,9 @@ static const struct of_device_id ili9881c_of_match[] = { { .compatible = "nwe,nwe080", .data = &nwe080_desc }, { .compatible = "raspberrypi,dsi-5inch", &rpi_5inch_desc }, { .compatible = "raspberrypi,dsi-7inch", &rpi_7inch_desc }, + { .compatible = "rzw,t101p136cq-rpi4", .data = &t101p136cq_desc }, + { .compatible = "rzw,t101p136cq-rpi4-lite", .data = &t101p136cq_rpi4_lite_desc }, + { .compatible = "rzw,t101p136cq-rpi5", .data = &t101p136cq_rpi5_desc }, { } }; MODULE_DEVICE_TABLE(of, ili9881c_of_match); diff --git a/drivers/regulator/Kconfig b/drivers/regulator/Kconfig index b6ffd0d6ede856..0fce7623945372 100644 --- a/drivers/regulator/Kconfig +++ b/drivers/regulator/Kconfig @@ -1828,4 +1828,13 @@ config REGULATOR_QCOM_LABIBB boost regulator and IBB can be used as a negative boost regulator for LCD display panel. +config REGULATOR_EDATEC_10INCH + tristate "EDATEC 10INCH regulator support" + depends on BACKLIGHT_CLASS_DEVICE + depends on I2C + select REGMAP_I2C + help + This driver supports regulator on the EDATEC + touchscreen unit. The regulator is used to enable power to the + display and to control backlight. endif diff --git a/drivers/regulator/Makefile b/drivers/regulator/Makefile index b0b8fd27799269..910e15a1b9d426 100644 --- a/drivers/regulator/Makefile +++ b/drivers/regulator/Makefile @@ -211,5 +211,6 @@ obj-$(CONFIG_REGULATOR_WM831X) += wm831x-ldo.o obj-$(CONFIG_REGULATOR_WM8350) += wm8350-regulator.o obj-$(CONFIG_REGULATOR_WM8400) += wm8400-regulator.o obj-$(CONFIG_REGULATOR_WM8994) += wm8994-regulator.o +obj-$(CONFIG_REGULATOR_EDATEC_10INCH) += edatec-panel-regulator.o ccflags-$(CONFIG_REGULATOR_DEBUG) += -DDEBUG diff --git a/drivers/regulator/edatec-panel-regulator.c b/drivers/regulator/edatec-panel-regulator.c new file mode 100755 index 00000000000000..2eefabd59d8848 --- /dev/null +++ b/drivers/regulator/edatec-panel-regulator.c @@ -0,0 +1,355 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2020 Marek Vasut + * + * Based on rpi_touchscreen.c by Eric Anholt + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define REG_PWM 0x01 +#define REG_IODIR 0x02 +#define REG_PWR 0x03 +#define REG_OUTPUT 0x0A + +#define CMD_BACKLIGHT_EN 0x12 +#define CMD_FW_VERSION 0xE1 + +#define PIN_LCD_BL_EN BIT(0) +#define PIN_LCD_BL_PWM BIT(1) +#define PIN_LCD_RST BIT(2) +#define PIN_TP_RST BIT(3) +#define PIN_LCD_VDD_EN BIT(4) + +static int bl_power = 0; + +enum gpio_signals { + LCD_BL_EN_N, + LCD_BL_PWM_N, + LCD_RST_N, + TP_RST_N, + LCD_VDD_EN_N, + NUM_GPIO +}; + +struct gpio_signal_mappings { + unsigned int reg; + unsigned int mask; +}; + +static const struct gpio_signal_mappings mappings[NUM_GPIO] = { + [LCD_BL_EN_N] = { REG_OUTPUT, PIN_LCD_BL_EN }, + [LCD_BL_PWM_N] = { REG_OUTPUT, PIN_LCD_BL_PWM }, + [LCD_RST_N] = { REG_OUTPUT, PIN_LCD_RST }, + [TP_RST_N] = { REG_OUTPUT, PIN_TP_RST }, + [LCD_VDD_EN_N] = { REG_OUTPUT, PIN_LCD_VDD_EN }, +}; + +struct ed_lcd { + struct mutex lock; + struct regmap *regmap; + bool gpio_states[NUM_GPIO]; + u8 port_states; + + struct gpio_chip gc; +}; + +static const struct regmap_config ed_regmap_config = { + .reg_bits = 8, + .val_bits = 8, + .disable_locking = 1, + .max_register = REG_OUTPUT, + .cache_type = REGCACHE_RBTREE, +}; + +static int ed_set_port_state(struct ed_lcd *state, int reg, u8 val) +{ + state->port_states = val; + return regmap_write(state->regmap, reg, val); +}; + +static u8 ed_get_port_state(struct ed_lcd *state, int reg) +{ + return state->port_states; +}; + +static int ed_update_status(struct backlight_device *bl) +{ + struct backlight_properties *props = &(bl->props); + struct ed_lcd *state = bl_get_data(bl); + struct regmap *regmap = state->regmap; + int brightness = backlight_get_brightness(bl); + int bl_power_new = props->power; + int ret, i; + + mutex_lock(&state->lock); + + for (i = 0; i < 10; i++) { + if (bl_power_new != bl_power) { + ret = regmap_write(regmap, REG_PWR, bl_power_new); + } else { + ret = regmap_write(regmap, REG_PWM, brightness); + } + if (!ret) + break; + } + + bl_power = bl_power_new; + mutex_unlock(&state->lock); + + return ret; +} + +static const struct backlight_ops ed_bl = { + .update_status = ed_update_status, +}; + +static int ed_gpio_get_direction(struct gpio_chip *gc, unsigned int off) +{ + return GPIO_LINE_DIRECTION_OUT; +} + +static int ed_set_bit(struct ed_lcd *state, unsigned int reg, unsigned int pin, bool enabled) +{ + unsigned int mask = BIT(pin); + unsigned int val = enabled ? 0xffff : 0x0000; + + return regmap_update_bits(state->regmap, reg, mask, val); +} + +static int ed_direction_input(struct gpio_chip *gc, unsigned int off) +{ + struct ed_lcd *state = gpiochip_get_data(gc); + int status; + + mutex_lock(&state->lock); + status = ed_set_bit(state, REG_IODIR, off, true); + mutex_unlock(&state->lock); + + return status; +} + +static int ed_direction_output(struct gpio_chip *gc, unsigned int off, int value) +{ + struct ed_lcd *state = gpiochip_get_data(gc); + int status; + u8 last_val; + + mutex_lock(&state->lock); + status = ed_set_bit(state, REG_IODIR, off, false); + + last_val = ed_get_port_state(state, mappings[off].reg); + if (value) + last_val |= mappings[off].mask; + else + last_val &= ~mappings[off].mask; + + ed_set_port_state(state, mappings[off].reg, last_val); + + mutex_unlock(&state->lock); + + return status; +} + +static int ed_gpio_set(struct gpio_chip *gc, unsigned int off, int val) +{ + struct ed_lcd *state = gpiochip_get_data(gc); + u8 last_val; + + if (off >= NUM_GPIO) + return -1; + + mutex_lock(&state->lock); + + last_val = ed_get_port_state(state, mappings[off].reg); + if (val) + last_val |= mappings[off].mask; + else + last_val &= ~mappings[off].mask; + + ed_set_port_state(state, mappings[off].reg, last_val); + + mutex_unlock(&state->lock); + return 0; +} + +static int ed_gpio_get(struct gpio_chip *gc, unsigned int off) +{ + struct ed_lcd *state = gpiochip_get_data(gc); + u8 last_val; + int status; + + if (off >= NUM_GPIO) + return -1; + + mutex_lock(&state->lock); + last_val = ed_get_port_state(state, mappings[off].reg); + status = !!(last_val & BIT(off)); + mutex_unlock(&state->lock); + + return status; +} + +static void ed_i2c_write(struct i2c_client *i2c, u8 reg, u8 val) +{ + int ret; + + ret = i2c_smbus_write_byte_data(i2c, reg, val); + if (ret) + dev_err(&i2c->dev, "I2C write failed: %d\n", ret); +} + +static int ed_firmware_version(struct i2c_client *i2c) +{ + struct i2c_msg msgs[1]; + u8 addr_buf[1] = { CMD_FW_VERSION }; + u8 data_buf[16] = { 0 }; + int ret; + + /* Write register address */ + msgs[0].addr = i2c->addr; + msgs[0].flags = 0; + msgs[0].len = 1; + msgs[0].buf = addr_buf; + + ret = i2c_transfer(i2c->adapter, msgs, ARRAY_SIZE(msgs)); + if (ret != ARRAY_SIZE(msgs)) + return -EIO; + + usleep_range(200, 300); + + /* Read data from register */ + msgs[0].addr = i2c->addr; + msgs[0].flags = I2C_M_RD; + msgs[0].len = 16; + msgs[0].buf = data_buf; + + ret = i2c_transfer(i2c->adapter, msgs, ARRAY_SIZE(msgs)); + if (ret != ARRAY_SIZE(msgs)) + return -EIO; + + dev_info(&i2c->dev, "Firmware version: %s\n", data_buf); + + return 0; +} + +/* + * I2C driver interface functions + */ +static int ed_i2c_probe(struct i2c_client *i2c) +{ + struct backlight_properties props = { }; + struct backlight_device *bl; + struct ed_lcd *state; + struct regmap *regmap; + int ret; + + state = devm_kzalloc(&i2c->dev, sizeof(*state), GFP_KERNEL); + if (!state) + return -ENOMEM; + + ed_firmware_version(i2c); + + mutex_init(&state->lock); + i2c_set_clientdata(i2c, state); + + ed_i2c_write(i2c, CMD_BACKLIGHT_EN, 1); + + regmap = devm_regmap_init_i2c(i2c, &ed_regmap_config); + if (IS_ERR(regmap)) { + ret = PTR_ERR(regmap); + dev_err(&i2c->dev, "Failed to allocate register map: %d\n", + ret); + goto error; + } + + props.type = BACKLIGHT_RAW; + props.max_brightness = 0xff; + props.brightness = 0xff; + + state->regmap = regmap; + bl = devm_backlight_device_register(&i2c->dev, dev_name(&i2c->dev), + &i2c->dev, state, &ed_bl, + &props); + if (IS_ERR(bl)) { + ret = PTR_ERR(bl); + goto error; + } + + bl->props.brightness = 0xff; + + state->gc.parent = &i2c->dev; + state->gc.label = i2c->name; + state->gc.owner = THIS_MODULE; + state->gc.base = -1; + state->gc.ngpio = NUM_GPIO; + + state->gc.set = ed_gpio_set; + state->gc.get = ed_gpio_get; + state->gc.get_direction = ed_gpio_get_direction; + state->gc.direction_input = ed_direction_input; + state->gc.direction_output = ed_direction_output; + state->gc.can_sleep = true; + + ret = devm_gpiochip_add_data(&i2c->dev, &state->gc, state); + if (ret) { + dev_err(&i2c->dev, "Failed to create gpiochip: %d\n", ret); + goto error; + } + + return 0; + +error: + mutex_destroy(&state->lock); + + return ret; +} + +static void ed_i2c_remove(struct i2c_client *client) +{ + struct ed_lcd *state = i2c_get_clientdata(client); + + mutex_destroy(&state->lock); +} + +static void ed_i2c_shutdown(struct i2c_client *client) +{ + struct ed_lcd *state = i2c_get_clientdata(client); + + ed_i2c_write(client, CMD_BACKLIGHT_EN, 0); + regmap_write(state->regmap, REG_OUTPUT, 0); +} + +static const struct of_device_id ed_dt_ids[] = { + { .compatible = "edatec,disp-regulator" }, + {}, +}; +MODULE_DEVICE_TABLE(of, ed_dt_ids); + +static struct i2c_driver ed_regulator_driver = { + .driver = { + .name = "edatec_disp_101c", + .of_match_table = of_match_ptr(ed_dt_ids), + }, + .probe = ed_i2c_probe, + .remove = ed_i2c_remove, + .shutdown = ed_i2c_shutdown, +}; + +module_i2c_driver(ed_regulator_driver); + +MODULE_AUTHOR("EDATEC"); +MODULE_DESCRIPTION("EDATEC TFT LCD panel regulator driver"); +MODULE_LICENSE("GPL v2");