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pl011-axi: missing default pinctrl state lets gpio= config.txt directives silently override UART0 mux on Pi 4 #7462

Description

@gvnwltrs

Describe the bug

Symptom

On Pi 4 + RPi OS Trixie + kernel 6.12.75+rpt-rpi-v8, adding
gpio=14=op,dl and/or gpio=15=ip,pd to /boot/firmware/config.txt
permanently overrides the ALT0 mux that enable_uart=1 + dtoverlay=disable-bt
would otherwise set for PL011 TXD/RXD. The pl011-axi driver does not
re-mux at probe and logs:

pl011-axi fe201000.serial: there is not valid maps for state default

The driver then operates as normal — UARTEN/TXE/RXE all set, TX FIFO
clears cleanly on write — but writes never reach the pad because GPFSEL1
still reflects the gpio= directives. End-user symptom: /dev/serial0
appears fully functional from the kernel's view, but transmits and
receives nothing.

This contradicts the documented behavior in
config.txt GPIO Control,
which states gpio= directives "can be overridden by pinctrl entries
in the Device Tree."

Hypothesis (not asserted)

The there is not valid maps for state default warning suggests the
pl011-axi DTB binding lacks a pinctrl-names = "default"; /
pinctrl-0 = <&uart0_pins>; entry pointing at an ALT0 pinmux group for
GPIO14/15. Without a default pinctrl state, the framework has nothing
to apply at probe — hence the warning, hence the un-overridden gpio=
directives.

I have not read the binding source, so this is a hypothesis based on the
dmesg signal and observed behavior. Confirmation from a maintainer
would be helpful.

Steps to reproduce the behaviour

Reproduction

/boot/firmware/config.txt:

enable_uart=1
dtoverlay=disable-bt
init_uart_clock=48000000
gpio=14=op,dl
gpio=15=ip,pd

After reboot, read GPFSEL1 (offset 0x04 from /dev/gpiomem):

GPFSEL1 = 0x00001000
  bits [14:12] = 001 (GPIO14: plain OUTPUT, expected 100 / ALT0)
  bits [17:15] = 000 (GPIO15: plain INPUT,  expected 100 / ALT0)

PL011 control state (read-only via /dev/mem PROT_READ):

CR   = 0x00000f01   (UARTEN=1, TXE=1, RXE=1)
LCRH = 0x00000070   (FEN=1, WLEN=8 bits)
IBRD = 312, FBRD = 32   (9600 baud @ 48 MHz)

Writes to /dev/serial0 succeed; FR.TXFE cleanly transitions
1 → 0 → 1 during write+tcdrain — the driver clocks bytes correctly.
But the pad is held by the output driver from the gpio= directive
and the bytes never reach the wire. A direct F-F jumper loopback
between Pi pins 8 and 10 echoes nothing.

Forcing GPFSEL1 = 0x00024000 via /dev/gpiomem (ALT0 for both
pins) immediately restores UART operation. No driver reload or reboot
needed.

Expected behavior

Either:

  1. pl011-axi should advertise a default pinctrl state and have the
    framework apply it at probe, overriding the gpio= directive as the
    documentation describes; or
  2. If the override is genuinely not supported on Pi 4 + this driver
    variant, the driver should emit a more actionable warning (e.g.
    "GPIO14 not in ALT0 — UART transmit will not work") instead of the
    current cryptic "no valid maps for state default" message.

Device (s)

Raspberry Pi 4 Mod. B

System

Environment

  • Hardware: Raspberry Pi 4 Model B
  • OS: Raspberry Pi OS Trixie (64-bit)
  • Kernel: 6.12.75+rpt-rpi-v8
  • Driver: pl011-axi (built into kernel)
  • Reproduced consistently across reboots

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