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Prepare qcom-next based on tag 'Linux 6.19-rc5' of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
tech/bsp/clk 567d776 19 tech/security/firmware-smc a50984a 2 tech/bsp/soc-infra 2949741 9 tech/bsp/remoteproc 27311a4 15 tech/bus/peripherals 486bcf7 1 tech/bus/pci/all 2fdd372 9 tech/bus/usb/dwc 49ac8e0 2 tech/bus/usb/phy 9e7d778 13 tech/debug/hwtracing 88c50d8 27 tech/pmic/misc 91e88b9 16 tech/pmic/regulator 81fc8fb 6 tech/mem/iommu 486a41c 2 tech/mm/audio/all ce10fd3 4 tech/mm/camss d1d2c38 3 tech/mm/drm 9bb86be 28 tech/mm/fastrpc 844e24f 4 tech/mm/video 4871417 16 tech/mm/gpu 1651b6d 5 tech/mproc/rpmsg c3875d9 1 tech/net/ath dd2aee0 20 tech/net/eth c280d7e 1 tech/net/bluetooth ee968c9 3 tech/pm/power 7b7e779 7 tech/pm/thermal 363f414 3 tech/security/crypto fa6b06a 11 tech/storage/all ba8c93d 6 tech/all/dt/qcs6490 87b5b8c 7 tech/all/dt/qcs9100 d8bc255 14 tech/all/dt/qcs8300 03de422 27 tech/all/dt/qcs615 648a531 11 tech/all/dt/hamoa 4c89453 11 tech/all/dt/glymur b6ddb1f 27 tech/all/dt/kaanapali 15ce26e 6 tech/all/dt/pakala b4ebc9f 9 tech/all/config d2f2062 35 tech/overlay/dt 50f2b36 15 tech/all/workaround ec47ebe 3 tech/mproc/all d19a4c1 5 tech/noup/debug/all 1c86d19 5
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What: /config/stp-policy/<device>:p_ost.<policy>/<node>/entity
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Date: Oct 2025
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KernelVersion: 6.18
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Description:
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Set the entity which is to identify the source, RW.
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What: /sys/bus/coresight/devices/<ctcu-name>/irq_threshold
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Date: Dec. 2025
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KernelVersion: 6.19
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Contact: Tingwei Zhang <tingwei.zhang@oss.qualcomm.com>; Jinlong Mao <jinlong.mao@oss.qualcomm.com>; Jie Gan <jie.gan@oss.qualcomm.com>
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Description:
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(RW) Configure the IRQ value for byte-cntr register.

Documentation/ABI/testing/sysfs-bus-coresight-devices-cti

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KernelVersion 6.18
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Contact: Mao Jinlong <quic_jinlmao@quicinc.com>
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Description: (Read) Show hardware context information of device.
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What: /sys/bus/coresight/devices/<cti-name>/regs/ext_reg_sel
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Date: Dec 2025
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KernelVersion: 6.19
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Contact: Mao Jinlong <jinlong.mao@oss.qualcomm.com>
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Description: (RW) Select the index for extended registers.
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QCOM CTI supports up to 128 triggers, there are 6 registers
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need to be expanded to up to 4 instances:
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CTITRIGINSTATUS, CTITRIGOUTSTATUS,
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ITTRIGIN, ITTRIGOUT,
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ITTRIGINACK, ITTRIGOUTACK.
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What: /sys/bus/coresight/devices/<tgu-name>/enable_tgu
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Date: December 2025
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KernelVersion 6.18
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Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Songwei Chai <songwei.chai@oss.qualcomm.com>
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Description:
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(RW) Set/Get the enable/disable status of TGU
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Accepts only one of the 2 values - 0 or 1.
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0 : disable TGU.
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1 : enable TGU.
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What: /sys/bus/coresight/devices/<tgu-name>/step[0:7]_priority[0:3]/reg[0:17]
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Date: December 2025
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KernelVersion 6.18
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Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Songwei Chai <songwei.chai@oss.qualcomm.com>
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Description:
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(RW) Set/Get the sensed signal with specific step and priority for TGU.
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What: /sys/bus/coresight/devices/<tgu-name>/step[0:7]_condition_decode/reg[0:3]
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Date: December 2025
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KernelVersion 6.18
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Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Songwei Chai <songwei.chai@oss.qualcomm.com>
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Description:
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(RW) Set/Get the decode mode with specific step for TGU.
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What: /sys/bus/coresight/devices/<tgu-name>/step[0:7]_condition_select/reg[0:3]
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Date: December 2025
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KernelVersion 6.18
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Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Songwei Chai <songwei.chai@oss.qualcomm.com>
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Description:
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(RW) Set/Get the next action with specific step for TGU.
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What: /sys/bus/coresight/devices/<tgu-name>/step[0:7]_timer/reg[0:1]
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Date: December 2025
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KernelVersion 6.18
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Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Songwei Chai <songwei.chai@oss.qualcomm.com>
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Description:
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(RW) Set/Get the timer value with specific step for TGU.
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What: /sys/bus/coresight/devices/<tgu-name>/step[0:7]_counter/reg[0:1]
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Date: December 2025
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KernelVersion 6.18
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Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Songwei Chai <songwei.chai@oss.qualcomm.com>
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Description:
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(RW) Set/Get the counter value with specific step for TGU.
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What: /sys/bus/coresight/devices/<tgu-name>/reset_tgu
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Date: December 2025
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KernelVersion 6.18
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Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Songwei Chai <songwei.chai@oss.qualcomm.com>
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Description:
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(Write) Write 1 to reset the dataset for TGU.
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What: /sys/bus/coresight/devices/<tpda-name>/trig_async_enable
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Date: October 2025
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KernelVersion: 6.19
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Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com>, Jie Gan <jie.gan@oss.qualcomm.com>
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Description:
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(RW) Enable/disable cross trigger synchronization sequence interface.
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What: /sys/bus/coresight/devices/<tpda-name>/trig_flag_ts_enable
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Date: October 2025
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KernelVersion: 6.19
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Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com>, Jie Gan <jie.gan@oss.qualcomm.com>
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Description:
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(RW) Enable/disable cross trigger FLAG packet request interface.
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What: /sys/bus/coresight/devices/<tpda-name>/trig_freq_enable
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Date: October 2025
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KernelVersion: 6.19
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Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com>, Jie Gan <jie.gan@oss.qualcomm.com>
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Description:
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(RW) Enable/disable cross trigger FREQ packet request interface.
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What: /sys/bus/coresight/devices/<tpda-name>/freq_ts_enable
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Date: October 2025
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KernelVersion: 6.19
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Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com>, Jie Gan <jie.gan@oss.qualcomm.com>
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Description:
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(RW) Enable/disable the timestamp for all FREQ packets.
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What: /sys/bus/coresight/devices/<tpda-name>/global_flush_req
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Date: October 2025
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KernelVersion: 6.19
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Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com>, Jie Gan <jie.gan@oss.qualcomm.com>
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Description:
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(RW) Set global (all ports) flush request bit. The bit remains set until a
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global flush request sequence completes.
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What: /sys/bus/coresight/devices/<tpda-name>/cmbchan_mode
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Date: October 2025
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KernelVersion: 6.19
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Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com>, Jie Gan <jie.gan@oss.qualcomm.com>
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Description:
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(RW) Configure the CMB/MCMB channel mode for all enabled ports.
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Value 0 means raw channel mapping mode. Value 1 means channel pair marking mode.
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What: /sys/bus/coresight/devices/<tpda-name>/port_flush_req
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Date: October 2025
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KernelVersion: 6.19
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Contact: Jinlong Mao <jinlong.mao@oss.qualcomm.com>, Tao Zhang <tao.zhang@oss.qualcomm.com>, Jie Gan <jie.gan@oss.qualcomm.com>
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Description:
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(RW) Configure the bit i to requests a flush operation of port i on the TPDA.
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What: /sys/class/reboot-mode/<driver>/reboot_modes
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Date: August 2025
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KernelVersion: 6.17.0-rc1
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Contact: linux-pm@vger.kernel.org
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Description:
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This interface exposes the reboot-mode arguments
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registered with the reboot-mode framework. It is
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a read-only interface and provides a space
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separated list of reboot-mode arguments supported
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on the current platform.
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Example:
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recovery fastboot bootloader
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The exact sysfs path may vary depending on the
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name of the driver that registers the arguments.
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Example:
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/sys/class/reboot-mode/nvmem-reboot-mode/reboot_modes
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/sys/class/reboot-mode/syscon-reboot-mode/reboot_modes
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/sys/class/reboot-mode/qcom-pon/reboot_modes
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The supported arguments can be used by userspace
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to invoke device reset using the reboot() system
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call, with the "argument" as string to "*arg"
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parameter along with LINUX_REBOOT_CMD_RESTART2.
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Example:
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reboot(LINUX_REBOOT_MAGIC1, LINUX_REBOOT_MAGIC2,
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LINUX_REBOOT_CMD_RESTART2, "bootloader");
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A driver can expose the supported arguments by
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registering them with the reboot-mode framework
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using the property names that follow the
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mode-<argument> format.
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Example:
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mode-bootloader, mode-recovery.
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This attribute is useful for scripts or initramfs
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logic that need to programmatically determine
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which reboot-mode arguments are valid before
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triggering a reboot.

Documentation/devicetree/bindings/arm/arm,coresight-dynamic-funnel.yaml

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properties:
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compatible:
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contains:
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const: arm,coresight-dynamic-funnel
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enum:
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- arm,coresight-dynamic-funnel
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- arm,coresight-cpu-funnel
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required:
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- compatible
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allOf:
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- $ref: /schemas/arm/primecell.yaml#
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- if:
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properties:
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compatible:
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contains:
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const: arm,coresight-cpu-funnel
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then:
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required:
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- power-domains
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properties:
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compatible:
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items:
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- const: arm,coresight-dynamic-funnel
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- const: arm,primecell
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oneOf:
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- items:
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- const: arm,coresight-dynamic-funnel
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- const: arm,primecell
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- items:
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- const: arm,coresight-cpu-funnel
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reg:
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maxItems: 1
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Documentation/devicetree/bindings/arm/arm,coresight-dynamic-replicator.yaml

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properties:
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compatible:
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contains:
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const: arm,coresight-dynamic-replicator
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enum:
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- arm,coresight-dynamic-replicator
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- arm,coresight-cpu-replicator
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required:
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- compatible
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allOf:
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- $ref: /schemas/arm/primecell.yaml#
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- if:
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properties:
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compatible:
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contains:
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const: arm,coresight-cpu-replicator
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then:
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required:
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- power-domains
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properties:
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compatible:
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items:
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- const: arm,coresight-dynamic-replicator
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- const: arm,primecell
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oneOf:
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- items:
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- const: arm,coresight-dynamic-replicator
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- const: arm,primecell
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- items:
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- const: arm,coresight-cpu-replicator
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reg:
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maxItems: 1

Documentation/devicetree/bindings/arm/arm,coresight-tmc.yaml

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properties:
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compatible:
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contains:
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const: arm,coresight-tmc
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enum:
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- arm,coresight-tmc
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- arm,coresight-cpu-tmc
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required:
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- compatible
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allOf:
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- $ref: /schemas/arm/primecell.yaml#
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- if:
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properties:
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compatible:
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contains:
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const: arm,coresight-cpu-tmc
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then:
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required:
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- power-domains
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properties:
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compatible:
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items:
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- const: arm,coresight-tmc
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- const: arm,primecell
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oneOf:
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- items:
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- const: arm,coresight-tmc
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- const: arm,primecell
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- items:
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- const: arm,coresight-cpu-tmc
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reg:
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maxItems: 1

Documentation/devicetree/bindings/arm/psci.yaml

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[1] Kernel documentation - ARM idle states bindings
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Documentation/devicetree/bindings/cpu/idle-states.yaml
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reboot-mode:
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type: object
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$ref: /schemas/power/reset/reboot-mode.yaml#
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unevaluatedProperties: false
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properties:
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# "mode-normal" is just SYSTEM_RESET
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mode-normal: false
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patternProperties:
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"^mode-.*$":
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minItems: 1
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maxItems: 2
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description: |
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Describes a vendor-specific reset type. The string after "mode-"
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maps a reboot mode to the parameters in the PSCI SYSTEM_RESET2 call.
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Parameters are named mode-xxx = <type[, cookie]>, where xxx
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is the name of the magic reboot mode, type is the lower 31 bits
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of the reset_type, and, optionally, the cookie value. If the cookie
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is not provided, it is defaulted to zero.
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The 31st bit (vendor-resets) will be implicitly set by the driver.
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patternProperties:
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"^power-domain-":
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$ref: /schemas/power/power-domain.yaml#
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required:
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- cpu_off
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- cpu_on
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- if:
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not:
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properties:
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compatible:
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contains:
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const: arm,psci-1.0
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then:
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properties:
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reboot-mode: false
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additionalProperties: false
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domain-idle-states = <&cluster_ret>, <&cluster_pwrdn>;
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};
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};
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- |+
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// Case 5: SYSTEM_RESET2 vendor resets
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psci {
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compatible = "arm,psci-1.0";
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method = "smc";
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reboot-mode {
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mode-edl = <0>;
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mode-bootloader = <1 2>;
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};
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};
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