From 2848472406f651d36cd1f99dd97ac3ab77048ba0 Mon Sep 17 00:00:00 2001 From: Per Held Date: Thu, 5 Feb 2026 09:00:02 +0100 Subject: [PATCH] Arm backend: Bump amount of DDR in corstone320 Make it the same as corstone300 to be able to run larger models. Signed-off-by: per.held@arm.com Change-Id: Ic180de91ec25544a35474e2850d99b0b8b925b59 --- examples/arm/executor_runner/Corstone-320.ld | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/examples/arm/executor_runner/Corstone-320.ld b/examples/arm/executor_runner/Corstone-320.ld index 8f9b1e826a1..ab34a66b7c6 100644 --- a/examples/arm/executor_runner/Corstone-320.ld +++ b/examples/arm/executor_runner/Corstone-320.ld @@ -1,5 +1,5 @@ /* - * Copyright 2025 Arm Limited and/or its affiliates. + * Copyright 2025-2026 Arm Limited and/or its affiliates. * * This source code is licensed under the BSD-style license found in the * LICENSE file in the root directory of this source tree. @@ -43,7 +43,7 @@ MEMORY DTCM (rw) : ORIGIN = 0x30000000, LENGTH = 0x00008000 SRAM (rw) : ORIGIN = 0x31000000, LENGTH = 0x00400000 QSPI (rw) : ORIGIN = 0x38000000, LENGTH = 0x00800000 - DDR (rw) : ORIGIN = 0x70000000, LENGTH = 0x10000000 + DDR (rw) : ORIGIN = 0x70000000, LENGTH = 0x60000000 } PHDRS