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| 1 | +//! Verified spinlock validation helpers for Zephyr RTOS. |
| 2 | +//! |
| 3 | +//! This is a formally verified port of zephyr/kernel/spinlock_validate.c. |
| 4 | +//! All safety-critical properties are proven with Verus (SMT/Z3). |
| 5 | +//! |
| 6 | +//! The C code encodes lock ownership by OR-ing the CPU ID into the low |
| 7 | +//! bits of a thread pointer (which is guaranteed aligned). The `& 3U` |
| 8 | +//! mask hard-codes support for at most 4 CPUs. This module replaces |
| 9 | +//! the magic constant with a configurable `MAX_CPUS` and explicit |
| 10 | +//! alignment requirement, then proves the encoding is injective. |
| 11 | +//! |
| 12 | +//! Source mapping: |
| 13 | +//! z_spin_lock_valid -> spin_lock_valid (spinlock_validate.c:10-20) |
| 14 | +//! z_spin_unlock_valid -> spin_unlock_valid (spinlock_validate.c:23-37) |
| 15 | +//! z_spin_lock_set_owner -> spin_lock_compute_owner (spinlock_validate.c:39-43) |
| 16 | +//! |
| 17 | +//! Omitted (not safety-relevant): |
| 18 | +//! - CONFIG_KERNEL_COHERENCE (z_spin_lock_mem_coherent) — cache coherency check |
| 19 | +//! - ISR + _THREAD_DUMMY edge case — modeled as a separate flag in the caller |
| 20 | +//! |
| 21 | +//! ASIL-D verified properties: |
| 22 | +//! SV1: owner encoding is injective (distinct (cpu, thread) -> distinct owner) |
| 23 | +//! SV2: lock_valid returns false iff the lock is already held by the same CPU |
| 24 | +//! SV3: unlock_valid returns true iff the stored owner matches (cpu | thread) |
| 25 | +//! SV4: CPU ID is recoverable from the encoded owner via masking |
| 26 | +//! SV5: thread pointer is recoverable from the encoded owner via masking |
| 27 | +//! SV6: MAX_CPUS bounds the CPU mask (replaces hard-coded `& 3U`) |
| 28 | +/// Maximum number of CPUs supported. |
| 29 | +/// |
| 30 | +/// Zephyr hard-codes `& 3U` (2 bits, 4 CPUs). We use the same default |
| 31 | +/// but express it as a named constant so it can be widened. |
| 32 | +pub const MAX_CPUS: u32 = 4; |
| 33 | +/// Bit mask to extract the CPU ID from an encoded owner value. |
| 34 | +/// |
| 35 | +/// CPU_MASK == MAX_CPUS - 1 == 0b11 for 4 CPUs. |
| 36 | +/// Requires MAX_CPUS to be a power of two. |
| 37 | +pub const CPU_MASK: usize = 3; |
| 38 | +/// Minimum alignment of thread pointers (in bytes). |
| 39 | +/// |
| 40 | +/// Thread pointers must be aligned to at least MAX_CPUS so that the |
| 41 | +/// low bits are zero and available for the CPU ID tag. |
| 42 | +pub const THREAD_ALIGN: usize = 4; |
| 43 | +/// Check whether acquiring the spinlock is valid. |
| 44 | +/// |
| 45 | +/// Models z_spin_lock_valid() (spinlock_validate.c:10-20): |
| 46 | +/// |
| 47 | +/// ```c |
| 48 | +/// bool z_spin_lock_valid(struct k_spinlock *l) { |
| 49 | +/// uintptr_t thread_cpu = l->thread_cpu; |
| 50 | +/// if (thread_cpu != 0U) { |
| 51 | +/// if ((thread_cpu & 3U) == _current_cpu->id) |
| 52 | +/// return false; |
| 53 | +/// } |
| 54 | +/// return true; |
| 55 | +/// } |
| 56 | +/// ``` |
| 57 | +/// |
| 58 | +/// Returns `false` when the lock is already held **by the same CPU** |
| 59 | +/// (i.e. the CPU bits in `thread_cpu` match `current_cpu_id`). |
| 60 | +/// A `thread_cpu` of 0 means the lock is free. |
| 61 | +/// |
| 62 | +/// SV2: lock_valid returns false iff lock is held and CPU matches. |
| 63 | +pub fn spin_lock_valid(thread_cpu: usize, current_cpu_id: u32) -> bool { |
| 64 | + if thread_cpu != 0 { |
| 65 | + if (thread_cpu & CPU_MASK) == (current_cpu_id as usize) { |
| 66 | + return false; |
| 67 | + } |
| 68 | + } |
| 69 | + true |
| 70 | +} |
| 71 | +/// Check whether releasing the spinlock is valid. |
| 72 | +/// |
| 73 | +/// Models z_spin_unlock_valid() (spinlock_validate.c:23-37): |
| 74 | +/// |
| 75 | +/// ```c |
| 76 | +/// bool z_spin_unlock_valid(struct k_spinlock *l) { |
| 77 | +/// uintptr_t tcpu = l->thread_cpu; |
| 78 | +/// l->thread_cpu = 0; |
| 79 | +/// ... |
| 80 | +/// if (tcpu != (_current_cpu->id | (uintptr_t)_current)) |
| 81 | +/// return false; |
| 82 | +/// return true; |
| 83 | +/// } |
| 84 | +/// ``` |
| 85 | +/// |
| 86 | +/// Returns `true` iff the stored `thread_cpu` matches the encoded |
| 87 | +/// identity of the current thread on the current CPU. |
| 88 | +/// |
| 89 | +/// Note: the C function also zeroes `l->thread_cpu` and handles an ISR |
| 90 | +/// edge case. Both are side-effects handled by the FFI layer; this |
| 91 | +/// function is a pure validity predicate. |
| 92 | +/// |
| 93 | +/// SV3: unlock_valid returns true iff owner matches (cpu | thread). |
| 94 | +pub fn spin_unlock_valid( |
| 95 | + thread_cpu: usize, |
| 96 | + current_cpu_id: u32, |
| 97 | + current_thread: usize, |
| 98 | +) -> bool { |
| 99 | + let expected = (current_cpu_id as usize) | current_thread; |
| 100 | + thread_cpu == expected |
| 101 | +} |
| 102 | +/// Compute the owner tag for a spinlock. |
| 103 | +/// |
| 104 | +/// Models z_spin_lock_set_owner() (spinlock_validate.c:39-43): |
| 105 | +/// |
| 106 | +/// ```c |
| 107 | +/// void z_spin_lock_set_owner(struct k_spinlock *l) { |
| 108 | +/// l->thread_cpu = _current_cpu->id | (uintptr_t)_current; |
| 109 | +/// } |
| 110 | +/// ``` |
| 111 | +/// |
| 112 | +/// Encodes the current CPU ID and thread pointer into a single `usize`. |
| 113 | +/// |
| 114 | +/// SV4/SV5: CPU and thread are recoverable. |
| 115 | +/// SV6: CPU ID fits within the mask. |
| 116 | +pub fn spin_lock_compute_owner(current_cpu_id: u32, current_thread: usize) -> usize { |
| 117 | + (current_cpu_id as usize) | current_thread |
| 118 | +} |
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