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Merge branch 'cv32e40p' into 'master'
After !77 This PR replaces legacy `RI5CY` with `CV32E40P` in either the SoC (FC controller) and the cluster (8 core instances) **HW (RTL)**: - [x] Replace cv32e40p with OBI adapter into SoC - [x] Add FPU wrapper into SoC using APU connection. FPU is now instantiated in `fc_subsystem` - [x] Replace cv32e40p with OBI adapter into Cluster - [x] Add `pulp_clock_gating` tech cell for ASIC, disable clock gating for FPGA (as in RI5CY) **[TODO: do it properly without using `ifdef`]** (#85) - [x] Add one [performance counters test](https://github.com/pulp-platform/regression_tests/tree/cv32perf_counters/perf_counters) in assembly for cv32 to be executed with pulp-runtime **SW**: Main SW changes concerns: 1. Different mapping of the HW loops (`Xpulp` extensions) 2. Different structure and mapping of the performance counters 3. Enable clint timer irq (Freertos and RTL) - [x] Change `PULP RISCV GCC toolchain` version used in the CI with cv32e40p target with: `/usr/pack/riscv-1.0-kgf/pulp-gcc-2.2.0` - [x] Update `pulp-runtime` with cv32e40p target with: `v0.0.9` - [x] Update `FreeRTOS` version with cv32e40p target with: `570b2c1c` **MISC** - [x] Update README - [x] Update CHANGELOG - The testset has been previously overhauled in !63 and !65. In particular !63 removed some tests that used the legacy pulp-sdk and RI5CY and were not a fit anymore with cv32 Within this project boundary, there exits three issues tracked in #87, #86 and #85 that will be addressed in separate MRs Fixes #59 #60 #84
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‎rtl/components/obi_pulp_adapter.sv‎

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// Copyright 2020 ETH Zurich and University of Bologna.
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// Copyright and related rights are licensed under the Solderpad Hardware
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// License, Version 0.51 (the "License"); you may not use this file except in
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// compliance with the License. You may obtain a copy of the License at
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// http://solderpad.org/licenses/SHL-0.51. Unless required by applicable law
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// or agreed to in writing, software, hardware and materials distributed under
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// this License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR
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// CONDITIONS OF ANY KIND, either express or implied. See the License for the
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// specific language governing permissions and limitations under the License.
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// Author: Matteo Perotti, mperotti@iis.ee.ethz.ch
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// Description: Module to adapt CV32E40P to the PULP memory system.
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// It blocks multiple outstanding requests to the memory until the first one is served.
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module obi_pulp_adapter (
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input logic rst_ni,
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input logic clk_i,
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// Master (core) interface
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input logic core_req_i,
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// Slave (memory) interface
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input logic mem_gnt_i,
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input logic mem_rvalid_i,
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output logic mem_req_o
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);
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// CU states
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typedef enum logic {WAIT_GNT, WAIT_VALID} state_t;
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state_t ps, ns;
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// FSM next-state sequential process
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always_ff @(posedge clk_i or negedge rst_ni) begin
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if (!rst_ni) begin
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ps <= WAIT_GNT;
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end else begin
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ps <= ns;
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end
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end
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// Block multiple requests, as the memory does not support them
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// core_req_i is kept stable by cv32e40p (OBI compliant)
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always_comb begin
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case (ps)
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WAIT_GNT: begin
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// Idle state, the memory has not received any request yet
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mem_req_o = core_req_i;
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ns = (core_req_i && mem_gnt_i) ? WAIT_VALID : WAIT_GNT;
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end
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WAIT_VALID: begin
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// The memory has received and granted a request. Filter the next request until the memory is ready to accept it.
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mem_req_o = (core_req_i && mem_rvalid_i) ? 1'b1 : 1'b0;
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ns = (mem_rvalid_i && !mem_gnt_i) ? WAIT_GNT : WAIT_VALID;
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end
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default: begin
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mem_req_o = core_req_i;
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ns = WAIT_GNT;
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end
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endcase
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end
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endmodule

‎rtl/fc/cv32e40p_fp_wrapper.sv‎

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// Copyright 2018 ETH Zurich and University of Bologna.
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// Copyright and related rights are licensed under the Solderpad Hardware
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// License, Version 0.51 (the "License"); you may not use this file except in
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// compliance with the License. You may obtain a copy of the License at
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// http://solderpad.org/licenses/SHL-0.51. Unless required by applicable law
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// or agreed to in writing, software, hardware and materials distributed under
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// this License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR
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// CONDITIONS OF ANY KIND, either express or implied. See the License for the
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// specific language governing permissions and limitations under the License.
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// Wrapper for a fpnew
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// Contributor: Davide Schiavone <davide@openhwgroup.org>
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module cv32e40p_fp_wrapper import cv32e40p_apu_core_pkg::*;
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(
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// Clock and Reset
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input logic clk_i,
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input logic rst_ni,
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// APU Side: Master port
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input logic apu_req_i,
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output logic apu_gnt_o,
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// request channel
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input logic [APU_NARGS_CPU-1:0][31:0] apu_operands_i,
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input logic [APU_WOP_CPU-1:0] apu_op_i,
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input logic [APU_NDSFLAGS_CPU-1:0] apu_flags_i,
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// response channel
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output logic apu_rvalid_o,
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output logic [31:0] apu_rdata_o,
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output logic [APU_NUSFLAGS_CPU-1:0] apu_rflags_o
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);
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import cv32e40p_pkg::*;
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import fpnew_pkg::*;
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logic [fpnew_pkg::OP_BITS-1:0] fpu_op;
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logic fpu_op_mod;
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logic fpu_vec_op;
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logic [fpnew_pkg::FP_FORMAT_BITS-1:0] fpu_dst_fmt;
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logic [fpnew_pkg::FP_FORMAT_BITS-1:0] fpu_src_fmt;
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logic [fpnew_pkg::INT_FORMAT_BITS-1:0] fpu_int_fmt;
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logic [C_RM-1:0] fp_rnd_mode;
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// assign apu_rID_o = '0;
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assign {fpu_vec_op, fpu_op_mod, fpu_op} = apu_op_i;
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assign {fpu_int_fmt, fpu_src_fmt, fpu_dst_fmt, fp_rnd_mode} = apu_flags_i;
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// -----------
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// FPU Config
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// -----------
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// Features (enabled formats, vectors etc.)
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localparam fpnew_pkg::fpu_features_t FPU_FEATURES = '{
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Width: C_FLEN,
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EnableVectors: C_XFVEC,
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EnableNanBox: 1'b0,
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FpFmtMask: {C_RVF, C_RVD, C_XF16, C_XF8, C_XF16ALT},
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IntFmtMask: {C_XFVEC && C_XF8, C_XFVEC && (C_XF16 || C_XF16ALT), 1'b1, 1'b0}
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};
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// Implementation (number of registers etc)
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localparam fpnew_pkg::fpu_implementation_t FPU_IMPLEMENTATION = '{
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PipeRegs: '{// FP32, FP64, FP16, FP8, FP16alt
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'{C_LAT_FP32, C_LAT_FP64, C_LAT_FP16, C_LAT_FP8, C_LAT_FP16ALT}, // ADDMUL
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'{default: C_LAT_DIVSQRT}, // DIVSQRT
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'{default: C_LAT_NONCOMP}, // NONCOMP
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'{default: C_LAT_CONV}}, // CONV
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UnitTypes: '{'{default: fpnew_pkg::MERGED}, // ADDMUL
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'{default: fpnew_pkg::MERGED}, // DIVSQRT
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'{default: fpnew_pkg::PARALLEL}, // NONCOMP
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'{default: fpnew_pkg::MERGED}}, // CONV
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PipeConfig: fpnew_pkg::AFTER
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};
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//---------------
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// FPU instance
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//---------------
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fpnew_top #(
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.Features ( FPU_FEATURES ),
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.Implementation ( FPU_IMPLEMENTATION ),
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.TagType ( logic )
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) i_fpnew_bulk (
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.clk_i ( clk_i ),
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.rst_ni ( rst_ni ),
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.operands_i ( apu_operands_i ),
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.rnd_mode_i ( fpnew_pkg::roundmode_e'(fp_rnd_mode) ),
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.op_i ( fpnew_pkg::operation_e'(fpu_op) ),
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.op_mod_i ( fpu_op_mod ),
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.src_fmt_i ( fpnew_pkg::fp_format_e'(fpu_src_fmt) ),
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.dst_fmt_i ( fpnew_pkg::fp_format_e'(fpu_dst_fmt) ),
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.int_fmt_i ( fpnew_pkg::int_format_e'(fpu_int_fmt) ),
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.vectorial_op_i ( fpu_vec_op ),
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.tag_i ( 1'b0 ),
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.in_valid_i ( apu_req_i ),
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.in_ready_o ( apu_gnt_o ),
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.flush_i ( 1'b0 ),
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.result_o ( apu_rdata_o ),
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.status_o ( apu_rflags_o ),
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.tag_o ( /* unused */ ),
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.out_valid_o ( apu_rvalid_o ),
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.out_ready_i ( 1'b1 ),
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.busy_o ( /* unused */ )
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);
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endmodule // cv32e40p_fp_wrapper
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