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10 | 10 | // |
11 | 11 | // Description: Top level Module of the FPU subsystem |
12 | 12 | // |
13 | | -// Parameters: PULP_ZFINX: Enable support for "Zfinx" standard extension (and thereby removing support for |
14 | | -// "F" standard extension) |
| 13 | +// Parameters: PULP_ZFINX: Enable support for "Zfinx" standard extension (and thereby removing support for |
| 14 | +// "F" standard extension) |
15 | 15 | // |
16 | | -// INPUT_BUFFER_DEPTH: Set depth of the FIFO input buffer. If parameter is set to 0, no buffer will be |
17 | | -// instantiated |
| 16 | +// INPUT_BUFFER_DEPTH: Set depth of the FIFO input buffer. If parameter is set to 0, no buffer will be |
| 17 | +// instantiated |
18 | 18 | // |
19 | | -// OUT_OF_ORDER: Enable out-of-order execution for instructions that go through |
20 | | -// the FPnew. |
21 | | -// For example with OUT_OF_ORDER = 1 |
22 | | -// fdiv.s fa1, fa2, fa3 // suppose takes 3 cycles |
23 | | -// fmul.s fa4, fa5, fa6 // suppose takes 1 cycles |
24 | | -// fmul.s fa2, fa5, fa6 // suppose takes 1 cycles |
25 | | -// fmul.s fa3, fa5, fa6 // suppose takes 1 cycles |
26 | | -// --> This sequence takes 4 clock cycles |
27 | | -// With OUT_OF_ORDER this instruction sequence would take 5 clock cycles |
28 | | -// Possible values for this parameter are 0 and 1 |
| 19 | +// OUT_OF_ORDER: Enable out-of-order execution for instructions that go through |
| 20 | +// the FPnew. |
| 21 | +// For example with OUT_OF_ORDER = 1 |
| 22 | +// fdiv.s fa1, fa2, fa3 // suppose takes 3 cycles |
| 23 | +// fmul.s fa4, fa5, fa6 // suppose takes 1 cycles |
| 24 | +// fmul.s fa2, fa5, fa6 // suppose takes 1 cycles |
| 25 | +// fmul.s fa3, fa5, fa6 // suppose takes 1 cycles |
| 26 | +// --> This sequence takes 4 clock cycles |
| 27 | +// With OUT_OF_ORDER this instruction sequence would take 5 clock cycles |
| 28 | +// Possible values for this parameter are 0 and 1 |
29 | 29 | // |
30 | | -// FORWARDING: Enable forwarding of floating-point results in the subsystem. |
31 | | -// For examle take this sequence: |
32 | | -// fmul.s fa4, fa5, fa6 // suppose takes 1 cycles |
33 | | -// fmul.s fa1, fa4, fa6 // suppose takes 1 cycles |
34 | | -// There is a source register dependency for the second instruction on the |
35 | | -// first instructions result. With FORWARDING = 1 this sequence takes 2 clock cycles |
36 | | -// while with FORWARDING = 0 this sequence takes 3 clock cycles. |
| 30 | +// FORWARDING: Enable forwarding of floating-point results in the subsystem. |
| 31 | +// For examle take this sequence: |
| 32 | +// fmul.s fa4, fa5, fa6 // suppose takes 1 cycles |
| 33 | +// fmul.s fa1, fa4, fa6 // suppose takes 1 cycles |
| 34 | +// There is a source register dependency for the second instruction on the |
| 35 | +// first instructions result. With FORWARDING = 1 this sequence takes 2 clock cycles |
| 36 | +// while with FORWARDING = 0 this sequence takes 3 clock cycles. |
37 | 37 | // |
38 | | -// FPU_FEATURES: Parameter to configure the FPnew. The subsystem was designed for the configuration found here: |
39 | | -// https://github.com/moimfeld/cv32e40p/blob/x-interface/example_tb/core/fpu_ss/fpu_ss_pkg.sv |
40 | | -// Other configurations might not work |
| 38 | +// FPU_FEATURES: Parameter to configure the FPnew. The subsystem was designed for the configuration found here: |
| 39 | +// https://github.com/moimfeld/cv32e40p/blob/x-interface/example_tb/core/fpu_ss/fpu_ss_pkg.sv |
| 40 | +// Other configurations might not work |
41 | 41 | // |
42 | | -// FPU_IMPLEMENTATION: Parameter to configure the FPnew. The subsystem was designed for the configuration found here: |
43 | | -// https://github.com/moimfeld/cv32e40p/blob/x-interface/example_tb/core/fpu_ss/fpu_ss_pkg.sv |
44 | | -// Other configurations might not work |
| 42 | +// FPU_IMPLEMENTATION: Parameter to configure the FPnew. The subsystem was designed for the configuration found here: |
| 43 | +// https://github.com/moimfeld/cv32e40p/blob/x-interface/example_tb/core/fpu_ss/fpu_ss_pkg.sv |
| 44 | +// Other configurations might not work |
| 45 | +// |
| 46 | +// INPUT_BUFFER_FALL_THROUGH: Set depth of the FIFO input buffer FALL_THROUGH. If INPUT_BUFFER_DEPTH is set to 0, this |
| 47 | +// parameter doesn't have any effect |
45 | 48 | // |
46 | 49 | // Contributor: Moritz Imfeld <moimfeld@student.ethz.ch> |
47 | 50 | // Davide Schiavone <davide@openhwgroup.org> |
48 | 51 |
|
49 | 52 | module fpu_ss |
50 | 53 | import fpu_ss_pkg::*; |
51 | 54 | #( |
52 | | - parameter PULP_ZFINX = 0, |
53 | | - parameter INPUT_BUFFER_DEPTH = 0, |
54 | | - parameter OUT_OF_ORDER = 1, |
55 | | - parameter FORWARDING = 1, |
| 55 | + parameter PULP_ZFINX = 0, |
| 56 | + parameter INPUT_BUFFER_DEPTH = 0, |
| 57 | + parameter bit INPUT_BUFFER_FALL_THROUGH = 1, |
| 58 | + parameter OUT_OF_ORDER = 1, |
| 59 | + parameter FORWARDING = 1, |
56 | 60 | // PulpDivSqrt = 0 enables T-head-based DivSqrt unit. Supported only for FP32-only instances of Fpnew |
57 | | - parameter logic PulpDivsqrt = 1'b0, |
58 | | - parameter fpnew_pkg::fpu_features_t FPU_FEATURES = fpu_ss_pkg::FPU_FEATURES, |
59 | | - parameter fpnew_pkg::fpu_implementation_t FPU_IMPLEMENTATION = fpu_ss_pkg::FPU_IMPLEMENTATION |
| 61 | + parameter logic PulpDivsqrt = 1'b0, |
| 62 | + parameter fpnew_pkg::fpu_features_t FPU_FEATURES = fpu_ss_pkg::FPU_FEATURES, |
| 63 | + parameter fpnew_pkg::fpu_implementation_t FPU_IMPLEMENTATION = fpu_ss_pkg::FPU_IMPLEMENTATION |
60 | 64 | ) ( |
61 | 65 | // Clock and Reset |
62 | 66 | input logic clk_i, |
@@ -287,7 +291,7 @@ module fpu_ss |
287 | 291 | generate |
288 | 292 | if (INPUT_BUFFER_DEPTH > 0) begin : gen_input_stream_fifo |
289 | 293 | stream_fifo #( |
290 | | - .FALL_THROUGH(1), |
| 294 | + .FALL_THROUGH(INPUT_BUFFER_FALL_THROUGH), |
291 | 295 | .DATA_WIDTH (32), |
292 | 296 | .DEPTH (INPUT_BUFFER_DEPTH), |
293 | 297 | .T (offloaded_data_t) |
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