diff --git a/.gitignore b/.gitignore index 2d00b390..dd68acfa 100644 --- a/.gitignore +++ b/.gitignore @@ -6,7 +6,7 @@ /Bender.lock /Bender.local build -formal/fifo_v3 +formal/fifo formal/counter formal/fall_through_register *.check diff --git a/Bender.yml b/Bender.yml index a838d16d..95e21968 100644 --- a/Bender.yml +++ b/Bender.yml @@ -34,7 +34,7 @@ sources: - src/cc_delta_counter.sv - src/cc_edge_propagator_tx.sv - src/cc_exp_backoff.sv - - src/cc_fifo_v3.sv + - src/cc_fifo.sv - src/cc_gray_to_binary.sv - src/cc_heaviside.sv - src/cc_isochronous_4phase_handshake.sv @@ -132,10 +132,10 @@ sources: - test/cc_passthrough_stream_fifo_tb.sv - test/cc_popcount_tb.sv - test/cc_rr_arb_tree_tb.sv - - test/cc_test_pkg.sv - test/cc_stream_register_tb.sv - test/cc_stream_to_mem_tb.sv - test/cc_sub_per_hash_tb.sv + - test/cc_test_pkg.sv # Level 1 - test/cc_isochronous_crossing_tb.sv - test/cc_stream_omega_net_tb.sv diff --git a/README.md b/README.md index 87590d03..e664bb0d 100644 --- a/README.md +++ b/README.md @@ -107,7 +107,7 @@ Please note that cells with status *deprecated* are not to be used for new desig | Name | Description | Status | Superseded By | | ---------------------------------------------------------------- | --------------------------------------------------------------------------- | ------------ | ----------------------------------------------------------------------------------------------- | | [`cb_filter`](src/cb_filter.sv) | Counting-Bloom-Filter with combinational lookup | active | | -| [`fifo_v3`](src/fifo_v3.sv) | FIFO register with generic fill counts | active | | +| [`fifo`](src/fifo.sv) | FIFO register with generic fill counts | active | | | [`passthrough_stream_fifo`](src/passthrough_stream_fifo.sv) | FIFO register with ready/valid interface and same-cycle push/pop when full | active | | | [`ring_buffer`](src/ring_buffer.sv) | Ring buffer with sequential write and random-access read interfaces | active | | | [`stream_fifo`](src/stream_fifo.sv) | FIFO register with ready/valid interface | active | | diff --git a/common_cells.core b/common_cells.core index 253b1749..544eb09b 100644 --- a/common_cells.core +++ b/common_cells.core @@ -21,7 +21,7 @@ filesets: - src/cc_delta_counter.sv - src/cc_edge_propagator_tx.sv - src/cc_exp_backoff.sv - - src/cc_fifo_v3.sv + - src/cc_fifo.sv - src/cc_gray_to_binary.sv - src/cc_isochronous_4phase_handshake.sv - src/cc_isochronous_spill_register.sv diff --git a/formal/Makefile b/formal/Makefile index a74ca082..d27b5c66 100644 --- a/formal/Makefile +++ b/formal/Makefile @@ -15,9 +15,9 @@ YOSYS ?= yosys SBY ?= sby RM ?= rm -all: fifo_v3.check counter.check fall_through_register.check +all: fifo.check counter.check fall_through_register.check -fifo_v3.check: fifo_v3.sby ../src/cc_fifo_v3.sv cc_fifo_v3_properties.sv +fifo.check: fifo.sby ../src/cc_fifo.sv cc_fifo_properties.sv $(SBY) -f $< touch $@ @@ -30,13 +30,13 @@ counter.check: counter.sby ../src/cc_counter.sv ../src/cc_delta_counter.sv cc_co touch $@ fall_through_register.check: fall_through_register.sby ../src/cc_fall_through_register.sv \ - ../src/cc_fifo_v3.sv + ../src/cc_fifo.sv $(SBY) -f $< touch $@ .PHONY: clean clean: - $(RM) -r fifo_v3.check fifo_v3/ + $(RM) -r fifo.check fifo/ # $(RM) -r delta_counter.check delta_counter/ $(RM) -r counter.check counter/ $(RM) -r fall_through_register.check fall_through_register/ diff --git a/formal/cc_fifo_v3_properties.sv b/formal/cc_fifo_v3_properties.sv index 7d8082e2..20316b78 100644 --- a/formal/cc_fifo_v3_properties.sv +++ b/formal/cc_fifo_v3_properties.sv @@ -10,7 +10,7 @@ // Author: Robert Balas -module cc_fifo_v3_properties #( +module cc_fifo_properties #( parameter bit FALL_THROUGH = 1'b0, // fifo is in fall-through mode parameter int unsigned DATA_WIDTH = 32, // default data width if the fifo is of type logic parameter int unsigned DEPTH = 8, // depth can be arbitrary from 0 to 2**32 @@ -40,7 +40,7 @@ module cc_fifo_v3_properties #( ); localparam int unsigned FIFO_DEPTH = (DEPTH > 0) ? DEPTH : 1; - // verbatim from cc_fifo_v3 + // verbatim from cc_fifo localparam int unsigned FIFO_SIZE = FIFO_DEPTH[ADDR_DEPTH:0]; logic [ADDR_DEPTH-1:0] fill_level; @@ -127,9 +127,9 @@ module cc_fifo_v3_properties #( cover property (@(posedge clk_i) empty_o == 1'b1); -endmodule // cc_fifo_v3_properties +endmodule // cc_fifo_properties -// propagate parameters from cc_fifo_v3 to properties -bind cc_fifo_v3 cc_fifo_v3_properties #( +// propagate parameters from cc_fifo to properties +bind cc_fifo cc_fifo_properties #( .FALL_THROUGH(FALL_THROUGH), .DATA_WIDTH(DATA_WIDTH), .DEPTH(DEPTH) -) i_fifo_v3_properties(.*); +) i_fifo_properties(.*); diff --git a/formal/fall_through_register.sby b/formal/fall_through_register.sby index 08d96c84..bd76c0ae 100644 --- a/formal/fall_through_register.sby +++ b/formal/fall_through_register.sby @@ -6,7 +6,7 @@ depth 100 smtbmc [script] -read -formal cc_fifo_v3.sv +read -formal cc_fifo.sv read -formal cc_fall_through_register.sv read -formal cc_fall_through_register_properties.sv prep -top cc_fall_through_register @@ -14,4 +14,4 @@ prep -top cc_fall_through_register [files] cc_fall_through_register_properties.sv ../src/cc_fall_through_register.sv -../src/cc_fifo_v3.sv +../src/cc_fifo.sv diff --git a/formal/fifo_v3.sby b/formal/fifo_v3.sby index 4781ad13..a9d9e59e 100644 --- a/formal/fifo_v3.sby +++ b/formal/fifo_v3.sby @@ -6,10 +6,10 @@ depth 100 smtbmc [script] -read -formal cc_fifo_v3.sv -read -formal cc_fifo_v3_properties.sv -prep -top cc_fifo_v3 +read -formal cc_fifo.sv +read -formal cc_fifo_properties.sv +prep -top cc_fifo [files] -cc_fifo_v3_properties.sv -../src/cc_fifo_v3.sv +cc_fifo_properties.sv +../src/cc_fifo.sv diff --git a/src/cc_fall_through_register.sv b/src/cc_fall_through_register.sv index 125f7dad..e73c82fd 100644 --- a/src/cc_fall_through_register.sv +++ b/src/cc_fall_through_register.sv @@ -32,7 +32,7 @@ module cc_fall_through_register #( logic fifo_empty, fifo_full; - cc_fifo_v3 #( + cc_fifo #( .FALL_THROUGH (1'b1), .DEPTH (1), .dtype (T) diff --git a/src/cc_fifo_v3.sv b/src/cc_fifo.sv similarity index 99% rename from src/cc_fifo_v3.sv rename to src/cc_fifo.sv index 767a1196..f42f6af4 100644 --- a/src/cc_fifo_v3.sv +++ b/src/cc_fifo.sv @@ -12,7 +12,7 @@ `include "common_cells/assertions.svh" -module cc_fifo_v3 #( +module cc_fifo #( parameter bit FALL_THROUGH = 1'b0, // fifo is in fall-through mode parameter int unsigned DATA_WIDTH = 32, // default data width if the fifo is of type logic parameter int unsigned DEPTH = 8, // depth can be arbitrary from 0 to 2**32 @@ -148,4 +148,4 @@ module cc_fifo_v3 #( "Trying to pop data although the FIFO is empty.") `endif -endmodule // cc_fifo_v3 +endmodule // cc_fifo diff --git a/src/cc_mem_to_banks_detailed.sv b/src/cc_mem_to_banks_detailed.sv index 107f428f..a7a01cc1 100644 --- a/src/cc_mem_to_banks_detailed.sv +++ b/src/cc_mem_to_banks_detailed.sv @@ -171,7 +171,7 @@ module cc_mem_to_banks_detailed #( assign gnt_o = (&req_ready) & (&resp_ready) & !dead_write_fifo_full; if (HideStrb) begin : gen_dead_write_fifo - cc_fifo_v3 #( + cc_fifo #( .FALL_THROUGH ( 1'b0 ), .DEPTH ( MaxTrans+1 ), .DATA_WIDTH ( NumBanks ) diff --git a/src/cc_stream_fifo.sv b/src/cc_stream_fifo.sv index adcfb639..45d7b835 100644 --- a/src/cc_stream_fifo.sv +++ b/src/cc_stream_fifo.sv @@ -43,7 +43,7 @@ module cc_stream_fifo #( assign ready_o = ~full; assign valid_o = ~empty; - cc_fifo_v3 #( + cc_fifo #( .FALL_THROUGH (FALL_THROUGH), .DATA_WIDTH (DATA_WIDTH), .DEPTH (DEPTH), diff --git a/src_files.yml b/src_files.yml index 4e8819c2..02062c69 100644 --- a/src_files.yml +++ b/src_files.yml @@ -14,7 +14,7 @@ common_cells_all: - src/cc_delta_counter.sv - src/cc_edge_propagator_tx.sv - src/cc_exp_backoff.sv - - src/cc_fifo_v3.sv + - src/cc_fifo.sv - src/cc_gray_to_binary.sv - src/cc_heaviside.sv - src/cc_isochronous_4phase_handshake.sv diff --git a/test/cc_fifo_tb.sv b/test/cc_fifo_tb.sv index fb5e45ab..26da059c 100644 --- a/test/cc_fifo_tb.sv +++ b/test/cc_fifo_tb.sv @@ -44,7 +44,7 @@ module cc_fifo_inst_tb #( assign clk = clk_i; - cc_fifo_v3 #( + cc_fifo #( .FALL_THROUGH ( FALL_THROUGH ), .DATA_WIDTH ( DATA_WIDTH ), .DEPTH ( DEPTH )