fp_wrappers.sus

extern module fp32_add_ip {
    clock aclk
    
    input bool s_axis_a_tvalid'0
    input float s_axis_a_tdata'0
    input bool s_axis_b_tvalid'0
    input float s_axis_b_tdata'0
    output bool m_axis_result_tvalid'11
    output float m_axis_result_tdata'11
}

module fp32_add {
    clock aclk
    
    fp32_add_ip ip
    
    action fp32_add : float a, float b -> float res {
        ip.s_axis_a_tvalid = true
        ip.s_axis_a_tdata = a
        ip.s_axis_b_tvalid = true
        ip.s_axis_b_tdata = b
        bool _0 = ip.m_axis_result_tvalid // Tie off
        res = ip.m_axis_result_tdata
    } else {
        ip.s_axis_a_tvalid = false
        ip.s_axis_b_tvalid = false
    }
}

extern module fp32_div_ip {
    clock aclk
    
    input bool s_axis_a_tvalid'0
    input float s_axis_a_tdata'0
    input bool s_axis_b_tvalid'0
    input float s_axis_b_tdata'0
    output bool m_axis_result_tvalid'28
    output float m_axis_result_tdata'28
}

module fp32_div {
    clock aclk
    
    fp32_div_ip ip
    
    action fp32_div : float a, float b -> float res {
        ip.s_axis_a_tvalid = true
        ip.s_axis_a_tdata = a
        ip.s_axis_b_tvalid = true
        ip.s_axis_b_tdata = b
        bool _0 = ip.m_axis_result_tvalid // Tie off
        res = ip.m_axis_result_tdata
    } else {
        ip.s_axis_a_tvalid = false
        ip.s_axis_b_tvalid = false
    }
}

extern module fp32_eq_ip {
    clock aclk
    
    input bool s_axis_a_tvalid'0
    input float s_axis_a_tdata'0
    input bool s_axis_b_tvalid'0
    input float s_axis_b_tdata'0
    output bool m_axis_result_tvalid'2
    output bool[8] m_axis_result_tdata'2
}

module fp32_eq {
    clock aclk
    
    fp32_eq_ip ip
    
    action fp32_eq : float a, float b -> bool res {
        ip.s_axis_a_tvalid = true
        ip.s_axis_a_tdata = a
        ip.s_axis_b_tvalid = true
        ip.s_axis_b_tdata = b
        bool _0 = ip.m_axis_result_tvalid // Tie off
        res = ip.m_axis_result_tdata[0]
    } else {
        ip.s_axis_a_tvalid = false
        ip.s_axis_b_tvalid = false
    }
}

extern module fp32_exp_ip {
    clock aclk
    
    input bool s_axis_a_tvalid'0
    input float s_axis_a_tdata'0
    output bool m_axis_result_tvalid'20
    output float m_axis_result_tdata'20
}

module fp32_exp {
    clock aclk
    
    fp32_exp_ip ip
    
    action fp32_exp : float a -> float res {
        ip.s_axis_a_tvalid = true
        ip.s_axis_a_tdata = a
        bool _0 = ip.m_axis_result_tvalid // Tie off
        res = ip.m_axis_result_tdata
    } else {
        ip.s_axis_a_tvalid = false
    }
}

extern module fp32_fma_ip {
    clock aclk
    
    input bool s_axis_a_tvalid'0
    input float s_axis_a_tdata'0
    input bool s_axis_b_tvalid'0
    input float s_axis_b_tdata'0
    input bool s_axis_c_tvalid'0
    input float s_axis_c_tdata'0
    output bool m_axis_result_tvalid'16
    output float m_axis_result_tdata'16
}

module fp32_fma {
    clock aclk
    
    fp32_fma_ip ip
    
    action fp32_fma : float a, float b, float c -> float res {
        ip.s_axis_a_tvalid = true
        ip.s_axis_a_tdata = a
        ip.s_axis_b_tvalid = true
        ip.s_axis_b_tdata = b
        ip.s_axis_c_tvalid = true
        ip.s_axis_c_tdata = c
        bool _0 = ip.m_axis_result_tvalid // Tie off
        res = ip.m_axis_result_tdata
    } else {
        ip.s_axis_a_tvalid = false
        ip.s_axis_b_tvalid = false
        ip.s_axis_c_tvalid = false
    }
}

extern module fp32_fms_ip {
    clock aclk
    
    input bool s_axis_a_tvalid'0
    input float s_axis_a_tdata'0
    input bool s_axis_b_tvalid'0
    input float s_axis_b_tdata'0
    input bool s_axis_c_tvalid'0
    input float s_axis_c_tdata'0
    output bool m_axis_result_tvalid'16
    output float m_axis_result_tdata'16
}

module fp32_fms {
    clock aclk
    
    fp32_fms_ip ip
    
    action fp32_fms : float a, float b, float c -> float res {
        ip.s_axis_a_tvalid = true
        ip.s_axis_a_tdata = a
        ip.s_axis_b_tvalid = true
        ip.s_axis_b_tdata = b
        ip.s_axis_c_tvalid = true
        ip.s_axis_c_tdata = c
        bool _0 = ip.m_axis_result_tvalid // Tie off
        res = ip.m_axis_result_tdata
    } else {
        ip.s_axis_a_tvalid = false
        ip.s_axis_b_tvalid = false
        ip.s_axis_c_tvalid = false
    }
}

extern module fp32_ge_ip {
    clock aclk
    
    input bool s_axis_a_tvalid'0
    input float s_axis_a_tdata'0
    input bool s_axis_b_tvalid'0
    input float s_axis_b_tdata'0
    output bool m_axis_result_tvalid'2
    output bool[8] m_axis_result_tdata'2
}

module fp32_ge {
    clock aclk
    
    fp32_ge_ip ip
    
    action fp32_ge : float a, float b -> bool res {
        ip.s_axis_a_tvalid = true
        ip.s_axis_a_tdata = a
        ip.s_axis_b_tvalid = true
        ip.s_axis_b_tdata = b
        bool _0 = ip.m_axis_result_tvalid // Tie off
        res = ip.m_axis_result_tdata[0]
    } else {
        ip.s_axis_a_tvalid = false
        ip.s_axis_b_tvalid = false
    }
}

extern module fp32_gt_ip {
    clock aclk
    
    input bool s_axis_a_tvalid'0
    input float s_axis_a_tdata'0
    input bool s_axis_b_tvalid'0
    input float s_axis_b_tdata'0
    output bool m_axis_result_tvalid'2
    output bool[8] m_axis_result_tdata'2
}

module fp32_gt {
    clock aclk
    
    fp32_gt_ip ip
    
    action fp32_gt : float a, float b -> bool res {
        ip.s_axis_a_tvalid = true
        ip.s_axis_a_tdata = a
        ip.s_axis_b_tvalid = true
        ip.s_axis_b_tdata = b
        bool _0 = ip.m_axis_result_tvalid // Tie off
        res = ip.m_axis_result_tdata[0]
    } else {
        ip.s_axis_a_tvalid = false
        ip.s_axis_b_tvalid = false
    }
}

extern module fp32_ln_ip {
    clock aclk
    
    input bool s_axis_a_tvalid'0
    input float s_axis_a_tdata'0
    output bool m_axis_result_tvalid'22
    output float m_axis_result_tdata'22
}

module fp32_ln {
    clock aclk
    
    fp32_ln_ip ip
    
    action fp32_ln : float a -> float res {
        ip.s_axis_a_tvalid = true
        ip.s_axis_a_tdata = a
        bool _0 = ip.m_axis_result_tvalid // Tie off
        res = ip.m_axis_result_tdata
    } else {
        ip.s_axis_a_tvalid = false
    }
}

extern module fp32_mul_ip {
    clock aclk
    
    input bool s_axis_a_tvalid'0
    input float s_axis_a_tdata'0
    input bool s_axis_b_tvalid'0
    input float s_axis_b_tdata'0
    output bool m_axis_result_tvalid'8
    output float m_axis_result_tdata'8
}

module fp32_mul {
    clock aclk
    
    fp32_mul_ip ip
    
    action fp32_mul : float a, float b -> float res {
        ip.s_axis_a_tvalid = true
        ip.s_axis_a_tdata = a
        ip.s_axis_b_tvalid = true
        ip.s_axis_b_tdata = b
        bool _0 = ip.m_axis_result_tvalid // Tie off
        res = ip.m_axis_result_tdata
    } else {
        ip.s_axis_a_tvalid = false
        ip.s_axis_b_tvalid = false
    }
}

extern module fp32_rcp_ip {
    clock aclk
    
    input bool s_axis_a_tvalid'0
    input float s_axis_a_tdata'0
    output bool m_axis_result_tvalid'29
    output float m_axis_result_tdata'29
}

module fp32_rcp {
    clock aclk
    
    fp32_rcp_ip ip
    
    action fp32_rcp : float a -> float res {
        ip.s_axis_a_tvalid = true
        ip.s_axis_a_tdata = a
        bool _0 = ip.m_axis_result_tvalid // Tie off
        res = ip.m_axis_result_tdata
    } else {
        ip.s_axis_a_tvalid = false
    }
}

extern module fp32_rsqrt_ip {
    clock aclk
    
    input bool s_axis_a_tvalid'0
    input float s_axis_a_tdata'0
    output bool m_axis_result_tvalid'32
    output float m_axis_result_tdata'32
}

module fp32_rsqrt {
    clock aclk
    
    fp32_rsqrt_ip ip
    
    action fp32_rsqrt : float a -> float res {
        ip.s_axis_a_tvalid = true
        ip.s_axis_a_tdata = a
        bool _0 = ip.m_axis_result_tvalid // Tie off
        res = ip.m_axis_result_tdata
    } else {
        ip.s_axis_a_tvalid = false
    }
}

extern module fp32_sqrt_ip {
    clock aclk
    
    input bool s_axis_a_tvalid'0
    input float s_axis_a_tdata'0
    output bool m_axis_result_tvalid'28
    output float m_axis_result_tdata'28
}

module fp32_sqrt {
    clock aclk
    
    fp32_sqrt_ip ip
    
    action fp32_sqrt : float a -> float res {
        ip.s_axis_a_tvalid = true
        ip.s_axis_a_tdata = a
        bool _0 = ip.m_axis_result_tvalid // Tie off
        res = ip.m_axis_result_tdata
    } else {
        ip.s_axis_a_tvalid = false
    }
}

extern module fp32_sub_ip {
    clock aclk
    
    input bool s_axis_a_tvalid'0
    input float s_axis_a_tdata'0
    input bool s_axis_b_tvalid'0
    input float s_axis_b_tdata'0
    output bool m_axis_result_tvalid'11
    output float m_axis_result_tdata'11
}

module fp32_sub {
    clock aclk
    
    fp32_sub_ip ip
    
    action fp32_sub : float a, float b -> float res {
        ip.s_axis_a_tvalid = true
        ip.s_axis_a_tdata = a
        ip.s_axis_b_tvalid = true
        ip.s_axis_b_tdata = b
        bool _0 = ip.m_axis_result_tvalid // Tie off
        res = ip.m_axis_result_tdata
    } else {
        ip.s_axis_a_tvalid = false
        ip.s_axis_b_tvalid = false
    }
}

extern module fp64_add_ip {
    clock aclk
    
    input bool s_axis_a_tvalid'0
    input double s_axis_a_tdata'0
    input bool s_axis_b_tvalid'0
    input double s_axis_b_tdata'0
    output bool m_axis_result_tvalid'14
    output double m_axis_result_tdata'14
}

module fp64_add {
    clock aclk
    
    fp64_add_ip ip
    
    action fp64_add : double a, double b -> double res {
        ip.s_axis_a_tvalid = true
        ip.s_axis_a_tdata = a
        ip.s_axis_b_tvalid = true
        ip.s_axis_b_tdata = b
        bool _0 = ip.m_axis_result_tvalid // Tie off
        res = ip.m_axis_result_tdata
    } else {
        ip.s_axis_a_tvalid = false
        ip.s_axis_b_tvalid = false
    }
}

extern module fp64_div_ip {
    clock aclk
    
    input bool s_axis_a_tvalid'0
    input double s_axis_a_tdata'0
    input bool s_axis_b_tvalid'0
    input double s_axis_b_tdata'0
    output bool m_axis_result_tvalid'57
    output double m_axis_result_tdata'57
}

module fp64_div {
    clock aclk
    
    fp64_div_ip ip
    
    action fp64_div : double a, double b -> double res {
        ip.s_axis_a_tvalid = true
        ip.s_axis_a_tdata = a
        ip.s_axis_b_tvalid = true
        ip.s_axis_b_tdata = b
        bool _0 = ip.m_axis_result_tvalid // Tie off
        res = ip.m_axis_result_tdata
    } else {
        ip.s_axis_a_tvalid = false
        ip.s_axis_b_tvalid = false
    }
}

extern module fp64_eq_ip {
    clock aclk
    
    input bool s_axis_a_tvalid'0
    input double s_axis_a_tdata'0
    input bool s_axis_b_tvalid'0
    input double s_axis_b_tdata'0
    output bool m_axis_result_tvalid'2
    output bool[8] m_axis_result_tdata'2
}

module fp64_eq {
    clock aclk
    
    fp64_eq_ip ip
    
    action fp64_eq : double a, double b -> bool res {
        ip.s_axis_a_tvalid = true
        ip.s_axis_a_tdata = a
        ip.s_axis_b_tvalid = true
        ip.s_axis_b_tdata = b
        bool _0 = ip.m_axis_result_tvalid // Tie off
        res = ip.m_axis_result_tdata[0]
    } else {
        ip.s_axis_a_tvalid = false
        ip.s_axis_b_tvalid = false
    }
}

extern module fp64_exp_ip {
    clock aclk
    
    input bool s_axis_a_tvalid'0
    input double s_axis_a_tdata'0
    output bool m_axis_result_tvalid'44
    output double m_axis_result_tdata'44
}

module fp64_exp {
    clock aclk
    
    fp64_exp_ip ip
    
    action fp64_exp : double a -> double res {
        ip.s_axis_a_tvalid = true
        ip.s_axis_a_tdata = a
        bool _0 = ip.m_axis_result_tvalid // Tie off
        res = ip.m_axis_result_tdata
    } else {
        ip.s_axis_a_tvalid = false
    }
}

extern module fp64_fma_ip {
    clock aclk
    
    input bool s_axis_a_tvalid'0
    input double s_axis_a_tdata'0
    input bool s_axis_b_tvalid'0
    input double s_axis_b_tdata'0
    input bool s_axis_c_tvalid'0
    input double s_axis_c_tdata'0
    output bool m_axis_result_tvalid'26
    output double m_axis_result_tdata'26
}

module fp64_fma {
    clock aclk
    
    fp64_fma_ip ip
    
    action fp64_fma : double a, double b, double c -> double res {
        ip.s_axis_a_tvalid = true
        ip.s_axis_a_tdata = a
        ip.s_axis_b_tvalid = true
        ip.s_axis_b_tdata = b
        ip.s_axis_c_tvalid = true
        ip.s_axis_c_tdata = c
        bool _0 = ip.m_axis_result_tvalid // Tie off
        res = ip.m_axis_result_tdata
    } else {
        ip.s_axis_a_tvalid = false
        ip.s_axis_b_tvalid = false
        ip.s_axis_c_tvalid = false
    }
}

extern module fp64_fms_ip {
    clock aclk
    
    input bool s_axis_a_tvalid'0
    input double s_axis_a_tdata'0
    input bool s_axis_b_tvalid'0
    input double s_axis_b_tdata'0
    input bool s_axis_c_tvalid'0
    input double s_axis_c_tdata'0
    output bool m_axis_result_tvalid'26
    output double m_axis_result_tdata'26
}

module fp64_fms {
    clock aclk
    
    fp64_fms_ip ip
    
    action fp64_fms : double a, double b, double c -> double res {
        ip.s_axis_a_tvalid = true
        ip.s_axis_a_tdata = a
        ip.s_axis_b_tvalid = true
        ip.s_axis_b_tdata = b
        ip.s_axis_c_tvalid = true
        ip.s_axis_c_tdata = c
        bool _0 = ip.m_axis_result_tvalid // Tie off
        res = ip.m_axis_result_tdata
    } else {
        ip.s_axis_a_tvalid = false
        ip.s_axis_b_tvalid = false
        ip.s_axis_c_tvalid = false
    }
}

extern module fp64_ge_ip {
    clock aclk
    
    input bool s_axis_a_tvalid'0
    input double s_axis_a_tdata'0
    input bool s_axis_b_tvalid'0
    input double s_axis_b_tdata'0
    output bool m_axis_result_tvalid'2
    output bool[8] m_axis_result_tdata'2
}

module fp64_ge {
    clock aclk
    
    fp64_ge_ip ip
    
    action fp64_ge : double a, double b -> bool res {
        ip.s_axis_a_tvalid = true
        ip.s_axis_a_tdata = a
        ip.s_axis_b_tvalid = true
        ip.s_axis_b_tdata = b
        bool _0 = ip.m_axis_result_tvalid // Tie off
        res = ip.m_axis_result_tdata[0]
    } else {
        ip.s_axis_a_tvalid = false
        ip.s_axis_b_tvalid = false
    }
}

extern module fp64_gt_ip {
    clock aclk
    
    input bool s_axis_a_tvalid'0
    input double s_axis_a_tdata'0
    input bool s_axis_b_tvalid'0
    input double s_axis_b_tdata'0
    output bool m_axis_result_tvalid'2
    output bool[8] m_axis_result_tdata'2
}

module fp64_gt {
    clock aclk
    
    fp64_gt_ip ip
    
    action fp64_gt : double a, double b -> bool res {
        ip.s_axis_a_tvalid = true
        ip.s_axis_a_tdata = a
        ip.s_axis_b_tvalid = true
        ip.s_axis_b_tdata = b
        bool _0 = ip.m_axis_result_tvalid // Tie off
        res = ip.m_axis_result_tdata[0]
    } else {
        ip.s_axis_a_tvalid = false
        ip.s_axis_b_tvalid = false
    }
}

extern module fp64_ln_ip {
    clock aclk
    
    input bool s_axis_a_tvalid'0
    input double s_axis_a_tdata'0
    output bool m_axis_result_tvalid'48
    output double m_axis_result_tdata'48
}

module fp64_ln {
    clock aclk
    
    fp64_ln_ip ip
    
    action fp64_ln : double a -> double res {
        ip.s_axis_a_tvalid = true
        ip.s_axis_a_tdata = a
        bool _0 = ip.m_axis_result_tvalid // Tie off
        res = ip.m_axis_result_tdata
    } else {
        ip.s_axis_a_tvalid = false
    }
}

extern module fp64_mul_ip {
    clock aclk
    
    input bool s_axis_a_tvalid'0
    input double s_axis_a_tdata'0
    input bool s_axis_b_tvalid'0
    input double s_axis_b_tdata'0
    output bool m_axis_result_tvalid'12
    output double m_axis_result_tdata'12
}

module fp64_mul {
    clock aclk
    
    fp64_mul_ip ip
    
    action fp64_mul : double a, double b -> double res {
        ip.s_axis_a_tvalid = true
        ip.s_axis_a_tdata = a
        ip.s_axis_b_tvalid = true
        ip.s_axis_b_tdata = b
        bool _0 = ip.m_axis_result_tvalid // Tie off
        res = ip.m_axis_result_tdata
    } else {
        ip.s_axis_a_tvalid = false
        ip.s_axis_b_tvalid = false
    }
}

extern module fp64_rcp_ip {
    clock aclk
    
    input bool s_axis_a_tvalid'0
    input double s_axis_a_tdata'0
    output bool m_axis_result_tvalid'35
    output double m_axis_result_tdata'35
}

module fp64_rcp {
    clock aclk
    
    fp64_rcp_ip ip
    
    action fp64_rcp : double a -> double res {
        ip.s_axis_a_tvalid = true
        ip.s_axis_a_tdata = a
        bool _0 = ip.m_axis_result_tvalid // Tie off
        res = ip.m_axis_result_tdata
    } else {
        ip.s_axis_a_tvalid = false
    }
}

extern module fp64_rsqrt_ip {
    clock aclk
    
    input bool s_axis_a_tvalid'0
    input double s_axis_a_tdata'0
    output bool m_axis_result_tvalid'110
    output double m_axis_result_tdata'110
}

module fp64_rsqrt {
    clock aclk
    
    fp64_rsqrt_ip ip
    
    action fp64_rsqrt : double a -> double res {
        ip.s_axis_a_tvalid = true
        ip.s_axis_a_tdata = a
        bool _0 = ip.m_axis_result_tvalid // Tie off
        res = ip.m_axis_result_tdata
    } else {
        ip.s_axis_a_tvalid = false
    }
}

extern module fp64_sqrt_ip {
    clock aclk
    
    input bool s_axis_a_tvalid'0
    input double s_axis_a_tdata'0
    output bool m_axis_result_tvalid'57
    output double m_axis_result_tdata'57
}

module fp64_sqrt {
    clock aclk
    
    fp64_sqrt_ip ip
    
    action fp64_sqrt : double a -> double res {
        ip.s_axis_a_tvalid = true
        ip.s_axis_a_tdata = a
        bool _0 = ip.m_axis_result_tvalid // Tie off
        res = ip.m_axis_result_tdata
    } else {
        ip.s_axis_a_tvalid = false
    }
}

extern module fp64_sub_ip {
    clock aclk
    
    input bool s_axis_a_tvalid'0
    input double s_axis_a_tdata'0
    input bool s_axis_b_tvalid'0
    input double s_axis_b_tdata'0
    output bool m_axis_result_tvalid'14
    output double m_axis_result_tdata'14
}

module fp64_sub {
    clock aclk
    
    fp64_sub_ip ip
    
    action fp64_sub : double a, double b -> double res {
        ip.s_axis_a_tvalid = true
        ip.s_axis_a_tdata = a
        ip.s_axis_b_tvalid = true
        ip.s_axis_b_tdata = b
        bool _0 = ip.m_axis_result_tvalid // Tie off
        res = ip.m_axis_result_tdata
    } else {
        ip.s_axis_a_tvalid = false
        ip.s_axis_b_tvalid = false
    }
}