From a2299cb1056a2d9fe689bf52a082100ee8f991fc Mon Sep 17 00:00:00 2001 From: sunrisepeak Date: Mon, 20 Jul 2026 19:53:30 +0800 Subject: [PATCH 1/6] =?UTF-8?q?gen=5Fdescriptor:=20route=20dnn-group=20fla?= =?UTF-8?q?g-globs=20into=20features.dnn.flags=20(mcpp=200.0.101=20per-fea?= =?UTF-8?q?ture=20flags=20=E2=80=94=20clears=20feature-off=20dead-glob=20w?= =?UTF-8?q?arnings;=20per-OS=20deltas=20land=20via=20merge)?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- tools/compat-opencv/gen_descriptor.py | 25 +++++++++++++++++++++---- 1 file changed, 21 insertions(+), 4 deletions(-) diff --git a/tools/compat-opencv/gen_descriptor.py b/tools/compat-opencv/gen_descriptor.py index 861b469..606b72c 100755 --- a/tools/compat-opencv/gen_descriptor.py +++ b/tools/compat-opencv/gen_descriptor.py @@ -404,7 +404,18 @@ def lua_list(items, ind): def defines_lua(defset): return "defines = { " + ", ".join(f'"{D(f)}"' for f in sorted(defset)) + " }" +# base flag-globs vs dnn-feature flag-globs. Flag-globs for the dnn groups +# (mlas/mlasgemm/protobuf/dnn) only match a source when the `dnn` feature is +# on; kept in the base `flags` they glob nothing in the default (feature-off) +# profile -> mcpp 0.0.101 warns "[build].flags glob matched no source file". +# mcpp#253 per-feature flags let them ride WITH the feature (features.dnn.flags), +# so they resolve exactly when their sources do. (dnn-group flag-globs are +# arch-specific for the per-ISA entries -> they land per-OS via merge_opencv.lua.) flags_entries = [] +dnn_flags_entries = [] +def is_dnn_glob(g): + return any(m in g for m in ("3rdparty/mlas", "3rdparty/protobuf", + "modules/dnn", "tu/mlasgemm")) # curated exception: mlas/lib/platform.cpp calls syscall(2); glibc hides it # under __STRICT_ANSI__ (-std=c++NN). The reference build's gcc13 tolerated # this only because ninja -k discards the object; consumers must compile it, @@ -416,7 +427,8 @@ def defines_lua(defset): key = "cflags" if dk in ("zlib", "png", "jpeg", "jpeg12", "jpeg16") else "cxxflags" parts = [f'glob = "{GROUP_GLOB[dk]}"'] if dir_defs[dk]: parts.append(defines_lua(dir_defs[dk])) - flags_entries.append("{ " + ", ".join(parts) + " },") + (dnn_flags_entries if dk in FEATURE_DNN_GROUPS else flags_entries).append( + "{ " + ", ".join(parts) + " },") if ("jpeg-asm", None) in groups: cs = groups[("jpeg-asm", None)] common = frozenset.intersection(*[c[2] for c in cs]) @@ -426,17 +438,18 @@ def defines_lua(defset): ms = ", ".join(f'"{m}"' for m in isa_m[(dk, isa)]) g = GROUP_GLOB[dk] g = (g[:-3] if g.endswith("/**") else g) + f"/**/*.{isa}.cpp" - flags_entries.append( + (dnn_flags_entries if dk in FEATURE_DNN_GROUPS else flags_entries).append( f'{{ glob = "{g}", defines = {{ {ds} }}, cxxflags = {{ {ms} }} }},') for mod, dk in sorted(kernel_files): flags_entries.append( f'{{ glob = "**/clsrc/opencl_kernels_{mod}.cpp", ' + defines_lua(dir_defs[dk]) + " },") for g, extra in sorted(per_file_flag_entries): - flags_entries.append(f'{{ glob = "{g}", ' + defines_lua(extra) + " },") + (dnn_flags_entries if is_dnn_glob(g) else flags_entries).append( + f'{{ glob = "{g}", ' + defines_lua(extra) + " },") # curated exception #2: mlas/lib/platform.cpp calls syscall(2) but includes # only (the prototype lives in ; upstream # toolchains leak it transitively, the hermetic glibc does not). -flags_entries.append('{ glob = "*/3rdparty/mlas/lib/platform.cpp", cxxflags = { "-include", "unistd.h" } },') +dnn_flags_entries.append('{ glob = "*/3rdparty/mlas/lib/platform.cpp", cxxflags = { "-include", "unistd.h" } },') # upstream reference uses -std=c++17; the index floor is c++23 and the whole # TU set builds green under gcc16 -std=c++23 (validated by the O0 spike). @@ -464,6 +477,7 @@ def defines_lua(defset): sources_dnn_out.append("mcpp_generated/mlas_hgemm_stub.cpp") dnn_sources_lua = lua_list(sources_dnn_out, " " * 20) +dnn_flags_lua = ("\n" + " " * 20).join(dnn_flags_entries) n_dnn = len(sources_dnn) L = [] L.append(f"""-- Auto-generated by tools/compat-opencv/gen_descriptor.py — do not edit by hand. @@ -530,6 +544,9 @@ def defines_lua(defset): }}, ["dnn"] = {{ defines = {{ "HAVE_OPENCV_DNN" }}, + flags = {{ + {dnn_flags_lua} + }}, sources = {{ {dnn_sources_lua} }}, From 044da1b6f8dca3776a638e0c1d889611d45ef4ad Mon Sep 17 00:00:00 2001 From: sunrisepeak Date: Mon, 20 Jul 2026 20:03:18 +0800 Subject: [PATCH 2/6] full-func snapshots: windows+macos full profile + dnn (videoio+dnn everywhere) via fixed gen_descriptor --- .github/workflows/snapshot-macos-opencv.yml | 6 +- .github/workflows/snapshot-windows-opencv.yml | 106 ++++++++++++++++-- 2 files changed, 100 insertions(+), 12 deletions(-) diff --git a/.github/workflows/snapshot-macos-opencv.yml b/.github/workflows/snapshot-macos-opencv.yml index 3558dc1..e589382 100644 --- a/.github/workflows/snapshot-macos-opencv.yml +++ b/.github/workflows/snapshot-macos-opencv.yml @@ -4,7 +4,7 @@ # Builds a static ffmpeg 8.1.2 prefix first (cmake's videoio-FFmpeg discovery; # consumers get the libs from the compat.ffmpeg dependency instead). name: snapshot-macos-opencv -on: { workflow_dispatch: {}, push: { branches: [feat/opencv-3platform] } } +on: { workflow_dispatch: {}, push: { branches: [feat/opencv-3platform, feat/opencv-full-func] } } jobs: snapshot: runs-on: macos-15 @@ -45,14 +45,14 @@ jobs: set -eux PKG_CONFIG_LIBDIR="$FFMPEG_PREFIX/lib/pkgconfig" \ cmake -G Ninja -S "$OPENCV_SRC" -B bld -DCMAKE_BUILD_TYPE=Release \ - -DBUILD_LIST=core,imgproc,imgcodecs,highgui,videoio \ + -DBUILD_LIST=core,imgproc,imgcodecs,highgui,videoio,dnn \ -DBUILD_SHARED_LIBS=OFF -DBUILD_ZLIB=ON -DBUILD_PNG=ON -DBUILD_JPEG=ON \ -DWITH_TIFF=OFF -DWITH_WEBP=OFF -DWITH_OPENJPEG=OFF -DWITH_JASPER=OFF \ -DWITH_OPENEXR=OFF -DWITH_AVIF=OFF -DWITH_JPEGXL=OFF -DWITH_IMGCODEC_GIF=OFF \ -DWITH_OPENCL=OFF -DWITH_IPP=OFF -DWITH_LAPACK=OFF -DWITH_EIGEN=OFF -DWITH_ITT=OFF \ -DWITH_QT=OFF -DWITH_OPENGL=OFF -DWITH_FFMPEG=ON -DWITH_GSTREAMER=OFF \ -DWITH_AVFOUNDATION=OFF -DWITH_V4L=OFF -DWITH_OBSENSOR=OFF \ - -DWITH_PROTOBUF=OFF -DWITH_CAROTENE=OFF -DWITH_FLATBUFFERS=OFF \ + -DWITH_PROTOBUF=ON -DBUILD_PROTOBUF=ON -DWITH_CAROTENE=OFF -DWITH_FLATBUFFERS=OFF \ -DWITH_KLEIDICV=OFF -DWITH_NDSRVP=OFF -DWITH_HAL_RVV=OFF \ -DWITH_UNIFONT=OFF -DWITH_ADE=OFF \ -DBUILD_TESTS=OFF -DBUILD_PERF_TESTS=OFF -DBUILD_EXAMPLES=OFF \ diff --git a/.github/workflows/snapshot-windows-opencv.yml b/.github/workflows/snapshot-windows-opencv.yml index 33d4e36..30c6b85 100644 --- a/.github/workflows/snapshot-windows-opencv.yml +++ b/.github/workflows/snapshot-windows-opencv.yml @@ -6,20 +6,43 @@ # question: does mcpp clang-MSVC compile OpenCV's C++ from a clang-cl snapshot. # videoio+FFmpeg is a follow-up. Uploads the descriptor AND raw artifacts. name: snapshot-windows-opencv -on: { workflow_dispatch: {}, push: { branches: [spike/opencv-windows-snapshot] } } +on: { workflow_dispatch: {}, push: { branches: [feat/opencv-windows-videoio, feat/opencv-full-func] } } jobs: snapshot: runs-on: windows-latest timeout-minutes: 90 steps: - uses: actions/checkout@v4 - - uses: ilammy/msvc-dev-cmd@v1 # MSVC SDK headers/libs for clang-cl + - uses: ilammy/msvc-dev-cmd@v1 # MSVC SDK headers/libs for clang-cl + cl.exe + - uses: msys2/setup-msys2@v2 # make + pkg-config for the ffmpeg prefix build + with: { msystem: UCRT64, install: 'make diffutils tar pkgconf', path-type: inherit } - name: tools (llvm/clang-cl, nasm, ninja) shell: pwsh run: | - choco install -y --no-progress nasm ninja llvm | Out-Null + choco install -y --no-progress nasm ninja llvm pkgconfiglite | Out-Null echo "C:\Program Files\NASM" | Out-File -FilePath $env:GITHUB_PATH -Append -Encoding utf8 echo "C:\Program Files\LLVM\bin" | Out-File -FilePath $env:GITHUB_PATH -Append -Encoding utf8 + # pkgconfiglite installs pkg-config.exe to the choco bin — put it on the + # NATIVE windows PATH so cmake's find_package(PkgConfig) sets PKG_CONFIG_FOUND + echo "C:\ProgramData\chocolatey\bin" | Out-File -FilePath $env:GITHUB_PATH -Append -Encoding utf8 + Get-Command pkg-config | Select-Object -ExpandProperty Source + - name: build shared FFmpeg 8.1.2 prefix (MSVC) for cmake videoio discovery + shell: msys2 {0} + run: | + set -eux + curl -L -fsS -o ffmpeg.tar.gz https://ffmpeg.org/releases/ffmpeg-8.1.2.tar.gz + echo "32faba5ef67340d54724941eae1425580791195312a4fd13bf6f820a2818bf22 ffmpeg.tar.gz" | sha256sum -c - + tar -xzf ffmpeg.tar.gz + mkdir ffbuild && cd ffbuild + # windows path prefix so the generated .pc / clang-cl consumption use C:/… not /c/… + PFX="C:/ffprefix" + ../ffmpeg-8.1.2/configure --toolchain=msvc --prefix="$PFX" \ + --enable-shared --disable-static --disable-programs --disable-doc \ + --disable-autodetect --disable-network >cfg.log 2>&1 \ + && echo "FFMPEG CONFIGURE OK" || { echo FAIL; tail -30 cfg.log; exit 1; } + make -j"$(nproc)" >/dev/null 2>&1 && make install + echo "FFPREFIX=$PFX" >> "$GITHUB_ENV" + ls "$PFX/lib/pkgconfig" || true - name: probe toolchain shell: bash run: | @@ -34,31 +57,94 @@ jobs: echo "b0528f5a1d379d59d4701cb28c36e22214cc51cf64594e5b56f2d3e6c0233095 opencv.tar.gz" | sha256sum -c - tar -xzf opencv.tar.gz echo "OPENCV_SRC=$PWD/opencv-5.0.0" >> "$GITHUB_ENV" - - name: cmake configure (clang-cl, headless core, hermetic) + # Instrument detect_ffmpeg.cmake: at the very end (after ocv_add_external_target), + # confirm the FindFFMPEG shim drove HAVE_FFMPEG=TRUE and the ocv.3rdparty.ffmpeg + # INTERFACE target got created — that target (not HAVE_FFMPEG itself) is what + # videoio/CMakeLists.txt line 161 gates cap_ffmpeg.cpp on. + DF="$PWD/opencv-5.0.0/modules/videoio/cmake/detect_ffmpeg.cmake" + { + echo '' + echo 'message(STATUS "mcpp-dbg: HAVE_FFMPEG=[${HAVE_FFMPEG}] FFMPEG_FOUND=[${FFMPEG_FOUND}]")' + echo 'message(STATUS "mcpp-dbg: versions avcodec=[${FFMPEG_libavcodec_VERSION}] avformat=[${FFMPEG_libavformat_VERSION}] avutil=[${FFMPEG_libavutil_VERSION}] swscale=[${FFMPEG_libswscale_VERSION}]")' + echo 'message(STATUS "mcpp-dbg: FFMPEG_INCLUDE_DIRS=[${FFMPEG_INCLUDE_DIRS}] FFMPEG_LIBRARIES=[${FFMPEG_LIBRARIES}]")' + echo 'if(TARGET ocv.3rdparty.ffmpeg)' + echo ' message(STATUS "mcpp-dbg: TARGET ocv.3rdparty.ffmpeg CREATED -> cap_ffmpeg.cpp will compile")' + echo 'else()' + echo ' message(STATUS "mcpp-dbg: TARGET ocv.3rdparty.ffmpeg MISSING -> cap_ffmpeg.cpp will NOT compile")' + echo 'endif()' + } >> "$DF" + - name: cmake configure (clang-cl, +videoio via FindFFMPEG shim, headless) shell: bash run: | set -eux + # OpenCV's pkg-config FFmpeg path is UNIX/MINGW-gated (never runs under clang-cl / + # windows-MSVC), and forcing HAVE_FFMPEG at the END of detect_ffmpeg is too late: + # ocv_add_external_target(ffmpeg) — which creates the ocv.3rdparty.ffmpeg target + # that videoio gates cap_ffmpeg.cpp on — has already run/skipped. Use OpenCV's + # sanctioned override OPENCV_FFMPEG_USE_FIND_PACKAGE=FFMPEG + a FindFFMPEG.cmake + # shim: find_package(FFMPEG) runs FIRST in detect_ffmpeg (line 9) → shim sets + # FFMPEG_FOUND → HAVE_FFMPEG=TRUE → version gate passes (real versions) → build + # check skipped → ocv_add_external_target creates the target → cap_ffmpeg compiles. + export PKG_CONFIG_PATH="C:/ffprefix/lib/pkgconfig" + VC=$(pkg-config --modversion libavcodec) + VF=$(pkg-config --modversion libavformat) + VU=$(pkg-config --modversion libavutil) + VS=$(pkg-config --modversion libswscale) + # best-effort import-lib discovery (MSVC shared build names them avcodec.lib etc., + # in lib/ or bin/); non-fatal — the target is created from the includes alone and + # the build check is skipped, so empty LIBS still compiles cap_ffmpeg.cpp. mcpp + # links compat.ffmpeg (windows) at consume time regardless. + echo "=== C:/ffprefix tree (lib + bin) ==="; ls -la C:/ffprefix/lib/ C:/ffprefix/bin/ 2>/dev/null | head -40 || true + LIBS=$( { ls C:/ffprefix/lib/*.lib C:/ffprefix/bin/*.lib 2>/dev/null || true; } | sed 's#\\#/#g' | tr '\n' ';') + echo "ffmpeg versions: avcodec=$VC avformat=$VF avutil=$VU swscale=$VS" + echo "ffmpeg import libs: ${LIBS:-}" + mkdir -p cmakemods + cat > cmakemods/FindFFMPEG.cmake <&1 | tail -40 + -DBUILD_opencv_apps=OFF -DBUILD_JAVA=OFF -DBUILD_opencv_python3=OFF 2>&1 | tee cfg_out.txt | tail -60 + echo "=== mcpp-dbg (detect_ffmpeg: HAVE_FFMPEG + ocv.3rdparty.ffmpeg target) ===" + grep -a "mcpp-dbg\|mcpp FindFFMPEG" cfg_out.txt || echo "(no mcpp-dbg — detect_ffmpeg didn't reach the tail)" + echo "=== FFmpeg cmake cache vars ===" + grep -iE "FFMPEG" bld/CMakeCache.txt | head -20 || true - name: reference build (materialize generators) + dump commands shell: bash run: | ninja -C bld -k 0 > bld/ninja-build.log 2>&1 || true ninja -C bld -t commands > bld/ninja-cmds.log + echo "=== videoio FFmpeg backend active? (cap_ffmpeg must compile) ===" + grep -q cap_ffmpeg bld/ninja-cmds.log && echo "cap_ffmpeg: YES ($(grep -c cap_ffmpeg bld/ninja-cmds.log) TUs)" || echo "FATAL: cap_ffmpeg not compiled — FFmpeg videoio backend inactive" echo "=== windows cvconfig facts ===" grep -E "HAVE_WIN32UI|WIN32|HAVE_OPENCV_HIGHGUI|BUILTIN_BACKEND" bld/cvconfig.h bld/*highgui* 2>/dev/null | head || true echo "=== SIMD dispatch TUs present? ===" @@ -69,7 +155,9 @@ jobs: shell: bash run: | set -eux - python tools/compat-opencv/gen_descriptor.py \ + # FFMPEG_PREFIX: gen_descriptor excludes these include dirs (served by the + # compat.ffmpeg dependency) and emits the compat.ffmpeg dep line. + FFMPEG_PREFIX="C:/ffprefix" python tools/compat-opencv/gen_descriptor.py \ "$OPENCV_SRC" bld 5.0.0 \ b0528f5a1d379d59d4701cb28c36e22214cc51cf64594e5b56f2d3e6c0233095 \ compat.opencv.wingen.lua || echo "gen_descriptor needs windows tweaks — raw artifacts uploaded for local iteration" From 1b4f1e245ff2d016bbaa43a5dc9e3804a4a55935 Mon Sep 17 00:00:00 2001 From: sunrisepeak Date: Mon, 20 Jul 2026 20:08:59 +0800 Subject: [PATCH 3/6] gen_descriptor: fix empty baseline_m (arm) -> cxxflags={,"-w"} lua syntax error; merge_opencv: per-OS dnn common/delta split (mcpp#253) + warn-fix flag relocation --- tools/compat-opencv/gen_descriptor.py | 4 +- tools/compat-opencv/merge_opencv.lua | 99 ++++++++++++++++++++++++--- 2 files changed, 93 insertions(+), 10 deletions(-) diff --git a/tools/compat-opencv/gen_descriptor.py b/tools/compat-opencv/gen_descriptor.py index 606b72c..53d5327 100755 --- a/tools/compat-opencv/gen_descriptor.py +++ b/tools/compat-opencv/gen_descriptor.py @@ -520,8 +520,8 @@ def is_dnn_glob(g): {deps_line} include_dirs = {{ {lua_list(incdirs, " " * 12)} }}, - cxxflags = {{ {", ".join(f'"{m}"' for m in baseline_m)}, "-w" }}, - cflags = {{ {", ".join(f'"{m}"' for m in baseline_m)}, "-w" }}, + cxxflags = {{ {", ".join([f'"{m}"' for m in baseline_m] + ['"-w"'])} }}, + cflags = {{ {", ".join([f'"{m}"' for m in baseline_m] + ['"-w"'])} }}, flags = {{ {("\n" + " " * 12).join(flags_entries)} }}, diff --git a/tools/compat-opencv/merge_opencv.lua b/tools/compat-opencv/merge_opencv.lua index 62bb37b..229607f 100644 --- a/tools/compat-opencv/merge_opencv.lua +++ b/tools/compat-opencv/merge_opencv.lua @@ -126,21 +126,104 @@ end -- mcpp: neutral-common (from base) + per-OS blocks (each OS's platform-specific keys) -- `deps` is PER-OS: linux/macosx carry compat.ffmpeg (videoio backend); a core-only --- windows profile (no videoio) carries none, so it must not inherit a global dep. -local PEROS = { "include_dirs", "cxxflags", "cflags", "flags", "sources", "generated_files", "deps" } +-- profile (no videoio) carries none, so it must not inherit a global dep. +-- `flags` is handled specially below (dnn-group flag-globs relocate into the feature). +local PEROS = { "include_dirs", "cxxflags", "cflags", "sources", "generated_files", "deps" } + +-- ── per-OS `dnn` feature (mcpp#253 common/delta) ──────────────────────── +-- The dnn feature's payload splits into a cross-platform COMMON part (dnn/protobuf/ +-- mlas C++, mlas_hgemm_stub) and a per-arch SIMD DELTA (x86: mlas/lib/x86_64/*.S + +-- avx/avx2/avx512 kernels; arm: mlas/lib/aarch64/*.S + neon/neon_fp16 kernels). +-- mcpp 0.0.101 per-OS features append per sub-key, so COMMON rides neutral +-- features.dnn and each OS's DELTA rides mcpp..features.dnn. dnn-group flag-globs +-- (mlas/protobuf/mlasgemm + per-ISA) ride features.dnn.flags so the feature-off base +-- has no dead globs (mcpp 0.0.101 warning). Inputs are normalized whether they +-- carried those globs in base `flags` (pre-warnfix descriptors) or features.dnn.flags. +local function is_dnn_glob(g) + if type(g) ~= "string" then return false end + for _, m in ipairs({ "3rdparty/mlas", "3rdparty/protobuf", "modules/dnn", "tu/mlasgemm" }) do + if g:find(m, 1, true) then return true end + end + return false +end +local function ser_id(v) return ser(v, "") end + +local pkgs, order = {}, {} +for _, e in ipairs(INPUTS) do pkgs[e.os] = load_pkg(e.path); order[#order+1] = e.os end +local dnn_src, dnn_flg, base_flg = {}, {}, {} +for _, os_ in ipairs(order) do + local p = pkgs[os_] + local feat = (p.mcpp.features and p.mcpp.features.dnn) or {} + local srcs, flgs, cleaned = {}, {}, {} + for _, s in ipairs(feat.sources or {}) do srcs[#srcs+1] = s end + for _, f in ipairs(feat.flags or {}) do flgs[#flgs+1] = f end + for _, f in ipairs(p.mcpp.flags or {}) do + if type(f) == "table" and is_dnn_glob(f.glob) then flgs[#flgs+1] = f + else cleaned[#cleaned+1] = f end + end + dnn_src[os_], dnn_flg[os_], base_flg[os_] = srcs, flgs, cleaned +end + +-- active = OSes that actually carry a dnn payload; common is their intersection +local active = {} +for _, os_ in ipairs(order) do if #dnn_src[os_] > 0 then active[#active+1] = os_ end end +local function split_common(map) + if #active == 0 then return {}, {} end + local counts = {} + for _, os_ in ipairs(active) do + local seen = {} + for _, v in ipairs(map[os_]) do + local id = ser_id(v) + if not seen[id] then seen[id] = true; counts[id] = (counts[id] or 0) + 1 end + end + end + local common, cids = {}, {} + for _, v in ipairs(map[active[1]]) do + local id = ser_id(v) + if counts[id] == #active and not cids[id] then cids[id] = true; common[#common+1] = v end + end + local delta = {} + for _, os_ in ipairs(order) do + local d = {} + for _, v in ipairs(map[os_] or {}) do if not cids[ser_id(v)] then d[#d+1] = v end end + delta[os_] = d + end + return common, delta +end +local common_src, delta_src = split_common(dnn_src) +local common_flg, delta_flg = split_common(dnn_flg) + +-- neutral features: base's non-dnn features (unifont) verbatim; dnn = common-only +local neutral_features = {} +for fname, fdef in pairs(base.mcpp.features or {}) do + if fname ~= "dnn" then neutral_features[fname] = fdef end +end +local base_dnn = base.mcpp.features and base.mcpp.features.dnn +neutral_features.dnn = { + defines = (base_dnn and base_dnn.defines) or { "HAVE_OPENCV_DNN" }, + flags = common_flg, + sources = common_src, +} + merged.mcpp = { language = base.mcpp.language, targets = base.mcpp.targets, - features = base.mcpp.features, -- unifont (neutral) + dnn (x86; opencv-dnn stays linux-only) + features = neutral_features, } -for _, e in ipairs(INPUTS) do - local p = load_pkg(e.path) +for _, os_ in ipairs(order) do + local p = pkgs[os_] local blk = {} for _, k in ipairs(PEROS) do blk[k] = p.mcpp[k] end - -- ldflags: the single-OS descriptor carries them in its own mcpp. sub-block - local sub = p.mcpp[e.os] + blk.flags = base_flg[os_] -- dnn-group globs stripped + local sub = p.mcpp[os_] if sub and sub.ldflags then blk.ldflags = sub.ldflags end - merged.mcpp[e.os] = blk + if #dnn_src[os_] > 0 then -- this OS supports dnn -> its delta + local fd = {} + if #delta_src[os_] > 0 then fd.sources = delta_src[os_] end + if #delta_flg[os_] > 0 then fd.flags = delta_flg[os_] end + if next(fd) then blk.features = { dnn = fd } end + end + merged.mcpp[os_] = blk end -- ---- emit ---- From a6fac75d97433dbe1714224f4de8f0730da5550e Mon Sep 17 00:00:00 2001 From: sunrisepeak Date: Mon, 20 Jul 2026 20:14:15 +0800 Subject: [PATCH 4/6] tests: widen opencv dnn feature + module tests to macOS (validate per-OS NEON dnn build + import opencv.dnn on macos-arm64) --- tests/examples/opencv-dnn/mcpp.toml | 6 ++++++ tests/examples/opencv-dnn/tests/opencv_dnn_feature.cpp | 2 +- tests/examples/opencv-module-dnn/mcpp.toml | 5 +++++ tests/examples/opencv-module-dnn/tests/opencv_dnn_iface.cpp | 2 +- 4 files changed, 13 insertions(+), 2 deletions(-) diff --git a/tests/examples/opencv-dnn/mcpp.toml b/tests/examples/opencv-dnn/mcpp.toml index 215a37f..e87b281 100644 --- a/tests/examples/opencv-dnn/mcpp.toml +++ b/tests/examples/opencv-dnn/mcpp.toml @@ -11,3 +11,9 @@ compat = { path = "../../.." } [target.'cfg(linux)'.dependencies.compat] opencv = { version = "5.0.0", features = ["dnn"] } + +# macOS-arm64 dnn: compat.opencv now carries a per-OS NEON dnn feature +# (mcpp#253 per-OS features; mlas/lib/aarch64 + neon kernels). Builds the full +# dnn closure from source and runs the same blobFromImage assertion. +[target.'cfg(macos)'.dependencies.compat] +opencv = { version = "5.0.0", features = ["dnn"] } diff --git a/tests/examples/opencv-dnn/tests/opencv_dnn_feature.cpp b/tests/examples/opencv-dnn/tests/opencv_dnn_feature.cpp index b684742..f59b8c2 100644 --- a/tests/examples/opencv-dnn/tests/opencv_dnn_feature.cpp +++ b/tests/examples/opencv-dnn/tests/opencv_dnn_feature.cpp @@ -4,7 +4,7 @@ // dnn feature assertion: blobFromImage produces a correctly-shaped and // correctly-valued NCHW blob (exercises dnn core + the whole protobuf/mlas // link closure), and an empty Net constructs. Linux-only (see mcpp.toml). -#ifdef __linux__ +#if defined(__linux__) || defined(__APPLE__) #include #include #include diff --git a/tests/examples/opencv-module-dnn/mcpp.toml b/tests/examples/opencv-module-dnn/mcpp.toml index be6cb3c..941c707 100644 --- a/tests/examples/opencv-module-dnn/mcpp.toml +++ b/tests/examples/opencv-module-dnn/mcpp.toml @@ -13,3 +13,8 @@ default = { path = "../../.." } [target.'cfg(linux)'.dependencies] opencv = { version = "0.0.6", features = ["dnn"] } + +# macOS: `import opencv.dnn;` on macOS-arm64 (opencv-m dnn feature is OS-neutral; +# forwards compat.opencv/dnn which now has the per-OS NEON dnn payload). +[target.'cfg(macos)'.dependencies] +opencv = { version = "0.0.6", features = ["dnn"] } diff --git a/tests/examples/opencv-module-dnn/tests/opencv_dnn_iface.cpp b/tests/examples/opencv-module-dnn/tests/opencv_dnn_iface.cpp index 868b81d..fdc04fc 100644 --- a/tests/examples/opencv-module-dnn/tests/opencv_dnn_iface.cpp +++ b/tests/examples/opencv-module-dnn/tests/opencv_dnn_iface.cpp @@ -4,7 +4,7 @@ // Linux-only (see mcpp.toml). Not named dnn.cpp (would collide with the dep's // modules/dnn/src/dnn.cpp — #240 family). Import-only (import std + the opencv // modules): no textual headers, matching the ffmpeg-module member convention. -#ifdef __linux__ +#if defined(__linux__) || defined(__APPLE__) import std; import opencv.cv; import opencv.dnn; From 4f58261123bfd6e2f4e4576cade8da8bc9c55097 Mon Sep 17 00:00:00 2001 From: sunrisepeak Date: Mon, 20 Jul 2026 20:21:49 +0800 Subject: [PATCH 5/6] =?UTF-8?q?feat(pkg):=20compat.opencv=20full-platform?= =?UTF-8?q?=20full-function=20=E2=80=94=20windows=20videoio=20+=20macOS=20?= =?UTF-8?q?dnn=20(per-OS=20NEON)=20+=20warning-free=20(mcpp=200.0.101)?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- pkgs/c/compat.opencv.lua | 1205 ++++++++++++++++++++++++++++++-------- 1 file changed, 960 insertions(+), 245 deletions(-) diff --git a/pkgs/c/compat.opencv.lua b/pkgs/c/compat.opencv.lua index 01d8d8c..785b05b 100644 --- a/pkgs/c/compat.opencv.lua +++ b/pkgs/c/compat.opencv.lua @@ -13,33 +13,13 @@ package = { features = { dnn = { defines = { "HAVE_OPENCV_DNN" }, - sources = { - "*/3rdparty/mlas/lib/*.cpp", - "*/3rdparty/mlas/lib/x86_64/*.S", - "*/3rdparty/protobuf/src/google/protobuf/*.cc", - "*/3rdparty/protobuf/src/google/protobuf/io/*.cc", - "*/3rdparty/protobuf/src/google/protobuf/stubs/*.cc", - "*/modules/dnn/misc/caffe/opencv-caffe.pb.cc", - "*/modules/dnn/misc/onnx/opencv-onnx.pb.cc", - "*/modules/dnn/misc/tensorflow/*.cc", - "*/modules/dnn/src/*.cpp", - "*/modules/dnn/src/caffe/caffe_io.cpp", - "*/modules/dnn/src/int8layers/*.cpp", - "*/modules/dnn/src/layers/*.cpp", - "*/modules/dnn/src/layers/cpu_kernels/*.cpp", - "*/modules/dnn/src/onnx/*.cpp", - "*/modules/dnn/src/tensorflow/*.cpp", - "*/modules/dnn/src/tflite/tflite_importer.cpp", - "*/modules/dnn/src/tokenizer/*.cpp", - "*/modules/dnn/src/vkcom/shader/*.cpp", - "*/modules/dnn/src/vkcom/src/*.cpp", - "*/modules/dnn/src/vkcom/vulkan/*.cpp", - "mcpp_generated/modules/dnn/int8layers/{conv2_int8_kernels.avx2,layers_common.avx2,layers_common.avx512_skx}.cpp", - "mcpp_generated/modules/dnn/layers/{layers_common.avx,layers_common.avx2,layers_common.avx512_skx}.cpp", - [[ -mcpp_generated/modules/dnn/layers/cpu_kernels/{activation_kernels.avx,activation_kernels.avx2,conv2_depthwise.avx,conv2_depthwise.avx2,conv2_kernels.avx,conv2_kernels.avx2,conv_block.avx,conv_block.avx2,conv_depthwise.avx,conv_depthwise.avx2,conv_winograd_f63.avx,conv_winograd_f63.avx2,fast_gemm_kernels.avx,fast_gemm_kernels.avx2,gridsample_kernels.avx,gridsample_kernels.avx2,nary_eltwise_kernels.avx,nary_eltwise_kernels.avx2,reduce2_kernels.avx,reduce2_kernels.avx2,transpose_kernels.avx,transpose_kernels.avx2}.cpp]], - "mcpp_generated/mlas_hgemm_stub.cpp", + flags = { + { + cxxflags = { "-include", "unistd.h" }, + glob = "*/3rdparty/mlas/lib/platform.cpp", + }, }, + sources = { "mcpp_generated/mlas_hgemm_stub.cpp" }, }, unifont = { defines = { "HAVE_UNIFONT" }, @@ -51,6 +31,146 @@ mcpp_generated/modules/dnn/layers/cpu_kernels/{activation_kernels.avx,activation cflags = { "-msse3", "-w" }, cxxflags = { "-msse3", "-w" }, deps = { ["compat.ffmpeg"] = "8.1.2" }, + features = { + dnn = { + flags = { + { + defines = { + "ENABLE_PLUGINS", + "HAVE_FLATBUFFERS=1", + "HAVE_MLAS=1", + "HAVE_PROTOBUF=1", + "NDEBUG", + "_USE_MATH_DEFINES", + "__OPENCV_BUILD=1", + "__STDC_CONSTANT_MACROS", + "__STDC_FORMAT_MACROS", + "__STDC_LIMIT_MACROS", + }, + glob = "**/modules/dnn/**", + }, + { + defines = { + "BUILD_MLAS_NO_ONNXRUNTIME=1", + "MLAS_GEMM_ONLY=1", + "MLAS_OPENCV_THREADING=1", + "NDEBUG", + "_GNU_SOURCE=1", + "_USE_MATH_DEFINES", + "__STDC_CONSTANT_MACROS", + "__STDC_FORMAT_MACROS", + "__STDC_LIMIT_MACROS", + }, + glob = "**/3rdparty/mlas/**", + }, + { + defines = { + "BUILD_MLAS_NO_ONNXRUNTIME=1", + "MLAS_GEMM_ONLY=1", + "MLAS_OPENCV_THREADING=1", + "NDEBUG", + "_USE_MATH_DEFINES", + "__STDC_CONSTANT_MACROS", + "__STDC_FORMAT_MACROS", + "__STDC_LIMIT_MACROS", + }, + glob = "**/tu/mlasgemm/**", + }, + { + defines = { "HAVE_PTHREAD=1", "NDEBUG" }, + glob = "**/3rdparty/protobuf/**", + }, + { + cxxflags = { "-mssse3", "-msse4.1", "-mpopcnt", "-msse4.2", "-mavx" }, + defines = { + "CV_CPU_COMPILE_AVX=1", + "CV_CPU_COMPILE_POPCNT=1", + "CV_CPU_COMPILE_SSE4_1=1", + "CV_CPU_COMPILE_SSE4_2=1", + "CV_CPU_COMPILE_SSSE3=1", + "CV_CPU_DISPATCH_MODE=AVX", + }, + glob = "**/modules/dnn/**/*.avx.cpp", + }, + { + cxxflags = { "-mssse3", "-msse4.1", "-mpopcnt", "-msse4.2", "-mavx", "-mf16c", "-mavx2", "-mfma" }, + defines = { + "CV_CPU_COMPILE_AVX2=1", + "CV_CPU_COMPILE_AVX=1", + "CV_CPU_COMPILE_FMA3=1", + "CV_CPU_COMPILE_FP16=1", + "CV_CPU_COMPILE_POPCNT=1", + "CV_CPU_COMPILE_SSE4_1=1", + "CV_CPU_COMPILE_SSE4_2=1", + "CV_CPU_COMPILE_SSSE3=1", + "CV_CPU_DISPATCH_MODE=AVX2", + }, + glob = "**/modules/dnn/**/*.avx2.cpp", + }, + { + cxxflags = { + "-mssse3", + "-msse4.1", + "-mpopcnt", + "-msse4.2", + "-mavx", + "-mf16c", + "-mavx2", + "-mfma", + "-mavx512f", + "-mavx512f", + "-mavx512cd", + "-mavx512f", + "-mavx512cd", + "-mavx512vl", + "-mavx512bw", + "-mavx512dq", + }, + defines = { + "CV_CPU_COMPILE_AVX2=1", + "CV_CPU_COMPILE_AVX512_COMMON=1", + "CV_CPU_COMPILE_AVX512_SKX=1", + "CV_CPU_COMPILE_AVX=1", + "CV_CPU_COMPILE_AVX_512F=1", + "CV_CPU_COMPILE_FMA3=1", + "CV_CPU_COMPILE_FP16=1", + "CV_CPU_COMPILE_POPCNT=1", + "CV_CPU_COMPILE_SSE4_1=1", + "CV_CPU_COMPILE_SSE4_2=1", + "CV_CPU_COMPILE_SSSE3=1", + "CV_CPU_DISPATCH_MODE=AVX512_SKX", + }, + glob = "**/modules/dnn/**/*.avx512_skx.cpp", + }, + }, + sources = { + "*/3rdparty/mlas/lib/*.cpp", + "*/3rdparty/mlas/lib/x86_64/*.S", + "*/3rdparty/protobuf/src/google/protobuf/*.cc", + "*/3rdparty/protobuf/src/google/protobuf/io/*.cc", + "*/3rdparty/protobuf/src/google/protobuf/stubs/*.cc", + "*/modules/dnn/misc/caffe/opencv-caffe.pb.cc", + "*/modules/dnn/misc/onnx/opencv-onnx.pb.cc", + "*/modules/dnn/misc/tensorflow/*.cc", + "*/modules/dnn/src/*.cpp", + "*/modules/dnn/src/caffe/caffe_io.cpp", + "*/modules/dnn/src/int8layers/*.cpp", + "*/modules/dnn/src/layers/*.cpp", + "*/modules/dnn/src/layers/cpu_kernels/*.cpp", + "*/modules/dnn/src/onnx/*.cpp", + "*/modules/dnn/src/tensorflow/*.cpp", + "*/modules/dnn/src/tflite/tflite_importer.cpp", + "*/modules/dnn/src/tokenizer/*.cpp", + "*/modules/dnn/src/vkcom/shader/*.cpp", + "*/modules/dnn/src/vkcom/src/*.cpp", + "*/modules/dnn/src/vkcom/vulkan/*.cpp", + "mcpp_generated/modules/dnn/int8layers/{conv2_int8_kernels.avx2,layers_common.avx2,layers_common.avx512_skx}.cpp", + "mcpp_generated/modules/dnn/layers/{layers_common.avx,layers_common.avx2,layers_common.avx512_skx}.cpp", + [[ +mcpp_generated/modules/dnn/layers/cpu_kernels/{activation_kernels.avx,activation_kernels.avx2,conv2_depthwise.avx,conv2_depthwise.avx2,conv2_kernels.avx,conv2_kernels.avx2,conv_block.avx,conv_block.avx2,conv_depthwise.avx,conv_depthwise.avx2,conv_winograd_f63.avx,conv_winograd_f63.avx2,fast_gemm_kernels.avx,fast_gemm_kernels.avx2,gridsample_kernels.avx,gridsample_kernels.avx2,nary_eltwise_kernels.avx,nary_eltwise_kernels.avx2,reduce2_kernels.avx,reduce2_kernels.avx2,transpose_kernels.avx,transpose_kernels.avx2}.cpp]], + }, + }, + }, flags = { { defines = { @@ -66,21 +186,6 @@ mcpp_generated/modules/dnn/layers/cpu_kernels/{activation_kernels.avx,activation }, glob = "**/modules/core/**", }, - { - defines = { - "ENABLE_PLUGINS", - "HAVE_FLATBUFFERS=1", - "HAVE_MLAS=1", - "HAVE_PROTOBUF=1", - "NDEBUG", - "_USE_MATH_DEFINES", - "__OPENCV_BUILD=1", - "__STDC_CONSTANT_MACROS", - "__STDC_FORMAT_MACROS", - "__STDC_LIMIT_MACROS", - }, - glob = "**/modules/dnn/**", - }, { defines = { "NDEBUG", @@ -157,41 +262,10 @@ mcpp_generated/modules/dnn/layers/cpu_kernels/{activation_kernels.avx,activation defines = { "BITS_IN_JSAMPLE=16", "NDEBUG", "NO_GETENV", "NO_PUTENV" }, glob = "**/tu/jpeg16/**", }, - { - defines = { - "BUILD_MLAS_NO_ONNXRUNTIME=1", - "MLAS_GEMM_ONLY=1", - "MLAS_OPENCV_THREADING=1", - "NDEBUG", - "_GNU_SOURCE=1", - "_USE_MATH_DEFINES", - "__STDC_CONSTANT_MACROS", - "__STDC_FORMAT_MACROS", - "__STDC_LIMIT_MACROS", - }, - glob = "**/3rdparty/mlas/**", - }, - { - defines = { - "BUILD_MLAS_NO_ONNXRUNTIME=1", - "MLAS_GEMM_ONLY=1", - "MLAS_OPENCV_THREADING=1", - "NDEBUG", - "_USE_MATH_DEFINES", - "__STDC_CONSTANT_MACROS", - "__STDC_FORMAT_MACROS", - "__STDC_LIMIT_MACROS", - }, - glob = "**/tu/mlasgemm/**", - }, { defines = { "HAVE_STDARG_H=1", "HAVE_UNISTD_H=1", "NDEBUG", "PNG_INTEL_SSE_OPT=1" }, glob = "**/3rdparty/libpng/**", }, - { - defines = { "HAVE_PTHREAD=1", "NDEBUG" }, - glob = "**/3rdparty/protobuf/**", - }, { defines = { "ENABLE_PLUGINS", @@ -293,68 +367,6 @@ mcpp_generated/modules/dnn/layers/cpu_kernels/{activation_kernels.avx,activation }, glob = "**/modules/core/**/*.sse4_2.cpp", }, - { - cxxflags = { "-mssse3", "-msse4.1", "-mpopcnt", "-msse4.2", "-mavx" }, - defines = { - "CV_CPU_COMPILE_AVX=1", - "CV_CPU_COMPILE_POPCNT=1", - "CV_CPU_COMPILE_SSE4_1=1", - "CV_CPU_COMPILE_SSE4_2=1", - "CV_CPU_COMPILE_SSSE3=1", - "CV_CPU_DISPATCH_MODE=AVX", - }, - glob = "**/modules/dnn/**/*.avx.cpp", - }, - { - cxxflags = { "-mssse3", "-msse4.1", "-mpopcnt", "-msse4.2", "-mavx", "-mf16c", "-mavx2", "-mfma" }, - defines = { - "CV_CPU_COMPILE_AVX2=1", - "CV_CPU_COMPILE_AVX=1", - "CV_CPU_COMPILE_FMA3=1", - "CV_CPU_COMPILE_FP16=1", - "CV_CPU_COMPILE_POPCNT=1", - "CV_CPU_COMPILE_SSE4_1=1", - "CV_CPU_COMPILE_SSE4_2=1", - "CV_CPU_COMPILE_SSSE3=1", - "CV_CPU_DISPATCH_MODE=AVX2", - }, - glob = "**/modules/dnn/**/*.avx2.cpp", - }, - { - cxxflags = { - "-mssse3", - "-msse4.1", - "-mpopcnt", - "-msse4.2", - "-mavx", - "-mf16c", - "-mavx2", - "-mfma", - "-mavx512f", - "-mavx512f", - "-mavx512cd", - "-mavx512f", - "-mavx512cd", - "-mavx512vl", - "-mavx512bw", - "-mavx512dq", - }, - defines = { - "CV_CPU_COMPILE_AVX2=1", - "CV_CPU_COMPILE_AVX512_COMMON=1", - "CV_CPU_COMPILE_AVX512_SKX=1", - "CV_CPU_COMPILE_AVX=1", - "CV_CPU_COMPILE_AVX_512F=1", - "CV_CPU_COMPILE_FMA3=1", - "CV_CPU_COMPILE_FP16=1", - "CV_CPU_COMPILE_POPCNT=1", - "CV_CPU_COMPILE_SSE4_1=1", - "CV_CPU_COMPILE_SSE4_2=1", - "CV_CPU_COMPILE_SSSE3=1", - "CV_CPU_DISPATCH_MODE=AVX512_SKX", - }, - glob = "**/modules/dnn/**/*.avx512_skx.cpp", - }, { cxxflags = { "-mssse3", "-msse4.1", "-mpopcnt", "-msse4.2", "-mavx" }, defines = { @@ -472,10 +484,6 @@ mcpp_generated/modules/dnn/layers/cpu_kernels/{activation_kernels.avx,activation defines = { "HAVE_GETAUXVAL=1" }, glob = "*/modules/core/src/system.cpp", }, - { - cxxflags = { "-include", "unistd.h" }, - glob = "*/3rdparty/mlas/lib/platform.cpp", - }, }, generated_files = { ["build.mcpp"] = [[ @@ -3808,6 +3816,135 @@ mcpp_generated/modules/imgproc/{accum.avx,accum.avx2,accum.sse4_1,bilateral_filt cflags = { "-w" }, cxxflags = { "-w" }, deps = { ["compat.ffmpeg"] = "8.1.2" }, + features = { + dnn = { + flags = { + { + defines = { + "ENABLE_PLUGINS", + "HAVE_MLAS=1", + "HAVE_PROTOBUF=1", + "NDEBUG", + "_USE_MATH_DEFINES", + "__OPENCV_BUILD=1", + "__STDC_CONSTANT_MACROS", + "__STDC_FORMAT_MACROS", + "__STDC_LIMIT_MACROS", + }, + glob = "**/modules/dnn/**", + }, + { + defines = { + "BUILD_MLAS_NO_ONNXRUNTIME=1", + "MLAS_GEMM_ONLY=1", + "MLAS_OPENCV_THREADING=1", + "NDEBUG", + "_GNU_SOURCE=1", + "_USE_MATH_DEFINES", + "__STDC_CONSTANT_MACROS", + "__STDC_FORMAT_MACROS", + "__STDC_LIMIT_MACROS", + }, + glob = "**/3rdparty/mlas/**", + }, + { + defines = { + "BUILD_MLAS_NO_ONNXRUNTIME=1", + "MLAS_GEMM_ONLY=1", + "MLAS_OPENCV_THREADING=1", + "NDEBUG", + "_USE_MATH_DEFINES", + "__STDC_CONSTANT_MACROS", + "__STDC_FORMAT_MACROS", + "__STDC_LIMIT_MACROS", + }, + glob = "**/tu/mlasgemm/**", + }, + { + defines = { "HAVE_PTHREAD=1", "NDEBUG" }, + glob = "**/3rdparty/protobuf/**", + }, + { + defines = { "CV_CPU_DISPATCH_MODE=NEON" }, + glob = "mcpp_generated/modules/dnn/int8layers/layers_common.neon.cpp", + }, + { + defines = { "CV_CPU_DISPATCH_MODE=NEON" }, + glob = "mcpp_generated/modules/dnn/layers/cpu_kernels/activation_kernels.neon.cpp", + }, + { + defines = { "CV_CPU_DISPATCH_MODE=NEON" }, + glob = "mcpp_generated/modules/dnn/layers/cpu_kernels/conv2_depthwise.neon.cpp", + }, + { + defines = { "CV_CPU_DISPATCH_MODE=NEON" }, + glob = "mcpp_generated/modules/dnn/layers/cpu_kernels/conv2_kernels.neon.cpp", + }, + { + defines = { "CV_CPU_DISPATCH_MODE=NEON" }, + glob = "mcpp_generated/modules/dnn/layers/cpu_kernels/conv_block.neon.cpp", + }, + { + defines = { "CV_CPU_DISPATCH_MODE=NEON_FP16" }, + glob = "mcpp_generated/modules/dnn/layers/cpu_kernels/conv_block.neon_fp16.cpp", + }, + { + defines = { "CV_CPU_DISPATCH_MODE=NEON" }, + glob = "mcpp_generated/modules/dnn/layers/cpu_kernels/conv_winograd_f63.neon.cpp", + }, + { + defines = { "CV_CPU_DISPATCH_MODE=NEON" }, + glob = "mcpp_generated/modules/dnn/layers/cpu_kernels/fast_gemm_kernels.neon.cpp", + }, + { + defines = { "CV_CPU_DISPATCH_MODE=NEON" }, + glob = "mcpp_generated/modules/dnn/layers/cpu_kernels/gridsample_kernels.neon.cpp", + }, + { + defines = { "CV_CPU_DISPATCH_MODE=NEON" }, + glob = "mcpp_generated/modules/dnn/layers/cpu_kernels/nary_eltwise_kernels.neon.cpp", + }, + { + defines = { "CV_CPU_DISPATCH_MODE=NEON" }, + glob = "mcpp_generated/modules/dnn/layers/cpu_kernels/reduce2_kernels.neon.cpp", + }, + { + defines = { "CV_CPU_DISPATCH_MODE=NEON" }, + glob = "mcpp_generated/modules/dnn/layers/cpu_kernels/transpose_kernels.neon.cpp", + }, + { + defines = { "CV_CPU_DISPATCH_MODE=NEON" }, + glob = "mcpp_generated/modules/dnn/layers/layers_common.neon.cpp", + }, + }, + sources = { + "*/3rdparty/mlas/lib/*.cpp", + "*/3rdparty/mlas/lib/aarch64/*.S", + "*/3rdparty/protobuf/src/google/protobuf/*.cc", + "*/3rdparty/protobuf/src/google/protobuf/io/*.cc", + "*/3rdparty/protobuf/src/google/protobuf/stubs/*.cc", + "*/modules/dnn/misc/caffe/opencv-caffe.pb.cc", + "*/modules/dnn/misc/onnx/opencv-onnx.pb.cc", + "*/modules/dnn/misc/tensorflow/*.cc", + "*/modules/dnn/src/*.cpp", + "*/modules/dnn/src/caffe/caffe_io.cpp", + "*/modules/dnn/src/int8layers/*.cpp", + "*/modules/dnn/src/layers/*.cpp", + "*/modules/dnn/src/layers/cpu_kernels/*.cpp", + "*/modules/dnn/src/onnx/*.cpp", + "*/modules/dnn/src/tensorflow/*.cpp", + "*/modules/dnn/src/tflite/tflite_importer.cpp", + "*/modules/dnn/src/tokenizer/*.cpp", + "*/modules/dnn/src/vkcom/shader/*.cpp", + "*/modules/dnn/src/vkcom/src/*.cpp", + "*/modules/dnn/src/vkcom/vulkan/*.cpp", + "mcpp_generated/modules/dnn/int8layers/layers_common.neon.cpp", + "mcpp_generated/modules/dnn/layers/layers_common.neon.cpp", + [[ +mcpp_generated/modules/dnn/layers/cpu_kernels/{activation_kernels.neon,conv2_depthwise.neon,conv2_kernels.neon,conv_block.neon,conv_block.neon_fp16,conv_winograd_f63.neon,fast_gemm_kernels.neon,gridsample_kernels.neon,nary_eltwise_kernels.neon,reduce2_kernels.neon,transpose_kernels.neon}.cpp]], + }, + }, + }, flags = { { defines = { @@ -3901,7 +4038,6 @@ mcpp_generated/modules/imgproc/{accum.avx,accum.avx2,accum.sse4_1,bilateral_filt defines = { "BITS_IN_JSAMPLE=16", "NDEBUG", "NEON_INTRINSICS", "NO_GETENV", "NO_PUTENV" }, glob = "**/tu/jpeg16/**", }, - { glob = "**/3rdparty/mlas/**" }, { defines = { "HAVE_STDARG_H=1", "HAVE_UNISTD_H=1", "NDEBUG", "PNG_ARM_NEON_OPT=2" }, glob = "**/3rdparty/libpng/**", @@ -3924,16 +4060,6 @@ mcpp_generated/modules/imgproc/{accum.avx,accum.avx2,accum.sse4_1,bilateral_filt defines = { "HAVE_STDARG_H=1", "HAVE_UNISTD_H=1", "NDEBUG" }, glob = "**/3rdparty/zlib/**", }, - { - cxxflags = {}, - defines = { "CV_CPU_DISPATCH_MODE=NEON" }, - glob = "**/modules/core/**/*.neon.cpp", - }, - { - cxxflags = {}, - defines = { "CV_CPU_DISPATCH_MODE=NEON" }, - glob = "**/modules/imgproc/**/*.neon.cpp", - }, { defines = { "HAVE_STDARG_H=1", @@ -3981,8 +4107,12 @@ mcpp_generated/modules/imgproc/{accum.avx,accum.avx2,accum.sse4_1,bilateral_filt glob = "*/modules/core/src/parallel/parallel.cpp", }, { - cxxflags = { "-include", "unistd.h" }, - glob = "*/3rdparty/mlas/lib/platform.cpp", + defines = { "CV_CPU_DISPATCH_MODE=NEON" }, + glob = "mcpp_generated/modules/core/transpose.neon.cpp", + }, + { + defines = { "CV_CPU_DISPATCH_MODE=NEON" }, + glob = "mcpp_generated/modules/imgproc/warp_kernels.neon.cpp", }, }, generated_files = { @@ -5906,10 +6036,10 @@ bool MLASCALL MlasHGemmSupported(CBLAS_TRANSPOSE, CBLAS_TRANSPOSE) { return fals ["mcpp_generated/modules/core/version_string.inc"] = [[ "\n" "General configuration for OpenCV 5.0.0 =====================================\n" -" Version control: 1daf3e8\n" +" Version control: 1b4f1e2\n" "\n" " Platform:\n" -" Timestamp: 2026-07-19T19:02:52Z\n" +" Timestamp: 2026-07-20T12:12:35Z\n" " Host: Darwin 24.6.0 arm64\n" " CMake: 4.4.0\n" " CMake generator: Ninja\n" @@ -5938,12 +6068,12 @@ bool MLASCALL MlasHGemmSupported(CBLAS_TRANSPOSE, CBLAS_TRANSPOSE) { return fals " ccache: NO\n" " Precompiled headers: NO\n" " Extra dependencies: -framework AppKit\n" -" 3rdparty dependencies: libjpeg-turbo libpng zlib\n" +" 3rdparty dependencies: libprotobuf libjpeg-turbo libpng zlib\n" "\n" " OpenCV modules:\n" -" To be built: core flann geometry highgui imgcodecs imgproc videoio\n" +" To be built: core dnn flann geometry highgui imgcodecs imgproc videoio\n" " Disabled: python3 world\n" -" Disabled by dependency: calib dnn features java_bindings_generator js_bindings_generator objc_bindings_generator objdetect photo ptcloud python_bindings_generator python_tests stereo stitching video\n" +" Disabled by dependency: calib features java_bindings_generator js_bindings_generator objc_bindings_generator objdetect photo ptcloud python_bindings_generator python_tests stereo stitching video\n" " Unavailable: java ts\n" " Applications: -\n" " Documentation: NO\n" @@ -5981,7 +6111,10 @@ bool MLASCALL MlasHGemmSupported(CBLAS_TRANSPOSE, CBLAS_TRANSPOSE) { return fals " Trace: YES (built-in)\n" "\n" " Other third-party libraries:\n" +" DNN MLAS: YES (SGEMM-only, vendored)\n" +" ASM kernels: YES (ARM64: NEON SGEMM, NEON SGEMV)\n" " Custom HAL: NO\n" +" Protobuf: build (3.19.1)\n" "\n" " ONNX Runtime: NO\n" "\n" @@ -5991,126 +6124,662 @@ bool MLASCALL MlasHGemmSupported(CBLAS_TRANSPOSE, CBLAS_TRANSPOSE) { return fals "-----------------------------------------------------------------\n" "\n" ]], - ["mcpp_generated/modules/highgui/opencv_highgui_config.hpp"] = [[ -// Auto-generated file -#define OPENCV_HIGHGUI_BUILTIN_BACKEND_STR "NONE" - -#define OPENCV_HIGHGUI_WITHOUT_BUILTIN_BACKEND 1 -]], - ["mcpp_generated/modules/imgproc/accum.avx.cpp"] = [[ + ["mcpp_generated/modules/dnn/int8layers/conv2_int8_kernels.avx2.cpp"] = [[ -#include "modules/imgproc/src/precomp.hpp" -#include "modules/imgproc/src/accum.simd.hpp" +#include "modules/dnn/src/precomp.hpp" +#include "modules/dnn/src/int8layers/conv2_int8_kernels.simd.hpp" ]], - ["mcpp_generated/modules/imgproc/accum.avx2.cpp"] = [[ + ["mcpp_generated/modules/dnn/int8layers/conv2_int8_kernels.simd_declarations.hpp"] = [[ +#define CV_CPU_SIMD_FILENAME "modules/dnn/src/int8layers/conv2_int8_kernels.simd.hpp" +#define CV_CPU_DISPATCH_MODE AVX2 +#include "opencv2/core/private/cv_cpu_include_simd_declarations.hpp" -#include "modules/imgproc/src/precomp.hpp" -#include "modules/imgproc/src/accum.simd.hpp" -]], - ["mcpp_generated/modules/imgproc/accum.simd_declarations.hpp"] = [[ -#define CV_CPU_SIMD_FILENAME "modules/imgproc/src/accum.simd.hpp" -#define CV_CPU_DISPATCH_MODES_ALL BASELINE +#define CV_CPU_DISPATCH_MODES_ALL AVX2, BASELINE #undef CV_CPU_SIMD_FILENAME ]], - ["mcpp_generated/modules/imgproc/accum.sse4_1.cpp"] = [[ + ["mcpp_generated/modules/dnn/int8layers/layers_common.avx2.cpp"] = [[ -#include "modules/imgproc/src/precomp.hpp" -#include "modules/imgproc/src/accum.simd.hpp" +#include "modules/dnn/src/precomp.hpp" +#include "modules/dnn/src/int8layers/layers_common.simd.hpp" ]], - ["mcpp_generated/modules/imgproc/bilateral_filter.avx2.cpp"] = [[ + ["mcpp_generated/modules/dnn/int8layers/layers_common.avx512_skx.cpp"] = [[ -#include "modules/imgproc/src/precomp.hpp" -#include "modules/imgproc/src/bilateral_filter.simd.hpp" +#include "modules/dnn/src/precomp.hpp" +#include "modules/dnn/src/int8layers/layers_common.simd.hpp" ]], - ["mcpp_generated/modules/imgproc/bilateral_filter.avx512_icl.cpp"] = [[ + ["mcpp_generated/modules/dnn/int8layers/layers_common.lasx.cpp"] = [[ -#include "modules/imgproc/src/precomp.hpp" -#include "modules/imgproc/src/bilateral_filter.simd.hpp" +#include "modules/dnn/src/precomp.hpp" +#include "modules/dnn/src/int8layers/layers_common.simd.hpp" ]], - ["mcpp_generated/modules/imgproc/bilateral_filter.avx512_skx.cpp"] = [[ + ["mcpp_generated/modules/dnn/int8layers/layers_common.neon.cpp"] = [[ -#include "modules/imgproc/src/precomp.hpp" -#include "modules/imgproc/src/bilateral_filter.simd.hpp" +#include "modules/dnn/src/precomp.hpp" +#include "modules/dnn/src/int8layers/layers_common.simd.hpp" ]], - ["mcpp_generated/modules/imgproc/bilateral_filter.simd_declarations.hpp"] = [[ -#define CV_CPU_SIMD_FILENAME "modules/imgproc/src/bilateral_filter.simd.hpp" -#define CV_CPU_DISPATCH_MODES_ALL BASELINE + ["mcpp_generated/modules/dnn/int8layers/layers_common.rvv.cpp"] = [[ -#undef CV_CPU_SIMD_FILENAME +#include "modules/dnn/src/precomp.hpp" +#include "modules/dnn/src/int8layers/layers_common.simd.hpp" ]], - ["mcpp_generated/modules/imgproc/bilateral_filter.sse2.cpp"] = [[ + ["mcpp_generated/modules/dnn/int8layers/layers_common.simd_declarations.hpp"] = [[ +#define CV_CPU_SIMD_FILENAME "modules/dnn/src/int8layers/layers_common.simd.hpp" +#define CV_CPU_DISPATCH_MODE AVX2 +#include "opencv2/core/private/cv_cpu_include_simd_declarations.hpp" -#include "modules/imgproc/src/precomp.hpp" -#include "modules/imgproc/src/bilateral_filter.simd.hpp" -]], - ["mcpp_generated/modules/imgproc/box_filter.avx2.cpp"] = [[ +#define CV_CPU_DISPATCH_MODE AVX512_SKX +#include "opencv2/core/private/cv_cpu_include_simd_declarations.hpp" -#include "modules/imgproc/src/precomp.hpp" -#include "modules/imgproc/src/box_filter.simd.hpp" -]], - ["mcpp_generated/modules/imgproc/box_filter.avx512_skx.cpp"] = [[ +#define CV_CPU_DISPATCH_MODE RVV +#include "opencv2/core/private/cv_cpu_include_simd_declarations.hpp" -#include "modules/imgproc/src/precomp.hpp" -#include "modules/imgproc/src/box_filter.simd.hpp" -]], - ["mcpp_generated/modules/imgproc/box_filter.simd_declarations.hpp"] = [[ -#define CV_CPU_SIMD_FILENAME "modules/imgproc/src/box_filter.simd.hpp" -#define CV_CPU_DISPATCH_MODES_ALL BASELINE +#define CV_CPU_DISPATCH_MODE LASX +#include "opencv2/core/private/cv_cpu_include_simd_declarations.hpp" -#undef CV_CPU_SIMD_FILENAME -]], - ["mcpp_generated/modules/imgproc/box_filter.sse2.cpp"] = [[ +#define CV_CPU_DISPATCH_MODE NEON +#include "opencv2/core/private/cv_cpu_include_simd_declarations.hpp" -#include "modules/imgproc/src/precomp.hpp" -#include "modules/imgproc/src/box_filter.simd.hpp" -]], - ["mcpp_generated/modules/imgproc/box_filter.sse4_1.cpp"] = [[ +#define CV_CPU_DISPATCH_MODES_ALL NEON, LASX, RVV, AVX512_SKX, AVX2, BASELINE -#include "modules/imgproc/src/precomp.hpp" -#include "modules/imgproc/src/box_filter.simd.hpp" +#undef CV_CPU_SIMD_FILENAME ]], - ["mcpp_generated/modules/imgproc/color_hsv.avx2.cpp"] = [[ + ["mcpp_generated/modules/dnn/layers/cpu_kernels/activation_kernels.avx.cpp"] = [[ -#include "modules/imgproc/src/precomp.hpp" -#include "modules/imgproc/src/color_hsv.simd.hpp" +#include "modules/dnn/src/precomp.hpp" +#include "modules/dnn/src/layers/cpu_kernels/activation_kernels.simd.hpp" ]], - ["mcpp_generated/modules/imgproc/color_hsv.simd_declarations.hpp"] = [[ -#define CV_CPU_SIMD_FILENAME "modules/imgproc/src/color_hsv.simd.hpp" -#define CV_CPU_DISPATCH_MODES_ALL BASELINE + ["mcpp_generated/modules/dnn/layers/cpu_kernels/activation_kernels.avx2.cpp"] = [[ -#undef CV_CPU_SIMD_FILENAME +#include "modules/dnn/src/precomp.hpp" +#include "modules/dnn/src/layers/cpu_kernels/activation_kernels.simd.hpp" ]], - ["mcpp_generated/modules/imgproc/color_hsv.sse2.cpp"] = [[ + ["mcpp_generated/modules/dnn/layers/cpu_kernels/activation_kernels.neon.cpp"] = [[ -#include "modules/imgproc/src/precomp.hpp" -#include "modules/imgproc/src/color_hsv.simd.hpp" +#include "modules/dnn/src/precomp.hpp" +#include "modules/dnn/src/layers/cpu_kernels/activation_kernels.simd.hpp" ]], - ["mcpp_generated/modules/imgproc/color_hsv.sse4_1.cpp"] = [[ + ["mcpp_generated/modules/dnn/layers/cpu_kernels/activation_kernels.neon_fp16.cpp"] = [[ -#include "modules/imgproc/src/precomp.hpp" -#include "modules/imgproc/src/color_hsv.simd.hpp" +#include "modules/dnn/src/precomp.hpp" +#include "modules/dnn/src/layers/cpu_kernels/activation_kernels.simd.hpp" ]], - ["mcpp_generated/modules/imgproc/color_rgb.avx2.cpp"] = [[ + ["mcpp_generated/modules/dnn/layers/cpu_kernels/activation_kernels.simd_declarations.hpp"] = [[ +#define CV_CPU_SIMD_FILENAME "modules/dnn/src/layers/cpu_kernels/activation_kernels.simd.hpp" +#define CV_CPU_DISPATCH_MODE NEON +#include "opencv2/core/private/cv_cpu_include_simd_declarations.hpp" -#include "modules/imgproc/src/precomp.hpp" -#include "modules/imgproc/src/color_rgb.simd.hpp" -]], - ["mcpp_generated/modules/imgproc/color_rgb.simd_declarations.hpp"] = [[ -#define CV_CPU_SIMD_FILENAME "modules/imgproc/src/color_rgb.simd.hpp" -#define CV_CPU_DISPATCH_MODES_ALL BASELINE +#define CV_CPU_DISPATCH_MODES_ALL NEON, BASELINE #undef CV_CPU_SIMD_FILENAME ]], - ["mcpp_generated/modules/imgproc/color_rgb.sse2.cpp"] = [[ + ["mcpp_generated/modules/dnn/layers/cpu_kernels/conv2_depthwise.avx.cpp"] = [[ -#include "modules/imgproc/src/precomp.hpp" -#include "modules/imgproc/src/color_rgb.simd.hpp" +#include "modules/dnn/src/precomp.hpp" +#include "modules/dnn/src/layers/cpu_kernels/conv2_depthwise.simd.hpp" ]], - ["mcpp_generated/modules/imgproc/color_rgb.sse4_1.cpp"] = [[ + ["mcpp_generated/modules/dnn/layers/cpu_kernels/conv2_depthwise.avx2.cpp"] = [[ -#include "modules/imgproc/src/precomp.hpp" -#include "modules/imgproc/src/color_rgb.simd.hpp" +#include "modules/dnn/src/precomp.hpp" +#include "modules/dnn/src/layers/cpu_kernels/conv2_depthwise.simd.hpp" +]], + ["mcpp_generated/modules/dnn/layers/cpu_kernels/conv2_depthwise.neon.cpp"] = [[ + +#include "modules/dnn/src/precomp.hpp" +#include "modules/dnn/src/layers/cpu_kernels/conv2_depthwise.simd.hpp" +]], + ["mcpp_generated/modules/dnn/layers/cpu_kernels/conv2_depthwise.neon_fp16.cpp"] = [[ + +#include "modules/dnn/src/precomp.hpp" +#include "modules/dnn/src/layers/cpu_kernels/conv2_depthwise.simd.hpp" +]], + ["mcpp_generated/modules/dnn/layers/cpu_kernels/conv2_depthwise.simd_declarations.hpp"] = [[ +#define CV_CPU_SIMD_FILENAME "modules/dnn/src/layers/cpu_kernels/conv2_depthwise.simd.hpp" +#define CV_CPU_DISPATCH_MODE NEON +#include "opencv2/core/private/cv_cpu_include_simd_declarations.hpp" + +#define CV_CPU_DISPATCH_MODES_ALL NEON, BASELINE + +#undef CV_CPU_SIMD_FILENAME +]], + ["mcpp_generated/modules/dnn/layers/cpu_kernels/conv2_kernels.avx.cpp"] = [[ + +#include "modules/dnn/src/precomp.hpp" +#include "modules/dnn/src/layers/cpu_kernels/conv2_kernels.simd.hpp" +]], + ["mcpp_generated/modules/dnn/layers/cpu_kernels/conv2_kernels.avx2.cpp"] = [[ + +#include "modules/dnn/src/precomp.hpp" +#include "modules/dnn/src/layers/cpu_kernels/conv2_kernels.simd.hpp" +]], + ["mcpp_generated/modules/dnn/layers/cpu_kernels/conv2_kernels.neon.cpp"] = [[ + +#include "modules/dnn/src/precomp.hpp" +#include "modules/dnn/src/layers/cpu_kernels/conv2_kernels.simd.hpp" +]], + ["mcpp_generated/modules/dnn/layers/cpu_kernels/conv2_kernels.neon_fp16.cpp"] = [[ + +#include "modules/dnn/src/precomp.hpp" +#include "modules/dnn/src/layers/cpu_kernels/conv2_kernels.simd.hpp" +]], + ["mcpp_generated/modules/dnn/layers/cpu_kernels/conv2_kernels.simd_declarations.hpp"] = [[ +#define CV_CPU_SIMD_FILENAME "modules/dnn/src/layers/cpu_kernels/conv2_kernels.simd.hpp" +#define CV_CPU_DISPATCH_MODE NEON +#include "opencv2/core/private/cv_cpu_include_simd_declarations.hpp" + +#define CV_CPU_DISPATCH_MODES_ALL NEON, BASELINE + +#undef CV_CPU_SIMD_FILENAME +]], + ["mcpp_generated/modules/dnn/layers/cpu_kernels/conv_block.avx.cpp"] = [[ + +#include "modules/dnn/src/precomp.hpp" +#include "modules/dnn/src/layers/cpu_kernels/conv_block.simd.hpp" +]], + ["mcpp_generated/modules/dnn/layers/cpu_kernels/conv_block.avx2.cpp"] = [[ + +#include "modules/dnn/src/precomp.hpp" +#include "modules/dnn/src/layers/cpu_kernels/conv_block.simd.hpp" +]], + ["mcpp_generated/modules/dnn/layers/cpu_kernels/conv_block.neon.cpp"] = [[ + +#include "modules/dnn/src/precomp.hpp" +#include "modules/dnn/src/layers/cpu_kernels/conv_block.simd.hpp" +]], + ["mcpp_generated/modules/dnn/layers/cpu_kernels/conv_block.neon_fp16.cpp"] = [[ + +#include "modules/dnn/src/precomp.hpp" +#include "modules/dnn/src/layers/cpu_kernels/conv_block.simd.hpp" +]], + ["mcpp_generated/modules/dnn/layers/cpu_kernels/conv_block.simd_declarations.hpp"] = [[ +#define CV_CPU_SIMD_FILENAME "modules/dnn/src/layers/cpu_kernels/conv_block.simd.hpp" +#define CV_CPU_DISPATCH_MODE AVX +#include "opencv2/core/private/cv_cpu_include_simd_declarations.hpp" + +#define CV_CPU_DISPATCH_MODE AVX2 +#include "opencv2/core/private/cv_cpu_include_simd_declarations.hpp" + +#define CV_CPU_DISPATCH_MODE NEON +#include "opencv2/core/private/cv_cpu_include_simd_declarations.hpp" + +#define CV_CPU_DISPATCH_MODE NEON_FP16 +#include "opencv2/core/private/cv_cpu_include_simd_declarations.hpp" + +#define CV_CPU_DISPATCH_MODES_ALL NEON_FP16, NEON, AVX2, AVX, BASELINE + +#undef CV_CPU_SIMD_FILENAME +]], + ["mcpp_generated/modules/dnn/layers/cpu_kernels/conv_depthwise.avx.cpp"] = [[ + +#include "modules/dnn/src/precomp.hpp" +#include "modules/dnn/src/layers/cpu_kernels/conv_depthwise.simd.hpp" +]], + ["mcpp_generated/modules/dnn/layers/cpu_kernels/conv_depthwise.avx2.cpp"] = [[ + +#include "modules/dnn/src/precomp.hpp" +#include "modules/dnn/src/layers/cpu_kernels/conv_depthwise.simd.hpp" +]], + ["mcpp_generated/modules/dnn/layers/cpu_kernels/conv_depthwise.lasx.cpp"] = [[ + +#include "modules/dnn/src/precomp.hpp" +#include "modules/dnn/src/layers/cpu_kernels/conv_depthwise.simd.hpp" +]], + ["mcpp_generated/modules/dnn/layers/cpu_kernels/conv_depthwise.rvv.cpp"] = [[ + +#include "modules/dnn/src/precomp.hpp" +#include "modules/dnn/src/layers/cpu_kernels/conv_depthwise.simd.hpp" +]], + ["mcpp_generated/modules/dnn/layers/cpu_kernels/conv_depthwise.simd_declarations.hpp"] = [[ +#define CV_CPU_SIMD_FILENAME "modules/dnn/src/layers/cpu_kernels/conv_depthwise.simd.hpp" +#define CV_CPU_DISPATCH_MODE AVX +#include "opencv2/core/private/cv_cpu_include_simd_declarations.hpp" + +#define CV_CPU_DISPATCH_MODE AVX2 +#include "opencv2/core/private/cv_cpu_include_simd_declarations.hpp" + +#define CV_CPU_DISPATCH_MODE RVV +#include "opencv2/core/private/cv_cpu_include_simd_declarations.hpp" + +#define CV_CPU_DISPATCH_MODE LASX +#include "opencv2/core/private/cv_cpu_include_simd_declarations.hpp" + +#define CV_CPU_DISPATCH_MODES_ALL LASX, RVV, AVX2, AVX, BASELINE + +#undef CV_CPU_SIMD_FILENAME +]], + ["mcpp_generated/modules/dnn/layers/cpu_kernels/conv_winograd_f63.avx.cpp"] = [[ + +#include "modules/dnn/src/precomp.hpp" +#include "modules/dnn/src/layers/cpu_kernels/conv_winograd_f63.simd.hpp" +]], + ["mcpp_generated/modules/dnn/layers/cpu_kernels/conv_winograd_f63.avx2.cpp"] = [[ + +#include "modules/dnn/src/precomp.hpp" +#include "modules/dnn/src/layers/cpu_kernels/conv_winograd_f63.simd.hpp" +]], + ["mcpp_generated/modules/dnn/layers/cpu_kernels/conv_winograd_f63.neon.cpp"] = [[ + +#include "modules/dnn/src/precomp.hpp" +#include "modules/dnn/src/layers/cpu_kernels/conv_winograd_f63.simd.hpp" +]], + ["mcpp_generated/modules/dnn/layers/cpu_kernels/conv_winograd_f63.neon_fp16.cpp"] = [[ + +#include "modules/dnn/src/precomp.hpp" +#include "modules/dnn/src/layers/cpu_kernels/conv_winograd_f63.simd.hpp" +]], + ["mcpp_generated/modules/dnn/layers/cpu_kernels/conv_winograd_f63.simd_declarations.hpp"] = [[ +#define CV_CPU_SIMD_FILENAME "modules/dnn/src/layers/cpu_kernels/conv_winograd_f63.simd.hpp" +#define CV_CPU_DISPATCH_MODE NEON +#include "opencv2/core/private/cv_cpu_include_simd_declarations.hpp" + +#define CV_CPU_DISPATCH_MODES_ALL NEON, BASELINE + +#undef CV_CPU_SIMD_FILENAME +]], + ["mcpp_generated/modules/dnn/layers/cpu_kernels/fast_gemm_kernels.avx.cpp"] = [[ + +#include "modules/dnn/src/precomp.hpp" +#include "modules/dnn/src/layers/cpu_kernels/fast_gemm_kernels.simd.hpp" +]], + ["mcpp_generated/modules/dnn/layers/cpu_kernels/fast_gemm_kernels.avx2.cpp"] = [[ + +#include "modules/dnn/src/precomp.hpp" +#include "modules/dnn/src/layers/cpu_kernels/fast_gemm_kernels.simd.hpp" +]], + ["mcpp_generated/modules/dnn/layers/cpu_kernels/fast_gemm_kernels.lasx.cpp"] = [[ + +#include "modules/dnn/src/precomp.hpp" +#include "modules/dnn/src/layers/cpu_kernels/fast_gemm_kernels.simd.hpp" +]], + ["mcpp_generated/modules/dnn/layers/cpu_kernels/fast_gemm_kernels.neon.cpp"] = [[ + +#include "modules/dnn/src/precomp.hpp" +#include "modules/dnn/src/layers/cpu_kernels/fast_gemm_kernels.simd.hpp" +]], + ["mcpp_generated/modules/dnn/layers/cpu_kernels/fast_gemm_kernels.simd_declarations.hpp"] = [[ +#define CV_CPU_SIMD_FILENAME "modules/dnn/src/layers/cpu_kernels/fast_gemm_kernels.simd.hpp" +#define CV_CPU_DISPATCH_MODE AVX +#include "opencv2/core/private/cv_cpu_include_simd_declarations.hpp" + +#define CV_CPU_DISPATCH_MODE AVX2 +#include "opencv2/core/private/cv_cpu_include_simd_declarations.hpp" + +#define CV_CPU_DISPATCH_MODE NEON +#include "opencv2/core/private/cv_cpu_include_simd_declarations.hpp" + +#define CV_CPU_DISPATCH_MODE LASX +#include "opencv2/core/private/cv_cpu_include_simd_declarations.hpp" + +#define CV_CPU_DISPATCH_MODES_ALL LASX, NEON, AVX2, AVX, BASELINE + +#undef CV_CPU_SIMD_FILENAME +]], + ["mcpp_generated/modules/dnn/layers/cpu_kernels/gridsample_kernels.avx.cpp"] = [[ + +#include "modules/dnn/src/precomp.hpp" +#include "modules/dnn/src/layers/cpu_kernels/gridsample_kernels.simd.hpp" +]], + ["mcpp_generated/modules/dnn/layers/cpu_kernels/gridsample_kernels.avx2.cpp"] = [[ + +#include "modules/dnn/src/precomp.hpp" +#include "modules/dnn/src/layers/cpu_kernels/gridsample_kernels.simd.hpp" +]], + ["mcpp_generated/modules/dnn/layers/cpu_kernels/gridsample_kernels.lasx.cpp"] = [[ + +#include "modules/dnn/src/precomp.hpp" +#include "modules/dnn/src/layers/cpu_kernels/gridsample_kernels.simd.hpp" +]], + ["mcpp_generated/modules/dnn/layers/cpu_kernels/gridsample_kernels.neon.cpp"] = [[ + +#include "modules/dnn/src/precomp.hpp" +#include "modules/dnn/src/layers/cpu_kernels/gridsample_kernels.simd.hpp" +]], + ["mcpp_generated/modules/dnn/layers/cpu_kernels/gridsample_kernels.rvv.cpp"] = [[ + +#include "modules/dnn/src/precomp.hpp" +#include "modules/dnn/src/layers/cpu_kernels/gridsample_kernels.simd.hpp" +]], + ["mcpp_generated/modules/dnn/layers/cpu_kernels/gridsample_kernels.simd_declarations.hpp"] = [[ +#define CV_CPU_SIMD_FILENAME "modules/dnn/src/layers/cpu_kernels/gridsample_kernels.simd.hpp" +#define CV_CPU_DISPATCH_MODE AVX +#include "opencv2/core/private/cv_cpu_include_simd_declarations.hpp" + +#define CV_CPU_DISPATCH_MODE AVX2 +#include "opencv2/core/private/cv_cpu_include_simd_declarations.hpp" + +#define CV_CPU_DISPATCH_MODE NEON +#include "opencv2/core/private/cv_cpu_include_simd_declarations.hpp" + +#define CV_CPU_DISPATCH_MODE RVV +#include "opencv2/core/private/cv_cpu_include_simd_declarations.hpp" + +#define CV_CPU_DISPATCH_MODE LASX +#include "opencv2/core/private/cv_cpu_include_simd_declarations.hpp" + +#define CV_CPU_DISPATCH_MODES_ALL LASX, RVV, NEON, AVX2, AVX, BASELINE + +#undef CV_CPU_SIMD_FILENAME +]], + ["mcpp_generated/modules/dnn/layers/cpu_kernels/nary_eltwise_kernels.avx.cpp"] = [[ + +#include "modules/dnn/src/precomp.hpp" +#include "modules/dnn/src/layers/cpu_kernels/nary_eltwise_kernels.simd.hpp" +]], + ["mcpp_generated/modules/dnn/layers/cpu_kernels/nary_eltwise_kernels.avx2.cpp"] = [[ + +#include "modules/dnn/src/precomp.hpp" +#include "modules/dnn/src/layers/cpu_kernels/nary_eltwise_kernels.simd.hpp" +]], + ["mcpp_generated/modules/dnn/layers/cpu_kernels/nary_eltwise_kernels.lasx.cpp"] = [[ + +#include "modules/dnn/src/precomp.hpp" +#include "modules/dnn/src/layers/cpu_kernels/nary_eltwise_kernels.simd.hpp" +]], + ["mcpp_generated/modules/dnn/layers/cpu_kernels/nary_eltwise_kernels.neon.cpp"] = [[ + +#include "modules/dnn/src/precomp.hpp" +#include "modules/dnn/src/layers/cpu_kernels/nary_eltwise_kernels.simd.hpp" +]], + ["mcpp_generated/modules/dnn/layers/cpu_kernels/nary_eltwise_kernels.rvv.cpp"] = [[ + +#include "modules/dnn/src/precomp.hpp" +#include "modules/dnn/src/layers/cpu_kernels/nary_eltwise_kernels.simd.hpp" +]], + ["mcpp_generated/modules/dnn/layers/cpu_kernels/nary_eltwise_kernels.simd_declarations.hpp"] = [[ +#define CV_CPU_SIMD_FILENAME "modules/dnn/src/layers/cpu_kernels/nary_eltwise_kernels.simd.hpp" +#define CV_CPU_DISPATCH_MODE AVX +#include "opencv2/core/private/cv_cpu_include_simd_declarations.hpp" + +#define CV_CPU_DISPATCH_MODE AVX2 +#include "opencv2/core/private/cv_cpu_include_simd_declarations.hpp" + +#define CV_CPU_DISPATCH_MODE NEON +#include "opencv2/core/private/cv_cpu_include_simd_declarations.hpp" + +#define CV_CPU_DISPATCH_MODE RVV +#include "opencv2/core/private/cv_cpu_include_simd_declarations.hpp" + +#define CV_CPU_DISPATCH_MODE LASX +#include "opencv2/core/private/cv_cpu_include_simd_declarations.hpp" + +#define CV_CPU_DISPATCH_MODES_ALL LASX, RVV, NEON, AVX2, AVX, BASELINE + +#undef CV_CPU_SIMD_FILENAME +]], + ["mcpp_generated/modules/dnn/layers/cpu_kernels/reduce2_kernels.avx.cpp"] = [[ + +#include "modules/dnn/src/precomp.hpp" +#include "modules/dnn/src/layers/cpu_kernels/reduce2_kernels.simd.hpp" +]], + ["mcpp_generated/modules/dnn/layers/cpu_kernels/reduce2_kernels.avx2.cpp"] = [[ + +#include "modules/dnn/src/precomp.hpp" +#include "modules/dnn/src/layers/cpu_kernels/reduce2_kernels.simd.hpp" +]], + ["mcpp_generated/modules/dnn/layers/cpu_kernels/reduce2_kernels.lasx.cpp"] = [[ + +#include "modules/dnn/src/precomp.hpp" +#include "modules/dnn/src/layers/cpu_kernels/reduce2_kernels.simd.hpp" +]], + ["mcpp_generated/modules/dnn/layers/cpu_kernels/reduce2_kernels.neon.cpp"] = [[ + +#include "modules/dnn/src/precomp.hpp" +#include "modules/dnn/src/layers/cpu_kernels/reduce2_kernels.simd.hpp" +]], + ["mcpp_generated/modules/dnn/layers/cpu_kernels/reduce2_kernels.rvv.cpp"] = [[ + +#include "modules/dnn/src/precomp.hpp" +#include "modules/dnn/src/layers/cpu_kernels/reduce2_kernels.simd.hpp" +]], + ["mcpp_generated/modules/dnn/layers/cpu_kernels/reduce2_kernels.simd_declarations.hpp"] = [[ +#define CV_CPU_SIMD_FILENAME "modules/dnn/src/layers/cpu_kernels/reduce2_kernels.simd.hpp" +#define CV_CPU_DISPATCH_MODE AVX +#include "opencv2/core/private/cv_cpu_include_simd_declarations.hpp" + +#define CV_CPU_DISPATCH_MODE AVX2 +#include "opencv2/core/private/cv_cpu_include_simd_declarations.hpp" + +#define CV_CPU_DISPATCH_MODE NEON +#include "opencv2/core/private/cv_cpu_include_simd_declarations.hpp" + +#define CV_CPU_DISPATCH_MODE RVV +#include "opencv2/core/private/cv_cpu_include_simd_declarations.hpp" + +#define CV_CPU_DISPATCH_MODE LASX +#include "opencv2/core/private/cv_cpu_include_simd_declarations.hpp" + +#define CV_CPU_DISPATCH_MODES_ALL LASX, RVV, NEON, AVX2, AVX, BASELINE + +#undef CV_CPU_SIMD_FILENAME +]], + ["mcpp_generated/modules/dnn/layers/cpu_kernels/transpose_kernels.avx.cpp"] = [[ + +#include "modules/dnn/src/precomp.hpp" +#include "modules/dnn/src/layers/cpu_kernels/transpose_kernels.simd.hpp" +]], + ["mcpp_generated/modules/dnn/layers/cpu_kernels/transpose_kernels.avx2.cpp"] = [[ + +#include "modules/dnn/src/precomp.hpp" +#include "modules/dnn/src/layers/cpu_kernels/transpose_kernels.simd.hpp" +]], + ["mcpp_generated/modules/dnn/layers/cpu_kernels/transpose_kernels.lasx.cpp"] = [[ + +#include "modules/dnn/src/precomp.hpp" +#include "modules/dnn/src/layers/cpu_kernels/transpose_kernels.simd.hpp" +]], + ["mcpp_generated/modules/dnn/layers/cpu_kernels/transpose_kernels.neon.cpp"] = [[ + +#include "modules/dnn/src/precomp.hpp" +#include "modules/dnn/src/layers/cpu_kernels/transpose_kernels.simd.hpp" +]], + ["mcpp_generated/modules/dnn/layers/cpu_kernels/transpose_kernels.rvv.cpp"] = [[ + +#include "modules/dnn/src/precomp.hpp" +#include "modules/dnn/src/layers/cpu_kernels/transpose_kernels.simd.hpp" +]], + ["mcpp_generated/modules/dnn/layers/cpu_kernels/transpose_kernels.simd_declarations.hpp"] = [[ +#define CV_CPU_SIMD_FILENAME "modules/dnn/src/layers/cpu_kernels/transpose_kernels.simd.hpp" +#define CV_CPU_DISPATCH_MODE AVX +#include "opencv2/core/private/cv_cpu_include_simd_declarations.hpp" + +#define CV_CPU_DISPATCH_MODE AVX2 +#include "opencv2/core/private/cv_cpu_include_simd_declarations.hpp" + +#define CV_CPU_DISPATCH_MODE NEON +#include "opencv2/core/private/cv_cpu_include_simd_declarations.hpp" + +#define CV_CPU_DISPATCH_MODE RVV +#include "opencv2/core/private/cv_cpu_include_simd_declarations.hpp" + +#define CV_CPU_DISPATCH_MODE LASX +#include "opencv2/core/private/cv_cpu_include_simd_declarations.hpp" + +#define CV_CPU_DISPATCH_MODES_ALL LASX, RVV, NEON, AVX2, AVX, BASELINE + +#undef CV_CPU_SIMD_FILENAME +]], + ["mcpp_generated/modules/dnn/layers/layers_common.avx.cpp"] = [[ + +#include "modules/dnn/src/precomp.hpp" +#include "modules/dnn/src/layers/layers_common.simd.hpp" +]], + ["mcpp_generated/modules/dnn/layers/layers_common.avx2.cpp"] = [[ + +#include "modules/dnn/src/precomp.hpp" +#include "modules/dnn/src/layers/layers_common.simd.hpp" +]], + ["mcpp_generated/modules/dnn/layers/layers_common.avx512_skx.cpp"] = [[ + +#include "modules/dnn/src/precomp.hpp" +#include "modules/dnn/src/layers/layers_common.simd.hpp" +]], + ["mcpp_generated/modules/dnn/layers/layers_common.lasx.cpp"] = [[ + +#include "modules/dnn/src/precomp.hpp" +#include "modules/dnn/src/layers/layers_common.simd.hpp" +]], + ["mcpp_generated/modules/dnn/layers/layers_common.neon.cpp"] = [[ + +#include "modules/dnn/src/precomp.hpp" +#include "modules/dnn/src/layers/layers_common.simd.hpp" +]], + ["mcpp_generated/modules/dnn/layers/layers_common.rvv.cpp"] = [[ + +#include "modules/dnn/src/precomp.hpp" +#include "modules/dnn/src/layers/layers_common.simd.hpp" +]], + ["mcpp_generated/modules/dnn/layers/layers_common.simd_declarations.hpp"] = [[ +#define CV_CPU_SIMD_FILENAME "modules/dnn/src/layers/layers_common.simd.hpp" +#define CV_CPU_DISPATCH_MODE AVX +#include "opencv2/core/private/cv_cpu_include_simd_declarations.hpp" + +#define CV_CPU_DISPATCH_MODE AVX2 +#include "opencv2/core/private/cv_cpu_include_simd_declarations.hpp" + +#define CV_CPU_DISPATCH_MODE AVX512_SKX +#include "opencv2/core/private/cv_cpu_include_simd_declarations.hpp" + +#define CV_CPU_DISPATCH_MODE RVV +#include "opencv2/core/private/cv_cpu_include_simd_declarations.hpp" + +#define CV_CPU_DISPATCH_MODE LASX +#include "opencv2/core/private/cv_cpu_include_simd_declarations.hpp" + +#define CV_CPU_DISPATCH_MODE NEON +#include "opencv2/core/private/cv_cpu_include_simd_declarations.hpp" + +#define CV_CPU_DISPATCH_MODE SVE +#include "opencv2/core/private/cv_cpu_include_simd_declarations.hpp" + +#define CV_CPU_DISPATCH_MODES_ALL SVE, NEON, LASX, RVV, AVX512_SKX, AVX2, AVX, BASELINE + +#undef CV_CPU_SIMD_FILENAME +]], + ["mcpp_generated/modules/dnn/layers/layers_common.sve.cpp"] = [[ + +#include "modules/dnn/src/precomp.hpp" +#include "modules/dnn/src/layers/layers_common.simd.hpp" +]], + ["mcpp_generated/modules/highgui/opencv_highgui_config.hpp"] = [[ +// Auto-generated file +#define OPENCV_HIGHGUI_BUILTIN_BACKEND_STR "NONE" + +#define OPENCV_HIGHGUI_WITHOUT_BUILTIN_BACKEND 1 +]], + ["mcpp_generated/modules/imgproc/accum.avx.cpp"] = [[ + +#include "modules/imgproc/src/precomp.hpp" +#include "modules/imgproc/src/accum.simd.hpp" +]], + ["mcpp_generated/modules/imgproc/accum.avx2.cpp"] = [[ + +#include "modules/imgproc/src/precomp.hpp" +#include "modules/imgproc/src/accum.simd.hpp" +]], + ["mcpp_generated/modules/imgproc/accum.simd_declarations.hpp"] = [[ +#define CV_CPU_SIMD_FILENAME "modules/imgproc/src/accum.simd.hpp" +#define CV_CPU_DISPATCH_MODES_ALL BASELINE + +#undef CV_CPU_SIMD_FILENAME +]], + ["mcpp_generated/modules/imgproc/accum.sse4_1.cpp"] = [[ + +#include "modules/imgproc/src/precomp.hpp" +#include "modules/imgproc/src/accum.simd.hpp" +]], + ["mcpp_generated/modules/imgproc/bilateral_filter.avx2.cpp"] = [[ + +#include "modules/imgproc/src/precomp.hpp" +#include "modules/imgproc/src/bilateral_filter.simd.hpp" +]], + ["mcpp_generated/modules/imgproc/bilateral_filter.avx512_icl.cpp"] = [[ + +#include "modules/imgproc/src/precomp.hpp" +#include "modules/imgproc/src/bilateral_filter.simd.hpp" +]], + ["mcpp_generated/modules/imgproc/bilateral_filter.avx512_skx.cpp"] = [[ + +#include "modules/imgproc/src/precomp.hpp" +#include "modules/imgproc/src/bilateral_filter.simd.hpp" +]], + ["mcpp_generated/modules/imgproc/bilateral_filter.simd_declarations.hpp"] = [[ +#define CV_CPU_SIMD_FILENAME "modules/imgproc/src/bilateral_filter.simd.hpp" +#define CV_CPU_DISPATCH_MODES_ALL BASELINE + +#undef CV_CPU_SIMD_FILENAME +]], + ["mcpp_generated/modules/imgproc/bilateral_filter.sse2.cpp"] = [[ + +#include "modules/imgproc/src/precomp.hpp" +#include "modules/imgproc/src/bilateral_filter.simd.hpp" +]], + ["mcpp_generated/modules/imgproc/box_filter.avx2.cpp"] = [[ + +#include "modules/imgproc/src/precomp.hpp" +#include "modules/imgproc/src/box_filter.simd.hpp" +]], + ["mcpp_generated/modules/imgproc/box_filter.avx512_skx.cpp"] = [[ + +#include "modules/imgproc/src/precomp.hpp" +#include "modules/imgproc/src/box_filter.simd.hpp" +]], + ["mcpp_generated/modules/imgproc/box_filter.simd_declarations.hpp"] = [[ +#define CV_CPU_SIMD_FILENAME "modules/imgproc/src/box_filter.simd.hpp" +#define CV_CPU_DISPATCH_MODES_ALL BASELINE + +#undef CV_CPU_SIMD_FILENAME +]], + ["mcpp_generated/modules/imgproc/box_filter.sse2.cpp"] = [[ + +#include "modules/imgproc/src/precomp.hpp" +#include "modules/imgproc/src/box_filter.simd.hpp" +]], + ["mcpp_generated/modules/imgproc/box_filter.sse4_1.cpp"] = [[ + +#include "modules/imgproc/src/precomp.hpp" +#include "modules/imgproc/src/box_filter.simd.hpp" +]], + ["mcpp_generated/modules/imgproc/color_hsv.avx2.cpp"] = [[ + +#include "modules/imgproc/src/precomp.hpp" +#include "modules/imgproc/src/color_hsv.simd.hpp" +]], + ["mcpp_generated/modules/imgproc/color_hsv.simd_declarations.hpp"] = [[ +#define CV_CPU_SIMD_FILENAME "modules/imgproc/src/color_hsv.simd.hpp" +#define CV_CPU_DISPATCH_MODES_ALL BASELINE + +#undef CV_CPU_SIMD_FILENAME +]], + ["mcpp_generated/modules/imgproc/color_hsv.sse2.cpp"] = [[ + +#include "modules/imgproc/src/precomp.hpp" +#include "modules/imgproc/src/color_hsv.simd.hpp" +]], + ["mcpp_generated/modules/imgproc/color_hsv.sse4_1.cpp"] = [[ + +#include "modules/imgproc/src/precomp.hpp" +#include "modules/imgproc/src/color_hsv.simd.hpp" +]], + ["mcpp_generated/modules/imgproc/color_rgb.avx2.cpp"] = [[ + +#include "modules/imgproc/src/precomp.hpp" +#include "modules/imgproc/src/color_rgb.simd.hpp" +]], + ["mcpp_generated/modules/imgproc/color_rgb.simd_declarations.hpp"] = [[ +#define CV_CPU_SIMD_FILENAME "modules/imgproc/src/color_rgb.simd.hpp" +#define CV_CPU_DISPATCH_MODES_ALL BASELINE + +#undef CV_CPU_SIMD_FILENAME +]], + ["mcpp_generated/modules/imgproc/color_rgb.sse2.cpp"] = [[ + +#include "modules/imgproc/src/precomp.hpp" +#include "modules/imgproc/src/color_rgb.simd.hpp" +]], + ["mcpp_generated/modules/imgproc/color_rgb.sse4_1.cpp"] = [[ + +#include "modules/imgproc/src/precomp.hpp" +#include "modules/imgproc/src/color_rgb.simd.hpp" ]], ["mcpp_generated/modules/imgproc/color_yuv.avx2.cpp"] = [[ @@ -6478,6 +7147,7 @@ bool MLASCALL MlasHGemmSupported(CBLAS_TRANSPOSE, CBLAS_TRANSPOSE) { return fals /* #undef OPENCV_ENABLE_NONFREE */ #define HAVE_OPENCV_CORE +#define HAVE_OPENCV_DNN #define HAVE_OPENCV_FLANN #define HAVE_OPENCV_GEOMETRY #define HAVE_OPENCV_HIGHGUI @@ -6544,6 +7214,7 @@ jpeg16 3rdparty/libjpeg-turbo/src/jdmainct.c jpeg16 3rdparty/libjpeg-turbo/src/jdpostct.c jpeg16 3rdparty/libjpeg-turbo/src/jdsample.c jpeg16 3rdparty/libjpeg-turbo/src/jutils.c +?dnn mlasgemm modules/dnn/src/layers/cpu_kernels/mlas_threading.cpp ]], }, include_dirs = { @@ -6563,6 +7234,14 @@ jpeg16 3rdparty/libjpeg-turbo/src/jutils.c "mcpp_generated/modules/geometry", "*/modules/imgproc/include", "mcpp_generated/modules/imgproc", + "*/3rdparty/mlas/inc", + "*/3rdparty/mlas/lib", + "*/modules/dnn/include", + "mcpp_generated/modules/dnn", + "*/modules/dnn/misc/caffe", + "*/modules/dnn/misc/tensorflow", + "*/modules/dnn/misc/onnx", + "*/3rdparty/protobuf/src", "*/3rdparty/libpng", "*/modules/imgcodecs/include", "mcpp_generated/modules/imgcodecs", @@ -6605,6 +7284,14 @@ jpeg16 3rdparty/libjpeg-turbo/src/jutils.c windows = { cflags = { "-msse3", "-w" }, cxxflags = { "-msse3", "-w" }, + deps = { ["compat.ffmpeg"] = "8.1.2" }, + features = { + dnn = { + flags = { + { glob = "**/3rdparty/mlas/**" }, + }, + }, + }, flags = { { defines = { @@ -6770,7 +7457,6 @@ jpeg16 3rdparty/libjpeg-turbo/src/jutils.c }, glob = "**/tu/jpeg16/**", }, - { glob = "**/3rdparty/mlas/**" }, { defines = { "HAVE_STDARG_H=1", @@ -6786,6 +7472,26 @@ jpeg16 3rdparty/libjpeg-turbo/src/jutils.c }, glob = "**/3rdparty/libpng/**", }, + { + defines = { + "ENABLE_PLUGINS", + "HAVE_FFMPEG", + "NDEBUG", + "WIN32", + "_CRT_NONSTDC_NO_DEPRECATE", + "_CRT_SECURE_NO_DEPRECATE", + "_SCL_SECURE_NO_WARNINGS", + "_USE_MATH_DEFINES", + "_VARIADIC_MAX=10", + "_WIN32_WINNT=0x0601", + "_WINDOWS", + "__OPENCV_BUILD=1", + "__STDC_CONSTANT_MACROS", + "__STDC_FORMAT_MACROS", + "__STDC_LIMIT_MACROS", + }, + glob = "**/modules/videoio/**", + }, { defines = { "HAVE_STDARG_H=1", @@ -7012,8 +7718,8 @@ jpeg16 3rdparty/libjpeg-turbo/src/jutils.c glob = "*/modules/core/src/parallel/parallel.cpp", }, { - cxxflags = { "-include", "unistd.h" }, - glob = "*/3rdparty/mlas/lib/platform.cpp", + defines = { "DEBUG_POSTFIX=d" }, + glob = "*/modules/videoio/src/backend_plugin.cpp", }, }, generated_files = { @@ -8971,10 +9677,10 @@ bool MLASCALL MlasHGemmSupported(CBLAS_TRANSPOSE, CBLAS_TRANSPOSE) { return fals ["mcpp_generated/modules/core/version_string.inc"] = [[ "\n" "General configuration for OpenCV 5.0.0 =====================================\n" -" Version control: 68a3f62\n" +" Version control: f5b8842\n" "\n" " Platform:\n" -" Timestamp: 2026-07-19T20:36:17Z\n" +" Timestamp: 2026-07-20T12:04:49Z\n" " Host: Windows 10.0.26100 AMD64\n" " CMake: 4.4.0\n" " CMake generator: Ninja\n" @@ -9011,9 +9717,9 @@ bool MLASCALL MlasHGemmSupported(CBLAS_TRANSPOSE, CBLAS_TRANSPOSE) { return fals " 3rdparty dependencies: libjpeg-turbo libpng zlib\n" "\n" " OpenCV modules:\n" -" To be built: core flann geometry highgui imgcodecs imgproc\n" +" To be built: core flann geometry highgui imgcodecs imgproc videoio\n" " Disabled: world\n" -" Disabled by dependency: calib dnn features java_bindings_generator js_bindings_generator objc_bindings_generator objdetect photo ptcloud python_bindings_generator python_tests stereo stitching video videoio\n" +" Disabled by dependency: calib dnn features java_bindings_generator js_bindings_generator objc_bindings_generator objdetect photo ptcloud python_bindings_generator python_tests stereo stitching video\n" " Unavailable: java python3 ts\n" " Applications: -\n" " Documentation: NO\n" @@ -9039,6 +9745,11 @@ bool MLASCALL MlasHGemmSupported(CBLAS_TRANSPOSE, CBLAS_TRANSPOSE) { return fals " PFM: YES\n" "\n" " Video I/O:\n" +" FFMPEG: YES (find_package)\n" +" avcodec: YES (62.28.102)\n" +" avformat: YES (62.12.102)\n" +" avutil: YES (60.26.102)\n" +" swscale: YES (9.5.102)\n" " Orbbec: NO\n" "\n" " Parallel framework: Concurrency\n" @@ -9629,6 +10340,7 @@ bool MLASCALL MlasHGemmSupported(CBLAS_TRANSPOSE, CBLAS_TRANSPOSE) { return fals #define HAVE_OPENCV_HIGHGUI #define HAVE_OPENCV_IMGCODECS #define HAVE_OPENCV_IMGPROC +#define HAVE_OPENCV_VIDEOIO ]], @@ -9710,6 +10422,8 @@ jpeg16 3rdparty/libjpeg-turbo/src/jutils.c "*/3rdparty/libpng", "*/modules/imgcodecs/include", "mcpp_generated/modules/imgcodecs", + "*/modules/videoio/include", + "mcpp_generated/modules/videoio", "*/modules/highgui/include", "mcpp_generated/modules/highgui", }, @@ -9732,6 +10446,7 @@ jpeg16 3rdparty/libjpeg-turbo/src/jutils.c "*/modules/imgcodecs/src/*.cpp", [[ */modules/imgproc/src/{accum,accum.dispatch,bilateral_filter.dispatch,blend,box_filter.dispatch,canny,clahe,color,color_hsv.dispatch,color_lab,color_rgb.dispatch,color_yuv.dispatch,colormap,connectedcomponents,contours_approx,contours_common,contours_link,contours_new,contours_truco,corner,corner.avx,cornersubpix,demosaicing,deriv,distransform,drawing,drawing_text,emd_new,filter.dispatch,fisheye,floodfill,gabor,generalized_hough,grabcut,histogram,hough,imgwarp,imgwarp.avx2,imgwarp.sse4_1,lsd,main,median_blur.dispatch,morph.dispatch,phasecorr,phasecorr_iterative,pyramids,resize,resize.avx2,resize.sse4_1,samplers,segmentation,smooth.dispatch,spatialgradient,stackblur,stb_truetype,sumpixels.dispatch,tables,templmatch,thresh,undistort.dispatch,utils}.cpp]], + "*/modules/videoio/src/{backend_plugin,backend_static,cap,cap_ffmpeg,cap_images,cap_mjpeg_decoder,cap_mjpeg_encoder,container_avi,videoio_registry}.cpp", [[ mcpp_generated/modules/core/{arithm.avx2,arithm.sse4_1,convert.avx2,convert_scale.avx2,count_non_zero.avx2,has_non_zero.avx2,mathfuncs_core.avx,mathfuncs_core.avx2,matmul.avx2,matmul.avx512_skx,matmul.sse4_1,mean.avx2,merge.avx2,minmax.avx2,minmax.sse4_1,nan_mask.avx2,norm.avx,norm.avx2,norm.sse4_1,reduce.avx2,split.avx2,stat.avx2,stat.sse4_2,sum.avx2,transpose.avx,transpose.avx2}.cpp]], [[ From 551bd3d575d6f5b4e71d465cb8562d88b2ac20b2 Mon Sep 17 00:00:00 2001 From: sunrisepeak Date: Mon, 20 Jul 2026 20:27:56 +0800 Subject: [PATCH 6/6] compat.opencv: windows dnn too (videoio+dnn on all 3 platforms; clang-cl dnn+protobuf CI-clean) + widen dnn tests to windows --- pkgs/c/compat.opencv.lua | 4697 ++++++++++++++--- tests/examples/opencv-dnn/mcpp.toml | 6 + .../opencv-dnn/tests/opencv_dnn_feature.cpp | 2 +- tests/examples/opencv-module-dnn/mcpp.toml | 4 + .../tests/opencv_dnn_iface.cpp | 2 +- 5 files changed, 4058 insertions(+), 653 deletions(-) diff --git a/pkgs/c/compat.opencv.lua b/pkgs/c/compat.opencv.lua index 785b05b..ee7a039 100644 --- a/pkgs/c/compat.opencv.lua +++ b/pkgs/c/compat.opencv.lua @@ -19,7 +19,28 @@ package = { glob = "*/3rdparty/mlas/lib/platform.cpp", }, }, - sources = { "mcpp_generated/mlas_hgemm_stub.cpp" }, + sources = { + "*/3rdparty/mlas/lib/*.cpp", + "*/3rdparty/protobuf/src/google/protobuf/*.cc", + "*/3rdparty/protobuf/src/google/protobuf/io/*.cc", + "*/3rdparty/protobuf/src/google/protobuf/stubs/*.cc", + "*/modules/dnn/misc/caffe/opencv-caffe.pb.cc", + "*/modules/dnn/misc/onnx/opencv-onnx.pb.cc", + "*/modules/dnn/misc/tensorflow/*.cc", + "*/modules/dnn/src/*.cpp", + "*/modules/dnn/src/caffe/caffe_io.cpp", + "*/modules/dnn/src/int8layers/*.cpp", + "*/modules/dnn/src/layers/*.cpp", + "*/modules/dnn/src/layers/cpu_kernels/*.cpp", + "*/modules/dnn/src/onnx/*.cpp", + "*/modules/dnn/src/tensorflow/*.cpp", + "*/modules/dnn/src/tflite/tflite_importer.cpp", + "*/modules/dnn/src/tokenizer/*.cpp", + "*/modules/dnn/src/vkcom/shader/*.cpp", + "*/modules/dnn/src/vkcom/src/*.cpp", + "*/modules/dnn/src/vkcom/vulkan/*.cpp", + "mcpp_generated/mlas_hgemm_stub.cpp", + }, }, unifont = { defines = { "HAVE_UNIFONT" }, @@ -144,26 +165,7 @@ package = { }, }, sources = { - "*/3rdparty/mlas/lib/*.cpp", "*/3rdparty/mlas/lib/x86_64/*.S", - "*/3rdparty/protobuf/src/google/protobuf/*.cc", - "*/3rdparty/protobuf/src/google/protobuf/io/*.cc", - "*/3rdparty/protobuf/src/google/protobuf/stubs/*.cc", - "*/modules/dnn/misc/caffe/opencv-caffe.pb.cc", - "*/modules/dnn/misc/onnx/opencv-onnx.pb.cc", - "*/modules/dnn/misc/tensorflow/*.cc", - "*/modules/dnn/src/*.cpp", - "*/modules/dnn/src/caffe/caffe_io.cpp", - "*/modules/dnn/src/int8layers/*.cpp", - "*/modules/dnn/src/layers/*.cpp", - "*/modules/dnn/src/layers/cpu_kernels/*.cpp", - "*/modules/dnn/src/onnx/*.cpp", - "*/modules/dnn/src/tensorflow/*.cpp", - "*/modules/dnn/src/tflite/tflite_importer.cpp", - "*/modules/dnn/src/tokenizer/*.cpp", - "*/modules/dnn/src/vkcom/shader/*.cpp", - "*/modules/dnn/src/vkcom/src/*.cpp", - "*/modules/dnn/src/vkcom/vulkan/*.cpp", "mcpp_generated/modules/dnn/int8layers/{conv2_int8_kernels.avx2,layers_common.avx2,layers_common.avx512_skx}.cpp", "mcpp_generated/modules/dnn/layers/{layers_common.avx,layers_common.avx2,layers_common.avx512_skx}.cpp", [[ @@ -3918,26 +3920,7 @@ mcpp_generated/modules/imgproc/{accum.avx,accum.avx2,accum.sse4_1,bilateral_filt }, }, sources = { - "*/3rdparty/mlas/lib/*.cpp", "*/3rdparty/mlas/lib/aarch64/*.S", - "*/3rdparty/protobuf/src/google/protobuf/*.cc", - "*/3rdparty/protobuf/src/google/protobuf/io/*.cc", - "*/3rdparty/protobuf/src/google/protobuf/stubs/*.cc", - "*/modules/dnn/misc/caffe/opencv-caffe.pb.cc", - "*/modules/dnn/misc/onnx/opencv-onnx.pb.cc", - "*/modules/dnn/misc/tensorflow/*.cc", - "*/modules/dnn/src/*.cpp", - "*/modules/dnn/src/caffe/caffe_io.cpp", - "*/modules/dnn/src/int8layers/*.cpp", - "*/modules/dnn/src/layers/*.cpp", - "*/modules/dnn/src/layers/cpu_kernels/*.cpp", - "*/modules/dnn/src/onnx/*.cpp", - "*/modules/dnn/src/tensorflow/*.cpp", - "*/modules/dnn/src/tflite/tflite_importer.cpp", - "*/modules/dnn/src/tokenizer/*.cpp", - "*/modules/dnn/src/vkcom/shader/*.cpp", - "*/modules/dnn/src/vkcom/src/*.cpp", - "*/modules/dnn/src/vkcom/vulkan/*.cpp", "mcpp_generated/modules/dnn/int8layers/layers_common.neon.cpp", "mcpp_generated/modules/dnn/layers/layers_common.neon.cpp", [[ @@ -7288,7 +7271,196 @@ jpeg16 3rdparty/libjpeg-turbo/src/jutils.c features = { dnn = { flags = { - { glob = "**/3rdparty/mlas/**" }, + { + defines = { + "ENABLE_PLUGINS", + "HAVE_MLAS=1", + "HAVE_PROTOBUF=1", + "NDEBUG", + "WIN32", + "_CRT_NONSTDC_NO_DEPRECATE", + "_CRT_SECURE_NO_DEPRECATE", + "_CRT_SECURE_NO_WARNINGS=1", + "_SCL_SECURE_NO_WARNINGS", + "_USE_MATH_DEFINES", + "_VARIADIC_MAX=10", + "_WIN32_WINNT=0x0601", + "_WINDOWS", + "__OPENCV_BUILD=1", + "__STDC_CONSTANT_MACROS", + "__STDC_FORMAT_MACROS", + "__STDC_LIMIT_MACROS", + }, + glob = "**/modules/dnn/**", + }, + { + defines = { + "BUILD_MLAS_NO_ONNXRUNTIME=1", + "MLAS_GEMM_ONLY=1", + "MLAS_OPENCV_THREADING=1", + "_CRT_SECURE_NO_WARNINGS=1", + "_GNU_SOURCE=1", + "_USE_MATH_DEFINES", + "_VARIADIC_MAX=10", + "_WIN32_WINNT=0x0601", + "__STDC_CONSTANT_MACROS", + "__STDC_FORMAT_MACROS", + "__STDC_LIMIT_MACROS", + }, + glob = "**/3rdparty/mlas/**", + }, + { + defines = { + "BUILD_MLAS_NO_ONNXRUNTIME=1", + "MLAS_GEMM_ONLY=1", + "MLAS_OPENCV_THREADING=1", + "NDEBUG", + "WIN32", + "_CRT_NONSTDC_NO_DEPRECATE", + "_CRT_SECURE_NO_DEPRECATE", + "_CRT_SECURE_NO_WARNINGS=1", + "_SCL_SECURE_NO_WARNINGS", + "_USE_MATH_DEFINES", + "_VARIADIC_MAX=10", + "_WIN32_WINNT=0x0601", + "_WINDOWS", + "__STDC_CONSTANT_MACROS", + "__STDC_FORMAT_MACROS", + "__STDC_LIMIT_MACROS", + }, + glob = "**/tu/mlasgemm/**", + }, + { + defines = { + "NDEBUG", + "WIN32", + "_CRT_NONSTDC_NO_DEPRECATE", + "_CRT_SECURE_NO_DEPRECATE", + "_CRT_SECURE_NO_WARNINGS=1", + "_SCL_SECURE_NO_WARNINGS", + "_VARIADIC_MAX=10", + "_WIN32_WINNT=0x0601", + "_WINDOWS", + }, + glob = "**/3rdparty/protobuf/**", + }, + { + cxxflags = { "-mssse3", "-msse4.1", "-mpopcnt", "-msse4.2", "-mavx" }, + defines = { + "CV_CPU_COMPILE_AVX=1", + "CV_CPU_COMPILE_POPCNT=1", + "CV_CPU_COMPILE_SSE4_1=1", + "CV_CPU_COMPILE_SSE4_2=1", + "CV_CPU_COMPILE_SSSE3=1", + "CV_CPU_DISPATCH_MODE=AVX", + }, + glob = "**/modules/dnn/**/*.avx.cpp", + }, + { + cxxflags = { "-mssse3", "-msse4.1", "-mpopcnt", "-msse4.2", "-mavx", "-mf16c", "-mavx2", "-mfma" }, + defines = { + "CV_CPU_COMPILE_AVX2=1", + "CV_CPU_COMPILE_AVX=1", + "CV_CPU_COMPILE_FMA3=1", + "CV_CPU_COMPILE_FP16=1", + "CV_CPU_COMPILE_POPCNT=1", + "CV_CPU_COMPILE_SSE4_1=1", + "CV_CPU_COMPILE_SSE4_2=1", + "CV_CPU_COMPILE_SSSE3=1", + "CV_CPU_DISPATCH_MODE=AVX2", + }, + glob = "**/modules/dnn/**/*.avx2.cpp", + }, + { + cxxflags = { + "-mssse3", + "-msse4.1", + "-mpopcnt", + "-msse4.2", + "-mavx", + "-mf16c", + "-mavx2", + "-mfma", + "-mavx512f", + "-mavx512f", + "-mavx512cd", + "-mavx512f", + "-mavx512cd", + "-mavx512vl", + "-mavx512bw", + "-mavx512dq", + }, + defines = { + "CV_CPU_COMPILE_AVX2=1", + "CV_CPU_COMPILE_AVX512_COMMON=1", + "CV_CPU_COMPILE_AVX512_SKX=1", + "CV_CPU_COMPILE_AVX=1", + "CV_CPU_COMPILE_AVX_512F=1", + "CV_CPU_COMPILE_FMA3=1", + "CV_CPU_COMPILE_FP16=1", + "CV_CPU_COMPILE_POPCNT=1", + "CV_CPU_COMPILE_SSE4_1=1", + "CV_CPU_COMPILE_SSE4_2=1", + "CV_CPU_COMPILE_SSSE3=1", + "CV_CPU_DISPATCH_MODE=AVX512_SKX", + }, + glob = "**/modules/dnn/**/*.avx512_skx.cpp", + }, + { + defines = { + "NDEBUG", + "WIN32", + "_CRT_NONSTDC_NO_DEPRECATE", + "_CRT_SECURE_NO_DEPRECATE", + "_SCL_SECURE_NO_WARNINGS", + "_WINDOWS", + }, + glob = "*/3rdparty/mlas/lib/compute.cpp", + }, + { + defines = { + "NDEBUG", + "WIN32", + "_CRT_NONSTDC_NO_DEPRECATE", + "_CRT_SECURE_NO_DEPRECATE", + "_SCL_SECURE_NO_WARNINGS", + "_WINDOWS", + }, + glob = "*/3rdparty/mlas/lib/flashattn.cpp", + }, + { + defines = { + "NDEBUG", + "WIN32", + "_CRT_NONSTDC_NO_DEPRECATE", + "_CRT_SECURE_NO_DEPRECATE", + "_SCL_SECURE_NO_WARNINGS", + "_WINDOWS", + }, + glob = "*/3rdparty/mlas/lib/platform.cpp", + }, + { + defines = { + "NDEBUG", + "WIN32", + "_CRT_NONSTDC_NO_DEPRECATE", + "_CRT_SECURE_NO_DEPRECATE", + "_SCL_SECURE_NO_WARNINGS", + "_WINDOWS", + }, + glob = "*/3rdparty/mlas/lib/sgemm.cpp", + }, + { + defines = { "DEBUG_POSTFIX=d" }, + glob = "*/modules/dnn/src/backend.cpp", + }, + }, + sources = { + "*/3rdparty/mlas/lib/x86_64/*.S", + "mcpp_generated/modules/dnn/int8layers/{conv2_int8_kernels.avx2,layers_common.avx2,layers_common.avx512_skx}.cpp", + "mcpp_generated/modules/dnn/layers/{layers_common.avx,layers_common.avx2,layers_common.avx512_skx}.cpp", + [[ +mcpp_generated/modules/dnn/layers/cpu_kernels/{activation_kernels.avx,activation_kernels.avx2,conv2_depthwise.avx,conv2_depthwise.avx2,conv2_kernels.avx,conv2_kernels.avx2,conv_block.avx,conv_block.avx2,conv_depthwise.avx,conv_depthwise.avx2,conv_winograd_f63.avx,conv_winograd_f63.avx2,fast_gemm_kernels.avx,fast_gemm_kernels.avx2,gridsample_kernels.avx,gridsample_kernels.avx2,nary_eltwise_kernels.avx,nary_eltwise_kernels.avx2,reduce2_kernels.avx,reduce2_kernels.avx2,transpose_kernels.avx,transpose_kernels.avx2}.cpp]], }, }, }, @@ -8838,259 +9010,3607 @@ typedef uLong FAR uLongf; #endif /* ZCONF_H */ ]], - ["mcpp_generated/custom_hal.hpp"] = [[ -#ifndef _CUSTOM_HAL_INCLUDED_ -#define _CUSTOM_HAL_INCLUDED_ + ["mcpp_generated/SgemmKernelAvx.asm"] = [[ +# 1 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\SgemmKernelAvx.S" +# 1 "" 1 +# 1 "" 3 +# 403 "" 3 +# 1 "" 1 +# 1 "" 2 +# 1 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\SgemmKernelAvx.S" 2 +# 20 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\SgemmKernelAvx.S" +# 1 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\asmmacro.h" 1 +# 35 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\asmmacro.h" + .macro FUNCTION_ENTRY FunctionName + + .p2align 4 + + + + + .globl \FunctionName\() + .type \FunctionName\(),@function +\FunctionName\(): + + + .endm +# 65 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\asmmacro.h" + .macro add_immed Register, Immediate + +.if (\Immediate\() != 128) + add \Register\(),\Immediate\() +.else + sub \Register\(),-\Immediate\() # smaller encoding +.endif + + .endm +# 92 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\asmmacro.h" + .macro EmitIfCountGE Count1, Value1, Statement + +.if (\Count1\() >= \Value1\()) + \Statement\() +.endif + + .endm +# 113 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\asmmacro.h" + .macro EmitIfCount2EQ Count1, Value1, Count2, Value2, Statement + +.if (\Count1\() == \Value1\()) && (\Count2\() == \Value2\()) + \Statement\() +.endif + + .endm +# 143 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\asmmacro.h" + .macro EmitIfCount2GE Count1, Value1, Count2, Value2, Statement + +.if (\Count1\() >= \Value1\()) && (\Count2\() >= \Value2\()) + \Statement\() +.endif + + .endm +# 166 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\asmmacro.h" + .macro EmitForEachRegister RegList, Statement + + .irp RegItem, \RegList\() + \Statement\() + .endr + + .endm +# 21 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\SgemmKernelAvx.S" 2 +# 1 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\SgemmKernelCommon.h" 1 +# 22 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\SgemmKernelCommon.h" + .equ .LFgemmElementShift, 2 + .equ .LFgemmElementSize, 1 << .LFgemmElementShift + +# 1 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\FgemmKernelCommon.h" 1 +# 22 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\FgemmKernelCommon.h" + .equ .LFgemmKernelFrame_SavedR12, -32 + .equ .LFgemmKernelFrame_SavedR13, -24 + .equ .LFgemmKernelFrame_SavedR14, -16 + .equ .LFgemmKernelFrame_alpha, -8 + .equ .LFgemmKernelFrame_SavedR15, 0 + .equ .LFgemmKernelFrame_SavedRbx, 8 + .equ .LFgemmKernelFrame_SavedRbp, 16 + .equ .LFgemmKernelFrame_ReturnAddress, 24 + .equ .LFgemmKernelFrame_lda, 32 + .equ .LFgemmKernelFrame_ldc, 40 + .equ .LFgemmKernelFrame_ZeroMode, 48 + + + + + + .equ .LFgemmXmmElementCount, 16 / .LFgemmElementSize + .equ .LFgemmYmmElementCount, 32 / .LFgemmElementSize + .equ .LFgemmZmmElementCount, 64 / .LFgemmElementSize +# 80 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\FgemmKernelCommon.h" + .macro ComputeBlockLoop ComputeBlock, RowCount, AdvanceMatrixAPlusRows + + mov rbp,rcx # reload CountK + sub rbp,4 + jb .LProcessRemainingBlocks\@ + +.LComputeBlockBy4Loop\@: + \ComputeBlock\() \RowCount\(), 0, .LFgemmElementSize*0, 64*4 + \ComputeBlock\() \RowCount\(), 2*32, .LFgemmElementSize*1, 64*4 + add_immed rsi,2*2*32 # advance matrix B by 128 bytes + \ComputeBlock\() \RowCount\(), 0, .LFgemmElementSize*2, 64*4 + \ComputeBlock\() \RowCount\(), 2*32, .LFgemmElementSize*3, 64*4 + add_immed rsi,2*2*32 # advance matrix B by 128 bytes + add rdi,4*.LFgemmElementSize # advance matrix A by 4 elements +.if \RowCount\() > 3 + add rbx,4*.LFgemmElementSize # advance matrix A plus rows by 4 elements +.if \RowCount\() == 12 + add r13,4*.LFgemmElementSize + add r14,4*.LFgemmElementSize +.endif +.endif + sub rbp,4 + jae .LComputeBlockBy4Loop\@ + +.LProcessRemainingBlocks\@: + add rbp,4 # correct for over-subtract above + jz .LOutputBlock\@ + +.LComputeBlockBy1Loop\@: + \ComputeBlock\() \RowCount\(), 0, 0 + add rsi,2*32 # advance matrix B by 64 bytes + add rdi,.LFgemmElementSize # advance matrix A by 1 element +.if \RowCount\() > 3 + add rbx,.LFgemmElementSize # advance matrix A plus rows by 1 element +.if \RowCount\() == 12 + add r13,.LFgemmElementSize + add r14,.LFgemmElementSize +.endif +.endif + dec rbp + jne .LComputeBlockBy1Loop\@ + +.LOutputBlock\@: + + .endm +# 26 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\SgemmKernelCommon.h" 2 + + + + + +.macro addpf Operand:vararg; addps \Operand\(); .endm; +.macro movsf Operand:vararg; movss \Operand\(); .endm; +.macro movupf Operand:vararg; movups \Operand\(); .endm; + +.macro vaddpf Operand:vararg; vaddps \Operand\(); .endm; +.macro vbroadcastsf Operand:vararg; vbroadcastss \Operand\(); .endm; +.macro vfmadd213pf Operand:vararg; vfmadd213ps \Operand\(); .endm; +.macro vfmadd231pf Operand:vararg; vfmadd231ps \Operand\(); .endm; +.macro vmaskmovpf Operand:vararg; vmaskmovps \Operand\(); .endm; +.macro vmovapf Operand:vararg; vmovaps \Operand\(); .endm; +.macro vmovsf Operand:vararg; vmovss \Operand\(); .endm; +.macro vmovupf Operand:vararg; vmovups \Operand\(); .endm; +.macro vmulpf Operand:vararg; vmulps \Operand\(); .endm; +.macro vxorpf Operand:vararg; vxorps \Operand\(); .endm; + + .macro vfmadd231pf_bcst DestReg, SrcReg, Address + + vfmadd231ps \DestReg\(), \SrcReg\(), \Address\(){1to16} + + .endm +# 22 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\SgemmKernelAvx.S" 2 +# 1 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\FgemmKernelAvxCommon.h" 1 +# 52 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\FgemmKernelAvxCommon.h" + .macro ComputeBlockAvxBy16 RowCount, VectorOffset, BroadcastOffset, PrefetchOffset + +.if \RowCount\() == 1 + vbroadcastsf ymm3,[rdi+\BroadcastOffset\()] + vmulpf ymm4,ymm3,YMMWORD PTR [rsi+\VectorOffset\()] + vaddpf ymm8,ymm8,ymm4 + vmulpf ymm5,ymm3,YMMWORD PTR [rsi+\VectorOffset\()+32] + vaddpf ymm9,ymm9,ymm5 +.else + vmovapf ymm0,YMMWORD PTR [rsi+\VectorOffset\()] + vmovapf ymm1,YMMWORD PTR [rsi+\VectorOffset\()+32] + EmitIfCountGE \RowCount\(), 1, "vbroadcastsf ymm3,[rdi+\BroadcastOffset\()]" + EmitIfCountGE \RowCount\(), 1, "vmulpf ymm4,ymm3,ymm0" + EmitIfCountGE \RowCount\(), 1, "vaddpf ymm8,ymm8,ymm4" + EmitIfCountGE \RowCount\(), 1, "vmulpf ymm5,ymm3,ymm1" + EmitIfCountGE \RowCount\(), 1, "vaddpf ymm9,ymm9,ymm5" + EmitIfCountGE \RowCount\(), 2, "vbroadcastsf ymm3,[rdi+r10+\BroadcastOffset\()]" + EmitIfCountGE \RowCount\(), 2, "vmulpf ymm6,ymm3,ymm0" + EmitIfCountGE \RowCount\(), 2, "vaddpf ymm10,ymm10,ymm6" + EmitIfCountGE \RowCount\(), 2, "vmulpf ymm7,ymm3,ymm1" + EmitIfCountGE \RowCount\(), 2, "vaddpf ymm11,ymm11,ymm7" + EmitIfCountGE \RowCount\(), 3, "vbroadcastsf ymm3,[rbx+\BroadcastOffset\()]" + EmitIfCountGE \RowCount\(), 3, "vmulpf ymm4,ymm3,ymm0" + EmitIfCountGE \RowCount\(), 3, "vaddpf ymm12,ymm12,ymm4" + EmitIfCountGE \RowCount\(), 3, "vmulpf ymm5,ymm3,ymm1" + EmitIfCountGE \RowCount\(), 3, "vaddpf ymm13,ymm13,ymm5" + EmitIfCountGE \RowCount\(), 4, "vbroadcastsf ymm3,[rbx+r10+\BroadcastOffset\()]" + EmitIfCountGE \RowCount\(), 4, "vmulpf ymm6,ymm3,ymm0" + EmitIfCountGE \RowCount\(), 4, "vaddpf ymm14,ymm14,ymm6" + EmitIfCountGE \RowCount\(), 4, "vmulpf ymm7,ymm3,ymm1" + EmitIfCountGE \RowCount\(), 4, "vaddpf ymm15,ymm15,ymm7" +.endif + + .endm +# 119 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\FgemmKernelAvxCommon.h" + .macro ComputeBlockAvxBy8 RowCount, VectorOffset, BroadcastOffset, PrefetchOffset + +.if \RowCount\() == 1 + vbroadcastsf ymm3,[rdi+\BroadcastOffset\()] + vmulpf ymm5,ymm3,YMMWORD PTR [rsi+\VectorOffset\()] + vaddpf ymm9,ymm9,ymm5 +.else + vmovapf ymm0,YMMWORD PTR [rsi+\VectorOffset\()] + EmitIfCountGE \RowCount\(), 1, "vbroadcastsf ymm3,[rdi+\BroadcastOffset\()]" + EmitIfCountGE \RowCount\(), 1, "vmulpf ymm5,ymm3,ymm0" + EmitIfCountGE \RowCount\(), 1, "vaddpf ymm9,ymm9,ymm5" + EmitIfCountGE \RowCount\(), 2, "vbroadcastsf ymm3,[rdi+r10+\BroadcastOffset\()]" + EmitIfCountGE \RowCount\(), 2, "vmulpf ymm7,ymm3,ymm0" + EmitIfCountGE \RowCount\(), 2, "vaddpf ymm11,ymm11,ymm7" + EmitIfCountGE \RowCount\(), 3, "vbroadcastsf ymm3,[rbx+\BroadcastOffset\()]" + EmitIfCountGE \RowCount\(), 3, "vmulpf ymm5,ymm3,ymm0" + EmitIfCountGE \RowCount\(), 3, "vaddpf ymm13,ymm13,ymm5" + EmitIfCountGE \RowCount\(), 4, "vbroadcastsf ymm3,[rbx+r10+\BroadcastOffset\()]" + EmitIfCountGE \RowCount\(), 4, "vmulpf ymm7,ymm3,ymm0" + EmitIfCountGE \RowCount\(), 4, "vaddpf ymm15,ymm15,ymm7" +.endif + + .endm +# 171 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\FgemmKernelAvxCommon.h" + .macro ComputeBlockAvxLoop ComputeBlock, RowCount + +.if \RowCount\() > 2 + lea rbx,[rdi+r10*2] # compute matrix A plus 2 rows +.endif + ComputeBlockLoop \ComputeBlock\(), \RowCount\(), \RowCount\() > 2 +.if \RowCount\() > 2 + lea rbx,[rdx+rax*2] # compute matrix C plus 2 rows +.endif + + .endm +# 221 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\FgemmKernelAvxCommon.h" + .macro ProcessCountM RowCount, Fallthrough + + cmp r9,.LFgemmYmmElementCount + jbe .LProcessRemainingCountN\@ + +.LProcessNextColumnLoop2xN\@: + EmitIfCountGE \RowCount\(), 1, "vxorpf xmm8,xmm8,xmm8" + EmitIfCountGE \RowCount\(), 1, "vxorpf xmm9,xmm9,xmm9" + EmitIfCountGE \RowCount\(), 2, "vxorpf xmm10,xmm10,xmm10" + EmitIfCountGE \RowCount\(), 2, "vxorpf xmm11,xmm11,xmm11" + EmitIfCountGE \RowCount\(), 3, "vxorpf xmm12,xmm12,xmm12" + EmitIfCountGE \RowCount\(), 3, "vxorpf xmm13,xmm13,xmm13" + EmitIfCountGE \RowCount\(), 4, "vxorpf xmm14,xmm14,xmm14" + EmitIfCountGE \RowCount\(), 4, "vxorpf xmm15,xmm15,xmm15" + ComputeBlockAvxLoop ComputeBlockAvxBy16, \RowCount\() + EmitIfCountGE \RowCount\(), 1, "vmulpf ymm8,ymm8,ymm2" + EmitIfCountGE \RowCount\(), 1, "vmulpf ymm9,ymm9,ymm2" + EmitIfCountGE \RowCount\(), 2, "vmulpf ymm10,ymm10,ymm2" + EmitIfCountGE \RowCount\(), 2, "vmulpf ymm11,ymm11,ymm2" + EmitIfCountGE \RowCount\(), 3, "vmulpf ymm12,ymm12,ymm2" + EmitIfCountGE \RowCount\(), 3, "vmulpf ymm13,ymm13,ymm2" + EmitIfCountGE \RowCount\(), 4, "vmulpf ymm14,ymm14,ymm2" + EmitIfCountGE \RowCount\(), 4, "vmulpf ymm15,ymm15,ymm2" + sub r9,2*.LFgemmYmmElementCount + jb .LOutputMasked2xNBlock\@ + test r15b,r15b # ZeroMode? + jnz .LStore2xNBlock\@ + EmitIfCountGE \RowCount\(), 1, "vaddpf ymm8,ymm8,YMMWORD PTR [rdx]" + EmitIfCountGE \RowCount\(), 1, "vaddpf ymm9,ymm9,YMMWORD PTR [rdx+32]" + EmitIfCountGE \RowCount\(), 2, "vaddpf ymm10,ymm10,YMMWORD PTR [rdx+rax]" + EmitIfCountGE \RowCount\(), 2, "vaddpf ymm11,ymm11,YMMWORD PTR [rdx+rax+32]" + EmitIfCountGE \RowCount\(), 3, "vaddpf ymm12,ymm12,YMMWORD PTR [rbx]" + EmitIfCountGE \RowCount\(), 3, "vaddpf ymm13,ymm13,YMMWORD PTR [rbx+32]" + EmitIfCountGE \RowCount\(), 4, "vaddpf ymm14,ymm14,YMMWORD PTR [rbx+rax]" + EmitIfCountGE \RowCount\(), 4, "vaddpf ymm15,ymm15,YMMWORD PTR [rbx+rax+32]" + +.LStore2xNBlock\@: + EmitIfCountGE \RowCount\(), 1, "vmovupf YMMWORD PTR [rdx],ymm8" + EmitIfCountGE \RowCount\(), 1, "vmovupf YMMWORD PTR [rdx+32],ymm9" + EmitIfCountGE \RowCount\(), 2, "vmovupf YMMWORD PTR [rdx+rax],ymm10" + EmitIfCountGE \RowCount\(), 2, "vmovupf YMMWORD PTR [rdx+rax+32],ymm11" + EmitIfCountGE \RowCount\(), 3, "vmovupf YMMWORD PTR [rbx],ymm12" + EmitIfCountGE \RowCount\(), 3, "vmovupf YMMWORD PTR [rbx+32],ymm13" + EmitIfCountGE \RowCount\(), 4, "vmovupf YMMWORD PTR [rbx+rax],ymm14" + EmitIfCountGE \RowCount\(), 4, "vmovupf YMMWORD PTR [rbx+rax+32],ymm15" + add rdx,2*32 # advance matrix C by 2 YMMWORDs + mov rdi,r11 # reload matrix A + cmp r9,.LFgemmYmmElementCount + ja .LProcessNextColumnLoop2xN\@ + test r9,r9 + jz .LExitKernel + +.LProcessRemainingCountN\@: + EmitIfCountGE \RowCount\(), 1, "vxorpf xmm9,xmm9,xmm9" + EmitIfCountGE \RowCount\(), 2, "vxorpf xmm11,xmm11,xmm11" + EmitIfCountGE \RowCount\(), 3, "vxorpf xmm13,xmm13,xmm13" + EmitIfCountGE \RowCount\(), 4, "vxorpf xmm15,xmm15,xmm15" + ComputeBlockAvxLoop ComputeBlockAvxBy8, \RowCount\() + EmitIfCountGE \RowCount\(), 1, "vmulpf ymm9,ymm9,ymm2" + EmitIfCountGE \RowCount\(), 2, "vmulpf ymm11,ymm11,ymm2" + EmitIfCountGE \RowCount\(), 3, "vmulpf ymm13,ymm13,ymm2" + EmitIfCountGE \RowCount\(), 4, "vmulpf ymm15,ymm15,ymm2" + cmp r9,.LFgemmYmmElementCount + jb .LOutputMasked1xNBlock\@ + test r15b,r15b # ZeroMode? + jnz .LStore1xNBlock\@ + EmitIfCountGE \RowCount\(), 1, "vaddpf ymm9,ymm9,YMMWORD PTR [rdx]" + EmitIfCountGE \RowCount\(), 2, "vaddpf ymm11,ymm11,YMMWORD PTR [rdx+rax]" + EmitIfCountGE \RowCount\(), 3, "vaddpf ymm13,ymm13,YMMWORD PTR [rbx]" + EmitIfCountGE \RowCount\(), 4, "vaddpf ymm15,ymm15,YMMWORD PTR [rbx+rax]" + +.LStore1xNBlock\@: + EmitIfCountGE \RowCount\(), 1, "vmovupf YMMWORD PTR [rdx],ymm9" + EmitIfCountGE \RowCount\(), 2, "vmovupf YMMWORD PTR [rdx+rax],ymm11" + EmitIfCountGE \RowCount\(), 3, "vmovupf YMMWORD PTR [rbx],ymm13" + EmitIfCountGE \RowCount\(), 4, "vmovupf YMMWORD PTR [rbx+rax],ymm15" + jmp .LExitKernel + +.LOutputMasked2xNBlock\@: + test r15b,r15b # ZeroMode? + jnz .LStoreMasked2xNBlock\@ + EmitIfCountGE \RowCount\(), 1, "vaddpf ymm8,ymm8,YMMWORD PTR [rdx]" + EmitIfCountGE \RowCount\(), 2, "vaddpf ymm10,ymm10,YMMWORD PTR [rdx+rax]" + EmitIfCountGE \RowCount\(), 3, "vaddpf ymm12,ymm12,YMMWORD PTR [rbx]" + EmitIfCountGE \RowCount\(), 4, "vaddpf ymm14,ymm14,YMMWORD PTR [rbx+rax]" + +.LStoreMasked2xNBlock\@: + EmitIfCountGE \RowCount\(), 1, "vmovupf YMMWORD PTR [rdx],ymm8" + EmitIfCountGE \RowCount\(), 2, "vmovupf YMMWORD PTR [rdx+rax],ymm10" + EmitIfCountGE \RowCount\(), 3, "vmovupf YMMWORD PTR [rbx],ymm12" + EmitIfCountGE \RowCount\(), 4, "vmovupf YMMWORD PTR [rbx+rax],ymm14" + add rdx,32 # advance matrix C by YMMWORD +.if \RowCount\() > 2 + add rbx,32 # advance matrix C plus 2 rows by YMMWORD +.endif + add r9,.LFgemmYmmElementCount # correct for over-subtract above + +.LOutputMasked1xNBlock\@: + neg r9 + lea rdi,MlasMaskMoveTableAvx[rip+8*4] + vmovdqu ymm0,YMMWORD PTR [rdi+r9*.LFgemmElementSize] + test r15b,r15b # ZeroMode? + jnz .LStoreMasked1xNBlock\@ + EmitIfCountGE \RowCount\(), 1, "vmaskmovpf ymm8,ymm0,YMMWORD PTR [rdx]" + EmitIfCountGE \RowCount\(), 2, "vmaskmovpf ymm10,ymm0,YMMWORD PTR [rdx+rax]" + EmitIfCountGE \RowCount\(), 3, "vmaskmovpf ymm12,ymm0,YMMWORD PTR [rbx]" + EmitIfCountGE \RowCount\(), 4, "vmaskmovpf ymm14,ymm0,YMMWORD PTR [rbx+rax]" + EmitIfCountGE \RowCount\(), 1, "vaddpf ymm9,ymm9,ymm8" + EmitIfCountGE \RowCount\(), 2, "vaddpf ymm11,ymm11,ymm10" + EmitIfCountGE \RowCount\(), 3, "vaddpf ymm13,ymm13,ymm12" + EmitIfCountGE \RowCount\(), 4, "vaddpf ymm15,ymm15,ymm14" + +.LStoreMasked1xNBlock\@: + EmitIfCountGE \RowCount\(), 1, "vmaskmovpf YMMWORD PTR [rdx],ymm0,ymm9" + EmitIfCountGE \RowCount\(), 2, "vmaskmovpf YMMWORD PTR [rdx+rax],ymm0,ymm11" + EmitIfCountGE \RowCount\(), 3, "vmaskmovpf YMMWORD PTR [rbx],ymm0,ymm13" + EmitIfCountGE \RowCount\(), 4, "vmaskmovpf YMMWORD PTR [rbx+rax],ymm0,ymm15" +.ifb \Fallthrough\() + jmp .LExitKernel +.endif + + .endm +# 356 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\FgemmKernelAvxCommon.h" + .macro FgemmKernelAvxFunction FunctionName +# 399 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\FgemmKernelAvxCommon.h" + FUNCTION_ENTRY \FunctionName\() + + push rbp + push rbx + push r15 + mov r11,rdi + mov r10,.LFgemmKernelFrame_lda[rsp] + shl r10,.LFgemmElementShift # convert lda to bytes + mov rax,.LFgemmKernelFrame_ldc[rsp] + shl rax,.LFgemmElementShift # convert ldc to bytes + movzx r15,BYTE PTR .LFgemmKernelFrame_ZeroMode[rsp] + vmovsf .LFgemmKernelFrame_alpha[rsp],xmm0 + vbroadcastsf ymm2,.LFgemmKernelFrame_alpha[rsp] -#endif -]], - ["mcpp_generated/cv_cpu_config.h"] = [[ -// OpenCV CPU baseline features -#define CV_CPU_COMPILE_SSE 1 -#define CV_CPU_BASELINE_COMPILE_SSE 1 -#define CV_CPU_COMPILE_SSE2 1 -#define CV_CPU_BASELINE_COMPILE_SSE2 1 + cmp r8,4 + jb .LProcessCountMLessThan4 + mov r8d,4 # return 4 rows handled + ProcessCountM 4, Fallthrough -#define CV_CPU_COMPILE_SSE3 1 -#define CV_CPU_BASELINE_COMPILE_SSE3 1 -#define CV_CPU_BASELINE_FEATURES 0 \ - , CV_CPU_SSE \ - , CV_CPU_SSE2 \ - , CV_CPU_SSE3 \ -// OpenCV supported CPU dispatched features -#define CV_CPU_DISPATCH_COMPILE_SSE4_1 1 -#define CV_CPU_DISPATCH_COMPILE_SSE4_2 1 -#define CV_CPU_DISPATCH_COMPILE_AVX 1 -#define CV_CPU_DISPATCH_COMPILE_FP16 1 -#define CV_CPU_DISPATCH_COMPILE_AVX2 1 -#define CV_CPU_DISPATCH_COMPILE_AVX512_SKX 1 +.LExitKernel: + vzeroupper + mov eax,r8d + pop r15 + pop rbx + pop rbp + ret -#define CV_CPU_DISPATCH_FEATURES 0 \ - , CV_CPU_SSE4_1 \ - , CV_CPU_SSE4_2 \ - , CV_CPU_AVX \ - , CV_CPU_FP16 \ - , CV_CPU_AVX2 \ - , CV_CPU_AVX512_SKX \ -]], - ["mcpp_generated/cvconfig.h"] = [[ -#ifndef OPENCV_CVCONFIG_H_INCLUDED -#define OPENCV_CVCONFIG_H_INCLUDED -/* OpenCV compiled as static or dynamic libs */ -/* #undef BUILD_SHARED_LIBS */ -/* OpenCV intrinsics optimized code */ -#define CV_ENABLE_INTRINSICS +.LProcessCountMLessThan4: + cmp r8,2 + jb .LProcessCountMLessThan2 + mov r8d,2 # return 2 rows handled + ProcessCountM 2 -/* OpenCV additional optimized code */ -/* #undef CV_DISABLE_OPTIMIZATION */ -/* Compile for 'real' NVIDIA GPU architectures */ -#define CUDA_ARCH_BIN "" -/* NVIDIA GPU features are used */ -#define CUDA_ARCH_FEATURES "" -/* Compile for 'virtual' NVIDIA PTX architectures */ -#define CUDA_ARCH_PTX "" -/* AMD's Basic Linear Algebra Subprograms Library*/ -/* #undef HAVE_CLAMDBLAS */ +.LProcessCountMLessThan2: + ProcessCountM 1 -/* AMD's OpenCL Fast Fourier Transform Library*/ -/* #undef HAVE_CLAMDFFT */ + .endm +# 23 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\SgemmKernelAvx.S" 2 -/* Clp support */ -/* #undef HAVE_CLP */ + .intel_syntax noprefix -/* NVIDIA CUDA Runtime API*/ -/* #undef HAVE_CUDA */ + .text -/* NVIDIA CUDA Basic Linear Algebra Subprograms (BLAS) API*/ -/* #undef HAVE_CUBLAS */ -/* NVIDIA CUDA Deep Neural Network (cuDNN) API*/ -/* #undef HAVE_CUDNN */ -/* NVIDIA CUDA Fast Fourier Transform (FFT) API*/ -/* #undef HAVE_CUFFT */ -/* DirectX */ -#define HAVE_DIRECTX -#define HAVE_DIRECTX_NV12 -#define HAVE_D3D11 -#define HAVE_D3D10 -#define HAVE_D3D9 -/* Eigen Matrix & Linear Algebra Library */ -/* #undef HAVE_EIGEN */ +FgemmKernelAvxFunction MlasGemmFloatKernelAvx -/* Geospatial Data Abstraction Library */ -/* #undef HAVE_GDAL */ + .end +]], + ["mcpp_generated/SgemmKernelAvx512F.asm"] = [[ +# 1 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\SgemmKernelAvx512F.S" +# 1 "" 1 +# 1 "" 3 +# 408 "" 3 +# 1 "" 1 +# 1 "" 2 +# 1 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\SgemmKernelAvx512F.S" 2 +# 20 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\SgemmKernelAvx512F.S" +# 1 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\asmmacro.h" 1 +# 35 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\asmmacro.h" + .macro FUNCTION_ENTRY FunctionName -/* Vulkan support */ -/* #undef HAVE_VULKAN */ + .p2align 4 -/* Define to 1 if you have the header file. */ -/* #undef HAVE_INTTYPES_H */ -/* Intel Integrated Performance Primitives */ -/* #undef HAVE_IPP */ -/* #undef HAVE_IPP_ICV */ -/* #undef HAVE_IPP_IW */ -/* #undef HAVE_IPP_IW_LL */ -/* JPEG-2000 codec */ -/* #undef HAVE_OPENJPEG */ -/* #undef HAVE_JASPER */ -/* AVIF codec */ -/* #undef HAVE_AVIF */ + .globl \FunctionName\() + .type \FunctionName\(),@function +\FunctionName\(): -/* IJG JPEG codec */ -#define HAVE_JPEG -/* JPEG XL codec */ -/* #undef HAVE_JPEGXL */ + .endm +# 65 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\asmmacro.h" + .macro add_immed Register, Immediate -/* GDCM DICOM codec */ -/* #undef HAVE_GDCM */ +.if (\Immediate\() != 128) + add \Register\(),\Immediate\() +.else + sub \Register\(),-\Immediate\() # smaller encoding +.endif -/* NVIDIA Video Decoding API*/ -/* #undef HAVE_NVCUVID */ -/* #undef HAVE_NVCUVID_HEADER */ -/* #undef HAVE_DYNLINK_NVCUVID_HEADER */ + .endm +# 92 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\asmmacro.h" + .macro EmitIfCountGE Count1, Value1, Statement -/* NVIDIA Video Encoding API*/ -/* #undef HAVE_NVCUVENC */ +.if (\Count1\() >= \Value1\()) + \Statement\() +.endif -/* OpenCL Support */ -/* #undef HAVE_OPENCL */ -/* #undef HAVE_OPENCL_STATIC */ -/* #undef HAVE_OPENCL_SVM */ + .endm +# 113 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\asmmacro.h" + .macro EmitIfCount2EQ Count1, Value1, Count2, Value2, Statement -/* NVIDIA OpenCL D3D Extensions support */ -/* #undef HAVE_OPENCL_D3D11_NV */ +.if (\Count1\() == \Value1\()) && (\Count2\() == \Value2\()) + \Statement\() +.endif -/* OpenEXR codec */ -/* #undef HAVE_OPENEXR */ + .endm +# 143 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\asmmacro.h" + .macro EmitIfCount2GE Count1, Value1, Count2, Value2, Statement -/* OpenGL support*/ -/* #undef HAVE_OPENGL */ +.if (\Count1\() >= \Value1\()) && (\Count2\() >= \Value2\()) + \Statement\() +.endif -/* PNG codec */ -#define HAVE_PNG + .endm +# 166 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\asmmacro.h" + .macro EmitForEachRegister RegList, Statement -/* PNG codec */ -/* #undef HAVE_SPNG */ + .irp RegItem, \RegList\() + \Statement\() + .endr -/* Posix threads (pthreads) */ -/* #undef HAVE_PTHREAD */ + .endm +# 21 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\SgemmKernelAvx512F.S" 2 +# 1 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\SgemmKernelCommon.h" 1 +# 22 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\SgemmKernelCommon.h" + .equ .LFgemmElementShift, 2 + .equ .LFgemmElementSize, 1 << .LFgemmElementShift -/* parallel_for with pthreads */ -/* #undef HAVE_PTHREADS_PF */ +# 1 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\FgemmKernelCommon.h" 1 +# 22 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\FgemmKernelCommon.h" + .equ .LFgemmKernelFrame_SavedR12, -32 + .equ .LFgemmKernelFrame_SavedR13, -24 + .equ .LFgemmKernelFrame_SavedR14, -16 + .equ .LFgemmKernelFrame_alpha, -8 + .equ .LFgemmKernelFrame_SavedR15, 0 + .equ .LFgemmKernelFrame_SavedRbx, 8 + .equ .LFgemmKernelFrame_SavedRbp, 16 + .equ .LFgemmKernelFrame_ReturnAddress, 24 + .equ .LFgemmKernelFrame_lda, 32 + .equ .LFgemmKernelFrame_ldc, 40 + .equ .LFgemmKernelFrame_ZeroMode, 48 + + + + + + .equ .LFgemmXmmElementCount, 16 / .LFgemmElementSize + .equ .LFgemmYmmElementCount, 32 / .LFgemmElementSize + .equ .LFgemmZmmElementCount, 64 / .LFgemmElementSize +# 80 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\FgemmKernelCommon.h" + .macro ComputeBlockLoop ComputeBlock, RowCount, AdvanceMatrixAPlusRows + + mov rbp,rcx # reload CountK + sub rbp,4 + jb .LProcessRemainingBlocks\@ + +.LComputeBlockBy4Loop\@: + \ComputeBlock\() \RowCount\(), 0, .LFgemmElementSize*0, 64*4 + \ComputeBlock\() \RowCount\(), 2*32, .LFgemmElementSize*1, 64*4 + add_immed rsi,2*2*32 # advance matrix B by 128 bytes + \ComputeBlock\() \RowCount\(), 0, .LFgemmElementSize*2, 64*4 + \ComputeBlock\() \RowCount\(), 2*32, .LFgemmElementSize*3, 64*4 + add_immed rsi,2*2*32 # advance matrix B by 128 bytes + add rdi,4*.LFgemmElementSize # advance matrix A by 4 elements +.if \RowCount\() > 3 + add rbx,4*.LFgemmElementSize # advance matrix A plus rows by 4 elements +.if \RowCount\() == 12 + add r13,4*.LFgemmElementSize + add r14,4*.LFgemmElementSize +.endif +.endif + sub rbp,4 + jae .LComputeBlockBy4Loop\@ + +.LProcessRemainingBlocks\@: + add rbp,4 # correct for over-subtract above + jz .LOutputBlock\@ + +.LComputeBlockBy1Loop\@: + \ComputeBlock\() \RowCount\(), 0, 0 + add rsi,2*32 # advance matrix B by 64 bytes + add rdi,.LFgemmElementSize # advance matrix A by 1 element +.if \RowCount\() > 3 + add rbx,.LFgemmElementSize # advance matrix A plus rows by 1 element +.if \RowCount\() == 12 + add r13,.LFgemmElementSize + add r14,.LFgemmElementSize +.endif +.endif + dec rbp + jne .LComputeBlockBy1Loop\@ + +.LOutputBlock\@: + + .endm +# 26 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\SgemmKernelCommon.h" 2 + + + + + +.macro addpf Operand:vararg; addps \Operand\(); .endm; +.macro movsf Operand:vararg; movss \Operand\(); .endm; +.macro movupf Operand:vararg; movups \Operand\(); .endm; + +.macro vaddpf Operand:vararg; vaddps \Operand\(); .endm; +.macro vbroadcastsf Operand:vararg; vbroadcastss \Operand\(); .endm; +.macro vfmadd213pf Operand:vararg; vfmadd213ps \Operand\(); .endm; +.macro vfmadd231pf Operand:vararg; vfmadd231ps \Operand\(); .endm; +.macro vmaskmovpf Operand:vararg; vmaskmovps \Operand\(); .endm; +.macro vmovapf Operand:vararg; vmovaps \Operand\(); .endm; +.macro vmovsf Operand:vararg; vmovss \Operand\(); .endm; +.macro vmovupf Operand:vararg; vmovups \Operand\(); .endm; +.macro vmulpf Operand:vararg; vmulps \Operand\(); .endm; +.macro vxorpf Operand:vararg; vxorps \Operand\(); .endm; + + .macro vfmadd231pf_bcst DestReg, SrcReg, Address + + vfmadd231ps \DestReg\(), \SrcReg\(), \Address\(){1to16} + + .endm +# 22 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\SgemmKernelAvx512F.S" 2 +# 1 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\FgemmKernelAvx512FCommon.h" 1 +# 56 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\FgemmKernelAvx512FCommon.h" + .macro ComputeBlockAvx512FBy2 RowCount, VectorOffset, BroadcastOffset, PrefetchOffset + +.ifnb \PrefetchOffset\() + prefetcht0 [rsi+\VectorOffset\()+\PrefetchOffset\()] + prefetcht0 [rsi+r12+\VectorOffset\()+\PrefetchOffset\()] +.endif +.if \RowCount\() == 1 + vbroadcastsf zmm3,[rdi+\BroadcastOffset\()] + vfmadd231pf zmm4,zmm3,ZMMWORD PTR [rsi+\VectorOffset\()] + vfmadd231pf zmm5,zmm3,ZMMWORD PTR [rsi+r12+\VectorOffset\()] +.else + vmovapf zmm0,ZMMWORD PTR [rsi+\VectorOffset\()] + vmovapf zmm1,ZMMWORD PTR [rsi+r12+\VectorOffset\()] + EmitIfCountGE \RowCount\(), 1, "vbroadcastsf zmm3,[rdi+\BroadcastOffset\()]" + EmitIfCountGE \RowCount\(), 1, "vfmadd231pf zmm4,zmm3,zmm0" + EmitIfCountGE \RowCount\(), 1, "vfmadd231pf zmm5,zmm3,zmm1" + EmitIfCountGE \RowCount\(), 2, "vbroadcastsf zmm3,[rdi+r10+\BroadcastOffset\()]" + EmitIfCountGE \RowCount\(), 2, "vfmadd231pf zmm6,zmm3,zmm0" + EmitIfCountGE \RowCount\(), 2, "vfmadd231pf zmm7,zmm3,zmm1" + EmitIfCountGE \RowCount\(), 3, "vbroadcastsf zmm3,[rdi+r10*2+\BroadcastOffset\()]" + EmitIfCountGE \RowCount\(), 3, "vfmadd231pf zmm8,zmm3,zmm0" + EmitIfCountGE \RowCount\(), 3, "vfmadd231pf zmm9,zmm3,zmm1" + EmitIfCountGE \RowCount\(), 4, "vbroadcastsf zmm3,[rbx+\BroadcastOffset\()]" + EmitIfCountGE \RowCount\(), 4, "vfmadd231pf zmm10,zmm3,zmm0" + EmitIfCountGE \RowCount\(), 4, "vfmadd231pf zmm11,zmm3,zmm1" + EmitIfCountGE \RowCount\(), 5, "vbroadcastsf zmm3,[rbx+r10+\BroadcastOffset\()]" + EmitIfCountGE \RowCount\(), 5, "vfmadd231pf zmm12,zmm3,zmm0" + EmitIfCountGE \RowCount\(), 5, "vfmadd231pf zmm13,zmm3,zmm1" + EmitIfCountGE \RowCount\(), 6, "vbroadcastsf zmm3,[rbx+r10*2+\BroadcastOffset\()]" + EmitIfCountGE \RowCount\(), 6, "vfmadd231pf zmm14,zmm3,zmm0" + EmitIfCountGE \RowCount\(), 6, "vfmadd231pf zmm15,zmm3,zmm1" + EmitIfCountGE \RowCount\(), 12, "vbroadcastsf zmm3,[r13+\BroadcastOffset\()]" + EmitIfCountGE \RowCount\(), 12, "vfmadd231pf zmm16,zmm3,zmm0" + EmitIfCountGE \RowCount\(), 12, "vfmadd231pf zmm17,zmm3,zmm1" + EmitIfCountGE \RowCount\(), 12, "vbroadcastsf zmm3,[r13+r10+\BroadcastOffset\()]" + EmitIfCountGE \RowCount\(), 12, "vfmadd231pf zmm18,zmm3,zmm0" + EmitIfCountGE \RowCount\(), 12, "vfmadd231pf zmm19,zmm3,zmm1" + EmitIfCountGE \RowCount\(), 12, "vbroadcastsf zmm3,[r13+r10*2+\BroadcastOffset\()]" + EmitIfCountGE \RowCount\(), 12, "vfmadd231pf zmm20,zmm3,zmm0" + EmitIfCountGE \RowCount\(), 12, "vfmadd231pf zmm21,zmm3,zmm1" + EmitIfCountGE \RowCount\(), 12, "vbroadcastsf zmm3,[r14+\BroadcastOffset\()]" + EmitIfCountGE \RowCount\(), 12, "vfmadd231pf zmm22,zmm3,zmm0" + EmitIfCountGE \RowCount\(), 12, "vfmadd231pf zmm23,zmm3,zmm1" + EmitIfCountGE \RowCount\(), 12, "vbroadcastsf zmm3,[r14+r10+\BroadcastOffset\()]" + EmitIfCountGE \RowCount\(), 12, "vfmadd231pf zmm24,zmm3,zmm0" + EmitIfCountGE \RowCount\(), 12, "vfmadd231pf zmm25,zmm3,zmm1" + EmitIfCountGE \RowCount\(), 12, "vbroadcastsf zmm3,[r14+r10*2+\BroadcastOffset\()]" + EmitIfCountGE \RowCount\(), 12, "vfmadd231pf zmm26,zmm3,zmm0" + EmitIfCountGE \RowCount\(), 12, "vfmadd231pf zmm27,zmm3,zmm1" +.endif + + .endm +# 145 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\FgemmKernelAvx512FCommon.h" + .macro ComputeBlockAvx512FBy1 RowCount, VectorOffset, BroadcastOffset, PrefetchOffset + +.ifnb \PrefetchOffset\() + prefetcht0 [rsi+\VectorOffset\()+\PrefetchOffset\()] +.endif + vmovapf zmm0,ZMMWORD PTR [rsi+\VectorOffset\()] + EmitIfCountGE \RowCount\(), 1, "vfmadd231pf_bcst zmm5,zmm0,[rdi+\BroadcastOffset\()]" + EmitIfCountGE \RowCount\(), 2, "vfmadd231pf_bcst zmm7,zmm0,[rdi+r10+\BroadcastOffset\()]" + EmitIfCountGE \RowCount\(), 3, "vfmadd231pf_bcst zmm9,zmm0,[rdi+r10*2+\BroadcastOffset\()]" + EmitIfCountGE \RowCount\(), 4, "vfmadd231pf_bcst zmm11,zmm0,[rbx+\BroadcastOffset\()]" + EmitIfCountGE \RowCount\(), 5, "vfmadd231pf_bcst zmm13,zmm0,[rbx+r10+\BroadcastOffset\()]" + EmitIfCountGE \RowCount\(), 6, "vfmadd231pf_bcst zmm15,zmm0,[rbx+r10*2+\BroadcastOffset\()]" + EmitIfCountGE \RowCount\(), 12, "vfmadd231pf_bcst zmm17,zmm0,[r13+\BroadcastOffset\()]" + EmitIfCountGE \RowCount\(), 12, "vfmadd231pf_bcst zmm19,zmm0,[r13+r10+\BroadcastOffset\()]" + EmitIfCountGE \RowCount\(), 12, "vfmadd231pf_bcst zmm21,zmm0,[r13+r10*2+\BroadcastOffset\()]" + EmitIfCountGE \RowCount\(), 12, "vfmadd231pf_bcst zmm23,zmm0,[r14+\BroadcastOffset\()]" + EmitIfCountGE \RowCount\(), 12, "vfmadd231pf_bcst zmm25,zmm0,[r14+r10+\BroadcastOffset\()]" + EmitIfCountGE \RowCount\(), 12, "vfmadd231pf_bcst zmm27,zmm0,[r14+r10*2+\BroadcastOffset\()]" + + .endm +# 194 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\FgemmKernelAvx512FCommon.h" + .macro ComputeBlockAvx512FLoop ComputeBlock, RowCount + +.if \RowCount\() > 3 + lea rbx,[r10*2+r10] +.if \RowCount\() == 12 + lea r13,[rdi+rbx*2] # compute matrix A plus 6 rows + lea r14,[r13+rbx] # compute matrix A plus 9 rows +.endif + add rbx,rdi # compute matrix A plus 3 rows +.endif + ComputeBlockLoop \ComputeBlock\(), \RowCount\(), \RowCount\() > 3 +.if \RowCount\() > 3 + lea rbx,[rax*2+rax] +.if \RowCount\() == 12 + lea r13,[rdx+rbx*2] # compute matrix C plus 6 rows + lea r14,[r13+rbx] # compute matrix C plus 9 rows +.endif + add rbx,rdx # compute matrix C plus 3 rows +.endif + + .endm +# 251 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\FgemmKernelAvx512FCommon.h" + .macro ProcessCountM RowCount + + cmp r9,.LFgemmZmmElementCount + jbe .LProcessRemainingCountN\@ + +.LProcessNextColumnLoop2xN\@: + EmitIfCountGE \RowCount\(), 12, "vmovapf zmm16,zmm4" + # clear upper block accumulators + EmitIfCountGE \RowCount\(), 12, "vmovapf zmm17,zmm5" + EmitIfCountGE \RowCount\(), 12, "vmovapf zmm18,zmm4" + EmitIfCountGE \RowCount\(), 12, "vmovapf zmm19,zmm5" + EmitIfCountGE \RowCount\(), 12, "vmovapf zmm20,zmm4" + EmitIfCountGE \RowCount\(), 12, "vmovapf zmm21,zmm5" + EmitIfCountGE \RowCount\(), 12, "vmovapf zmm22,zmm4" + EmitIfCountGE \RowCount\(), 12, "vmovapf zmm23,zmm5" + EmitIfCountGE \RowCount\(), 12, "vmovapf zmm24,zmm4" + EmitIfCountGE \RowCount\(), 12, "vmovapf zmm25,zmm5" + EmitIfCountGE \RowCount\(), 12, "vmovapf zmm26,zmm4" + EmitIfCountGE \RowCount\(), 12, "vmovapf zmm27,zmm5" + ComputeBlockAvx512FLoop ComputeBlockAvx512FBy2, \RowCount\() + add rsi,r12 # advance matrix B by 64*CountK bytes + test r15b,r15b # ZeroMode? + jnz .LMultiplyAlpha2xNBlock\@ + EmitIfCountGE \RowCount\(), 1, "vfmadd213pf zmm4,zmm31,ZMMWORD PTR [rdx]" + EmitIfCountGE \RowCount\(), 2, "vfmadd213pf zmm6,zmm31,ZMMWORD PTR [rdx+rax]" + EmitIfCountGE \RowCount\(), 3, "vfmadd213pf zmm8,zmm31,ZMMWORD PTR [rdx+rax*2]" + EmitIfCountGE \RowCount\(), 4, "vfmadd213pf zmm10,zmm31,ZMMWORD PTR [rbx]" + EmitIfCountGE \RowCount\(), 5, "vfmadd213pf zmm12,zmm31,ZMMWORD PTR [rbx+rax]" + EmitIfCountGE \RowCount\(), 6, "vfmadd213pf zmm14,zmm31,ZMMWORD PTR [rbx+rax*2]" + EmitIfCountGE \RowCount\(), 12, "vfmadd213pf zmm16,zmm31,ZMMWORD PTR [r13]" + EmitIfCountGE \RowCount\(), 12, "vfmadd213pf zmm18,zmm31,ZMMWORD PTR [r13+rax]" + EmitIfCountGE \RowCount\(), 12, "vfmadd213pf zmm20,zmm31,ZMMWORD PTR [r13+rax*2]" + EmitIfCountGE \RowCount\(), 12, "vfmadd213pf zmm22,zmm31,ZMMWORD PTR [r14]" + EmitIfCountGE \RowCount\(), 12, "vfmadd213pf zmm24,zmm31,ZMMWORD PTR [r14+rax]" + EmitIfCountGE \RowCount\(), 12, "vfmadd213pf zmm26,zmm31,ZMMWORD PTR [r14+rax*2]" + jmp .LStore2xNBlock\@ + +.LMultiplyAlpha2xNBlock\@: + EmitIfCountGE \RowCount\(), 1, "vmulpf zmm4,zmm4,zmm31" + EmitIfCountGE \RowCount\(), 2, "vmulpf zmm6,zmm6,zmm31" + EmitIfCountGE \RowCount\(), 3, "vmulpf zmm8,zmm8,zmm31" + EmitIfCountGE \RowCount\(), 4, "vmulpf zmm10,zmm10,zmm31" + EmitIfCountGE \RowCount\(), 5, "vmulpf zmm12,zmm12,zmm31" + EmitIfCountGE \RowCount\(), 6, "vmulpf zmm14,zmm14,zmm31" + EmitIfCountGE \RowCount\(), 12, "vmulpf zmm16,zmm16,zmm31" + EmitIfCountGE \RowCount\(), 12, "vmulpf zmm18,zmm18,zmm31" + EmitIfCountGE \RowCount\(), 12, "vmulpf zmm20,zmm20,zmm31" + EmitIfCountGE \RowCount\(), 12, "vmulpf zmm22,zmm22,zmm31" + EmitIfCountGE \RowCount\(), 12, "vmulpf zmm24,zmm24,zmm31" + EmitIfCountGE \RowCount\(), 12, "vmulpf zmm26,zmm26,zmm31" + +.LStore2xNBlock\@: + EmitIfCountGE \RowCount\(), 1, "vmovupf ZMMWORD PTR [rdx],zmm4" + EmitIfCountGE \RowCount\(), 2, "vmovupf ZMMWORD PTR [rdx+rax],zmm6" + EmitIfCountGE \RowCount\(), 3, "vmovupf ZMMWORD PTR [rdx+rax*2],zmm8" + EmitIfCountGE \RowCount\(), 4, "vmovupf ZMMWORD PTR [rbx],zmm10" + EmitIfCountGE \RowCount\(), 5, "vmovupf ZMMWORD PTR [rbx+rax],zmm12" + EmitIfCountGE \RowCount\(), 6, "vmovupf ZMMWORD PTR [rbx+rax*2],zmm14" + EmitIfCountGE \RowCount\(), 12, "vmovupf ZMMWORD PTR [r13],zmm16" + EmitIfCountGE \RowCount\(), 12, "vmovupf ZMMWORD PTR [r13+rax],zmm18" + EmitIfCountGE \RowCount\(), 12, "vmovupf ZMMWORD PTR [r13+rax*2],zmm20" + EmitIfCountGE \RowCount\(), 12, "vmovupf ZMMWORD PTR [r14],zmm22" + EmitIfCountGE \RowCount\(), 12, "vmovupf ZMMWORD PTR [r14+rax],zmm24" + EmitIfCountGE \RowCount\(), 12, "vmovupf ZMMWORD PTR [r14+rax*2],zmm26" + add rdx,64 # advance matrix C by ZMMWORD +.if \RowCount\() > 3 + add rbx,64 # advance matrix C plus 3 rows by ZMMWORD +.if \RowCount\() == 12 + add r13,64 # advance matrix C plus 6 rows by ZMMWORD + add r14,64 # advance matrix C plus 9 rows by ZMMWORD +.endif +.endif + sub r9,.LFgemmZmmElementCount + +.LOutput1xNBlock\@: + sub r9,.LFgemmZmmElementCount + jae .LOutput1xNBlockWithMask\@ + lea rcx,[r9+.LFgemmZmmElementCount] + # correct for over-subtract above + mov ebp,1 + shl ebp,cl + dec ebp + kmovw k1,ebp # update mask for remaining columns + xor r9,r9 # no more columns remaining + +.LOutput1xNBlockWithMask\@: + test r15b,r15b # ZeroMode? + jnz .LMultiplyAlpha1xNBlockWithMask\@ + EmitIfCountGE \RowCount\(), 1, "vfmadd213pf zmm5{k1},zmm31,ZMMWORD PTR [rdx]" + EmitIfCountGE \RowCount\(), 2, "vfmadd213pf zmm7{k1},zmm31,ZMMWORD PTR [rdx+rax]" + EmitIfCountGE \RowCount\(), 3, "vfmadd213pf zmm9{k1},zmm31,ZMMWORD PTR [rdx+rax*2]" + EmitIfCountGE \RowCount\(), 4, "vfmadd213pf zmm11{k1},zmm31,ZMMWORD PTR [rbx]" + EmitIfCountGE \RowCount\(), 5, "vfmadd213pf zmm13{k1},zmm31,ZMMWORD PTR [rbx+rax]" + EmitIfCountGE \RowCount\(), 6, "vfmadd213pf zmm15{k1},zmm31,ZMMWORD PTR [rbx+rax*2]" + EmitIfCountGE \RowCount\(), 12, "vfmadd213pf zmm17{k1},zmm31,ZMMWORD PTR [r13]" + EmitIfCountGE \RowCount\(), 12, "vfmadd213pf zmm19{k1},zmm31,ZMMWORD PTR [r13+rax]" + EmitIfCountGE \RowCount\(), 12, "vfmadd213pf zmm21{k1},zmm31,ZMMWORD PTR [r13+rax*2]" + EmitIfCountGE \RowCount\(), 12, "vfmadd213pf zmm23{k1},zmm31,ZMMWORD PTR [r14]" + EmitIfCountGE \RowCount\(), 12, "vfmadd213pf zmm25{k1},zmm31,ZMMWORD PTR [r14+rax]" + EmitIfCountGE \RowCount\(), 12, "vfmadd213pf zmm27{k1},zmm31,ZMMWORD PTR [r14+rax*2]" + jmp .LStore1xNBlockWithMask\@ + +.LMultiplyAlpha1xNBlockWithMask\@: + EmitIfCountGE \RowCount\(), 1, "vmulpf zmm5,zmm5,zmm31" + EmitIfCountGE \RowCount\(), 2, "vmulpf zmm7,zmm7,zmm31" + EmitIfCountGE \RowCount\(), 3, "vmulpf zmm9,zmm9,zmm31" + EmitIfCountGE \RowCount\(), 4, "vmulpf zmm11,zmm11,zmm31" + EmitIfCountGE \RowCount\(), 5, "vmulpf zmm13,zmm13,zmm31" + EmitIfCountGE \RowCount\(), 6, "vmulpf zmm15,zmm15,zmm31" + EmitIfCountGE \RowCount\(), 12, "vmulpf zmm17,zmm17,zmm31" + EmitIfCountGE \RowCount\(), 12, "vmulpf zmm19,zmm19,zmm31" + EmitIfCountGE \RowCount\(), 12, "vmulpf zmm21,zmm21,zmm31" + EmitIfCountGE \RowCount\(), 12, "vmulpf zmm23,zmm23,zmm31" + EmitIfCountGE \RowCount\(), 12, "vmulpf zmm25,zmm25,zmm31" + EmitIfCountGE \RowCount\(), 12, "vmulpf zmm27,zmm27,zmm31" + +.LStore1xNBlockWithMask\@: + EmitIfCountGE \RowCount\(), 1, "vmovupf ZMMWORD PTR [rdx]{k1},zmm5" + EmitIfCountGE \RowCount\(), 2, "vmovupf ZMMWORD PTR [rdx+rax]{k1},zmm7" + EmitIfCountGE \RowCount\(), 3, "vmovupf ZMMWORD PTR [rdx+rax*2]{k1},zmm9" + EmitIfCountGE \RowCount\(), 4, "vmovupf ZMMWORD PTR [rbx]{k1},zmm11" + EmitIfCountGE \RowCount\(), 5, "vmovupf ZMMWORD PTR [rbx+rax]{k1},zmm13" + EmitIfCountGE \RowCount\(), 6, "vmovupf ZMMWORD PTR [rbx+rax*2]{k1},zmm15" + EmitIfCountGE \RowCount\(), 12, "vmovupf ZMMWORD PTR [r13]{k1},zmm17" + EmitIfCountGE \RowCount\(), 12, "vmovupf ZMMWORD PTR [r13+rax]{k1},zmm19" + EmitIfCountGE \RowCount\(), 12, "vmovupf ZMMWORD PTR [r13+rax*2]{k1},zmm21" + EmitIfCountGE \RowCount\(), 12, "vmovupf ZMMWORD PTR [r14]{k1},zmm23" + EmitIfCountGE \RowCount\(), 12, "vmovupf ZMMWORD PTR [r14+rax]{k1},zmm25" + EmitIfCountGE \RowCount\(), 12, "vmovupf ZMMWORD PTR [r14+rax*2]{k1},zmm27" + add rdx,64 # advance matrix C by ZMMWORD + mov rdi,r11 # reload matrix A + vzeroall + cmp r9,.LFgemmZmmElementCount + ja .LProcessNextColumnLoop2xN\@ + test r9,r9 + jz .LExitKernel + +.LProcessRemainingCountN\@: + EmitIfCountGE \RowCount\(), 12, "vmovapf zmm17,zmm5" + # clear upper block accumulators + EmitIfCountGE \RowCount\(), 12, "vmovapf zmm19,zmm5" + EmitIfCountGE \RowCount\(), 12, "vmovapf zmm21,zmm5" + EmitIfCountGE \RowCount\(), 12, "vmovapf zmm23,zmm5" + EmitIfCountGE \RowCount\(), 12, "vmovapf zmm25,zmm5" + EmitIfCountGE \RowCount\(), 12, "vmovapf zmm27,zmm5" + ComputeBlockAvx512FLoop ComputeBlockAvx512FBy1, \RowCount\() + jmp .LOutput1xNBlock\@ + + .endm +# 413 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\FgemmKernelAvx512FCommon.h" + .macro FgemmKernelAvx512FFunction FunctionName +# 456 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\FgemmKernelAvx512FCommon.h" + FUNCTION_ENTRY \FunctionName\() + + push rbp + push rbx + push r15 + mov .LFgemmKernelFrame_SavedR12[rsp],r12 + mov .LFgemmKernelFrame_SavedR13[rsp],r13 + mov .LFgemmKernelFrame_SavedR14[rsp],r14 + mov r11,rdi + mov r10,.LFgemmKernelFrame_lda[rsp] + shl r10,.LFgemmElementShift # convert lda to bytes + mov rax,.LFgemmKernelFrame_ldc[rsp] + shl rax,.LFgemmElementShift # convert ldc to bytes + mov r12,rcx + shl r12,6 # compute 64*CountK bytes + mov ebp,-1 + kmovw k1,ebp # update mask to write all columns + movzx r15,BYTE PTR .LFgemmKernelFrame_ZeroMode[rsp] + vbroadcastsf zmm31,xmm0 + vzeroall + + + + + + cmp r8,12 + jb .LProcessCountMLessThan12 + mov r8d,12 # return 12 rows handled + ProcessCountM 12 + +.LProcessCountMLessThan12: + cmp r8,5 + ja .LProcessCountM6 + je .LProcessCountM5 + cmp r8,3 + ja .LProcessCountM4 + je .LProcessCountM3 + cmp r8,1 + je .LProcessCountM1 + +.LProcessCountM2: + ProcessCountM 2 + +.LProcessCountM4: + ProcessCountM 4 + +.LProcessCountM6: + mov r8d,6 # return 6 rows handled + ProcessCountM 6 + + + + + +.LExitKernel: + mov eax,r8d + mov r12,.LFgemmKernelFrame_SavedR12[rsp] + mov r13,.LFgemmKernelFrame_SavedR13[rsp] + mov r14,.LFgemmKernelFrame_SavedR14[rsp] + pop r15 + pop rbx + pop rbp + ret + +.LProcessCountM1: + ProcessCountM 1 + +.LProcessCountM3: + ProcessCountM 3 + +.LProcessCountM5: + ProcessCountM 5 + + .endm +# 23 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\SgemmKernelAvx512F.S" 2 -/* Intel Threading Building Blocks */ -/* #undef HAVE_TBB */ + .intel_syntax noprefix + + .text + + + + + +FgemmKernelAvx512FFunction MlasGemmFloatKernelAvx512F + + .end +]], + ["mcpp_generated/SgemmKernelFma3.asm"] = [[ +# 1 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\SgemmKernelFma3.S" +# 1 "" 1 +# 1 "" 3 +# 406 "" 3 +# 1 "" 1 +# 1 "" 2 +# 1 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\SgemmKernelFma3.S" 2 +# 20 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\SgemmKernelFma3.S" +# 1 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\asmmacro.h" 1 +# 35 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\asmmacro.h" + .macro FUNCTION_ENTRY FunctionName + + .p2align 4 + + + + + .globl \FunctionName\() + .type \FunctionName\(),@function +\FunctionName\(): + + + .endm +# 65 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\asmmacro.h" + .macro add_immed Register, Immediate + +.if (\Immediate\() != 128) + add \Register\(),\Immediate\() +.else + sub \Register\(),-\Immediate\() # smaller encoding +.endif + + .endm +# 92 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\asmmacro.h" + .macro EmitIfCountGE Count1, Value1, Statement + +.if (\Count1\() >= \Value1\()) + \Statement\() +.endif + + .endm +# 113 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\asmmacro.h" + .macro EmitIfCount2EQ Count1, Value1, Count2, Value2, Statement + +.if (\Count1\() == \Value1\()) && (\Count2\() == \Value2\()) + \Statement\() +.endif + + .endm +# 143 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\asmmacro.h" + .macro EmitIfCount2GE Count1, Value1, Count2, Value2, Statement + +.if (\Count1\() >= \Value1\()) && (\Count2\() >= \Value2\()) + \Statement\() +.endif + + .endm +# 166 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\asmmacro.h" + .macro EmitForEachRegister RegList, Statement + + .irp RegItem, \RegList\() + \Statement\() + .endr + + .endm +# 21 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\SgemmKernelFma3.S" 2 +# 1 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\SgemmKernelCommon.h" 1 +# 22 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\SgemmKernelCommon.h" + .equ .LFgemmElementShift, 2 + .equ .LFgemmElementSize, 1 << .LFgemmElementShift + +# 1 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\FgemmKernelCommon.h" 1 +# 22 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\FgemmKernelCommon.h" + .equ .LFgemmKernelFrame_SavedR12, -32 + .equ .LFgemmKernelFrame_SavedR13, -24 + .equ .LFgemmKernelFrame_SavedR14, -16 + .equ .LFgemmKernelFrame_alpha, -8 + .equ .LFgemmKernelFrame_SavedR15, 0 + .equ .LFgemmKernelFrame_SavedRbx, 8 + .equ .LFgemmKernelFrame_SavedRbp, 16 + .equ .LFgemmKernelFrame_ReturnAddress, 24 + .equ .LFgemmKernelFrame_lda, 32 + .equ .LFgemmKernelFrame_ldc, 40 + .equ .LFgemmKernelFrame_ZeroMode, 48 + + + + + + .equ .LFgemmXmmElementCount, 16 / .LFgemmElementSize + .equ .LFgemmYmmElementCount, 32 / .LFgemmElementSize + .equ .LFgemmZmmElementCount, 64 / .LFgemmElementSize +# 80 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\FgemmKernelCommon.h" + .macro ComputeBlockLoop ComputeBlock, RowCount, AdvanceMatrixAPlusRows + + mov rbp,rcx # reload CountK + sub rbp,4 + jb .LProcessRemainingBlocks\@ + +.LComputeBlockBy4Loop\@: + \ComputeBlock\() \RowCount\(), 0, .LFgemmElementSize*0, 64*4 + \ComputeBlock\() \RowCount\(), 2*32, .LFgemmElementSize*1, 64*4 + add_immed rsi,2*2*32 # advance matrix B by 128 bytes + \ComputeBlock\() \RowCount\(), 0, .LFgemmElementSize*2, 64*4 + \ComputeBlock\() \RowCount\(), 2*32, .LFgemmElementSize*3, 64*4 + add_immed rsi,2*2*32 # advance matrix B by 128 bytes + add rdi,4*.LFgemmElementSize # advance matrix A by 4 elements +.if \RowCount\() > 3 + add rbx,4*.LFgemmElementSize # advance matrix A plus rows by 4 elements +.if \RowCount\() == 12 + add r13,4*.LFgemmElementSize + add r14,4*.LFgemmElementSize +.endif +.endif + sub rbp,4 + jae .LComputeBlockBy4Loop\@ + +.LProcessRemainingBlocks\@: + add rbp,4 # correct for over-subtract above + jz .LOutputBlock\@ + +.LComputeBlockBy1Loop\@: + \ComputeBlock\() \RowCount\(), 0, 0 + add rsi,2*32 # advance matrix B by 64 bytes + add rdi,.LFgemmElementSize # advance matrix A by 1 element +.if \RowCount\() > 3 + add rbx,.LFgemmElementSize # advance matrix A plus rows by 1 element +.if \RowCount\() == 12 + add r13,.LFgemmElementSize + add r14,.LFgemmElementSize +.endif +.endif + dec rbp + jne .LComputeBlockBy1Loop\@ + +.LOutputBlock\@: + + .endm +# 26 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\SgemmKernelCommon.h" 2 + + + + + +.macro addpf Operand:vararg; addps \Operand\(); .endm; +.macro movsf Operand:vararg; movss \Operand\(); .endm; +.macro movupf Operand:vararg; movups \Operand\(); .endm; + +.macro vaddpf Operand:vararg; vaddps \Operand\(); .endm; +.macro vbroadcastsf Operand:vararg; vbroadcastss \Operand\(); .endm; +.macro vfmadd213pf Operand:vararg; vfmadd213ps \Operand\(); .endm; +.macro vfmadd231pf Operand:vararg; vfmadd231ps \Operand\(); .endm; +.macro vmaskmovpf Operand:vararg; vmaskmovps \Operand\(); .endm; +.macro vmovapf Operand:vararg; vmovaps \Operand\(); .endm; +.macro vmovsf Operand:vararg; vmovss \Operand\(); .endm; +.macro vmovupf Operand:vararg; vmovups \Operand\(); .endm; +.macro vmulpf Operand:vararg; vmulps \Operand\(); .endm; +.macro vxorpf Operand:vararg; vxorps \Operand\(); .endm; + + .macro vfmadd231pf_bcst DestReg, SrcReg, Address + + vfmadd231ps \DestReg\(), \SrcReg\(), \Address\(){1to16} + + .endm +# 22 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\SgemmKernelFma3.S" 2 +# 1 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\FgemmKernelFma3Common.h" 1 +# 52 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\FgemmKernelFma3Common.h" + .macro ComputeBlockFma3By2 RowCount, VectorOffset, BroadcastOffset, PrefetchOffset + +.ifnb \PrefetchOffset\() + prefetcht0 [rsi+\VectorOffset\()+\PrefetchOffset\()] +.endif +.if \RowCount\() == 1 + vbroadcastsf ymm3,[rdi+\BroadcastOffset\()] + vfmadd231pf ymm4,ymm3,YMMWORD PTR [rsi+\VectorOffset\()] + vfmadd231pf ymm5,ymm3,YMMWORD PTR [rsi+\VectorOffset\()+32] +.else + vmovapf ymm0,YMMWORD PTR [rsi+\VectorOffset\()] + vmovapf ymm1,YMMWORD PTR [rsi+\VectorOffset\()+32] + EmitIfCountGE \RowCount\(), 1, "vbroadcastsf ymm3,[rdi+\BroadcastOffset\()]" + EmitIfCountGE \RowCount\(), 1, "vfmadd231pf ymm4,ymm3,ymm0" + EmitIfCountGE \RowCount\(), 1, "vfmadd231pf ymm5,ymm3,ymm1" + EmitIfCountGE \RowCount\(), 2, "vbroadcastsf ymm3,[rdi+r10+\BroadcastOffset\()]" + EmitIfCountGE \RowCount\(), 2, "vfmadd231pf ymm6,ymm3,ymm0" + EmitIfCountGE \RowCount\(), 2, "vfmadd231pf ymm7,ymm3,ymm1" + EmitIfCountGE \RowCount\(), 3, "vbroadcastsf ymm3,[rdi+r10*2+\BroadcastOffset\()]" + EmitIfCountGE \RowCount\(), 3, "vfmadd231pf ymm8,ymm3,ymm0" + EmitIfCountGE \RowCount\(), 3, "vfmadd231pf ymm9,ymm3,ymm1" + EmitIfCountGE \RowCount\(), 4, "vbroadcastsf ymm3,[rbx+\BroadcastOffset\()]" + EmitIfCountGE \RowCount\(), 4, "vfmadd231pf ymm10,ymm3,ymm0" + EmitIfCountGE \RowCount\(), 4, "vfmadd231pf ymm11,ymm3,ymm1" + EmitIfCountGE \RowCount\(), 5, "vbroadcastsf ymm3,[rbx+r10+\BroadcastOffset\()]" + EmitIfCountGE \RowCount\(), 5, "vfmadd231pf ymm12,ymm3,ymm0" + EmitIfCountGE \RowCount\(), 5, "vfmadd231pf ymm13,ymm3,ymm1" + EmitIfCountGE \RowCount\(), 6, "vbroadcastsf ymm3,[rbx+r10*2+\BroadcastOffset\()]" + EmitIfCountGE \RowCount\(), 6, "vfmadd231pf ymm14,ymm3,ymm0" + EmitIfCountGE \RowCount\(), 6, "vfmadd231pf ymm15,ymm3,ymm1" +.endif + + .endm +# 118 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\FgemmKernelFma3Common.h" + .macro ComputeBlockFma3By1 RowCount, VectorOffset, BroadcastOffset, PrefetchOffset + +.ifnb \PrefetchOffset\() + prefetcht0 [rsi+\VectorOffset\()+\PrefetchOffset\()] +.endif +.if \RowCount\() == 1 + vbroadcastsf ymm3,[rdi+\BroadcastOffset\()] + vfmadd231pf ymm5,ymm3,YMMWORD PTR [rsi+\VectorOffset\()] +.else + vmovapf ymm0,YMMWORD PTR [rsi+\VectorOffset\()] + EmitIfCountGE \RowCount\(), 1, "vbroadcastsf ymm3,[rdi+\BroadcastOffset\()]" + EmitIfCountGE \RowCount\(), 1, "vfmadd231pf ymm5,ymm3,ymm0" + EmitIfCountGE \RowCount\(), 2, "vbroadcastsf ymm3,[rdi+r10+\BroadcastOffset\()]" + EmitIfCountGE \RowCount\(), 2, "vfmadd231pf ymm7,ymm3,ymm0" + EmitIfCountGE \RowCount\(), 3, "vbroadcastsf ymm3,[rdi+r10*2+\BroadcastOffset\()]" + EmitIfCountGE \RowCount\(), 3, "vfmadd231pf ymm9,ymm3,ymm0" + EmitIfCountGE \RowCount\(), 4, "vbroadcastsf ymm3,[rbx+\BroadcastOffset\()]" + EmitIfCountGE \RowCount\(), 4, "vfmadd231pf ymm11,ymm3,ymm0" + EmitIfCountGE \RowCount\(), 5, "vbroadcastsf ymm3,[rbx+r10+\BroadcastOffset\()]" + EmitIfCountGE \RowCount\(), 5, "vfmadd231pf ymm13,ymm3,ymm0" + EmitIfCountGE \RowCount\(), 6, "vbroadcastsf ymm3,[rbx+r10*2+\BroadcastOffset\()]" + EmitIfCountGE \RowCount\(), 6, "vfmadd231pf ymm15,ymm3,ymm0" +.endif + + .endm +# 172 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\FgemmKernelFma3Common.h" + .macro ComputeBlockFma3Loop ComputeBlock, RowCount + +.if \RowCount\() > 3 + lea rbx,[r10*2+r10] + add rbx,rdi # compute matrix A plus 3 rows +.endif + ComputeBlockLoop \ComputeBlock\(), \RowCount\(), \RowCount\() > 3 + vbroadcastsf ymm2,[rsp+.LFgemmKernelFrame_alpha] +.if \RowCount\() > 3 + lea rbx,[rax*2+rax] + add rbx,rdx # compute matrix C plus 3 rows +.endif + + .endm +# 225 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\FgemmKernelFma3Common.h" + .macro ProcessCountM RowCount, Fallthrough + + cmp r9,.LFgemmYmmElementCount + jbe .LProcessRemainingCountN\@ + +.LProcessNextColumnLoop2xN\@: + ComputeBlockFma3Loop ComputeBlockFma3By2, \RowCount\() + EmitIfCountGE \RowCount\(), 1, "prefetcht0 [rdx+64]" + EmitIfCountGE \RowCount\(), 2, "prefetcht0 [rdx+rax+64]" + EmitIfCountGE \RowCount\(), 3, "prefetcht0 [rdx+rax*2+64]" + EmitIfCountGE \RowCount\(), 4, "prefetcht0 [rbx+64]" + EmitIfCountGE \RowCount\(), 5, "prefetcht0 [rbx+rax+64]" + EmitIfCountGE \RowCount\(), 6, "prefetcht0 [rbx+rax*2+64]" + sub r9,2*.LFgemmYmmElementCount + jb .LOutputMasked2xNBlock\@ + test r15b,r15b # ZeroMode? + jnz .LMultiplyAlpha2xNBlock\@ + EmitIfCountGE \RowCount\(), 1, "vfmadd213pf ymm4,ymm2,YMMWORD PTR [rdx]" + EmitIfCountGE \RowCount\(), 1, "vfmadd213pf ymm5,ymm2,YMMWORD PTR [rdx+32]" + EmitIfCountGE \RowCount\(), 2, "vfmadd213pf ymm6,ymm2,YMMWORD PTR [rdx+rax]" + EmitIfCountGE \RowCount\(), 2, "vfmadd213pf ymm7,ymm2,YMMWORD PTR [rdx+rax+32]" + EmitIfCountGE \RowCount\(), 3, "vfmadd213pf ymm8,ymm2,YMMWORD PTR [rdx+rax*2]" + EmitIfCountGE \RowCount\(), 3, "vfmadd213pf ymm9,ymm2,YMMWORD PTR [rdx+rax*2+32]" + EmitIfCountGE \RowCount\(), 4, "vfmadd213pf ymm10,ymm2,YMMWORD PTR [rbx]" + EmitIfCountGE \RowCount\(), 4, "vfmadd213pf ymm11,ymm2,YMMWORD PTR [rbx+32]" + EmitIfCountGE \RowCount\(), 5, "vfmadd213pf ymm12,ymm2,YMMWORD PTR [rbx+rax]" + EmitIfCountGE \RowCount\(), 5, "vfmadd213pf ymm13,ymm2,YMMWORD PTR [rbx+rax+32]" + EmitIfCountGE \RowCount\(), 6, "vfmadd213pf ymm14,ymm2,YMMWORD PTR [rbx+rax*2]" + EmitIfCountGE \RowCount\(), 6, "vfmadd213pf ymm15,ymm2,YMMWORD PTR [rbx+rax*2+32]" + jmp .LStore2xNBlock\@ + +.LMultiplyAlpha2xNBlock\@: + EmitIfCountGE \RowCount\(), 1, "vmulpf ymm4,ymm4,ymm2" + # multiply by alpha + EmitIfCountGE \RowCount\(), 1, "vmulpf ymm5,ymm5,ymm2" + EmitIfCountGE \RowCount\(), 2, "vmulpf ymm6,ymm6,ymm2" + EmitIfCountGE \RowCount\(), 2, "vmulpf ymm7,ymm7,ymm2" + EmitIfCountGE \RowCount\(), 3, "vmulpf ymm8,ymm8,ymm2" + EmitIfCountGE \RowCount\(), 3, "vmulpf ymm9,ymm9,ymm2" + EmitIfCountGE \RowCount\(), 4, "vmulpf ymm10,ymm10,ymm2" + EmitIfCountGE \RowCount\(), 4, "vmulpf ymm11,ymm11,ymm2" + EmitIfCountGE \RowCount\(), 5, "vmulpf ymm12,ymm12,ymm2" + EmitIfCountGE \RowCount\(), 5, "vmulpf ymm13,ymm13,ymm2" + EmitIfCountGE \RowCount\(), 6, "vmulpf ymm14,ymm14,ymm2" + EmitIfCountGE \RowCount\(), 6, "vmulpf ymm15,ymm15,ymm2" + +.LStore2xNBlock\@: + EmitIfCountGE \RowCount\(), 1, "vmovupf YMMWORD PTR [rdx],ymm4" + EmitIfCountGE \RowCount\(), 1, "vmovupf YMMWORD PTR [rdx+32],ymm5" + EmitIfCountGE \RowCount\(), 2, "vmovupf YMMWORD PTR [rdx+rax],ymm6" + EmitIfCountGE \RowCount\(), 2, "vmovupf YMMWORD PTR [rdx+rax+32],ymm7" + EmitIfCountGE \RowCount\(), 3, "vmovupf YMMWORD PTR [rdx+rax*2],ymm8" + EmitIfCountGE \RowCount\(), 3, "vmovupf YMMWORD PTR [rdx+rax*2+32],ymm9" + EmitIfCountGE \RowCount\(), 4, "vmovupf YMMWORD PTR [rbx],ymm10" + EmitIfCountGE \RowCount\(), 4, "vmovupf YMMWORD PTR [rbx+32],ymm11" + EmitIfCountGE \RowCount\(), 5, "vmovupf YMMWORD PTR [rbx+rax],ymm12" + EmitIfCountGE \RowCount\(), 5, "vmovupf YMMWORD PTR [rbx+rax+32],ymm13" + EmitIfCountGE \RowCount\(), 6, "vmovupf YMMWORD PTR [rbx+rax*2],ymm14" + EmitIfCountGE \RowCount\(), 6, "vmovupf YMMWORD PTR [rbx+rax*2+32],ymm15" + add rdx,2*32 # advance matrix C by 2 YMMWORDs + mov rdi,r11 # reload matrix A + vzeroall + cmp r9,.LFgemmYmmElementCount + ja .LProcessNextColumnLoop2xN\@ + test r9,r9 + jz .LExitKernel + +.LProcessRemainingCountN\@: + ComputeBlockFma3Loop ComputeBlockFma3By1, \RowCount\() + cmp r9,.LFgemmYmmElementCount + jb .LOutputMasked1xNBlock\@ + test r15b,r15b # ZeroMode? + jnz .LMultiplyAlpha1xNBlock\@ + EmitIfCountGE \RowCount\(), 1, "vfmadd213pf ymm5,ymm2,YMMWORD PTR [rdx]" + EmitIfCountGE \RowCount\(), 2, "vfmadd213pf ymm7,ymm2,YMMWORD PTR [rdx+rax]" + EmitIfCountGE \RowCount\(), 3, "vfmadd213pf ymm9,ymm2,YMMWORD PTR [rdx+rax*2]" + EmitIfCountGE \RowCount\(), 4, "vfmadd213pf ymm11,ymm2,YMMWORD PTR [rbx]" + EmitIfCountGE \RowCount\(), 5, "vfmadd213pf ymm13,ymm2,YMMWORD PTR [rbx+rax]" + EmitIfCountGE \RowCount\(), 6, "vfmadd213pf ymm15,ymm2,YMMWORD PTR [rbx+rax*2]" + jmp .LStore1xNBlock\@ + +.LMultiplyAlpha1xNBlock\@: + EmitIfCountGE \RowCount\(), 1, "vmulpf ymm5,ymm5,ymm2" + # multiply by alpha + EmitIfCountGE \RowCount\(), 2, "vmulpf ymm7,ymm7,ymm2" + EmitIfCountGE \RowCount\(), 3, "vmulpf ymm9,ymm9,ymm2" + EmitIfCountGE \RowCount\(), 4, "vmulpf ymm11,ymm11,ymm2" + EmitIfCountGE \RowCount\(), 5, "vmulpf ymm13,ymm13,ymm2" + EmitIfCountGE \RowCount\(), 6, "vmulpf ymm15,ymm15,ymm2" + +.LStore1xNBlock\@: + EmitIfCountGE \RowCount\(), 1, "vmovupf YMMWORD PTR [rdx],ymm5" + EmitIfCountGE \RowCount\(), 2, "vmovupf YMMWORD PTR [rdx+rax],ymm7" + EmitIfCountGE \RowCount\(), 3, "vmovupf YMMWORD PTR [rdx+rax*2],ymm9" + EmitIfCountGE \RowCount\(), 4, "vmovupf YMMWORD PTR [rbx],ymm11" + EmitIfCountGE \RowCount\(), 5, "vmovupf YMMWORD PTR [rbx+rax],ymm13" + EmitIfCountGE \RowCount\(), 6, "vmovupf YMMWORD PTR [rbx+rax*2],ymm15" + jmp .LExitKernelAndZeroUpper + +.LOutputMasked2xNBlock\@: + test r15b,r15b # ZeroMode? + jnz .LMultiplyAlphaMasked2xNBlock\@ + EmitIfCountGE \RowCount\(), 1, "vfmadd213pf ymm4,ymm2,YMMWORD PTR [rdx]" + EmitIfCountGE \RowCount\(), 2, "vfmadd213pf ymm6,ymm2,YMMWORD PTR [rdx+rax]" + EmitIfCountGE \RowCount\(), 3, "vfmadd213pf ymm8,ymm2,YMMWORD PTR [rdx+rax*2]" + EmitIfCountGE \RowCount\(), 4, "vfmadd213pf ymm10,ymm2,YMMWORD PTR [rbx]" + EmitIfCountGE \RowCount\(), 5, "vfmadd213pf ymm12,ymm2,YMMWORD PTR [rbx+rax]" + EmitIfCountGE \RowCount\(), 6, "vfmadd213pf ymm14,ymm2,YMMWORD PTR [rbx+rax*2]" + jmp .LStoreMasked2xNBlock\@ + +.LMultiplyAlphaMasked2xNBlock\@: + EmitIfCountGE \RowCount\(), 1, "vmulpf ymm4,ymm4,ymm2" + EmitIfCountGE \RowCount\(), 2, "vmulpf ymm6,ymm6,ymm2" + EmitIfCountGE \RowCount\(), 3, "vmulpf ymm8,ymm8,ymm2" + EmitIfCountGE \RowCount\(), 4, "vmulpf ymm10,ymm10,ymm2" + EmitIfCountGE \RowCount\(), 5, "vmulpf ymm12,ymm12,ymm2" + EmitIfCountGE \RowCount\(), 6, "vmulpf ymm14,ymm14,ymm2" + +.LStoreMasked2xNBlock\@: + EmitIfCountGE \RowCount\(), 1, "vmovupf YMMWORD PTR [rdx],ymm4" + EmitIfCountGE \RowCount\(), 2, "vmovupf YMMWORD PTR [rdx+rax],ymm6" + EmitIfCountGE \RowCount\(), 3, "vmovupf YMMWORD PTR [rdx+rax*2],ymm8" + EmitIfCountGE \RowCount\(), 4, "vmovupf YMMWORD PTR [rbx],ymm10" + EmitIfCountGE \RowCount\(), 5, "vmovupf YMMWORD PTR [rbx+rax],ymm12" + EmitIfCountGE \RowCount\(), 6, "vmovupf YMMWORD PTR [rbx+rax*2],ymm14" + add rdx,32 # advance matrix C by YMMWORD +.if \RowCount\() > 3 + add rbx,32 # advance matrix C plus 3 rows by YMMWORD +.endif + add r9,.LFgemmYmmElementCount # correct for over-subtract above + +.LOutputMasked1xNBlock\@: + neg r9 + lea rdi,MlasMaskMoveTableAvx[rip+8*4] + vmovdqu ymm0,YMMWORD PTR [rdi+r9*.LFgemmElementSize] + test r15b,r15b # ZeroMode? + jnz .LMultiplyAlphaMasked1xNBlock\@ + EmitIfCountGE \RowCount\(), 1, "vmaskmovpf ymm4,ymm0,YMMWORD PTR [rdx]" + EmitIfCountGE \RowCount\(), 2, "vmaskmovpf ymm6,ymm0,YMMWORD PTR [rdx+rax]" + EmitIfCountGE \RowCount\(), 3, "vmaskmovpf ymm8,ymm0,YMMWORD PTR [rdx+rax*2]" + EmitIfCountGE \RowCount\(), 4, "vmaskmovpf ymm10,ymm0,YMMWORD PTR [rbx]" + EmitIfCountGE \RowCount\(), 5, "vmaskmovpf ymm12,ymm0,YMMWORD PTR [rbx+rax]" + EmitIfCountGE \RowCount\(), 6, "vmaskmovpf ymm14,ymm0,YMMWORD PTR [rbx+rax*2]" + EmitIfCountGE \RowCount\(), 1, "vfmadd213pf ymm5,ymm2,ymm4" + EmitIfCountGE \RowCount\(), 2, "vfmadd213pf ymm7,ymm2,ymm6" + EmitIfCountGE \RowCount\(), 3, "vfmadd213pf ymm9,ymm2,ymm8" + EmitIfCountGE \RowCount\(), 4, "vfmadd213pf ymm11,ymm2,ymm10" + EmitIfCountGE \RowCount\(), 5, "vfmadd213pf ymm13,ymm2,ymm12" + EmitIfCountGE \RowCount\(), 6, "vfmadd213pf ymm15,ymm2,ymm14" + jmp .LStoreMasked1xNBlock\@ + +.LMultiplyAlphaMasked1xNBlock\@: + EmitIfCountGE \RowCount\(), 1, "vmulpf ymm5,ymm5,ymm2" + EmitIfCountGE \RowCount\(), 2, "vmulpf ymm7,ymm7,ymm2" + EmitIfCountGE \RowCount\(), 3, "vmulpf ymm9,ymm9,ymm2" + EmitIfCountGE \RowCount\(), 4, "vmulpf ymm11,ymm11,ymm2" + EmitIfCountGE \RowCount\(), 5, "vmulpf ymm13,ymm13,ymm2" + EmitIfCountGE \RowCount\(), 6, "vmulpf ymm15,ymm15,ymm2" + +.LStoreMasked1xNBlock\@: + EmitIfCountGE \RowCount\(), 1, "vmaskmovpf YMMWORD PTR [rdx],ymm0,ymm5" + EmitIfCountGE \RowCount\(), 2, "vmaskmovpf YMMWORD PTR [rdx+rax],ymm0,ymm7" + EmitIfCountGE \RowCount\(), 3, "vmaskmovpf YMMWORD PTR [rdx+rax*2],ymm0,ymm9" + EmitIfCountGE \RowCount\(), 4, "vmaskmovpf YMMWORD PTR [rbx],ymm0,ymm11" + EmitIfCountGE \RowCount\(), 5, "vmaskmovpf YMMWORD PTR [rbx+rax],ymm0,ymm13" + EmitIfCountGE \RowCount\(), 6, "vmaskmovpf YMMWORD PTR [rbx+rax*2],ymm0,ymm15" +.ifb \Fallthrough\() + jmp .LExitKernelAndZeroUpper +.endif + + .endm +# 409 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\FgemmKernelFma3Common.h" + .macro FgemmKernelFma3Function FunctionName +# 452 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\FgemmKernelFma3Common.h" + FUNCTION_ENTRY \FunctionName\() + + push rbp + push rbx + push r15 + mov r11,rdi + mov r10,.LFgemmKernelFrame_lda[rsp] + shl r10,.LFgemmElementShift # convert lda to bytes + mov rax,.LFgemmKernelFrame_ldc[rsp] + shl rax,.LFgemmElementShift # convert ldc to bytes + movzx r15,BYTE PTR .LFgemmKernelFrame_ZeroMode[rsp] + vmovsf .LFgemmKernelFrame_alpha[rsp],xmm0 + vzeroall + + + + + + cmp r8,5 + ja .LProcessCountM6 + je .LProcessCountM5 + cmp r8,3 + ja .LProcessCountM4 + je .LProcessCountM3 + cmp r8,1 + je .LProcessCountM1 + +.LProcessCountM2: + ProcessCountM 2 + +.LProcessCountM4: + ProcessCountM 4 + +.LProcessCountM6: + mov r8d,6 # return 6 rows handled + ProcessCountM 6, Fallthrough + + + + + +.LExitKernelAndZeroUpper: + vzeroupper + +.LExitKernel: + mov eax,r8d + pop r15 + pop rbx + pop rbp + ret + +.LProcessCountM1: + ProcessCountM 1 + +.LProcessCountM3: + ProcessCountM 3 + +.LProcessCountM5: + ProcessCountM 5 + + .endm +# 23 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\SgemmKernelFma3.S" 2 + + .intel_syntax noprefix + + .text + + + + + +FgemmKernelFma3Function MlasGemmFloatKernelFma3 + + .end +]], + ["mcpp_generated/SgemmKernelM1Avx.asm"] = [[ +# 1 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\SgemmKernelM1Avx.S" +# 1 "" 1 +# 1 "" 3 +# 403 "" 3 +# 1 "" 1 +# 1 "" 2 +# 1 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\SgemmKernelM1Avx.S" 2 +# 20 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\SgemmKernelM1Avx.S" +# 1 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\asmmacro.h" 1 +# 35 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\asmmacro.h" + .macro FUNCTION_ENTRY FunctionName + + .p2align 4 + + + + + .globl \FunctionName\() + .type \FunctionName\(),@function +\FunctionName\(): + + + .endm +# 65 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\asmmacro.h" + .macro add_immed Register, Immediate + +.if (\Immediate\() != 128) + add \Register\(),\Immediate\() +.else + sub \Register\(),-\Immediate\() # smaller encoding +.endif + + .endm +# 92 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\asmmacro.h" + .macro EmitIfCountGE Count1, Value1, Statement + +.if (\Count1\() >= \Value1\()) + \Statement\() +.endif + + .endm +# 113 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\asmmacro.h" + .macro EmitIfCount2EQ Count1, Value1, Count2, Value2, Statement + +.if (\Count1\() == \Value1\()) && (\Count2\() == \Value2\()) + \Statement\() +.endif + + .endm +# 143 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\asmmacro.h" + .macro EmitIfCount2GE Count1, Value1, Count2, Value2, Statement + +.if (\Count1\() >= \Value1\()) && (\Count2\() >= \Value2\()) + \Statement\() +.endif + + .endm +# 166 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\asmmacro.h" + .macro EmitForEachRegister RegList, Statement + + .irp RegItem, \RegList\() + \Statement\() + .endr + + .endm +# 21 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\SgemmKernelM1Avx.S" 2 + + .intel_syntax noprefix + + .text +# 59 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\SgemmKernelM1Avx.S" + FUNCTION_ENTRY MlasSgemmKernelM1Avx + + push rbx + shl r9,2 # convert ldb to bytes + mov r10,rdx + mov r11,rsi + + + + + + vxorps xmm1,xmm1,xmm1 + vcmpeqss xmm0,xmm1,xmm0 + vshufps xmm0,xmm0,xmm0,0 + vinsertf128 ymm0,ymm0,xmm0,1 + + + + + + mov eax,r8d + and eax,7 + vmovd xmm7,eax + vshufps xmm7,xmm7,xmm7,0 + vpcmpgtd xmm6,xmm7,XMMWORD PTR MlasMaskMoveAvx[rip+16] + vpcmpgtd xmm7,xmm7,XMMWORD PTR MlasMaskMoveAvx[rip] + vinsertf128 ymm7,ymm7,xmm6,1 + + + + + + sub rcx,4 + jb .LProcessRemainingCountK + +.LProcessRowLoop4: + vbroadcastss ymm2,DWORD PTR [rdi] + mov rax,r8 # reload CountN + vbroadcastss ymm3,DWORD PTR [rdi+4] + mov rsi,r11 # reload matrix B + vbroadcastss ymm4,DWORD PTR [rdi+8] + mov rdx,r10 # reload matrix C + vbroadcastss ymm5,DWORD PTR [rdi+12] + add rdi,4*4 # advance matrix A by 4 columns + lea r11,[rsi+r9*4] # advance matrix B by 4 rows + sub rax,16 + jb .LProcessRemainingCountN4 + +.LProcessColumnLoop4: + lea rbx,[rsi+r9*2] # compute matrix B plus 2 rows + vmulps ymm1,ymm2,YMMWORD PTR [rsi] + vmulps ymm6,ymm2,YMMWORD PTR [rsi+32] + vmulps ymm8,ymm3,YMMWORD PTR [rsi+r9] + vaddps ymm1,ymm1,ymm8 + vmulps ymm8,ymm3,YMMWORD PTR [rsi+r9+32] + vaddps ymm6,ymm6,ymm8 + vmulps ymm8,ymm4,YMMWORD PTR [rbx] + vaddps ymm1,ymm1,ymm8 + vmulps ymm8,ymm4,YMMWORD PTR [rbx+32] + vaddps ymm6,ymm6,ymm8 + vmulps ymm8,ymm5,YMMWORD PTR [rbx+r9] + vaddps ymm1,ymm1,ymm8 + vmulps ymm8,ymm5,YMMWORD PTR [rbx+r9+32] + vaddps ymm6,ymm6,ymm8 + vandnps ymm8,ymm0,YMMWORD PTR [rdx] + vaddps ymm1,ymm1,ymm8 + vandnps ymm8,ymm0,YMMWORD PTR [rdx+32] + vaddps ymm6,ymm6,ymm8 + vmovups YMMWORD PTR [rdx],ymm1 + vmovups YMMWORD PTR [rdx+32],ymm6 + add rsi,16*4 # advance matrix B by 16 columns + add rdx,16*4 # advance matrix C by 16 columns + sub rax,16 + jae .LProcessColumnLoop4 + +.LProcessRemainingCountN4: + test al,15 # test for unaligned columns + jz .LProcessedRemainingCountN4 + test al,8 # CountN >= 8? + jz .LProcessRemainingCountNSmall4 + lea rbx,[rsi+r9*2] # compute matrix B plus 2 rows + vmulps ymm1,ymm2,YMMWORD PTR [rsi] + vmulps ymm8,ymm3,YMMWORD PTR [rsi+r9] + vaddps ymm1,ymm1,ymm8 + vmulps ymm8,ymm4,YMMWORD PTR [rbx] + vaddps ymm1,ymm1,ymm8 + vmulps ymm8,ymm5,YMMWORD PTR [rbx+r9] + vaddps ymm1,ymm1,ymm8 + vandnps ymm8,ymm0,YMMWORD PTR [rdx] + vaddps ymm1,ymm1,ymm8 + vmovups YMMWORD PTR [rdx],ymm1 + add rsi,8*4 # advance matrix B by 8 columns + add rdx,8*4 # advance matrix C by 8 columns + test al,7 + jz .LProcessedRemainingCountN4 + +.LProcessRemainingCountNSmall4: + lea rbx,[rsi+r9*2] # compute matrix B plus 2 rows + vmaskmovps ymm6,ymm7,YMMWORD PTR [rsi] + vmulps ymm1,ymm2,ymm6 + vmaskmovps ymm6,ymm7,YMMWORD PTR [rsi+r9] + vmulps ymm8,ymm3,ymm6 + vaddps ymm1,ymm1,ymm8 + vmaskmovps ymm6,ymm7,YMMWORD PTR [rbx] + vmulps ymm8,ymm4,ymm6 + vaddps ymm1,ymm1,ymm8 + vmaskmovps ymm6,ymm7,YMMWORD PTR [rbx+r9] + vmulps ymm8,ymm5,ymm6 + vaddps ymm1,ymm1,ymm8 + vmaskmovps ymm6,ymm7,YMMWORD PTR [rdx] + vandnps ymm6,ymm0,ymm6 + vaddps ymm1,ymm1,ymm6 + vmaskmovps YMMWORD PTR [rdx],ymm7,ymm1 + +.LProcessedRemainingCountN4: + vxorps xmm0,xmm0,xmm0 # switch to accumulate mode + sub rcx,4 + jae .LProcessRowLoop4 + +.LProcessRemainingCountK: + test cl,2 + jnz .LProcessRowLoop2 + test cl,1 + jnz .LProcessRowLoop1 + +.LExitKernel: + vzeroupper + pop rbx + ret + + + + + +.LProcessRowLoop2: + vbroadcastss ymm2,DWORD PTR [rdi] + mov rax,r8 # reload CountN + vbroadcastss ymm3,DWORD PTR [rdi+4] + mov rsi,r11 # reload matrix B + mov rdx,r10 # reload matrix C + add rdi,2*4 # advance matrix A by 2 columns + lea r11,[rsi+r9*2] # advance matrix B by 2 rows + sub rax,8 + jb .LProcessRemainingCountN2 + +.LProcessColumnLoop2: + vmulps ymm1,ymm2,YMMWORD PTR [rsi] + vmulps ymm8,ymm3,YMMWORD PTR [rsi+r9] + vaddps ymm1,ymm1,ymm8 + vandnps ymm6,ymm0,YMMWORD PTR [rdx] + vaddps ymm1,ymm1,ymm6 + vmovups YMMWORD PTR [rdx],ymm1 + add rsi,8*4 # advance matrix B by 8 columns + add rdx,8*4 # advance matrix C by 8 columns + sub rax,8 + jae .LProcessColumnLoop2 + +.LProcessRemainingCountN2: + test al,7 # test for unaligned columns + jz .LProcessedRemainingCountN2 + vmaskmovps ymm6,ymm7,YMMWORD PTR [rsi] + vmulps ymm1,ymm2,ymm6 + vmaskmovps ymm6,ymm7,YMMWORD PTR [rsi+r9] + vmulps ymm8,ymm3,ymm6 + vaddps ymm1,ymm1,ymm8 + vmaskmovps ymm6,ymm7,YMMWORD PTR [rdx] + vandnps ymm6,ymm0,ymm6 + vaddps ymm1,ymm1,ymm6 + vmaskmovps YMMWORD PTR [rdx],ymm7,ymm1 + +.LProcessedRemainingCountN2: + test cl,1 + jz .LExitKernel + vxorps xmm0,xmm0,xmm0 # switch to accumulate mode + + + + + +.LProcessRowLoop1: + vbroadcastss ymm2,DWORD PTR [rdi] + mov rax,r8 # reload CountN + mov rsi,r11 # reload matrix B + mov rdx,r10 # reload matrix C + sub rax,8 + jb .LProcessRemainingCountN1 + +.LProcessColumnLoop1: + vmulps ymm1,ymm2,YMMWORD PTR [rsi] + vandnps ymm6,ymm0,YMMWORD PTR [rdx] + vaddps ymm1,ymm1,ymm6 + vmovups YMMWORD PTR [rdx],ymm1 + add rsi,8*4 # advance matrix B by 8 columns + add rdx,8*4 # advance matrix C by 8 columns + sub rax,8 + jae .LProcessColumnLoop1 + +.LProcessRemainingCountN1: + test al,7 # test for unaligned columns + jz .LExitKernel + vmaskmovps ymm6,ymm7,YMMWORD PTR [rsi] + vmulps ymm1,ymm2,ymm6 + vmaskmovps ymm6,ymm7,YMMWORD PTR [rdx] + vandnps ymm6,ymm0,ymm6 + vaddps ymm1,ymm1,ymm6 + vmaskmovps YMMWORD PTR [rdx],ymm7,ymm1 + jmp .LExitKernel + + .end +]], + ["mcpp_generated/SgemmKernelM1TransposeBAvx.asm"] = [[ +# 1 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\SgemmKernelM1TransposeBAvx.S" +# 1 "" 1 +# 1 "" 3 +# 403 "" 3 +# 1 "" 1 +# 1 "" 2 +# 1 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\SgemmKernelM1TransposeBAvx.S" 2 +# 20 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\SgemmKernelM1TransposeBAvx.S" +# 1 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\asmmacro.h" 1 +# 35 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\asmmacro.h" + .macro FUNCTION_ENTRY FunctionName + + .p2align 4 + + + + + .globl \FunctionName\() + .type \FunctionName\(),@function +\FunctionName\(): + + + .endm +# 65 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\asmmacro.h" + .macro add_immed Register, Immediate + +.if (\Immediate\() != 128) + add \Register\(),\Immediate\() +.else + sub \Register\(),-\Immediate\() # smaller encoding +.endif + + .endm +# 92 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\asmmacro.h" + .macro EmitIfCountGE Count1, Value1, Statement + +.if (\Count1\() >= \Value1\()) + \Statement\() +.endif + + .endm +# 113 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\asmmacro.h" + .macro EmitIfCount2EQ Count1, Value1, Count2, Value2, Statement + +.if (\Count1\() == \Value1\()) && (\Count2\() == \Value2\()) + \Statement\() +.endif + + .endm +# 143 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\asmmacro.h" + .macro EmitIfCount2GE Count1, Value1, Count2, Value2, Statement + +.if (\Count1\() >= \Value1\()) && (\Count2\() >= \Value2\()) + \Statement\() +.endif + + .endm +# 166 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\asmmacro.h" + .macro EmitForEachRegister RegList, Statement + + .irp RegItem, \RegList\() + \Statement\() + .endr + + .endm +# 21 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\SgemmKernelM1TransposeBAvx.S" 2 + + .intel_syntax noprefix + + .text +# 59 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\SgemmKernelM1TransposeBAvx.S" + FUNCTION_ENTRY MlasSgemmKernelM1TransposeBAvx + + push rbx + shl r9,2 # convert ldb to bytes + mov r10,rdi + mov r11,rsi + + + + + + vxorps xmm1,xmm1,xmm1 + vcmpeqss xmm0,xmm1,xmm0 + vshufps xmm0,xmm0,xmm0,0 + + + + + + mov eax,ecx + and eax,7 + vmovd xmm7,eax + vshufps xmm7,xmm7,xmm7,0 + vpcmpgtd xmm6,xmm7,XMMWORD PTR MlasMaskMoveAvx[rip+16] + vpcmpgtd xmm7,xmm7,XMMWORD PTR MlasMaskMoveAvx[rip] + vinsertf128 ymm7,ymm7,xmm6,1 + + + + + + sub r8,4 + jb .LProcessRemainingCountN + +.LProcessRowLoop4: + vxorps xmm2,xmm2,xmm2 # clear row accumulators + vxorps xmm3,xmm3,xmm3 + vxorps xmm4,xmm4,xmm4 + vxorps xmm5,xmm5,xmm5 + mov rdi,r10 # reload matrix A + mov rsi,r11 # reload matrix B + mov rax,rcx # reload CountK + lea r11,[rsi+r9*4] # advance matrix B by 4 rows + sub rax,8 + jb .LProcessRemainingCountK4 + +.LProcessColumnLoop4: + lea rbx,[rsi+r9*2] # compute matrix B plus 2 rows + vmovups ymm1,YMMWORD PTR [rdi] + vmulps ymm6,ymm1,YMMWORD PTR [rsi] + vaddps ymm2,ymm2,ymm6 + vmulps ymm6,ymm1,YMMWORD PTR [rsi+r9] + vaddps ymm3,ymm3,ymm6 + vmulps ymm6,ymm1,YMMWORD PTR [rbx] + vaddps ymm4,ymm4,ymm6 + vmulps ymm6,ymm1,YMMWORD PTR [rbx+r9] + vaddps ymm5,ymm5,ymm6 + add rdi,8*4 # advance matrix A by 8 columns + add rsi,8*4 # advance matrix B by 8 columns + sub rax,8 + jae .LProcessColumnLoop4 + +.LProcessRemainingCountK4: + test al,7 # test for unaligned columns + jz .LOutput4x1Block + lea rbx,[rsi+r9*2] # compute matrix B plus 2 rows + vmaskmovps ymm1,ymm7,YMMWORD PTR [rdi] + vmaskmovps ymm6,ymm7,YMMWORD PTR [rsi] + vmulps ymm6,ymm1,ymm6 + vaddps ymm2,ymm2,ymm6 + vmaskmovps ymm6,ymm7,YMMWORD PTR [rsi+r9] + vmulps ymm6,ymm1,ymm6 + vaddps ymm3,ymm3,ymm6 + vmaskmovps ymm6,ymm7,YMMWORD PTR [rbx] + vmulps ymm6,ymm1,ymm6 + vaddps ymm4,ymm4,ymm6 + vmaskmovps ymm6,ymm7,YMMWORD PTR [rbx+r9] + vmulps ymm6,ymm1,ymm6 + vaddps ymm5,ymm5,ymm6 + + + + + +.LOutput4x1Block: + vunpcklps ymm6,ymm2,ymm3 # transpose row accumulators + vunpckhps ymm1,ymm2,ymm3 + vunpcklps ymm2,ymm4,ymm5 + vunpckhps ymm3,ymm4,ymm5 + vunpcklpd ymm4,ymm6,ymm2 + vunpckhpd ymm5,ymm6,ymm2 + vaddps ymm4,ymm4,ymm5 + vunpcklpd ymm6,ymm1,ymm3 + vunpckhpd ymm2,ymm1,ymm3 + vaddps ymm4,ymm4,ymm6 + vaddps ymm4,ymm4,ymm2 + vextractf128 xmm5,ymm4,1 + vaddps xmm4,xmm4,xmm5 + vandnps xmm6,xmm0,XMMWORD PTR [rdx] + vaddps xmm4,xmm4,xmm6 + vmovups XMMWORD PTR [rdx],xmm4 + add rdx,4*4 # advance matrix C by 4 columns + sub r8,4 + jae .LProcessRowLoop4 + +.LProcessRemainingCountN: + test r8d,2 + jnz .LProcessRowLoop2 + test r8d,1 + jnz .LProcessRowLoop1 + +.LExitKernel: + vzeroupper + pop rbx + ret + + + + + +.LProcessRowLoop2: + vxorps xmm2,xmm2,xmm2 # clear row accumulators + vxorps xmm3,xmm3,xmm3 + mov rdi,r10 # reload matrix A + mov rsi,r11 # reload matrix B + mov rax,rcx # reload CountK + lea r11,[rsi+r9*2] # advance matrix B by 2 rows + sub rax,8 + jb .LProcessRemainingCountK2 + +.LProcessColumnLoop2: + vmovups ymm1,YMMWORD PTR [rdi] + vmulps ymm6,ymm1,YMMWORD PTR [rsi] + vaddps ymm2,ymm2,ymm6 + vmulps ymm6,ymm1,YMMWORD PTR [rsi+r9] + vaddps ymm3,ymm3,ymm6 + add rdi,8*4 # advance matrix A by 8 columns + add rsi,8*4 # advance matrix B by 8 columns + sub rax,8 + jae .LProcessColumnLoop2 + +.LProcessRemainingCountK2: + test al,7 # test for unaligned columns + jz .LOutput2x1Block + vmaskmovps ymm1,ymm7,YMMWORD PTR [rdi] + vmaskmovps ymm6,ymm7,YMMWORD PTR [rsi] + vmulps ymm6,ymm1,ymm6 + vaddps ymm2,ymm2,ymm6 + vmaskmovps ymm6,ymm7,YMMWORD PTR [rsi+r9] + vmulps ymm6,ymm1,ymm6 + vaddps ymm3,ymm3,ymm6 + + + + + +.LOutput2x1Block: + vunpcklps ymm4,ymm2,ymm3 # reduce row accumulators + vunpckhps ymm2,ymm2,ymm3 + vaddps ymm2,ymm2,ymm4 + vextractf128 xmm4,ymm2,1 + vaddps xmm2,xmm2,xmm4 + vmovhlps xmm4,xmm2,xmm2 + vaddps xmm2,xmm2,xmm4 + vmovsd xmm3,QWORD PTR [rdx] + vandnps xmm3,xmm0,xmm3 + vaddps xmm2,xmm2,xmm3 + vmovsd QWORD PTR [rdx],xmm2 + add rdx,2*4 # advance matrix C by 2 columns + test r8d,1 + jz .LExitKernel + + + + + +.LProcessRowLoop1: + vxorps xmm2,xmm2,xmm2 # clear row accumulators + mov rdi,r10 # reload matrix A + mov rsi,r11 # reload matrix B + mov rax,rcx # reload CountK + sub rax,8 + jb .LProcessRemainingCountK1 + +.LProcessColumnLoop1: + vmovups ymm1,YMMWORD PTR [rdi] + vmulps ymm6,ymm1,YMMWORD PTR [rsi] + vaddps ymm2,ymm2,ymm6 + add rdi,8*4 # advance matrix A by 8 columns + add rsi,8*4 # advance matrix B by 8 columns + sub rax,8 + jae .LProcessColumnLoop1 + +.LProcessRemainingCountK1: + test al,7 # test for unaligned columns + jz .LOutput1x1Block + vmaskmovps ymm1,ymm7,YMMWORD PTR [rdi] + vmaskmovps ymm6,ymm7,YMMWORD PTR [rsi] + vmulps ymm6,ymm1,ymm6 + vaddps ymm2,ymm2,ymm6 + + + + + +.LOutput1x1Block: + vhaddps ymm2,ymm2,ymm2 # reduce row accumulators + vhaddps ymm2,ymm2,ymm2 + vextractf128 xmm4,ymm2,1 + vaddss xmm2,xmm2,xmm4 + vmovss xmm3,DWORD PTR [rdx] + vandnps xmm3,xmm0,xmm3 + vaddss xmm2,xmm2,xmm3 + vmovss DWORD PTR [rdx],xmm2 + jmp .LExitKernel + + .end +]], + ["mcpp_generated/SgemmKernelSse2.asm"] = [[ +# 1 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\SgemmKernelSse2.S" +# 1 "" 1 +# 1 "" 3 +# 395 "" 3 +# 1 "" 1 +# 1 "" 2 +# 1 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\SgemmKernelSse2.S" 2 +# 20 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\SgemmKernelSse2.S" +# 1 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\asmmacro.h" 1 +# 35 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\asmmacro.h" + .macro FUNCTION_ENTRY FunctionName + + .p2align 4 + + + + + .globl \FunctionName\() + .type \FunctionName\(),@function +\FunctionName\(): + + + .endm +# 65 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\asmmacro.h" + .macro add_immed Register, Immediate + +.if (\Immediate\() != 128) + add \Register\(),\Immediate\() +.else + sub \Register\(),-\Immediate\() # smaller encoding +.endif + + .endm +# 92 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\asmmacro.h" + .macro EmitIfCountGE Count1, Value1, Statement + +.if (\Count1\() >= \Value1\()) + \Statement\() +.endif + + .endm +# 113 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\asmmacro.h" + .macro EmitIfCount2EQ Count1, Value1, Count2, Value2, Statement + +.if (\Count1\() == \Value1\()) && (\Count2\() == \Value2\()) + \Statement\() +.endif + + .endm +# 143 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\asmmacro.h" + .macro EmitIfCount2GE Count1, Value1, Count2, Value2, Statement + +.if (\Count1\() >= \Value1\()) && (\Count2\() >= \Value2\()) + \Statement\() +.endif + + .endm +# 166 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\asmmacro.h" + .macro EmitForEachRegister RegList, Statement + + .irp RegItem, \RegList\() + \Statement\() + .endr + + .endm +# 21 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\SgemmKernelSse2.S" 2 +# 1 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\SgemmKernelCommon.h" 1 +# 22 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\SgemmKernelCommon.h" + .equ .LFgemmElementShift, 2 + .equ .LFgemmElementSize, 1 << .LFgemmElementShift + +# 1 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\FgemmKernelCommon.h" 1 +# 22 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\FgemmKernelCommon.h" + .equ .LFgemmKernelFrame_SavedR12, -32 + .equ .LFgemmKernelFrame_SavedR13, -24 + .equ .LFgemmKernelFrame_SavedR14, -16 + .equ .LFgemmKernelFrame_alpha, -8 + .equ .LFgemmKernelFrame_SavedR15, 0 + .equ .LFgemmKernelFrame_SavedRbx, 8 + .equ .LFgemmKernelFrame_SavedRbp, 16 + .equ .LFgemmKernelFrame_ReturnAddress, 24 + .equ .LFgemmKernelFrame_lda, 32 + .equ .LFgemmKernelFrame_ldc, 40 + .equ .LFgemmKernelFrame_ZeroMode, 48 + + + + + + .equ .LFgemmXmmElementCount, 16 / .LFgemmElementSize + .equ .LFgemmYmmElementCount, 32 / .LFgemmElementSize + .equ .LFgemmZmmElementCount, 64 / .LFgemmElementSize +# 80 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\FgemmKernelCommon.h" + .macro ComputeBlockLoop ComputeBlock, RowCount, AdvanceMatrixAPlusRows + + mov rbp,rcx # reload CountK + sub rbp,4 + jb .LProcessRemainingBlocks\@ + +.LComputeBlockBy4Loop\@: + \ComputeBlock\() \RowCount\(), 0, .LFgemmElementSize*0, 64*4 + \ComputeBlock\() \RowCount\(), 2*32, .LFgemmElementSize*1, 64*4 + add_immed rsi,2*2*32 # advance matrix B by 128 bytes + \ComputeBlock\() \RowCount\(), 0, .LFgemmElementSize*2, 64*4 + \ComputeBlock\() \RowCount\(), 2*32, .LFgemmElementSize*3, 64*4 + add_immed rsi,2*2*32 # advance matrix B by 128 bytes + add rdi,4*.LFgemmElementSize # advance matrix A by 4 elements +.if \RowCount\() > 3 + add rbx,4*.LFgemmElementSize # advance matrix A plus rows by 4 elements +.if \RowCount\() == 12 + add r13,4*.LFgemmElementSize + add r14,4*.LFgemmElementSize +.endif +.endif + sub rbp,4 + jae .LComputeBlockBy4Loop\@ + +.LProcessRemainingBlocks\@: + add rbp,4 # correct for over-subtract above + jz .LOutputBlock\@ + +.LComputeBlockBy1Loop\@: + \ComputeBlock\() \RowCount\(), 0, 0 + add rsi,2*32 # advance matrix B by 64 bytes + add rdi,.LFgemmElementSize # advance matrix A by 1 element +.if \RowCount\() > 3 + add rbx,.LFgemmElementSize # advance matrix A plus rows by 1 element +.if \RowCount\() == 12 + add r13,.LFgemmElementSize + add r14,.LFgemmElementSize +.endif +.endif + dec rbp + jne .LComputeBlockBy1Loop\@ + +.LOutputBlock\@: + + .endm +# 26 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\SgemmKernelCommon.h" 2 + + + + + +.macro addpf Operand:vararg; addps \Operand\(); .endm; +.macro movsf Operand:vararg; movss \Operand\(); .endm; +.macro movupf Operand:vararg; movups \Operand\(); .endm; + +.macro vaddpf Operand:vararg; vaddps \Operand\(); .endm; +.macro vbroadcastsf Operand:vararg; vbroadcastss \Operand\(); .endm; +.macro vfmadd213pf Operand:vararg; vfmadd213ps \Operand\(); .endm; +.macro vfmadd231pf Operand:vararg; vfmadd231ps \Operand\(); .endm; +.macro vmaskmovpf Operand:vararg; vmaskmovps \Operand\(); .endm; +.macro vmovapf Operand:vararg; vmovaps \Operand\(); .endm; +.macro vmovsf Operand:vararg; vmovss \Operand\(); .endm; +.macro vmovupf Operand:vararg; vmovups \Operand\(); .endm; +.macro vmulpf Operand:vararg; vmulps \Operand\(); .endm; +.macro vxorpf Operand:vararg; vxorps \Operand\(); .endm; + + .macro vfmadd231pf_bcst DestReg, SrcReg, Address + + vfmadd231ps \DestReg\(), \SrcReg\(), \Address\(){1to16} + + .endm +# 22 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\SgemmKernelSse2.S" 2 +# 1 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\FgemmKernelSse2Common.h" 1 +# 45 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\FgemmKernelSse2Common.h" + .macro AccumulateAndStoreBlock RowCount, VectorCount + + test r15b,r15b # ZeroMode? + jnz .LSkipAccumulateOutput\@ + EmitIfCount2GE \RowCount\(), 1, \VectorCount\(), 1, "movupf xmm0,XMMWORD PTR [rdx]" + EmitIfCount2GE \RowCount\(), 1, \VectorCount\(), 2, "movupf xmm1,XMMWORD PTR [rdx+16]" + EmitIfCount2GE \RowCount\(), 1, \VectorCount\(), 3, "movupf xmm2,XMMWORD PTR [rdx+32]" + EmitIfCount2GE \RowCount\(), 1, \VectorCount\(), 4, "movupf xmm3,XMMWORD PTR [rdx+48]" + EmitIfCount2GE \RowCount\(), 2, \VectorCount\(), 1, "movupf xmm4,XMMWORD PTR [rdx+rax]" + EmitIfCount2GE \RowCount\(), 2, \VectorCount\(), 2, "movupf xmm5,XMMWORD PTR [rdx+rax+16]" + EmitIfCount2GE \RowCount\(), 2, \VectorCount\(), 3, "movupf xmm6,XMMWORD PTR [rdx+rax+32]" + EmitIfCount2GE \RowCount\(), 2, \VectorCount\(), 4, "movupf xmm7,XMMWORD PTR [rdx+rax+48]" + EmitIfCount2GE \RowCount\(), 1, \VectorCount\(), 1, "addpf xmm8,xmm0" + EmitIfCount2GE \RowCount\(), 1, \VectorCount\(), 2, "addpf xmm9,xmm1" + EmitIfCount2GE \RowCount\(), 1, \VectorCount\(), 3, "addpf xmm10,xmm2" + EmitIfCount2GE \RowCount\(), 1, \VectorCount\(), 4, "addpf xmm11,xmm3" + EmitIfCount2GE \RowCount\(), 2, \VectorCount\(), 1, "addpf xmm12,xmm4" + EmitIfCount2GE \RowCount\(), 2, \VectorCount\(), 2, "addpf xmm13,xmm5" + EmitIfCount2GE \RowCount\(), 2, \VectorCount\(), 3, "addpf xmm14,xmm6" + EmitIfCount2GE \RowCount\(), 2, \VectorCount\(), 4, "addpf xmm15,xmm7" + +.LSkipAccumulateOutput\@: + EmitIfCount2GE \RowCount\(), 1, \VectorCount\(), 1, "movupf XMMWORD PTR [rdx],xmm8" + EmitIfCount2GE \RowCount\(), 1, \VectorCount\(), 2, "movupf XMMWORD PTR [rdx+16],xmm9" + EmitIfCount2GE \RowCount\(), 1, \VectorCount\(), 3, "movupf XMMWORD PTR [rdx+32],xmm10" + EmitIfCount2GE \RowCount\(), 1, \VectorCount\(), 4, "movupf XMMWORD PTR [rdx+48],xmm11" + EmitIfCount2GE \RowCount\(), 2, \VectorCount\(), 1, "movupf XMMWORD PTR [rdx+rax],xmm12" + EmitIfCount2GE \RowCount\(), 2, \VectorCount\(), 2, "movupf XMMWORD PTR [rdx+rax+16],xmm13" + EmitIfCount2GE \RowCount\(), 2, \VectorCount\(), 3, "movupf XMMWORD PTR [rdx+rax+32],xmm14" + EmitIfCount2GE \RowCount\(), 2, \VectorCount\(), 4, "movupf XMMWORD PTR [rdx+rax+48],xmm15" + + .endm +# 90 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\FgemmKernelSse2Common.h" + .macro FgemmKernelSse2Function FunctionName +# 133 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\FgemmKernelSse2Common.h" + FUNCTION_ENTRY \FunctionName\() + + push rbp + push rbx + push r15 + mov r11,rdi + mov r10,.LFgemmKernelFrame_lda[rsp] + shl r10,.LFgemmElementShift # convert lda to bytes + mov rax,.LFgemmKernelFrame_ldc[rsp] + shl rax,.LFgemmElementShift # convert ldc to bytes + movzx r15,BYTE PTR .LFgemmKernelFrame_ZeroMode[rsp] + movsf .LFgemmKernelFrame_alpha[rsp],xmm0 + + + + + + cmp r8,2 + jb .LProcessCountM1 + mov r8d,2 # return 2 rows handled + ProcessCountM 2, Fallthrough + + + + + +.LExitKernel: + mov eax,r8d + pop r15 + pop rbx + pop rbp + ret + + + + + +.LProcessCountM1: + ProcessCountM 1 + + .endm +# 23 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\SgemmKernelSse2.S" 2 + + .intel_syntax noprefix + + .text +# 53 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\SgemmKernelSse2.S" + .macro ComputeBlockSseBy16 RowCount, VectorOffset, Shuffle + + movaps xmm4,XMMWORD PTR [rsi+\VectorOffset\()] + movaps xmm5,XMMWORD PTR [rsi+\VectorOffset\()+16] + pshufd xmm2,xmm0,\Shuffle\() +.if \RowCount\() == 2 + pshufd xmm3,xmm1,\Shuffle\() + movaps xmm6,xmm4 + movaps xmm7,xmm5 +.endif + mulps xmm4,xmm2 + mulps xmm5,xmm2 + addps xmm8,xmm4 + addps xmm9,xmm5 +.if \RowCount\() == 2 + mulps xmm6,xmm3 + mulps xmm7,xmm3 + addps xmm12,xmm6 + addps xmm13,xmm7 +.endif + movaps xmm4,XMMWORD PTR [rsi+\VectorOffset\()+32] + movaps xmm5,XMMWORD PTR [rsi+\VectorOffset\()+48] +.if \RowCount\() == 2 + movaps xmm6,xmm4 + movaps xmm7,xmm5 +.endif + mulps xmm4,xmm2 + mulps xmm5,xmm2 + addps xmm10,xmm4 + addps xmm11,xmm5 +.if \RowCount\() == 2 + mulps xmm6,xmm3 + mulps xmm7,xmm3 + addps xmm14,xmm6 + addps xmm15,xmm7 +.endif + + .endm +# 130 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\SgemmKernelSse2.S" + .macro ProcessCountM RowCount, Fallthrough + +.LProcessNextColumnLoop16xN\@: + EmitIfCountGE \RowCount\(), 1, "xorps xmm8,xmm8" + EmitIfCountGE \RowCount\(), 1, "xorps xmm9,xmm9" + EmitIfCountGE \RowCount\(), 1, "xorps xmm10,xmm10" + EmitIfCountGE \RowCount\(), 1, "xorps xmm11,xmm11" + EmitIfCountGE \RowCount\(), 2, "xorps xmm12,xmm12" + EmitIfCountGE \RowCount\(), 2, "xorps xmm13,xmm13" + EmitIfCountGE \RowCount\(), 2, "xorps xmm14,xmm14" + EmitIfCountGE \RowCount\(), 2, "xorps xmm15,xmm15" + mov rbp,rcx # reload CountK + sub rbp,4 + jb .LProcessRemaining16xNBlocks\@ + +.LCompute16xNBlockBy4Loop\@: + EmitIfCountGE \RowCount\(), 1, "movups xmm0,XMMWORD PTR [rdi]" + EmitIfCountGE \RowCount\(), 2, "movups xmm1,XMMWORD PTR [rdi+r10]" + ComputeBlockSseBy16 2, 0, 0x00 + ComputeBlockSseBy16 2, 16*4, 0x55 + sub rsi,-32*4 # advance matrix B by 32 columns + ComputeBlockSseBy16 2, 0, 0xAA + ComputeBlockSseBy16 2, 16*4, 0xFF + sub rsi,-32*4 # advance matrix B by 32 columns + add rdi,4*4 # advance matrix A by 4 columns + sub rbp,4 + jae .LCompute16xNBlockBy4Loop\@ + +.LProcessRemaining16xNBlocks\@: + add rbp,4 # correct for over-subtract above + jz .LOutput16xNBlock\@ + +.LCompute16xNBlockBy1Loop\@: + EmitIfCountGE \RowCount\(), 1, "movss xmm0,[rdi]" + EmitIfCountGE \RowCount\(), 2, "movss xmm1,[rdi+r10]" + ComputeBlockSseBy16 2, 0, 0x00 + add rsi,16*4 # advance matrix B by 16 columns + add rdi,4 # advance matrix A by 1 column + dec rbp + jne .LCompute16xNBlockBy1Loop\@ + +.LOutput16xNBlock\@: + movss xmm2,.LFgemmKernelFrame_alpha[rsp] + shufps xmm2,xmm2,0 + EmitIfCountGE \RowCount\(), 1, "mulps xmm8,xmm2" + # multiply by alpha + EmitIfCountGE \RowCount\(), 1, "mulps xmm9,xmm2" + EmitIfCountGE \RowCount\(), 1, "mulps xmm10,xmm2" + EmitIfCountGE \RowCount\(), 1, "mulps xmm11,xmm2" + EmitIfCountGE \RowCount\(), 2, "mulps xmm12,xmm2" + EmitIfCountGE \RowCount\(), 2, "mulps xmm13,xmm2" + EmitIfCountGE \RowCount\(), 2, "mulps xmm14,xmm2" + EmitIfCountGE \RowCount\(), 2, "mulps xmm15,xmm2" + sub r9,16 + jb .LOutputPartial16xNBlock\@ + AccumulateAndStoreBlock \RowCount\(), 4 + add rdx,16*4 # advance matrix C by 16 columns + mov rdi,r11 # reload matrix A + test r9,r9 + jnz .LProcessNextColumnLoop16xN\@ + jmp .LExitKernel + + + + + +.LOutputPartial16xNBlock\@: + add r9,16 # correct for over-subtract above + cmp r9,4 + jb .LOutputPartialLessThan4xNBlock\@ + cmp r9,8 + jb .LOutputPartialLessThan8xNBlock\@ + cmp r9,12 + jb .LOutputPartialLessThan12xNBlock\@ + AccumulateAndStoreBlock \RowCount\(), 3 + and r9d,3 # check if remaining count is small + jz .LExitKernel + EmitIfCountGE \RowCount\(), 1, "movaps xmm8,xmm11" + # shift remaining elements down + EmitIfCountGE \RowCount\(), 2, "movaps xmm12,xmm15" + add rdx,12*4 # advance matrix C by 12 columns + jmp .LOutputPartialLessThan4xNBlock\@ + +.LOutputPartialLessThan12xNBlock\@: + AccumulateAndStoreBlock \RowCount\(), 2 + and r9d,3 # check if remaining count is small + jz .LExitKernel + EmitIfCountGE \RowCount\(), 1, "movaps xmm8,xmm10" + # shift remaining elements down + EmitIfCountGE \RowCount\(), 2, "movaps xmm12,xmm14" + add rdx,8*4 # advance matrix C by 8 columns + jmp .LOutputPartialLessThan4xNBlock\@ + +.LOutputPartialLessThan8xNBlock\@: + AccumulateAndStoreBlock \RowCount\(), 1 + and r9d,3 # check if remaining count is small + jz .LExitKernel + EmitIfCountGE \RowCount\(), 1, "movaps xmm8,xmm9" + # shift remaining elements down + EmitIfCountGE \RowCount\(), 2, "movaps xmm12,xmm13" + add rdx,4*4 # advance matrix C by 4 columns + +.LOutputPartialLessThan4xNBlock\@: + test r9d,2 + jz .LOutputPartial1xNBlock\@ + test r15b,r15b # ZeroMode? + jnz .LSkipAccumulateOutput2xN\@ + EmitIfCountGE \RowCount\(), 1, "movsd xmm0,QWORD PTR [rdx]" + EmitIfCountGE \RowCount\(), 2, "movsd xmm1,QWORD PTR [rdx+rax]" + EmitIfCountGE \RowCount\(), 1, "addps xmm8,xmm0" + EmitIfCountGE \RowCount\(), 2, "addps xmm12,xmm1" + +.LSkipAccumulateOutput2xN\@: + EmitIfCountGE \RowCount\(), 1, "movsd QWORD PTR [rdx],xmm8" + EmitIfCountGE \RowCount\(), 2, "movsd QWORD PTR [rdx+rax],xmm12" + test r9d,1 # check if remaining count is odd + jz .LExitKernel + EmitIfCountGE \RowCount\(), 1, "movhlps xmm8,xmm8" + # shift third element down + EmitIfCountGE \RowCount\(), 2, "movhlps xmm12,xmm12" + add rdx,2*4 # advance matrix C by 2 columns + +.LOutputPartial1xNBlock\@: + test r15b,r15b # ZeroMode? + jnz .LSkipAccumulateOutput1xN\@ + EmitIfCountGE \RowCount\(), 1, "addss xmm8,[rdx]" + EmitIfCountGE \RowCount\(), 2, "addss xmm12,[rdx+rax]" + +.LSkipAccumulateOutput1xN\@: + EmitIfCountGE \RowCount\(), 1, "movss [rdx],xmm8" + EmitIfCountGE \RowCount\(), 2, "movss [rdx+rax],xmm12" +.ifb \Fallthrough\() + jmp .LExitKernel +.endif + + .endm + + + + + +FgemmKernelSse2Function MlasGemmFloatKernelSse + + .end +]], + ["mcpp_generated/SgemmTransposePackB16x4Avx.asm"] = [[ +# 1 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\SgemmTransposePackB16x4Avx.S" +# 1 "" 1 +# 1 "" 3 +# 403 "" 3 +# 1 "" 1 +# 1 "" 2 +# 1 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\SgemmTransposePackB16x4Avx.S" 2 +# 20 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\SgemmTransposePackB16x4Avx.S" +# 1 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\asmmacro.h" 1 +# 35 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\asmmacro.h" + .macro FUNCTION_ENTRY FunctionName + + .p2align 4 + + + + + .globl \FunctionName\() + .type \FunctionName\(),@function +\FunctionName\(): + + + .endm +# 65 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\asmmacro.h" + .macro add_immed Register, Immediate + +.if (\Immediate\() != 128) + add \Register\(),\Immediate\() +.else + sub \Register\(),-\Immediate\() # smaller encoding +.endif + + .endm +# 92 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\asmmacro.h" + .macro EmitIfCountGE Count1, Value1, Statement + +.if (\Count1\() >= \Value1\()) + \Statement\() +.endif + + .endm +# 113 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\asmmacro.h" + .macro EmitIfCount2EQ Count1, Value1, Count2, Value2, Statement + +.if (\Count1\() == \Value1\()) && (\Count2\() == \Value2\()) + \Statement\() +.endif + + .endm +# 143 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\asmmacro.h" + .macro EmitIfCount2GE Count1, Value1, Count2, Value2, Statement + +.if (\Count1\() >= \Value1\()) && (\Count2\() >= \Value2\()) + \Statement\() +.endif + + .endm +# 166 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\asmmacro.h" + .macro EmitForEachRegister RegList, Statement + + .irp RegItem, \RegList\() + \Statement\() + .endr + + .endm +# 21 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\SgemmTransposePackB16x4Avx.S" 2 + + .intel_syntax noprefix + + .text +# 48 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\SgemmTransposePackB16x4Avx.S" + .macro TransposePackB8x4BlockAvx StoreOffset + + + + + + + lea rax,[rsi+rdx*2] + vmovups xmm0,XMMWORD PTR [rsi] + vmovups xmm1,XMMWORD PTR [rsi+rdx] + lea rsi,[rax+rdx*2] + vmovups xmm2,XMMWORD PTR [rax] + vmovups xmm3,XMMWORD PTR [rax+rdx] + lea rax,[rsi+rdx*2] + vinsertf128 ymm0,ymm0,XMMWORD PTR [rsi],1 + vinsertf128 ymm1,ymm1,XMMWORD PTR [rsi+rdx],1 + vinsertf128 ymm2,ymm2,XMMWORD PTR [rax],1 + vinsertf128 ymm3,ymm3,XMMWORD PTR [rax+rdx],1 + + + + + + + vunpcklps ymm4,ymm0,ymm1 + vunpckhps ymm5,ymm0,ymm1 + vunpcklps ymm0,ymm2,ymm3 + vunpckhps ymm1,ymm2,ymm3 + vunpcklpd ymm2,ymm4,ymm0 + vunpckhpd ymm3,ymm4,ymm0 + vmovaps YMMWORD PTR [rdi+16*4*0+\StoreOffset\()],ymm2 + vmovaps YMMWORD PTR [rdi+16*4*1+\StoreOffset\()],ymm3 + vunpcklpd ymm0,ymm5,ymm1 + vunpckhpd ymm4,ymm5,ymm1 + vmovaps YMMWORD PTR [rdi+16*4*2+\StoreOffset\()],ymm0 + vmovaps YMMWORD PTR [rdi+16*4*3+\StoreOffset\()],ymm4 + + .endm +# 111 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\SgemmTransposePackB16x4Avx.S" + FUNCTION_ENTRY MlasSgemmTransposePackB16x4Avx + + shl rdx,2 # convert ldb to bytes + TransposePackB8x4BlockAvx 0*4 + lea rsi,[rax+rdx*2] + TransposePackB8x4BlockAvx 8*4 + vzeroupper + ret + + .end +]], + ["mcpp_generated/SgemmTransposePackB16x4Sse2.asm"] = [[ +# 1 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\SgemmTransposePackB16x4Sse2.S" +# 1 "" 1 +# 1 "" 3 +# 395 "" 3 +# 1 "" 1 +# 1 "" 2 +# 1 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\SgemmTransposePackB16x4Sse2.S" 2 +# 20 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\SgemmTransposePackB16x4Sse2.S" +# 1 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\asmmacro.h" 1 +# 35 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\asmmacro.h" + .macro FUNCTION_ENTRY FunctionName + + .p2align 4 + + + + + .globl \FunctionName\() + .type \FunctionName\(),@function +\FunctionName\(): + + + .endm +# 65 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\asmmacro.h" + .macro add_immed Register, Immediate + +.if (\Immediate\() != 128) + add \Register\(),\Immediate\() +.else + sub \Register\(),-\Immediate\() # smaller encoding +.endif + + .endm +# 92 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\asmmacro.h" + .macro EmitIfCountGE Count1, Value1, Statement + +.if (\Count1\() >= \Value1\()) + \Statement\() +.endif + + .endm +# 113 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\asmmacro.h" + .macro EmitIfCount2EQ Count1, Value1, Count2, Value2, Statement + +.if (\Count1\() == \Value1\()) && (\Count2\() == \Value2\()) + \Statement\() +.endif + + .endm +# 143 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\asmmacro.h" + .macro EmitIfCount2GE Count1, Value1, Count2, Value2, Statement + +.if (\Count1\() >= \Value1\()) && (\Count2\() >= \Value2\()) + \Statement\() +.endif + + .endm +# 166 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\asmmacro.h" + .macro EmitForEachRegister RegList, Statement + + .irp RegItem, \RegList\() + \Statement\() + .endr + + .endm +# 21 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\SgemmTransposePackB16x4Sse2.S" 2 + + .intel_syntax noprefix + + .text +# 50 "D:\\a\\mcpp-index\\mcpp-index\\opencv-5.0.0\\3rdparty\\mlas\\lib\\x86_64\\SgemmTransposePackB16x4Sse2.S" + FUNCTION_ENTRY MlasSgemmTransposePackB16x4Sse + + shl rdx,2 # convert ldb to bytes + mov ecx,4 # transpose four 4x4 blocks + +.LTransposeBlockLoop: + lea rax,[rsi+rdx*2] + movups xmm0,XMMWORD PTR [rsi] + movups xmm1,XMMWORD PTR [rsi+rdx] + movups xmm2,XMMWORD PTR [rax] + movups xmm3,XMMWORD PTR [rax+rdx] + movaps xmm4,xmm0 + unpcklps xmm4,xmm1 + unpckhps xmm0,xmm1 + movaps xmm5,xmm2 + unpcklps xmm5,xmm3 + unpckhps xmm2,xmm3 + movaps xmm1,xmm4 + unpcklpd xmm1,xmm5 + unpckhpd xmm4,xmm5 + movaps xmm3,xmm0 + unpcklpd xmm3,xmm2 + unpckhpd xmm0,xmm2 + movaps XMMWORD PTR [rdi+16*4*0],xmm1 + movaps XMMWORD PTR [rdi+16*4*1],xmm4 + movaps XMMWORD PTR [rdi+16*4*2],xmm3 + movaps XMMWORD PTR [rdi+16*4*3],xmm0 + add rdi,4*4 + lea rsi,[rax+rdx*2] + dec ecx + jnz .LTransposeBlockLoop + ret + + .end +]], + ["mcpp_generated/custom_hal.hpp"] = [[ +#ifndef _CUSTOM_HAL_INCLUDED_ +#define _CUSTOM_HAL_INCLUDED_ + + + +#endif +]], + ["mcpp_generated/cv_cpu_config.h"] = [[ +// OpenCV CPU baseline features + +#define CV_CPU_COMPILE_SSE 1 +#define CV_CPU_BASELINE_COMPILE_SSE 1 + +#define CV_CPU_COMPILE_SSE2 1 +#define CV_CPU_BASELINE_COMPILE_SSE2 1 + +#define CV_CPU_COMPILE_SSE3 1 +#define CV_CPU_BASELINE_COMPILE_SSE3 1 + +#define CV_CPU_BASELINE_FEATURES 0 \ + , CV_CPU_SSE \ + , CV_CPU_SSE2 \ + , CV_CPU_SSE3 \ + + +// OpenCV supported CPU dispatched features + +#define CV_CPU_DISPATCH_COMPILE_SSE4_1 1 +#define CV_CPU_DISPATCH_COMPILE_SSE4_2 1 +#define CV_CPU_DISPATCH_COMPILE_AVX 1 +#define CV_CPU_DISPATCH_COMPILE_FP16 1 +#define CV_CPU_DISPATCH_COMPILE_AVX2 1 +#define CV_CPU_DISPATCH_COMPILE_AVX512_SKX 1 + + +#define CV_CPU_DISPATCH_FEATURES 0 \ + , CV_CPU_SSE4_1 \ + , CV_CPU_SSE4_2 \ + , CV_CPU_AVX \ + , CV_CPU_FP16 \ + , CV_CPU_AVX2 \ + , CV_CPU_AVX512_SKX \ + +]], + ["mcpp_generated/cvconfig.h"] = [[ +#ifndef OPENCV_CVCONFIG_H_INCLUDED +#define OPENCV_CVCONFIG_H_INCLUDED + +/* OpenCV compiled as static or dynamic libs */ +/* #undef BUILD_SHARED_LIBS */ + +/* OpenCV intrinsics optimized code */ +#define CV_ENABLE_INTRINSICS + +/* OpenCV additional optimized code */ +/* #undef CV_DISABLE_OPTIMIZATION */ + +/* Compile for 'real' NVIDIA GPU architectures */ +#define CUDA_ARCH_BIN "" + +/* NVIDIA GPU features are used */ +#define CUDA_ARCH_FEATURES "" + +/* Compile for 'virtual' NVIDIA PTX architectures */ +#define CUDA_ARCH_PTX "" + +/* AMD's Basic Linear Algebra Subprograms Library*/ +/* #undef HAVE_CLAMDBLAS */ + +/* AMD's OpenCL Fast Fourier Transform Library*/ +/* #undef HAVE_CLAMDFFT */ + +/* Clp support */ +/* #undef HAVE_CLP */ + +/* NVIDIA CUDA Runtime API*/ +/* #undef HAVE_CUDA */ + +/* NVIDIA CUDA Basic Linear Algebra Subprograms (BLAS) API*/ +/* #undef HAVE_CUBLAS */ + +/* NVIDIA CUDA Deep Neural Network (cuDNN) API*/ +/* #undef HAVE_CUDNN */ + +/* NVIDIA CUDA Fast Fourier Transform (FFT) API*/ +/* #undef HAVE_CUFFT */ + +/* DirectX */ +#define HAVE_DIRECTX +#define HAVE_DIRECTX_NV12 +#define HAVE_D3D11 +#define HAVE_D3D10 +#define HAVE_D3D9 + +/* Eigen Matrix & Linear Algebra Library */ +/* #undef HAVE_EIGEN */ + +/* Geospatial Data Abstraction Library */ +/* #undef HAVE_GDAL */ + +/* Vulkan support */ +/* #undef HAVE_VULKAN */ + +/* Define to 1 if you have the header file. */ +/* #undef HAVE_INTTYPES_H */ + +/* Intel Integrated Performance Primitives */ +/* #undef HAVE_IPP */ +/* #undef HAVE_IPP_ICV */ +/* #undef HAVE_IPP_IW */ +/* #undef HAVE_IPP_IW_LL */ + +/* JPEG-2000 codec */ +/* #undef HAVE_OPENJPEG */ +/* #undef HAVE_JASPER */ + +/* AVIF codec */ +/* #undef HAVE_AVIF */ + +/* IJG JPEG codec */ +#define HAVE_JPEG + +/* JPEG XL codec */ +/* #undef HAVE_JPEGXL */ + +/* GDCM DICOM codec */ +/* #undef HAVE_GDCM */ + +/* NVIDIA Video Decoding API*/ +/* #undef HAVE_NVCUVID */ +/* #undef HAVE_NVCUVID_HEADER */ +/* #undef HAVE_DYNLINK_NVCUVID_HEADER */ + +/* NVIDIA Video Encoding API*/ +/* #undef HAVE_NVCUVENC */ + +/* OpenCL Support */ +/* #undef HAVE_OPENCL */ +/* #undef HAVE_OPENCL_STATIC */ +/* #undef HAVE_OPENCL_SVM */ + +/* NVIDIA OpenCL D3D Extensions support */ +/* #undef HAVE_OPENCL_D3D11_NV */ + +/* OpenEXR codec */ +/* #undef HAVE_OPENEXR */ + +/* OpenGL support*/ +/* #undef HAVE_OPENGL */ + +/* PNG codec */ +#define HAVE_PNG + +/* PNG codec */ +/* #undef HAVE_SPNG */ + +/* Posix threads (pthreads) */ +/* #undef HAVE_PTHREAD */ + +/* parallel_for with pthreads */ +/* #undef HAVE_PTHREADS_PF */ + +/* Intel Threading Building Blocks */ +/* #undef HAVE_TBB */ /* Ste||ar Group High Performance ParallelX */ /* #undef HAVE_HPX */ -/* TIFF codec */ -/* #undef HAVE_TIFF */ +/* TIFF codec */ +/* #undef HAVE_TIFF */ + +/* Define if your processor stores words with the most significant byte + first (like Motorola and SPARC, unlike Intel and VAX). */ +/* #undef WORDS_BIGENDIAN */ + +/* VA library (libva) */ +/* #undef HAVE_VA */ + +/* Intel VA-API/OpenCL */ +/* #undef HAVE_VA_INTEL */ + +/* Lapack */ +/* #undef HAVE_LAPACK */ + +/* Library was compiled with functions instrumentation */ +/* #undef ENABLE_INSTRUMENTATION */ + +/* OpenCV trace utilities */ +#define OPENCV_TRACE + +/* The font "uni" (WQY MicroHei) is available */ +/* #undef HAVE_UNIFONT */ + +#endif // OPENCV_CVCONFIG_H_INCLUDED +]], + ["mcpp_generated/mlas_hgemm_stub.cpp"] = [[ +// compat.opencv curated stub: the vendored mlas subset declares and +// calls MlasHGemmSupported but does not vendor its definition (it +// lives in onnxruntime's full mlas). False = fp16 HGemm unsupported, +// which is the truth for this subset; callers fall back. +#include "mlas.h" +bool MLASCALL MlasHGemmSupported(CBLAS_TRANSPOSE, CBLAS_TRANSPOSE) { return false; } +]], + ["mcpp_generated/modules/core/arithm.avx2.cpp"] = [[ + +#include "modules/core/src/precomp.hpp" +#include "modules/core/src/arithm.simd.hpp" +]], + ["mcpp_generated/modules/core/arithm.lasx.cpp"] = [[ + +#include "modules/core/src/precomp.hpp" +#include "modules/core/src/arithm.simd.hpp" +]], + ["mcpp_generated/modules/core/arithm.simd_declarations.hpp"] = [[ +#define CV_CPU_SIMD_FILENAME "modules/core/src/arithm.simd.hpp" +#define CV_CPU_DISPATCH_MODE SSE4_1 +#include "opencv2/core/private/cv_cpu_include_simd_declarations.hpp" + +#define CV_CPU_DISPATCH_MODE AVX2 +#include "opencv2/core/private/cv_cpu_include_simd_declarations.hpp" + +#define CV_CPU_DISPATCH_MODES_ALL AVX2, SSE4_1, BASELINE + +#undef CV_CPU_SIMD_FILENAME +]], + ["mcpp_generated/modules/core/arithm.sse2.cpp"] = [[ + +#include "modules/core/src/precomp.hpp" +#include "modules/core/src/arithm.simd.hpp" +]], + ["mcpp_generated/modules/core/arithm.sse4_1.cpp"] = [[ + +#include "modules/core/src/precomp.hpp" +#include "modules/core/src/arithm.simd.hpp" +]], + ["mcpp_generated/modules/core/arithm.vsx3.cpp"] = [[ + +#include "modules/core/src/precomp.hpp" +#include "modules/core/src/arithm.simd.hpp" +]], + ["mcpp_generated/modules/core/convert.avx2.cpp"] = [[ + +#include "modules/core/src/precomp.hpp" +#include "modules/core/src/convert.simd.hpp" +]], + ["mcpp_generated/modules/core/convert.lasx.cpp"] = [[ + +#include "modules/core/src/precomp.hpp" +#include "modules/core/src/convert.simd.hpp" +]], + ["mcpp_generated/modules/core/convert.simd_declarations.hpp"] = [[ +#define CV_CPU_SIMD_FILENAME "modules/core/src/convert.simd.hpp" +#define CV_CPU_DISPATCH_MODE AVX2 +#include "opencv2/core/private/cv_cpu_include_simd_declarations.hpp" + +#define CV_CPU_DISPATCH_MODES_ALL AVX2, BASELINE + +#undef CV_CPU_SIMD_FILENAME +]], + ["mcpp_generated/modules/core/convert.sse2.cpp"] = [[ + +#include "modules/core/src/precomp.hpp" +#include "modules/core/src/convert.simd.hpp" +]], + ["mcpp_generated/modules/core/convert.vsx3.cpp"] = [[ + +#include "modules/core/src/precomp.hpp" +#include "modules/core/src/convert.simd.hpp" +]], + ["mcpp_generated/modules/core/convert_scale.avx2.cpp"] = [[ + +#include "modules/core/src/precomp.hpp" +#include "modules/core/src/convert_scale.simd.hpp" +]], + ["mcpp_generated/modules/core/convert_scale.lasx.cpp"] = [[ + +#include "modules/core/src/precomp.hpp" +#include "modules/core/src/convert_scale.simd.hpp" +]], + ["mcpp_generated/modules/core/convert_scale.simd_declarations.hpp"] = [[ +#define CV_CPU_SIMD_FILENAME "modules/core/src/convert_scale.simd.hpp" +#define CV_CPU_DISPATCH_MODE AVX2 +#include "opencv2/core/private/cv_cpu_include_simd_declarations.hpp" + +#define CV_CPU_DISPATCH_MODES_ALL AVX2, BASELINE + +#undef CV_CPU_SIMD_FILENAME +]], + ["mcpp_generated/modules/core/convert_scale.sse2.cpp"] = [[ + +#include "modules/core/src/precomp.hpp" +#include "modules/core/src/convert_scale.simd.hpp" +]], + ["mcpp_generated/modules/core/count_non_zero.avx2.cpp"] = [[ + +#include "modules/core/src/precomp.hpp" +#include "modules/core/src/count_non_zero.simd.hpp" +]], + ["mcpp_generated/modules/core/count_non_zero.lasx.cpp"] = [[ + +#include "modules/core/src/precomp.hpp" +#include "modules/core/src/count_non_zero.simd.hpp" +]], + ["mcpp_generated/modules/core/count_non_zero.simd_declarations.hpp"] = [[ +#define CV_CPU_SIMD_FILENAME "modules/core/src/count_non_zero.simd.hpp" +#define CV_CPU_DISPATCH_MODE AVX2 +#include "opencv2/core/private/cv_cpu_include_simd_declarations.hpp" + +#define CV_CPU_DISPATCH_MODES_ALL AVX2, BASELINE + +#undef CV_CPU_SIMD_FILENAME +]], + ["mcpp_generated/modules/core/count_non_zero.sse2.cpp"] = [[ + +#include "modules/core/src/precomp.hpp" +#include "modules/core/src/count_non_zero.simd.hpp" +]], + ["mcpp_generated/modules/core/has_non_zero.avx2.cpp"] = [[ + +#include "modules/core/src/precomp.hpp" +#include "modules/core/src/has_non_zero.simd.hpp" +]], + ["mcpp_generated/modules/core/has_non_zero.lasx.cpp"] = [[ + +#include "modules/core/src/precomp.hpp" +#include "modules/core/src/has_non_zero.simd.hpp" +]], + ["mcpp_generated/modules/core/has_non_zero.simd_declarations.hpp"] = [[ +#define CV_CPU_SIMD_FILENAME "modules/core/src/has_non_zero.simd.hpp" +#define CV_CPU_DISPATCH_MODE AVX2 +#include "opencv2/core/private/cv_cpu_include_simd_declarations.hpp" + +#define CV_CPU_DISPATCH_MODES_ALL AVX2, BASELINE + +#undef CV_CPU_SIMD_FILENAME +]], + ["mcpp_generated/modules/core/has_non_zero.sse2.cpp"] = [[ + +#include "modules/core/src/precomp.hpp" +#include "modules/core/src/has_non_zero.simd.hpp" +]], + ["mcpp_generated/modules/core/mathfuncs_core.avx.cpp"] = [[ + +#include "modules/core/src/precomp.hpp" +#include "modules/core/src/mathfuncs_core.simd.hpp" +]], + ["mcpp_generated/modules/core/mathfuncs_core.avx2.cpp"] = [[ + +#include "modules/core/src/precomp.hpp" +#include "modules/core/src/mathfuncs_core.simd.hpp" +]], + ["mcpp_generated/modules/core/mathfuncs_core.lasx.cpp"] = [[ + +#include "modules/core/src/precomp.hpp" +#include "modules/core/src/mathfuncs_core.simd.hpp" +]], + ["mcpp_generated/modules/core/mathfuncs_core.simd_declarations.hpp"] = [[ +#define CV_CPU_SIMD_FILENAME "modules/core/src/mathfuncs_core.simd.hpp" +#define CV_CPU_DISPATCH_MODE AVX +#include "opencv2/core/private/cv_cpu_include_simd_declarations.hpp" + +#define CV_CPU_DISPATCH_MODE AVX2 +#include "opencv2/core/private/cv_cpu_include_simd_declarations.hpp" + +#define CV_CPU_DISPATCH_MODES_ALL AVX2, AVX, BASELINE + +#undef CV_CPU_SIMD_FILENAME +]], + ["mcpp_generated/modules/core/mathfuncs_core.sse2.cpp"] = [[ + +#include "modules/core/src/precomp.hpp" +#include "modules/core/src/mathfuncs_core.simd.hpp" +]], + ["mcpp_generated/modules/core/matmul.avx2.cpp"] = [[ + +#include "modules/core/src/precomp.hpp" +#include "modules/core/src/matmul.simd.hpp" +]], + ["mcpp_generated/modules/core/matmul.avx512_skx.cpp"] = [[ + +#include "modules/core/src/precomp.hpp" +#include "modules/core/src/matmul.simd.hpp" +]], + ["mcpp_generated/modules/core/matmul.lasx.cpp"] = [[ + +#include "modules/core/src/precomp.hpp" +#include "modules/core/src/matmul.simd.hpp" +]], + ["mcpp_generated/modules/core/matmul.neon_dotprod.cpp"] = [[ + +#include "modules/core/src/precomp.hpp" +#include "modules/core/src/matmul.simd.hpp" +]], + ["mcpp_generated/modules/core/matmul.simd_declarations.hpp"] = [[ +#define CV_CPU_SIMD_FILENAME "modules/core/src/matmul.simd.hpp" +#define CV_CPU_DISPATCH_MODE SSE4_1 +#include "opencv2/core/private/cv_cpu_include_simd_declarations.hpp" + +#define CV_CPU_DISPATCH_MODE AVX2 +#include "opencv2/core/private/cv_cpu_include_simd_declarations.hpp" + +#define CV_CPU_DISPATCH_MODE AVX512_SKX +#include "opencv2/core/private/cv_cpu_include_simd_declarations.hpp" + +#define CV_CPU_DISPATCH_MODES_ALL AVX512_SKX, AVX2, SSE4_1, BASELINE + +#undef CV_CPU_SIMD_FILENAME +]], + ["mcpp_generated/modules/core/matmul.sse2.cpp"] = [[ + +#include "modules/core/src/precomp.hpp" +#include "modules/core/src/matmul.simd.hpp" +]], + ["mcpp_generated/modules/core/matmul.sse4_1.cpp"] = [[ + +#include "modules/core/src/precomp.hpp" +#include "modules/core/src/matmul.simd.hpp" +]], + ["mcpp_generated/modules/core/mean.avx2.cpp"] = [[ + +#include "modules/core/src/precomp.hpp" +#include "modules/core/src/mean.simd.hpp" +]], + ["mcpp_generated/modules/core/mean.lasx.cpp"] = [[ + +#include "modules/core/src/precomp.hpp" +#include "modules/core/src/mean.simd.hpp" +]], + ["mcpp_generated/modules/core/mean.simd_declarations.hpp"] = [[ +#define CV_CPU_SIMD_FILENAME "modules/core/src/mean.simd.hpp" +#define CV_CPU_DISPATCH_MODE AVX2 +#include "opencv2/core/private/cv_cpu_include_simd_declarations.hpp" + +#define CV_CPU_DISPATCH_MODES_ALL AVX2, BASELINE + +#undef CV_CPU_SIMD_FILENAME +]], + ["mcpp_generated/modules/core/mean.sse2.cpp"] = [[ + +#include "modules/core/src/precomp.hpp" +#include "modules/core/src/mean.simd.hpp" +]], + ["mcpp_generated/modules/core/merge.avx2.cpp"] = [[ + +#include "modules/core/src/precomp.hpp" +#include "modules/core/src/merge.simd.hpp" +]], + ["mcpp_generated/modules/core/merge.lasx.cpp"] = [[ + +#include "modules/core/src/precomp.hpp" +#include "modules/core/src/merge.simd.hpp" +]], + ["mcpp_generated/modules/core/merge.simd_declarations.hpp"] = [[ +#define CV_CPU_SIMD_FILENAME "modules/core/src/merge.simd.hpp" +#define CV_CPU_DISPATCH_MODE AVX2 +#include "opencv2/core/private/cv_cpu_include_simd_declarations.hpp" + +#define CV_CPU_DISPATCH_MODES_ALL AVX2, BASELINE + +#undef CV_CPU_SIMD_FILENAME +]], + ["mcpp_generated/modules/core/merge.sse2.cpp"] = [[ + +#include "modules/core/src/precomp.hpp" +#include "modules/core/src/merge.simd.hpp" +]], + ["mcpp_generated/modules/core/minmax.avx2.cpp"] = [[ + +#include "modules/core/src/precomp.hpp" +#include "modules/core/src/minmax.simd.hpp" +]], + ["mcpp_generated/modules/core/minmax.lasx.cpp"] = [[ + +#include "modules/core/src/precomp.hpp" +#include "modules/core/src/minmax.simd.hpp" +]], + ["mcpp_generated/modules/core/minmax.simd_declarations.hpp"] = [[ +#define CV_CPU_SIMD_FILENAME "modules/core/src/minmax.simd.hpp" +#define CV_CPU_DISPATCH_MODE SSE4_1 +#include "opencv2/core/private/cv_cpu_include_simd_declarations.hpp" + +#define CV_CPU_DISPATCH_MODE AVX2 +#include "opencv2/core/private/cv_cpu_include_simd_declarations.hpp" + +#define CV_CPU_DISPATCH_MODES_ALL AVX2, SSE4_1, BASELINE + +#undef CV_CPU_SIMD_FILENAME +]], + ["mcpp_generated/modules/core/minmax.sse2.cpp"] = [[ + +#include "modules/core/src/precomp.hpp" +#include "modules/core/src/minmax.simd.hpp" +]], + ["mcpp_generated/modules/core/minmax.sse4_1.cpp"] = [[ + +#include "modules/core/src/precomp.hpp" +#include "modules/core/src/minmax.simd.hpp" +]], + ["mcpp_generated/modules/core/minmax.vsx3.cpp"] = [[ + +#include "modules/core/src/precomp.hpp" +#include "modules/core/src/minmax.simd.hpp" +]], + ["mcpp_generated/modules/core/nan_mask.avx2.cpp"] = [[ + +#include "modules/core/src/precomp.hpp" +#include "modules/core/src/nan_mask.simd.hpp" +]], + ["mcpp_generated/modules/core/nan_mask.lasx.cpp"] = [[ + +#include "modules/core/src/precomp.hpp" +#include "modules/core/src/nan_mask.simd.hpp" +]], + ["mcpp_generated/modules/core/nan_mask.simd_declarations.hpp"] = [[ +#define CV_CPU_SIMD_FILENAME "modules/core/src/nan_mask.simd.hpp" +#define CV_CPU_DISPATCH_MODE AVX2 +#include "opencv2/core/private/cv_cpu_include_simd_declarations.hpp" + +#define CV_CPU_DISPATCH_MODES_ALL AVX2, BASELINE + +#undef CV_CPU_SIMD_FILENAME +]], + ["mcpp_generated/modules/core/nan_mask.sse2.cpp"] = [[ + +#include "modules/core/src/precomp.hpp" +#include "modules/core/src/nan_mask.simd.hpp" +]], + ["mcpp_generated/modules/core/norm.avx.cpp"] = [[ + +#include "modules/core/src/precomp.hpp" +#include "modules/core/src/norm.simd.hpp" +]], + ["mcpp_generated/modules/core/norm.avx2.cpp"] = [[ + +#include "modules/core/src/precomp.hpp" +#include "modules/core/src/norm.simd.hpp" +]], + ["mcpp_generated/modules/core/norm.lasx.cpp"] = [[ + +#include "modules/core/src/precomp.hpp" +#include "modules/core/src/norm.simd.hpp" +]], + ["mcpp_generated/modules/core/norm.neon_dotprod.cpp"] = [[ + +#include "modules/core/src/precomp.hpp" +#include "modules/core/src/norm.simd.hpp" +]], + ["mcpp_generated/modules/core/norm.simd_declarations.hpp"] = [[ +#define CV_CPU_SIMD_FILENAME "modules/core/src/norm.simd.hpp" +#define CV_CPU_DISPATCH_MODE SSE4_1 +#include "opencv2/core/private/cv_cpu_include_simd_declarations.hpp" + +#define CV_CPU_DISPATCH_MODE AVX +#include "opencv2/core/private/cv_cpu_include_simd_declarations.hpp" + +#define CV_CPU_DISPATCH_MODE AVX2 +#include "opencv2/core/private/cv_cpu_include_simd_declarations.hpp" + +#define CV_CPU_DISPATCH_MODES_ALL AVX2, AVX, SSE4_1, BASELINE + +#undef CV_CPU_SIMD_FILENAME +]], + ["mcpp_generated/modules/core/norm.sse2.cpp"] = [[ + +#include "modules/core/src/precomp.hpp" +#include "modules/core/src/norm.simd.hpp" +]], + ["mcpp_generated/modules/core/norm.sse4_1.cpp"] = [[ + +#include "modules/core/src/precomp.hpp" +#include "modules/core/src/norm.simd.hpp" +]], + ["mcpp_generated/modules/core/reduce.avx2.cpp"] = [[ + +#include "modules/core/src/precomp.hpp" +#include "modules/core/src/reduce.simd.hpp" +]], + ["mcpp_generated/modules/core/reduce.neon_dotprod.cpp"] = [[ + +#include "modules/core/src/precomp.hpp" +#include "modules/core/src/reduce.simd.hpp" +]], + ["mcpp_generated/modules/core/reduce.simd_declarations.hpp"] = [[ +#define CV_CPU_SIMD_FILENAME "modules/core/src/reduce.simd.hpp" +#define CV_CPU_DISPATCH_MODE AVX2 +#include "opencv2/core/private/cv_cpu_include_simd_declarations.hpp" + +#define CV_CPU_DISPATCH_MODES_ALL AVX2, BASELINE + +#undef CV_CPU_SIMD_FILENAME +]], + ["mcpp_generated/modules/core/reduce.sse2.cpp"] = [[ + +#include "modules/core/src/precomp.hpp" +#include "modules/core/src/reduce.simd.hpp" +]], + ["mcpp_generated/modules/core/reduce.ssse3.cpp"] = [[ + +#include "modules/core/src/precomp.hpp" +#include "modules/core/src/reduce.simd.hpp" +]], + ["mcpp_generated/modules/core/split.avx2.cpp"] = [[ + +#include "modules/core/src/precomp.hpp" +#include "modules/core/src/split.simd.hpp" +]], + ["mcpp_generated/modules/core/split.lasx.cpp"] = [[ + +#include "modules/core/src/precomp.hpp" +#include "modules/core/src/split.simd.hpp" +]], + ["mcpp_generated/modules/core/split.simd_declarations.hpp"] = [[ +#define CV_CPU_SIMD_FILENAME "modules/core/src/split.simd.hpp" +#define CV_CPU_DISPATCH_MODE AVX2 +#include "opencv2/core/private/cv_cpu_include_simd_declarations.hpp" + +#define CV_CPU_DISPATCH_MODES_ALL AVX2, BASELINE + +#undef CV_CPU_SIMD_FILENAME +]], + ["mcpp_generated/modules/core/split.sse2.cpp"] = [[ + +#include "modules/core/src/precomp.hpp" +#include "modules/core/src/split.simd.hpp" +]], + ["mcpp_generated/modules/core/stat.avx2.cpp"] = [[ + +#include "modules/core/src/precomp.hpp" +#include "modules/core/src/stat.simd.hpp" +]], + ["mcpp_generated/modules/core/stat.lasx.cpp"] = [[ + +#include "modules/core/src/precomp.hpp" +#include "modules/core/src/stat.simd.hpp" +]], + ["mcpp_generated/modules/core/stat.simd_declarations.hpp"] = [[ +#define CV_CPU_SIMD_FILENAME "modules/core/src/stat.simd.hpp" +#define CV_CPU_DISPATCH_MODE SSE4_2 +#include "opencv2/core/private/cv_cpu_include_simd_declarations.hpp" + +#define CV_CPU_DISPATCH_MODE AVX2 +#include "opencv2/core/private/cv_cpu_include_simd_declarations.hpp" + +#define CV_CPU_DISPATCH_MODES_ALL AVX2, SSE4_2, BASELINE + +#undef CV_CPU_SIMD_FILENAME +]], + ["mcpp_generated/modules/core/stat.sse4_2.cpp"] = [[ + +#include "modules/core/src/precomp.hpp" +#include "modules/core/src/stat.simd.hpp" +]], + ["mcpp_generated/modules/core/sum.avx2.cpp"] = [[ + +#include "modules/core/src/precomp.hpp" +#include "modules/core/src/sum.simd.hpp" +]], + ["mcpp_generated/modules/core/sum.lasx.cpp"] = [[ + +#include "modules/core/src/precomp.hpp" +#include "modules/core/src/sum.simd.hpp" +]], + ["mcpp_generated/modules/core/sum.simd_declarations.hpp"] = [[ +#define CV_CPU_SIMD_FILENAME "modules/core/src/sum.simd.hpp" +#define CV_CPU_DISPATCH_MODE AVX2 +#include "opencv2/core/private/cv_cpu_include_simd_declarations.hpp" + +#define CV_CPU_DISPATCH_MODES_ALL AVX2, BASELINE + +#undef CV_CPU_SIMD_FILENAME +]], + ["mcpp_generated/modules/core/sum.sse2.cpp"] = [[ + +#include "modules/core/src/precomp.hpp" +#include "modules/core/src/sum.simd.hpp" +]], + ["mcpp_generated/modules/core/test/test_intrin128.avx.cpp"] = [[ + +#include "modules/core/test/test_precomp.hpp" +#include "modules/core/test/test_intrin128.simd.hpp" +]], + ["mcpp_generated/modules/core/test/test_intrin128.avx2.cpp"] = [[ + +#include "modules/core/test/test_precomp.hpp" +#include "modules/core/test/test_intrin128.simd.hpp" +]], + ["mcpp_generated/modules/core/test/test_intrin128.avx512_skx.cpp"] = [[ + +#include "modules/core/test/test_precomp.hpp" +#include "modules/core/test/test_intrin128.simd.hpp" +]], + ["mcpp_generated/modules/core/test/test_intrin128.fp16.cpp"] = [[ -/* Define if your processor stores words with the most significant byte - first (like Motorola and SPARC, unlike Intel and VAX). */ -/* #undef WORDS_BIGENDIAN */ +#include "modules/core/test/test_precomp.hpp" +#include "modules/core/test/test_intrin128.simd.hpp" +]], + ["mcpp_generated/modules/core/test/test_intrin128.simd_declarations.hpp"] = [[ +#define CV_CPU_SIMD_FILENAME "modules/core/test/test_intrin128.simd.hpp" +#define CV_CPU_DISPATCH_MODE SSE2 +#include "opencv2/core/private/cv_cpu_include_simd_declarations.hpp" -/* VA library (libva) */ -/* #undef HAVE_VA */ +#define CV_CPU_DISPATCH_MODE SSE3 +#include "opencv2/core/private/cv_cpu_include_simd_declarations.hpp" -/* Intel VA-API/OpenCL */ -/* #undef HAVE_VA_INTEL */ +#define CV_CPU_DISPATCH_MODE SSSE3 +#include "opencv2/core/private/cv_cpu_include_simd_declarations.hpp" -/* Lapack */ -/* #undef HAVE_LAPACK */ +#define CV_CPU_DISPATCH_MODE SSE4_1 +#include "opencv2/core/private/cv_cpu_include_simd_declarations.hpp" -/* Library was compiled with functions instrumentation */ -/* #undef ENABLE_INSTRUMENTATION */ +#define CV_CPU_DISPATCH_MODE SSE4_2 +#include "opencv2/core/private/cv_cpu_include_simd_declarations.hpp" -/* OpenCV trace utilities */ -#define OPENCV_TRACE +#define CV_CPU_DISPATCH_MODE AVX +#include "opencv2/core/private/cv_cpu_include_simd_declarations.hpp" -/* The font "uni" (WQY MicroHei) is available */ -/* #undef HAVE_UNIFONT */ +#define CV_CPU_DISPATCH_MODE FP16 +#include "opencv2/core/private/cv_cpu_include_simd_declarations.hpp" -#endif // OPENCV_CVCONFIG_H_INCLUDED +#define CV_CPU_DISPATCH_MODE AVX2 +#include "opencv2/core/private/cv_cpu_include_simd_declarations.hpp" + +#define CV_CPU_DISPATCH_MODE AVX512_SKX +#include "opencv2/core/private/cv_cpu_include_simd_declarations.hpp" + +#define CV_CPU_DISPATCH_MODES_ALL AVX512_SKX, AVX2, FP16, AVX, SSE4_2, SSE4_1, SSSE3, SSE3, SSE2, BASELINE + +#undef CV_CPU_SIMD_FILENAME ]], - ["mcpp_generated/mlas_hgemm_stub.cpp"] = [[ -// compat.opencv curated stub: the vendored mlas subset declares and -// calls MlasHGemmSupported but does not vendor its definition (it -// lives in onnxruntime's full mlas). False = fp16 HGemm unsupported, -// which is the truth for this subset; callers fall back. -#include "mlas.h" -bool MLASCALL MlasHGemmSupported(CBLAS_TRANSPOSE, CBLAS_TRANSPOSE) { return false; } + ["mcpp_generated/modules/core/test/test_intrin128.sse2.cpp"] = [[ + +#include "modules/core/test/test_precomp.hpp" +#include "modules/core/test/test_intrin128.simd.hpp" ]], - ["mcpp_generated/modules/core/arithm.avx2.cpp"] = [[ + ["mcpp_generated/modules/core/test/test_intrin128.sse3.cpp"] = [[ -#include "modules/core/src/precomp.hpp" -#include "modules/core/src/arithm.simd.hpp" +#include "modules/core/test/test_precomp.hpp" +#include "modules/core/test/test_intrin128.simd.hpp" ]], - ["mcpp_generated/modules/core/arithm.lasx.cpp"] = [[ + ["mcpp_generated/modules/core/test/test_intrin128.sse4_1.cpp"] = [[ -#include "modules/core/src/precomp.hpp" -#include "modules/core/src/arithm.simd.hpp" +#include "modules/core/test/test_precomp.hpp" +#include "modules/core/test/test_intrin128.simd.hpp" ]], - ["mcpp_generated/modules/core/arithm.simd_declarations.hpp"] = [[ -#define CV_CPU_SIMD_FILENAME "modules/core/src/arithm.simd.hpp" -#define CV_CPU_DISPATCH_MODE SSE4_1 -#include "opencv2/core/private/cv_cpu_include_simd_declarations.hpp" + ["mcpp_generated/modules/core/test/test_intrin128.sse4_2.cpp"] = [[ + +#include "modules/core/test/test_precomp.hpp" +#include "modules/core/test/test_intrin128.simd.hpp" +]], + ["mcpp_generated/modules/core/test/test_intrin128.ssse3.cpp"] = [[ + +#include "modules/core/test/test_precomp.hpp" +#include "modules/core/test/test_intrin128.simd.hpp" +]], + ["mcpp_generated/modules/core/test/test_intrin256.avx2.cpp"] = [[ + +#include "modules/core/test/test_precomp.hpp" +#include "modules/core/test/test_intrin256.simd.hpp" +]], + ["mcpp_generated/modules/core/test/test_intrin256.avx512_skx.cpp"] = [[ +#include "modules/core/test/test_precomp.hpp" +#include "modules/core/test/test_intrin256.simd.hpp" +]], + ["mcpp_generated/modules/core/test/test_intrin256.lasx.cpp"] = [[ + +#include "modules/core/test/test_precomp.hpp" +#include "modules/core/test/test_intrin256.simd.hpp" +]], + ["mcpp_generated/modules/core/test/test_intrin256.simd_declarations.hpp"] = [[ +#define CV_CPU_SIMD_FILENAME "modules/core/test/test_intrin256.simd.hpp" #define CV_CPU_DISPATCH_MODE AVX2 #include "opencv2/core/private/cv_cpu_include_simd_declarations.hpp" -#define CV_CPU_DISPATCH_MODES_ALL AVX2, SSE4_1, BASELINE +#define CV_CPU_DISPATCH_MODE AVX512_SKX +#include "opencv2/core/private/cv_cpu_include_simd_declarations.hpp" + +#define CV_CPU_DISPATCH_MODE LASX +#include "opencv2/core/private/cv_cpu_include_simd_declarations.hpp" + +#define CV_CPU_DISPATCH_MODES_ALL LASX, AVX512_SKX, AVX2, BASELINE #undef CV_CPU_SIMD_FILENAME ]], - ["mcpp_generated/modules/core/arithm.sse2.cpp"] = [[ + ["mcpp_generated/modules/core/test/test_intrin512.avx512_skx.cpp"] = [[ + +#include "modules/core/test/test_precomp.hpp" +#include "modules/core/test/test_intrin512.simd.hpp" +]], + ["mcpp_generated/modules/core/test/test_intrin512.simd_declarations.hpp"] = [[ +#define CV_CPU_SIMD_FILENAME "modules/core/test/test_intrin512.simd.hpp" +#define CV_CPU_DISPATCH_MODE AVX512_SKX +#include "opencv2/core/private/cv_cpu_include_simd_declarations.hpp" + +#define CV_CPU_DISPATCH_MODES_ALL AVX512_SKX, BASELINE + +#undef CV_CPU_SIMD_FILENAME +]], + ["mcpp_generated/modules/core/transpose.avx.cpp"] = [[ #include "modules/core/src/precomp.hpp" -#include "modules/core/src/arithm.simd.hpp" +#include "modules/core/src/transpose.simd.hpp" ]], - ["mcpp_generated/modules/core/arithm.sse4_1.cpp"] = [[ + ["mcpp_generated/modules/core/transpose.avx2.cpp"] = [[ #include "modules/core/src/precomp.hpp" -#include "modules/core/src/arithm.simd.hpp" +#include "modules/core/src/transpose.simd.hpp" ]], - ["mcpp_generated/modules/core/arithm.vsx3.cpp"] = [[ + ["mcpp_generated/modules/core/transpose.lasx.cpp"] = [[ #include "modules/core/src/precomp.hpp" -#include "modules/core/src/arithm.simd.hpp" +#include "modules/core/src/transpose.simd.hpp" ]], - ["mcpp_generated/modules/core/convert.avx2.cpp"] = [[ + ["mcpp_generated/modules/core/transpose.neon.cpp"] = [[ #include "modules/core/src/precomp.hpp" -#include "modules/core/src/convert.simd.hpp" +#include "modules/core/src/transpose.simd.hpp" ]], - ["mcpp_generated/modules/core/convert.lasx.cpp"] = [[ + ["mcpp_generated/modules/core/transpose.rvv.cpp"] = [[ #include "modules/core/src/precomp.hpp" -#include "modules/core/src/convert.simd.hpp" +#include "modules/core/src/transpose.simd.hpp" +]], + ["mcpp_generated/modules/core/transpose.simd_declarations.hpp"] = [[ +#define CV_CPU_SIMD_FILENAME "modules/core/src/transpose.simd.hpp" +#define CV_CPU_DISPATCH_MODE AVX +#include "opencv2/core/private/cv_cpu_include_simd_declarations.hpp" + +#define CV_CPU_DISPATCH_MODE AVX2 +#include "opencv2/core/private/cv_cpu_include_simd_declarations.hpp" + +#define CV_CPU_DISPATCH_MODES_ALL AVX2, AVX, BASELINE + +#undef CV_CPU_SIMD_FILENAME +]], + ["mcpp_generated/modules/core/version_string.inc"] = [[ +"\n" +"General configuration for OpenCV 5.0.0 =====================================\n" +" Version control: 1b4f1e2\n" +"\n" +" Platform:\n" +" Timestamp: 2026-07-20T12:20:19Z\n" +" Host: Windows 10.0.26100 AMD64\n" +" CMake: 4.4.0\n" +" CMake generator: Ninja\n" +" CMake build tool: C:/ProgramData/chocolatey/bin/ninja.exe\n" +" MSVC: 1951\n" +" Configuration: Release\n" +" Algorithm Hint: ALGO_HINT_ACCURATE\n" +"\n" +" CPU/HW features:\n" +" Baseline: SSE SSE2 SSE3\n" +" requested: SSE3\n" +" Dispatched code generation: SSE4_1 SSE4_2 AVX FP16 AVX2 AVX512_SKX\n" +" SSE4_1 (16 files): + SSSE3 SSE4_1\n" +" SSE4_2 (1 files): + SSSE3 SSE4_1 POPCNT SSE4_2\n" +" AVX (17 files): + SSSE3 SSE4_1 POPCNT SSE4_2 AVX\n" +" FP16 (0 files): + SSSE3 SSE4_1 POPCNT SSE4_2 AVX FP16\n" +" AVX2 (46 files): + SSSE3 SSE4_1 POPCNT SSE4_2 AVX FP16 AVX2 FMA3\n" +" AVX512_SKX (7 files): + SSSE3 SSE4_1 POPCNT SSE4_2 AVX FP16 AVX2 FMA3 AVX_512F AVX512_COMMON AVX512_SKX\n" +"\n" +" C/C++:\n" +" Built as dynamic libs?: NO\n" +" C++ standard: 17\n" +" C++ Compiler: C:/Program Files/LLVM/bin/clang-cl.exe (ver 20.1.8)\n" +" C++ flags (Release): /DWIN32 /D_WINDOWS /W4 /GR /D _CRT_SECURE_NO_DEPRECATE /D _CRT_NONSTDC_NO_DEPRECATE /D _SCL_SECURE_NO_WARNINGS /Gy /bigobj /Oi /fp:precise -W -Wreturn-type -Wnon-virtual-dtor -Waddress -Wsequence-point -Wformat -Wformat-security -Wmissing-declarations -Wmissing-prototypes -Wstrict-prototypes -Wundef -Winit-self -Wpointer-arith -Wshadow -Wsign-promo -Wuninitialized -Winconsistent-missing-override -Wno-delete-non-virtual-dtor -Wno-unnamed-type-template-args -Wno-comment -Wno-deprecated-enum-enum-conversion -Wno-deprecated-anon-enum-enum-conversion -Qunused-arguments /FS -msse3 /EHa /wd4127 /wd4251 /wd4324 /wd4275 /wd4512 /wd4589 /wd4819 /O2 /Ob2 /DNDEBUG -DNDEBUG\n" +" C++ flags (Debug): /DWIN32 /D_WINDOWS /W4 /GR /D _CRT_SECURE_NO_DEPRECATE /D _CRT_NONSTDC_NO_DEPRECATE /D _SCL_SECURE_NO_WARNINGS /Gy /bigobj /Oi /fp:precise -W -Wreturn-type -Wnon-virtual-dtor -Waddress -Wsequence-point -Wformat -Wformat-security -Wmissing-declarations -Wmissing-prototypes -Wstrict-prototypes -Wundef -Winit-self -Wpointer-arith -Wshadow -Wsign-promo -Wuninitialized -Winconsistent-missing-override -Wno-delete-non-virtual-dtor -Wno-unnamed-type-template-args -Wno-comment -Wno-deprecated-enum-enum-conversion -Wno-deprecated-anon-enum-enum-conversion -Qunused-arguments /FS -msse3 /EHa /wd4127 /wd4251 /wd4324 /wd4275 /wd4512 /wd4589 /wd4819 /Zi /Ob0 /Od /RTC1 -O0 -DDEBUG -D_DEBUG\n" +" C Compiler: C:/Program Files/LLVM/bin/clang-cl.exe\n" +" C flags (Release): /DWIN32 /D_WINDOWS /W3 /D _CRT_SECURE_NO_DEPRECATE /D _CRT_NONSTDC_NO_DEPRECATE /D _SCL_SECURE_NO_WARNINGS /Gy /bigobj /Oi /fp:precise -W -Wreturn-type -Wnon-virtual-dtor -Waddress -Wsequence-point -Wformat -Wformat-security -Wmissing-declarations -Wmissing-prototypes -Wstrict-prototypes -Wundef -Winit-self -Wpointer-arith -Wshadow -Wsign-promo -Wuninitialized -Winconsistent-missing-override -Wno-delete-non-virtual-dtor -Wno-unnamed-type-template-args -Wno-comment -Wno-deprecated-enum-enum-conversion -Wno-deprecated-anon-enum-enum-conversion -Qunused-arguments /FS -msse3 /O2 /Ob2 /DNDEBUG -DNDEBUG\n" +" C flags (Debug): /DWIN32 /D_WINDOWS /W3 /D _CRT_SECURE_NO_DEPRECATE /D _CRT_NONSTDC_NO_DEPRECATE /D _SCL_SECURE_NO_WARNINGS /Gy /bigobj /Oi /fp:precise -W -Wreturn-type -Wnon-virtual-dtor -Waddress -Wsequence-point -Wformat -Wformat-security -Wmissing-declarations -Wmissing-prototypes -Wstrict-prototypes -Wundef -Winit-self -Wpointer-arith -Wshadow -Wsign-promo -Wuninitialized -Winconsistent-missing-override -Wno-delete-non-virtual-dtor -Wno-unnamed-type-template-args -Wno-comment -Wno-deprecated-enum-enum-conversion -Wno-deprecated-anon-enum-enum-conversion -Qunused-arguments /FS -msse3 /Zi /Ob0 /Od /RTC1 -O0 -DDEBUG -D_DEBUG\n" +" Linker flags (Release): /machine:x64 /NODEFAULTLIB:atlthunk.lib /INCREMENTAL:NO /NODEFAULTLIB:libcmtd.lib /NODEFAULTLIB:libcpmtd.lib /NODEFAULTLIB:msvcrtd.lib\n" +" Linker flags (Debug): /machine:x64 /NODEFAULTLIB:atlthunk.lib /debug /INCREMENTAL /NODEFAULTLIB:libcmt.lib /NODEFAULTLIB:libcpmt.lib /NODEFAULTLIB:msvcrt.lib\n" +" ccache: NO\n" +" Precompiled headers: NO\n" +" Extra dependencies: comctl32 gdi32 ole32 setupapi ws2_32\n" +" 3rdparty dependencies: libprotobuf libjpeg-turbo libpng zlib\n" +"\n" +" OpenCV modules:\n" +" To be built: core dnn flann geometry highgui imgcodecs imgproc videoio\n" +" Disabled: world\n" +" Disabled by dependency: calib features java_bindings_generator js_bindings_generator objc_bindings_generator objdetect photo ptcloud python_bindings_generator python_tests stereo stitching video\n" +" Unavailable: java python3 ts\n" +" Applications: -\n" +" Documentation: NO\n" +" Non-free algorithms: NO\n" +"\n" +" Windows RT support: NO\n" +"\n" +" GUI: NONE\n" +" VTK support: NO\n" +"\n" +" Media I/O: \n" +" ZLib: build (ver 1.3.2)\n" +" JPEG: build-libjpeg-turbo (ver 3.1.2-70)\n" +" SIMD Support Request: NO\n" +" PNG: build (ver 1.6.57)\n" +" SIMD Support Request: YES\n" +" SIMD Support: YES (Intel SSE)\n" +" Metadata Support: EXIF XMP ICC cICP\n" +" GIF: NO\n" +" HDR: YES\n" +" SUNRASTER: YES\n" +" PXM: YES\n" +" PFM: YES\n" +"\n" +" Video I/O:\n" +" FFMPEG: YES (find_package)\n" +" avcodec: YES (62.28.102)\n" +" avformat: YES (62.12.102)\n" +" avutil: YES (60.26.102)\n" +" swscale: YES (9.5.102)\n" +" Orbbec: NO\n" +"\n" +" Parallel framework: Concurrency\n" +"\n" +" Trace: YES (built-in)\n" +"\n" +" Other third-party libraries:\n" +" DNN MLAS: YES (SGEMM-only, vendored)\n" +" ASM kernels: YES (X86_64: SSE2, AVX, FMA3, AVX512F)\n" +" Custom HAL: NO\n" +" Protobuf: build (3.19.1)\n" +"\n" +" ONNX Runtime: NO\n" +"\n" +" Python (for build): C:/hostedtoolcache/windows/Python/3.12.10/x64/python3.exe\n" +"\n" +" Install to: install\n" +"-----------------------------------------------------------------\n" +"\n" +]], + ["mcpp_generated/modules/dnn/int8layers/conv2_int8_kernels.avx2.cpp"] = [[ + +#include "modules/dnn/src/precomp.hpp" +#include "modules/dnn/src/int8layers/conv2_int8_kernels.simd.hpp" ]], - ["mcpp_generated/modules/core/convert.simd_declarations.hpp"] = [[ -#define CV_CPU_SIMD_FILENAME "modules/core/src/convert.simd.hpp" + ["mcpp_generated/modules/dnn/int8layers/conv2_int8_kernels.simd_declarations.hpp"] = [[ +#define CV_CPU_SIMD_FILENAME "modules/dnn/src/int8layers/conv2_int8_kernels.simd.hpp" #define CV_CPU_DISPATCH_MODE AVX2 #include "opencv2/core/private/cv_cpu_include_simd_declarations.hpp" @@ -9098,105 +12618,74 @@ bool MLASCALL MlasHGemmSupported(CBLAS_TRANSPOSE, CBLAS_TRANSPOSE) { return fals #undef CV_CPU_SIMD_FILENAME ]], - ["mcpp_generated/modules/core/convert.sse2.cpp"] = [[ - -#include "modules/core/src/precomp.hpp" -#include "modules/core/src/convert.simd.hpp" -]], - ["mcpp_generated/modules/core/convert.vsx3.cpp"] = [[ - -#include "modules/core/src/precomp.hpp" -#include "modules/core/src/convert.simd.hpp" -]], - ["mcpp_generated/modules/core/convert_scale.avx2.cpp"] = [[ - -#include "modules/core/src/precomp.hpp" -#include "modules/core/src/convert_scale.simd.hpp" -]], - ["mcpp_generated/modules/core/convert_scale.lasx.cpp"] = [[ + ["mcpp_generated/modules/dnn/int8layers/layers_common.avx2.cpp"] = [[ -#include "modules/core/src/precomp.hpp" -#include "modules/core/src/convert_scale.simd.hpp" +#include "modules/dnn/src/precomp.hpp" +#include "modules/dnn/src/int8layers/layers_common.simd.hpp" ]], - ["mcpp_generated/modules/core/convert_scale.simd_declarations.hpp"] = [[ -#define CV_CPU_SIMD_FILENAME "modules/core/src/convert_scale.simd.hpp" -#define CV_CPU_DISPATCH_MODE AVX2 -#include "opencv2/core/private/cv_cpu_include_simd_declarations.hpp" - -#define CV_CPU_DISPATCH_MODES_ALL AVX2, BASELINE + ["mcpp_generated/modules/dnn/int8layers/layers_common.avx512_skx.cpp"] = [[ -#undef CV_CPU_SIMD_FILENAME +#include "modules/dnn/src/precomp.hpp" +#include "modules/dnn/src/int8layers/layers_common.simd.hpp" ]], - ["mcpp_generated/modules/core/convert_scale.sse2.cpp"] = [[ + ["mcpp_generated/modules/dnn/int8layers/layers_common.lasx.cpp"] = [[ -#include "modules/core/src/precomp.hpp" -#include "modules/core/src/convert_scale.simd.hpp" +#include "modules/dnn/src/precomp.hpp" +#include "modules/dnn/src/int8layers/layers_common.simd.hpp" ]], - ["mcpp_generated/modules/core/count_non_zero.avx2.cpp"] = [[ + ["mcpp_generated/modules/dnn/int8layers/layers_common.neon.cpp"] = [[ -#include "modules/core/src/precomp.hpp" -#include "modules/core/src/count_non_zero.simd.hpp" +#include "modules/dnn/src/precomp.hpp" +#include "modules/dnn/src/int8layers/layers_common.simd.hpp" ]], - ["mcpp_generated/modules/core/count_non_zero.lasx.cpp"] = [[ + ["mcpp_generated/modules/dnn/int8layers/layers_common.rvv.cpp"] = [[ -#include "modules/core/src/precomp.hpp" -#include "modules/core/src/count_non_zero.simd.hpp" +#include "modules/dnn/src/precomp.hpp" +#include "modules/dnn/src/int8layers/layers_common.simd.hpp" ]], - ["mcpp_generated/modules/core/count_non_zero.simd_declarations.hpp"] = [[ -#define CV_CPU_SIMD_FILENAME "modules/core/src/count_non_zero.simd.hpp" + ["mcpp_generated/modules/dnn/int8layers/layers_common.simd_declarations.hpp"] = [[ +#define CV_CPU_SIMD_FILENAME "modules/dnn/src/int8layers/layers_common.simd.hpp" #define CV_CPU_DISPATCH_MODE AVX2 #include "opencv2/core/private/cv_cpu_include_simd_declarations.hpp" -#define CV_CPU_DISPATCH_MODES_ALL AVX2, BASELINE - -#undef CV_CPU_SIMD_FILENAME -]], - ["mcpp_generated/modules/core/count_non_zero.sse2.cpp"] = [[ +#define CV_CPU_DISPATCH_MODE AVX512_SKX +#include "opencv2/core/private/cv_cpu_include_simd_declarations.hpp" -#include "modules/core/src/precomp.hpp" -#include "modules/core/src/count_non_zero.simd.hpp" -]], - ["mcpp_generated/modules/core/has_non_zero.avx2.cpp"] = [[ +#define CV_CPU_DISPATCH_MODE RVV +#include "opencv2/core/private/cv_cpu_include_simd_declarations.hpp" -#include "modules/core/src/precomp.hpp" -#include "modules/core/src/has_non_zero.simd.hpp" -]], - ["mcpp_generated/modules/core/has_non_zero.lasx.cpp"] = [[ +#define CV_CPU_DISPATCH_MODE LASX +#include "opencv2/core/private/cv_cpu_include_simd_declarations.hpp" -#include "modules/core/src/precomp.hpp" -#include "modules/core/src/has_non_zero.simd.hpp" -]], - ["mcpp_generated/modules/core/has_non_zero.simd_declarations.hpp"] = [[ -#define CV_CPU_SIMD_FILENAME "modules/core/src/has_non_zero.simd.hpp" -#define CV_CPU_DISPATCH_MODE AVX2 +#define CV_CPU_DISPATCH_MODE NEON #include "opencv2/core/private/cv_cpu_include_simd_declarations.hpp" -#define CV_CPU_DISPATCH_MODES_ALL AVX2, BASELINE +#define CV_CPU_DISPATCH_MODES_ALL NEON, LASX, RVV, AVX512_SKX, AVX2, BASELINE #undef CV_CPU_SIMD_FILENAME ]], - ["mcpp_generated/modules/core/has_non_zero.sse2.cpp"] = [[ + ["mcpp_generated/modules/dnn/layers/cpu_kernels/activation_kernels.avx.cpp"] = [[ -#include "modules/core/src/precomp.hpp" -#include "modules/core/src/has_non_zero.simd.hpp" +#include "modules/dnn/src/precomp.hpp" +#include "modules/dnn/src/layers/cpu_kernels/activation_kernels.simd.hpp" ]], - ["mcpp_generated/modules/core/mathfuncs_core.avx.cpp"] = [[ + ["mcpp_generated/modules/dnn/layers/cpu_kernels/activation_kernels.avx2.cpp"] = [[ -#include "modules/core/src/precomp.hpp" -#include "modules/core/src/mathfuncs_core.simd.hpp" +#include "modules/dnn/src/precomp.hpp" +#include "modules/dnn/src/layers/cpu_kernels/activation_kernels.simd.hpp" ]], - ["mcpp_generated/modules/core/mathfuncs_core.avx2.cpp"] = [[ + ["mcpp_generated/modules/dnn/layers/cpu_kernels/activation_kernels.neon.cpp"] = [[ -#include "modules/core/src/precomp.hpp" -#include "modules/core/src/mathfuncs_core.simd.hpp" +#include "modules/dnn/src/precomp.hpp" +#include "modules/dnn/src/layers/cpu_kernels/activation_kernels.simd.hpp" ]], - ["mcpp_generated/modules/core/mathfuncs_core.lasx.cpp"] = [[ + ["mcpp_generated/modules/dnn/layers/cpu_kernels/activation_kernels.neon_fp16.cpp"] = [[ -#include "modules/core/src/precomp.hpp" -#include "modules/core/src/mathfuncs_core.simd.hpp" +#include "modules/dnn/src/precomp.hpp" +#include "modules/dnn/src/layers/cpu_kernels/activation_kernels.simd.hpp" ]], - ["mcpp_generated/modules/core/mathfuncs_core.simd_declarations.hpp"] = [[ -#define CV_CPU_SIMD_FILENAME "modules/core/src/mathfuncs_core.simd.hpp" + ["mcpp_generated/modules/dnn/layers/cpu_kernels/activation_kernels.simd_declarations.hpp"] = [[ +#define CV_CPU_SIMD_FILENAME "modules/dnn/src/layers/cpu_kernels/activation_kernels.simd.hpp" #define CV_CPU_DISPATCH_MODE AVX #include "opencv2/core/private/cv_cpu_include_simd_declarations.hpp" @@ -9207,565 +12696,461 @@ bool MLASCALL MlasHGemmSupported(CBLAS_TRANSPOSE, CBLAS_TRANSPOSE) { return fals #undef CV_CPU_SIMD_FILENAME ]], - ["mcpp_generated/modules/core/mathfuncs_core.sse2.cpp"] = [[ - -#include "modules/core/src/precomp.hpp" -#include "modules/core/src/mathfuncs_core.simd.hpp" -]], - ["mcpp_generated/modules/core/matmul.avx2.cpp"] = [[ + ["mcpp_generated/modules/dnn/layers/cpu_kernels/conv2_depthwise.avx.cpp"] = [[ -#include "modules/core/src/precomp.hpp" -#include "modules/core/src/matmul.simd.hpp" +#include "modules/dnn/src/precomp.hpp" +#include "modules/dnn/src/layers/cpu_kernels/conv2_depthwise.simd.hpp" ]], - ["mcpp_generated/modules/core/matmul.avx512_skx.cpp"] = [[ + ["mcpp_generated/modules/dnn/layers/cpu_kernels/conv2_depthwise.avx2.cpp"] = [[ -#include "modules/core/src/precomp.hpp" -#include "modules/core/src/matmul.simd.hpp" +#include "modules/dnn/src/precomp.hpp" +#include "modules/dnn/src/layers/cpu_kernels/conv2_depthwise.simd.hpp" ]], - ["mcpp_generated/modules/core/matmul.lasx.cpp"] = [[ + ["mcpp_generated/modules/dnn/layers/cpu_kernels/conv2_depthwise.neon.cpp"] = [[ -#include "modules/core/src/precomp.hpp" -#include "modules/core/src/matmul.simd.hpp" +#include "modules/dnn/src/precomp.hpp" +#include "modules/dnn/src/layers/cpu_kernels/conv2_depthwise.simd.hpp" ]], - ["mcpp_generated/modules/core/matmul.neon_dotprod.cpp"] = [[ + ["mcpp_generated/modules/dnn/layers/cpu_kernels/conv2_depthwise.neon_fp16.cpp"] = [[ -#include "modules/core/src/precomp.hpp" -#include "modules/core/src/matmul.simd.hpp" +#include "modules/dnn/src/precomp.hpp" +#include "modules/dnn/src/layers/cpu_kernels/conv2_depthwise.simd.hpp" ]], - ["mcpp_generated/modules/core/matmul.simd_declarations.hpp"] = [[ -#define CV_CPU_SIMD_FILENAME "modules/core/src/matmul.simd.hpp" -#define CV_CPU_DISPATCH_MODE SSE4_1 -#include "opencv2/core/private/cv_cpu_include_simd_declarations.hpp" - -#define CV_CPU_DISPATCH_MODE AVX2 -#include "opencv2/core/private/cv_cpu_include_simd_declarations.hpp" - -#define CV_CPU_DISPATCH_MODE AVX512_SKX + ["mcpp_generated/modules/dnn/layers/cpu_kernels/conv2_depthwise.simd_declarations.hpp"] = [[ +#define CV_CPU_SIMD_FILENAME "modules/dnn/src/layers/cpu_kernels/conv2_depthwise.simd.hpp" +#define CV_CPU_DISPATCH_MODE AVX #include "opencv2/core/private/cv_cpu_include_simd_declarations.hpp" -#define CV_CPU_DISPATCH_MODES_ALL AVX512_SKX, AVX2, SSE4_1, BASELINE - -#undef CV_CPU_SIMD_FILENAME -]], - ["mcpp_generated/modules/core/matmul.sse2.cpp"] = [[ - -#include "modules/core/src/precomp.hpp" -#include "modules/core/src/matmul.simd.hpp" -]], - ["mcpp_generated/modules/core/matmul.sse4_1.cpp"] = [[ - -#include "modules/core/src/precomp.hpp" -#include "modules/core/src/matmul.simd.hpp" -]], - ["mcpp_generated/modules/core/mean.avx2.cpp"] = [[ - -#include "modules/core/src/precomp.hpp" -#include "modules/core/src/mean.simd.hpp" -]], - ["mcpp_generated/modules/core/mean.lasx.cpp"] = [[ - -#include "modules/core/src/precomp.hpp" -#include "modules/core/src/mean.simd.hpp" -]], - ["mcpp_generated/modules/core/mean.simd_declarations.hpp"] = [[ -#define CV_CPU_SIMD_FILENAME "modules/core/src/mean.simd.hpp" #define CV_CPU_DISPATCH_MODE AVX2 #include "opencv2/core/private/cv_cpu_include_simd_declarations.hpp" -#define CV_CPU_DISPATCH_MODES_ALL AVX2, BASELINE +#define CV_CPU_DISPATCH_MODES_ALL AVX2, AVX, BASELINE #undef CV_CPU_SIMD_FILENAME ]], - ["mcpp_generated/modules/core/mean.sse2.cpp"] = [[ - -#include "modules/core/src/precomp.hpp" -#include "modules/core/src/mean.simd.hpp" -]], - ["mcpp_generated/modules/core/merge.avx2.cpp"] = [[ - -#include "modules/core/src/precomp.hpp" -#include "modules/core/src/merge.simd.hpp" -]], - ["mcpp_generated/modules/core/merge.lasx.cpp"] = [[ - -#include "modules/core/src/precomp.hpp" -#include "modules/core/src/merge.simd.hpp" -]], - ["mcpp_generated/modules/core/merge.simd_declarations.hpp"] = [[ -#define CV_CPU_SIMD_FILENAME "modules/core/src/merge.simd.hpp" -#define CV_CPU_DISPATCH_MODE AVX2 -#include "opencv2/core/private/cv_cpu_include_simd_declarations.hpp" - -#define CV_CPU_DISPATCH_MODES_ALL AVX2, BASELINE + ["mcpp_generated/modules/dnn/layers/cpu_kernels/conv2_kernels.avx.cpp"] = [[ -#undef CV_CPU_SIMD_FILENAME +#include "modules/dnn/src/precomp.hpp" +#include "modules/dnn/src/layers/cpu_kernels/conv2_kernels.simd.hpp" ]], - ["mcpp_generated/modules/core/merge.sse2.cpp"] = [[ + ["mcpp_generated/modules/dnn/layers/cpu_kernels/conv2_kernels.avx2.cpp"] = [[ -#include "modules/core/src/precomp.hpp" -#include "modules/core/src/merge.simd.hpp" +#include "modules/dnn/src/precomp.hpp" +#include "modules/dnn/src/layers/cpu_kernels/conv2_kernels.simd.hpp" ]], - ["mcpp_generated/modules/core/minmax.avx2.cpp"] = [[ + ["mcpp_generated/modules/dnn/layers/cpu_kernels/conv2_kernels.neon.cpp"] = [[ -#include "modules/core/src/precomp.hpp" -#include "modules/core/src/minmax.simd.hpp" +#include "modules/dnn/src/precomp.hpp" +#include "modules/dnn/src/layers/cpu_kernels/conv2_kernels.simd.hpp" ]], - ["mcpp_generated/modules/core/minmax.lasx.cpp"] = [[ + ["mcpp_generated/modules/dnn/layers/cpu_kernels/conv2_kernels.neon_fp16.cpp"] = [[ -#include "modules/core/src/precomp.hpp" -#include "modules/core/src/minmax.simd.hpp" +#include "modules/dnn/src/precomp.hpp" +#include "modules/dnn/src/layers/cpu_kernels/conv2_kernels.simd.hpp" ]], - ["mcpp_generated/modules/core/minmax.simd_declarations.hpp"] = [[ -#define CV_CPU_SIMD_FILENAME "modules/core/src/minmax.simd.hpp" -#define CV_CPU_DISPATCH_MODE SSE4_1 + ["mcpp_generated/modules/dnn/layers/cpu_kernels/conv2_kernels.simd_declarations.hpp"] = [[ +#define CV_CPU_SIMD_FILENAME "modules/dnn/src/layers/cpu_kernels/conv2_kernels.simd.hpp" +#define CV_CPU_DISPATCH_MODE AVX #include "opencv2/core/private/cv_cpu_include_simd_declarations.hpp" #define CV_CPU_DISPATCH_MODE AVX2 #include "opencv2/core/private/cv_cpu_include_simd_declarations.hpp" -#define CV_CPU_DISPATCH_MODES_ALL AVX2, SSE4_1, BASELINE +#define CV_CPU_DISPATCH_MODES_ALL AVX2, AVX, BASELINE #undef CV_CPU_SIMD_FILENAME ]], - ["mcpp_generated/modules/core/minmax.sse2.cpp"] = [[ - -#include "modules/core/src/precomp.hpp" -#include "modules/core/src/minmax.simd.hpp" -]], - ["mcpp_generated/modules/core/minmax.sse4_1.cpp"] = [[ + ["mcpp_generated/modules/dnn/layers/cpu_kernels/conv_block.avx.cpp"] = [[ -#include "modules/core/src/precomp.hpp" -#include "modules/core/src/minmax.simd.hpp" +#include "modules/dnn/src/precomp.hpp" +#include "modules/dnn/src/layers/cpu_kernels/conv_block.simd.hpp" ]], - ["mcpp_generated/modules/core/minmax.vsx3.cpp"] = [[ + ["mcpp_generated/modules/dnn/layers/cpu_kernels/conv_block.avx2.cpp"] = [[ -#include "modules/core/src/precomp.hpp" -#include "modules/core/src/minmax.simd.hpp" +#include "modules/dnn/src/precomp.hpp" +#include "modules/dnn/src/layers/cpu_kernels/conv_block.simd.hpp" ]], - ["mcpp_generated/modules/core/nan_mask.avx2.cpp"] = [[ + ["mcpp_generated/modules/dnn/layers/cpu_kernels/conv_block.neon.cpp"] = [[ -#include "modules/core/src/precomp.hpp" -#include "modules/core/src/nan_mask.simd.hpp" +#include "modules/dnn/src/precomp.hpp" +#include "modules/dnn/src/layers/cpu_kernels/conv_block.simd.hpp" ]], - ["mcpp_generated/modules/core/nan_mask.lasx.cpp"] = [[ + ["mcpp_generated/modules/dnn/layers/cpu_kernels/conv_block.neon_fp16.cpp"] = [[ -#include "modules/core/src/precomp.hpp" -#include "modules/core/src/nan_mask.simd.hpp" +#include "modules/dnn/src/precomp.hpp" +#include "modules/dnn/src/layers/cpu_kernels/conv_block.simd.hpp" ]], - ["mcpp_generated/modules/core/nan_mask.simd_declarations.hpp"] = [[ -#define CV_CPU_SIMD_FILENAME "modules/core/src/nan_mask.simd.hpp" + ["mcpp_generated/modules/dnn/layers/cpu_kernels/conv_block.simd_declarations.hpp"] = [[ +#define CV_CPU_SIMD_FILENAME "modules/dnn/src/layers/cpu_kernels/conv_block.simd.hpp" +#define CV_CPU_DISPATCH_MODE AVX +#include "opencv2/core/private/cv_cpu_include_simd_declarations.hpp" + #define CV_CPU_DISPATCH_MODE AVX2 #include "opencv2/core/private/cv_cpu_include_simd_declarations.hpp" -#define CV_CPU_DISPATCH_MODES_ALL AVX2, BASELINE +#define CV_CPU_DISPATCH_MODE NEON +#include "opencv2/core/private/cv_cpu_include_simd_declarations.hpp" + +#define CV_CPU_DISPATCH_MODE NEON_FP16 +#include "opencv2/core/private/cv_cpu_include_simd_declarations.hpp" + +#define CV_CPU_DISPATCH_MODES_ALL NEON_FP16, NEON, AVX2, AVX, BASELINE #undef CV_CPU_SIMD_FILENAME ]], - ["mcpp_generated/modules/core/nan_mask.sse2.cpp"] = [[ + ["mcpp_generated/modules/dnn/layers/cpu_kernels/conv_depthwise.avx.cpp"] = [[ -#include "modules/core/src/precomp.hpp" -#include "modules/core/src/nan_mask.simd.hpp" +#include "modules/dnn/src/precomp.hpp" +#include "modules/dnn/src/layers/cpu_kernels/conv_depthwise.simd.hpp" ]], - ["mcpp_generated/modules/core/norm.avx.cpp"] = [[ + ["mcpp_generated/modules/dnn/layers/cpu_kernels/conv_depthwise.avx2.cpp"] = [[ -#include "modules/core/src/precomp.hpp" -#include "modules/core/src/norm.simd.hpp" +#include "modules/dnn/src/precomp.hpp" +#include "modules/dnn/src/layers/cpu_kernels/conv_depthwise.simd.hpp" ]], - ["mcpp_generated/modules/core/norm.avx2.cpp"] = [[ + ["mcpp_generated/modules/dnn/layers/cpu_kernels/conv_depthwise.lasx.cpp"] = [[ -#include "modules/core/src/precomp.hpp" -#include "modules/core/src/norm.simd.hpp" +#include "modules/dnn/src/precomp.hpp" +#include "modules/dnn/src/layers/cpu_kernels/conv_depthwise.simd.hpp" ]], - ["mcpp_generated/modules/core/norm.lasx.cpp"] = [[ + ["mcpp_generated/modules/dnn/layers/cpu_kernels/conv_depthwise.rvv.cpp"] = [[ -#include "modules/core/src/precomp.hpp" -#include "modules/core/src/norm.simd.hpp" +#include "modules/dnn/src/precomp.hpp" +#include "modules/dnn/src/layers/cpu_kernels/conv_depthwise.simd.hpp" ]], - ["mcpp_generated/modules/core/norm.neon_dotprod.cpp"] = [[ + ["mcpp_generated/modules/dnn/layers/cpu_kernels/conv_depthwise.simd_declarations.hpp"] = [[ +#define CV_CPU_SIMD_FILENAME "modules/dnn/src/layers/cpu_kernels/conv_depthwise.simd.hpp" +#define CV_CPU_DISPATCH_MODE AVX +#include "opencv2/core/private/cv_cpu_include_simd_declarations.hpp" -#include "modules/core/src/precomp.hpp" -#include "modules/core/src/norm.simd.hpp" -]], - ["mcpp_generated/modules/core/norm.simd_declarations.hpp"] = [[ -#define CV_CPU_SIMD_FILENAME "modules/core/src/norm.simd.hpp" -#define CV_CPU_DISPATCH_MODE SSE4_1 +#define CV_CPU_DISPATCH_MODE AVX2 #include "opencv2/core/private/cv_cpu_include_simd_declarations.hpp" -#define CV_CPU_DISPATCH_MODE AVX +#define CV_CPU_DISPATCH_MODE RVV #include "opencv2/core/private/cv_cpu_include_simd_declarations.hpp" -#define CV_CPU_DISPATCH_MODE AVX2 +#define CV_CPU_DISPATCH_MODE LASX #include "opencv2/core/private/cv_cpu_include_simd_declarations.hpp" -#define CV_CPU_DISPATCH_MODES_ALL AVX2, AVX, SSE4_1, BASELINE +#define CV_CPU_DISPATCH_MODES_ALL LASX, RVV, AVX2, AVX, BASELINE #undef CV_CPU_SIMD_FILENAME ]], - ["mcpp_generated/modules/core/norm.sse2.cpp"] = [[ + ["mcpp_generated/modules/dnn/layers/cpu_kernels/conv_winograd_f63.avx.cpp"] = [[ -#include "modules/core/src/precomp.hpp" -#include "modules/core/src/norm.simd.hpp" +#include "modules/dnn/src/precomp.hpp" +#include "modules/dnn/src/layers/cpu_kernels/conv_winograd_f63.simd.hpp" ]], - ["mcpp_generated/modules/core/norm.sse4_1.cpp"] = [[ + ["mcpp_generated/modules/dnn/layers/cpu_kernels/conv_winograd_f63.avx2.cpp"] = [[ -#include "modules/core/src/precomp.hpp" -#include "modules/core/src/norm.simd.hpp" +#include "modules/dnn/src/precomp.hpp" +#include "modules/dnn/src/layers/cpu_kernels/conv_winograd_f63.simd.hpp" ]], - ["mcpp_generated/modules/core/reduce.avx2.cpp"] = [[ + ["mcpp_generated/modules/dnn/layers/cpu_kernels/conv_winograd_f63.neon.cpp"] = [[ -#include "modules/core/src/precomp.hpp" -#include "modules/core/src/reduce.simd.hpp" +#include "modules/dnn/src/precomp.hpp" +#include "modules/dnn/src/layers/cpu_kernels/conv_winograd_f63.simd.hpp" ]], - ["mcpp_generated/modules/core/reduce.neon_dotprod.cpp"] = [[ + ["mcpp_generated/modules/dnn/layers/cpu_kernels/conv_winograd_f63.neon_fp16.cpp"] = [[ -#include "modules/core/src/precomp.hpp" -#include "modules/core/src/reduce.simd.hpp" +#include "modules/dnn/src/precomp.hpp" +#include "modules/dnn/src/layers/cpu_kernels/conv_winograd_f63.simd.hpp" ]], - ["mcpp_generated/modules/core/reduce.simd_declarations.hpp"] = [[ -#define CV_CPU_SIMD_FILENAME "modules/core/src/reduce.simd.hpp" + ["mcpp_generated/modules/dnn/layers/cpu_kernels/conv_winograd_f63.simd_declarations.hpp"] = [[ +#define CV_CPU_SIMD_FILENAME "modules/dnn/src/layers/cpu_kernels/conv_winograd_f63.simd.hpp" +#define CV_CPU_DISPATCH_MODE AVX +#include "opencv2/core/private/cv_cpu_include_simd_declarations.hpp" + #define CV_CPU_DISPATCH_MODE AVX2 #include "opencv2/core/private/cv_cpu_include_simd_declarations.hpp" -#define CV_CPU_DISPATCH_MODES_ALL AVX2, BASELINE +#define CV_CPU_DISPATCH_MODES_ALL AVX2, AVX, BASELINE #undef CV_CPU_SIMD_FILENAME ]], - ["mcpp_generated/modules/core/reduce.sse2.cpp"] = [[ + ["mcpp_generated/modules/dnn/layers/cpu_kernels/fast_gemm_kernels.avx.cpp"] = [[ -#include "modules/core/src/precomp.hpp" -#include "modules/core/src/reduce.simd.hpp" +#include "modules/dnn/src/precomp.hpp" +#include "modules/dnn/src/layers/cpu_kernels/fast_gemm_kernels.simd.hpp" ]], - ["mcpp_generated/modules/core/reduce.ssse3.cpp"] = [[ + ["mcpp_generated/modules/dnn/layers/cpu_kernels/fast_gemm_kernels.avx2.cpp"] = [[ -#include "modules/core/src/precomp.hpp" -#include "modules/core/src/reduce.simd.hpp" +#include "modules/dnn/src/precomp.hpp" +#include "modules/dnn/src/layers/cpu_kernels/fast_gemm_kernels.simd.hpp" ]], - ["mcpp_generated/modules/core/split.avx2.cpp"] = [[ + ["mcpp_generated/modules/dnn/layers/cpu_kernels/fast_gemm_kernels.lasx.cpp"] = [[ -#include "modules/core/src/precomp.hpp" -#include "modules/core/src/split.simd.hpp" +#include "modules/dnn/src/precomp.hpp" +#include "modules/dnn/src/layers/cpu_kernels/fast_gemm_kernels.simd.hpp" ]], - ["mcpp_generated/modules/core/split.lasx.cpp"] = [[ + ["mcpp_generated/modules/dnn/layers/cpu_kernels/fast_gemm_kernels.neon.cpp"] = [[ -#include "modules/core/src/precomp.hpp" -#include "modules/core/src/split.simd.hpp" +#include "modules/dnn/src/precomp.hpp" +#include "modules/dnn/src/layers/cpu_kernels/fast_gemm_kernels.simd.hpp" ]], - ["mcpp_generated/modules/core/split.simd_declarations.hpp"] = [[ -#define CV_CPU_SIMD_FILENAME "modules/core/src/split.simd.hpp" + ["mcpp_generated/modules/dnn/layers/cpu_kernels/fast_gemm_kernels.simd_declarations.hpp"] = [[ +#define CV_CPU_SIMD_FILENAME "modules/dnn/src/layers/cpu_kernels/fast_gemm_kernels.simd.hpp" +#define CV_CPU_DISPATCH_MODE AVX +#include "opencv2/core/private/cv_cpu_include_simd_declarations.hpp" + #define CV_CPU_DISPATCH_MODE AVX2 #include "opencv2/core/private/cv_cpu_include_simd_declarations.hpp" -#define CV_CPU_DISPATCH_MODES_ALL AVX2, BASELINE +#define CV_CPU_DISPATCH_MODE NEON +#include "opencv2/core/private/cv_cpu_include_simd_declarations.hpp" + +#define CV_CPU_DISPATCH_MODE LASX +#include "opencv2/core/private/cv_cpu_include_simd_declarations.hpp" + +#define CV_CPU_DISPATCH_MODES_ALL LASX, NEON, AVX2, AVX, BASELINE #undef CV_CPU_SIMD_FILENAME ]], - ["mcpp_generated/modules/core/split.sse2.cpp"] = [[ + ["mcpp_generated/modules/dnn/layers/cpu_kernels/gridsample_kernels.avx.cpp"] = [[ -#include "modules/core/src/precomp.hpp" -#include "modules/core/src/split.simd.hpp" +#include "modules/dnn/src/precomp.hpp" +#include "modules/dnn/src/layers/cpu_kernels/gridsample_kernels.simd.hpp" ]], - ["mcpp_generated/modules/core/stat.avx2.cpp"] = [[ + ["mcpp_generated/modules/dnn/layers/cpu_kernels/gridsample_kernels.avx2.cpp"] = [[ -#include "modules/core/src/precomp.hpp" -#include "modules/core/src/stat.simd.hpp" +#include "modules/dnn/src/precomp.hpp" +#include "modules/dnn/src/layers/cpu_kernels/gridsample_kernels.simd.hpp" ]], - ["mcpp_generated/modules/core/stat.lasx.cpp"] = [[ + ["mcpp_generated/modules/dnn/layers/cpu_kernels/gridsample_kernels.lasx.cpp"] = [[ -#include "modules/core/src/precomp.hpp" -#include "modules/core/src/stat.simd.hpp" +#include "modules/dnn/src/precomp.hpp" +#include "modules/dnn/src/layers/cpu_kernels/gridsample_kernels.simd.hpp" ]], - ["mcpp_generated/modules/core/stat.simd_declarations.hpp"] = [[ -#define CV_CPU_SIMD_FILENAME "modules/core/src/stat.simd.hpp" -#define CV_CPU_DISPATCH_MODE SSE4_2 + ["mcpp_generated/modules/dnn/layers/cpu_kernels/gridsample_kernels.neon.cpp"] = [[ + +#include "modules/dnn/src/precomp.hpp" +#include "modules/dnn/src/layers/cpu_kernels/gridsample_kernels.simd.hpp" +]], + ["mcpp_generated/modules/dnn/layers/cpu_kernels/gridsample_kernels.rvv.cpp"] = [[ + +#include "modules/dnn/src/precomp.hpp" +#include "modules/dnn/src/layers/cpu_kernels/gridsample_kernels.simd.hpp" +]], + ["mcpp_generated/modules/dnn/layers/cpu_kernels/gridsample_kernels.simd_declarations.hpp"] = [[ +#define CV_CPU_SIMD_FILENAME "modules/dnn/src/layers/cpu_kernels/gridsample_kernels.simd.hpp" +#define CV_CPU_DISPATCH_MODE AVX #include "opencv2/core/private/cv_cpu_include_simd_declarations.hpp" #define CV_CPU_DISPATCH_MODE AVX2 #include "opencv2/core/private/cv_cpu_include_simd_declarations.hpp" -#define CV_CPU_DISPATCH_MODES_ALL AVX2, SSE4_2, BASELINE +#define CV_CPU_DISPATCH_MODE NEON +#include "opencv2/core/private/cv_cpu_include_simd_declarations.hpp" + +#define CV_CPU_DISPATCH_MODE RVV +#include "opencv2/core/private/cv_cpu_include_simd_declarations.hpp" + +#define CV_CPU_DISPATCH_MODE LASX +#include "opencv2/core/private/cv_cpu_include_simd_declarations.hpp" + +#define CV_CPU_DISPATCH_MODES_ALL LASX, RVV, NEON, AVX2, AVX, BASELINE #undef CV_CPU_SIMD_FILENAME ]], - ["mcpp_generated/modules/core/stat.sse4_2.cpp"] = [[ + ["mcpp_generated/modules/dnn/layers/cpu_kernels/nary_eltwise_kernels.avx.cpp"] = [[ -#include "modules/core/src/precomp.hpp" -#include "modules/core/src/stat.simd.hpp" +#include "modules/dnn/src/precomp.hpp" +#include "modules/dnn/src/layers/cpu_kernels/nary_eltwise_kernels.simd.hpp" ]], - ["mcpp_generated/modules/core/sum.avx2.cpp"] = [[ + ["mcpp_generated/modules/dnn/layers/cpu_kernels/nary_eltwise_kernels.avx2.cpp"] = [[ -#include "modules/core/src/precomp.hpp" -#include "modules/core/src/sum.simd.hpp" +#include "modules/dnn/src/precomp.hpp" +#include "modules/dnn/src/layers/cpu_kernels/nary_eltwise_kernels.simd.hpp" ]], - ["mcpp_generated/modules/core/sum.lasx.cpp"] = [[ + ["mcpp_generated/modules/dnn/layers/cpu_kernels/nary_eltwise_kernels.lasx.cpp"] = [[ -#include "modules/core/src/precomp.hpp" -#include "modules/core/src/sum.simd.hpp" +#include "modules/dnn/src/precomp.hpp" +#include "modules/dnn/src/layers/cpu_kernels/nary_eltwise_kernels.simd.hpp" ]], - ["mcpp_generated/modules/core/sum.simd_declarations.hpp"] = [[ -#define CV_CPU_SIMD_FILENAME "modules/core/src/sum.simd.hpp" + ["mcpp_generated/modules/dnn/layers/cpu_kernels/nary_eltwise_kernels.neon.cpp"] = [[ + +#include "modules/dnn/src/precomp.hpp" +#include "modules/dnn/src/layers/cpu_kernels/nary_eltwise_kernels.simd.hpp" +]], + ["mcpp_generated/modules/dnn/layers/cpu_kernels/nary_eltwise_kernels.rvv.cpp"] = [[ + +#include "modules/dnn/src/precomp.hpp" +#include "modules/dnn/src/layers/cpu_kernels/nary_eltwise_kernels.simd.hpp" +]], + ["mcpp_generated/modules/dnn/layers/cpu_kernels/nary_eltwise_kernels.simd_declarations.hpp"] = [[ +#define CV_CPU_SIMD_FILENAME "modules/dnn/src/layers/cpu_kernels/nary_eltwise_kernels.simd.hpp" +#define CV_CPU_DISPATCH_MODE AVX +#include "opencv2/core/private/cv_cpu_include_simd_declarations.hpp" + #define CV_CPU_DISPATCH_MODE AVX2 #include "opencv2/core/private/cv_cpu_include_simd_declarations.hpp" -#define CV_CPU_DISPATCH_MODES_ALL AVX2, BASELINE +#define CV_CPU_DISPATCH_MODE NEON +#include "opencv2/core/private/cv_cpu_include_simd_declarations.hpp" -#undef CV_CPU_SIMD_FILENAME -]], - ["mcpp_generated/modules/core/sum.sse2.cpp"] = [[ +#define CV_CPU_DISPATCH_MODE RVV +#include "opencv2/core/private/cv_cpu_include_simd_declarations.hpp" -#include "modules/core/src/precomp.hpp" -#include "modules/core/src/sum.simd.hpp" -]], - ["mcpp_generated/modules/core/test/test_intrin128.avx.cpp"] = [[ +#define CV_CPU_DISPATCH_MODE LASX +#include "opencv2/core/private/cv_cpu_include_simd_declarations.hpp" -#include "modules/core/test/test_precomp.hpp" -#include "modules/core/test/test_intrin128.simd.hpp" -]], - ["mcpp_generated/modules/core/test/test_intrin128.avx2.cpp"] = [[ +#define CV_CPU_DISPATCH_MODES_ALL LASX, RVV, NEON, AVX2, AVX, BASELINE -#include "modules/core/test/test_precomp.hpp" -#include "modules/core/test/test_intrin128.simd.hpp" +#undef CV_CPU_SIMD_FILENAME ]], - ["mcpp_generated/modules/core/test/test_intrin128.avx512_skx.cpp"] = [[ + ["mcpp_generated/modules/dnn/layers/cpu_kernels/reduce2_kernels.avx.cpp"] = [[ -#include "modules/core/test/test_precomp.hpp" -#include "modules/core/test/test_intrin128.simd.hpp" +#include "modules/dnn/src/precomp.hpp" +#include "modules/dnn/src/layers/cpu_kernels/reduce2_kernels.simd.hpp" ]], - ["mcpp_generated/modules/core/test/test_intrin128.fp16.cpp"] = [[ + ["mcpp_generated/modules/dnn/layers/cpu_kernels/reduce2_kernels.avx2.cpp"] = [[ -#include "modules/core/test/test_precomp.hpp" -#include "modules/core/test/test_intrin128.simd.hpp" +#include "modules/dnn/src/precomp.hpp" +#include "modules/dnn/src/layers/cpu_kernels/reduce2_kernels.simd.hpp" ]], - ["mcpp_generated/modules/core/test/test_intrin128.simd_declarations.hpp"] = [[ -#define CV_CPU_SIMD_FILENAME "modules/core/test/test_intrin128.simd.hpp" -#define CV_CPU_DISPATCH_MODE SSE2 -#include "opencv2/core/private/cv_cpu_include_simd_declarations.hpp" - -#define CV_CPU_DISPATCH_MODE SSE3 -#include "opencv2/core/private/cv_cpu_include_simd_declarations.hpp" + ["mcpp_generated/modules/dnn/layers/cpu_kernels/reduce2_kernels.lasx.cpp"] = [[ -#define CV_CPU_DISPATCH_MODE SSSE3 -#include "opencv2/core/private/cv_cpu_include_simd_declarations.hpp" +#include "modules/dnn/src/precomp.hpp" +#include "modules/dnn/src/layers/cpu_kernels/reduce2_kernels.simd.hpp" +]], + ["mcpp_generated/modules/dnn/layers/cpu_kernels/reduce2_kernels.neon.cpp"] = [[ -#define CV_CPU_DISPATCH_MODE SSE4_1 -#include "opencv2/core/private/cv_cpu_include_simd_declarations.hpp" +#include "modules/dnn/src/precomp.hpp" +#include "modules/dnn/src/layers/cpu_kernels/reduce2_kernels.simd.hpp" +]], + ["mcpp_generated/modules/dnn/layers/cpu_kernels/reduce2_kernels.rvv.cpp"] = [[ -#define CV_CPU_DISPATCH_MODE SSE4_2 +#include "modules/dnn/src/precomp.hpp" +#include "modules/dnn/src/layers/cpu_kernels/reduce2_kernels.simd.hpp" +]], + ["mcpp_generated/modules/dnn/layers/cpu_kernels/reduce2_kernels.simd_declarations.hpp"] = [[ +#define CV_CPU_SIMD_FILENAME "modules/dnn/src/layers/cpu_kernels/reduce2_kernels.simd.hpp" +#define CV_CPU_DISPATCH_MODE AVX #include "opencv2/core/private/cv_cpu_include_simd_declarations.hpp" -#define CV_CPU_DISPATCH_MODE AVX +#define CV_CPU_DISPATCH_MODE AVX2 #include "opencv2/core/private/cv_cpu_include_simd_declarations.hpp" -#define CV_CPU_DISPATCH_MODE FP16 +#define CV_CPU_DISPATCH_MODE NEON #include "opencv2/core/private/cv_cpu_include_simd_declarations.hpp" -#define CV_CPU_DISPATCH_MODE AVX2 +#define CV_CPU_DISPATCH_MODE RVV #include "opencv2/core/private/cv_cpu_include_simd_declarations.hpp" -#define CV_CPU_DISPATCH_MODE AVX512_SKX +#define CV_CPU_DISPATCH_MODE LASX #include "opencv2/core/private/cv_cpu_include_simd_declarations.hpp" -#define CV_CPU_DISPATCH_MODES_ALL AVX512_SKX, AVX2, FP16, AVX, SSE4_2, SSE4_1, SSSE3, SSE3, SSE2, BASELINE +#define CV_CPU_DISPATCH_MODES_ALL LASX, RVV, NEON, AVX2, AVX, BASELINE #undef CV_CPU_SIMD_FILENAME ]], - ["mcpp_generated/modules/core/test/test_intrin128.sse2.cpp"] = [[ - -#include "modules/core/test/test_precomp.hpp" -#include "modules/core/test/test_intrin128.simd.hpp" -]], - ["mcpp_generated/modules/core/test/test_intrin128.sse3.cpp"] = [[ - -#include "modules/core/test/test_precomp.hpp" -#include "modules/core/test/test_intrin128.simd.hpp" -]], - ["mcpp_generated/modules/core/test/test_intrin128.sse4_1.cpp"] = [[ + ["mcpp_generated/modules/dnn/layers/cpu_kernels/transpose_kernels.avx.cpp"] = [[ -#include "modules/core/test/test_precomp.hpp" -#include "modules/core/test/test_intrin128.simd.hpp" +#include "modules/dnn/src/precomp.hpp" +#include "modules/dnn/src/layers/cpu_kernels/transpose_kernels.simd.hpp" ]], - ["mcpp_generated/modules/core/test/test_intrin128.sse4_2.cpp"] = [[ + ["mcpp_generated/modules/dnn/layers/cpu_kernels/transpose_kernels.avx2.cpp"] = [[ -#include "modules/core/test/test_precomp.hpp" -#include "modules/core/test/test_intrin128.simd.hpp" +#include "modules/dnn/src/precomp.hpp" +#include "modules/dnn/src/layers/cpu_kernels/transpose_kernels.simd.hpp" ]], - ["mcpp_generated/modules/core/test/test_intrin128.ssse3.cpp"] = [[ + ["mcpp_generated/modules/dnn/layers/cpu_kernels/transpose_kernels.lasx.cpp"] = [[ -#include "modules/core/test/test_precomp.hpp" -#include "modules/core/test/test_intrin128.simd.hpp" +#include "modules/dnn/src/precomp.hpp" +#include "modules/dnn/src/layers/cpu_kernels/transpose_kernels.simd.hpp" ]], - ["mcpp_generated/modules/core/test/test_intrin256.avx2.cpp"] = [[ + ["mcpp_generated/modules/dnn/layers/cpu_kernels/transpose_kernels.neon.cpp"] = [[ -#include "modules/core/test/test_precomp.hpp" -#include "modules/core/test/test_intrin256.simd.hpp" +#include "modules/dnn/src/precomp.hpp" +#include "modules/dnn/src/layers/cpu_kernels/transpose_kernels.simd.hpp" ]], - ["mcpp_generated/modules/core/test/test_intrin256.avx512_skx.cpp"] = [[ + ["mcpp_generated/modules/dnn/layers/cpu_kernels/transpose_kernels.rvv.cpp"] = [[ -#include "modules/core/test/test_precomp.hpp" -#include "modules/core/test/test_intrin256.simd.hpp" +#include "modules/dnn/src/precomp.hpp" +#include "modules/dnn/src/layers/cpu_kernels/transpose_kernels.simd.hpp" ]], - ["mcpp_generated/modules/core/test/test_intrin256.lasx.cpp"] = [[ + ["mcpp_generated/modules/dnn/layers/cpu_kernels/transpose_kernels.simd_declarations.hpp"] = [[ +#define CV_CPU_SIMD_FILENAME "modules/dnn/src/layers/cpu_kernels/transpose_kernels.simd.hpp" +#define CV_CPU_DISPATCH_MODE AVX +#include "opencv2/core/private/cv_cpu_include_simd_declarations.hpp" -#include "modules/core/test/test_precomp.hpp" -#include "modules/core/test/test_intrin256.simd.hpp" -]], - ["mcpp_generated/modules/core/test/test_intrin256.simd_declarations.hpp"] = [[ -#define CV_CPU_SIMD_FILENAME "modules/core/test/test_intrin256.simd.hpp" #define CV_CPU_DISPATCH_MODE AVX2 #include "opencv2/core/private/cv_cpu_include_simd_declarations.hpp" -#define CV_CPU_DISPATCH_MODE AVX512_SKX +#define CV_CPU_DISPATCH_MODE NEON +#include "opencv2/core/private/cv_cpu_include_simd_declarations.hpp" + +#define CV_CPU_DISPATCH_MODE RVV #include "opencv2/core/private/cv_cpu_include_simd_declarations.hpp" #define CV_CPU_DISPATCH_MODE LASX #include "opencv2/core/private/cv_cpu_include_simd_declarations.hpp" -#define CV_CPU_DISPATCH_MODES_ALL LASX, AVX512_SKX, AVX2, BASELINE +#define CV_CPU_DISPATCH_MODES_ALL LASX, RVV, NEON, AVX2, AVX, BASELINE #undef CV_CPU_SIMD_FILENAME ]], - ["mcpp_generated/modules/core/test/test_intrin512.avx512_skx.cpp"] = [[ - -#include "modules/core/test/test_precomp.hpp" -#include "modules/core/test/test_intrin512.simd.hpp" -]], - ["mcpp_generated/modules/core/test/test_intrin512.simd_declarations.hpp"] = [[ -#define CV_CPU_SIMD_FILENAME "modules/core/test/test_intrin512.simd.hpp" -#define CV_CPU_DISPATCH_MODE AVX512_SKX -#include "opencv2/core/private/cv_cpu_include_simd_declarations.hpp" - -#define CV_CPU_DISPATCH_MODES_ALL AVX512_SKX, BASELINE + ["mcpp_generated/modules/dnn/layers/layers_common.avx.cpp"] = [[ -#undef CV_CPU_SIMD_FILENAME +#include "modules/dnn/src/precomp.hpp" +#include "modules/dnn/src/layers/layers_common.simd.hpp" ]], - ["mcpp_generated/modules/core/transpose.avx.cpp"] = [[ + ["mcpp_generated/modules/dnn/layers/layers_common.avx2.cpp"] = [[ -#include "modules/core/src/precomp.hpp" -#include "modules/core/src/transpose.simd.hpp" +#include "modules/dnn/src/precomp.hpp" +#include "modules/dnn/src/layers/layers_common.simd.hpp" ]], - ["mcpp_generated/modules/core/transpose.avx2.cpp"] = [[ + ["mcpp_generated/modules/dnn/layers/layers_common.avx512_skx.cpp"] = [[ -#include "modules/core/src/precomp.hpp" -#include "modules/core/src/transpose.simd.hpp" +#include "modules/dnn/src/precomp.hpp" +#include "modules/dnn/src/layers/layers_common.simd.hpp" ]], - ["mcpp_generated/modules/core/transpose.lasx.cpp"] = [[ + ["mcpp_generated/modules/dnn/layers/layers_common.lasx.cpp"] = [[ -#include "modules/core/src/precomp.hpp" -#include "modules/core/src/transpose.simd.hpp" +#include "modules/dnn/src/precomp.hpp" +#include "modules/dnn/src/layers/layers_common.simd.hpp" ]], - ["mcpp_generated/modules/core/transpose.neon.cpp"] = [[ + ["mcpp_generated/modules/dnn/layers/layers_common.neon.cpp"] = [[ -#include "modules/core/src/precomp.hpp" -#include "modules/core/src/transpose.simd.hpp" +#include "modules/dnn/src/precomp.hpp" +#include "modules/dnn/src/layers/layers_common.simd.hpp" ]], - ["mcpp_generated/modules/core/transpose.rvv.cpp"] = [[ + ["mcpp_generated/modules/dnn/layers/layers_common.rvv.cpp"] = [[ -#include "modules/core/src/precomp.hpp" -#include "modules/core/src/transpose.simd.hpp" +#include "modules/dnn/src/precomp.hpp" +#include "modules/dnn/src/layers/layers_common.simd.hpp" ]], - ["mcpp_generated/modules/core/transpose.simd_declarations.hpp"] = [[ -#define CV_CPU_SIMD_FILENAME "modules/core/src/transpose.simd.hpp" + ["mcpp_generated/modules/dnn/layers/layers_common.simd_declarations.hpp"] = [[ +#define CV_CPU_SIMD_FILENAME "modules/dnn/src/layers/layers_common.simd.hpp" #define CV_CPU_DISPATCH_MODE AVX #include "opencv2/core/private/cv_cpu_include_simd_declarations.hpp" #define CV_CPU_DISPATCH_MODE AVX2 #include "opencv2/core/private/cv_cpu_include_simd_declarations.hpp" -#define CV_CPU_DISPATCH_MODES_ALL AVX2, AVX, BASELINE +#define CV_CPU_DISPATCH_MODE AVX512_SKX +#include "opencv2/core/private/cv_cpu_include_simd_declarations.hpp" + +#define CV_CPU_DISPATCH_MODE RVV +#include "opencv2/core/private/cv_cpu_include_simd_declarations.hpp" + +#define CV_CPU_DISPATCH_MODE LASX +#include "opencv2/core/private/cv_cpu_include_simd_declarations.hpp" + +#define CV_CPU_DISPATCH_MODE NEON +#include "opencv2/core/private/cv_cpu_include_simd_declarations.hpp" + +#define CV_CPU_DISPATCH_MODE SVE +#include "opencv2/core/private/cv_cpu_include_simd_declarations.hpp" + +#define CV_CPU_DISPATCH_MODES_ALL SVE, NEON, LASX, RVV, AVX512_SKX, AVX2, AVX, BASELINE #undef CV_CPU_SIMD_FILENAME ]], - ["mcpp_generated/modules/core/version_string.inc"] = [[ -"\n" -"General configuration for OpenCV 5.0.0 =====================================\n" -" Version control: f5b8842\n" -"\n" -" Platform:\n" -" Timestamp: 2026-07-20T12:04:49Z\n" -" Host: Windows 10.0.26100 AMD64\n" -" CMake: 4.4.0\n" -" CMake generator: Ninja\n" -" CMake build tool: C:/ProgramData/chocolatey/bin/ninja.exe\n" -" MSVC: 1951\n" -" Configuration: Release\n" -" Algorithm Hint: ALGO_HINT_ACCURATE\n" -"\n" -" CPU/HW features:\n" -" Baseline: SSE SSE2 SSE3\n" -" requested: SSE3\n" -" Dispatched code generation: SSE4_1 SSE4_2 AVX FP16 AVX2 AVX512_SKX\n" -" SSE4_1 (16 files): + SSSE3 SSE4_1\n" -" SSE4_2 (1 files): + SSSE3 SSE4_1 POPCNT SSE4_2\n" -" AVX (5 files): + SSSE3 SSE4_1 POPCNT SSE4_2 AVX\n" -" FP16 (0 files): + SSSE3 SSE4_1 POPCNT SSE4_2 AVX FP16\n" -" AVX2 (32 files): + SSSE3 SSE4_1 POPCNT SSE4_2 AVX FP16 AVX2 FMA3\n" -" AVX512_SKX (5 files): + SSSE3 SSE4_1 POPCNT SSE4_2 AVX FP16 AVX2 FMA3 AVX_512F AVX512_COMMON AVX512_SKX\n" -"\n" -" C/C++:\n" -" Built as dynamic libs?: NO\n" -" C++ standard: 17\n" -" C++ Compiler: C:/Program Files/LLVM/bin/clang-cl.exe (ver 20.1.8)\n" -" C++ flags (Release): /DWIN32 /D_WINDOWS /W4 /GR /D _CRT_SECURE_NO_DEPRECATE /D _CRT_NONSTDC_NO_DEPRECATE /D _SCL_SECURE_NO_WARNINGS /Gy /bigobj /Oi /fp:precise -W -Wreturn-type -Wnon-virtual-dtor -Waddress -Wsequence-point -Wformat -Wformat-security -Wmissing-declarations -Wmissing-prototypes -Wstrict-prototypes -Wundef -Winit-self -Wpointer-arith -Wshadow -Wsign-promo -Wuninitialized -Winconsistent-missing-override -Wno-delete-non-virtual-dtor -Wno-unnamed-type-template-args -Wno-comment -Wno-deprecated-enum-enum-conversion -Wno-deprecated-anon-enum-enum-conversion -Qunused-arguments /FS -msse3 /EHa /wd4127 /wd4251 /wd4324 /wd4275 /wd4512 /wd4589 /wd4819 /O2 /Ob2 /DNDEBUG -DNDEBUG\n" -" C++ flags (Debug): /DWIN32 /D_WINDOWS /W4 /GR /D _CRT_SECURE_NO_DEPRECATE /D _CRT_NONSTDC_NO_DEPRECATE /D _SCL_SECURE_NO_WARNINGS /Gy /bigobj /Oi /fp:precise -W -Wreturn-type -Wnon-virtual-dtor -Waddress -Wsequence-point -Wformat -Wformat-security -Wmissing-declarations -Wmissing-prototypes -Wstrict-prototypes -Wundef -Winit-self -Wpointer-arith -Wshadow -Wsign-promo -Wuninitialized -Winconsistent-missing-override -Wno-delete-non-virtual-dtor -Wno-unnamed-type-template-args -Wno-comment -Wno-deprecated-enum-enum-conversion -Wno-deprecated-anon-enum-enum-conversion -Qunused-arguments /FS -msse3 /EHa /wd4127 /wd4251 /wd4324 /wd4275 /wd4512 /wd4589 /wd4819 /Zi /Ob0 /Od /RTC1 -O0 -DDEBUG -D_DEBUG\n" -" C Compiler: C:/Program Files/LLVM/bin/clang-cl.exe\n" -" C flags (Release): /DWIN32 /D_WINDOWS /W3 /D _CRT_SECURE_NO_DEPRECATE /D _CRT_NONSTDC_NO_DEPRECATE /D _SCL_SECURE_NO_WARNINGS /Gy /bigobj /Oi /fp:precise -W -Wreturn-type -Wnon-virtual-dtor -Waddress -Wsequence-point -Wformat -Wformat-security -Wmissing-declarations -Wmissing-prototypes -Wstrict-prototypes -Wundef -Winit-self -Wpointer-arith -Wshadow -Wsign-promo -Wuninitialized -Winconsistent-missing-override -Wno-delete-non-virtual-dtor -Wno-unnamed-type-template-args -Wno-comment -Wno-deprecated-enum-enum-conversion -Wno-deprecated-anon-enum-enum-conversion -Qunused-arguments /FS -msse3 /O2 /Ob2 /DNDEBUG -DNDEBUG\n" -" C flags (Debug): /DWIN32 /D_WINDOWS /W3 /D _CRT_SECURE_NO_DEPRECATE /D _CRT_NONSTDC_NO_DEPRECATE /D _SCL_SECURE_NO_WARNINGS /Gy /bigobj /Oi /fp:precise -W -Wreturn-type -Wnon-virtual-dtor -Waddress -Wsequence-point -Wformat -Wformat-security -Wmissing-declarations -Wmissing-prototypes -Wstrict-prototypes -Wundef -Winit-self -Wpointer-arith -Wshadow -Wsign-promo -Wuninitialized -Winconsistent-missing-override -Wno-delete-non-virtual-dtor -Wno-unnamed-type-template-args -Wno-comment -Wno-deprecated-enum-enum-conversion -Wno-deprecated-anon-enum-enum-conversion -Qunused-arguments /FS -msse3 /Zi /Ob0 /Od /RTC1 -O0 -DDEBUG -D_DEBUG\n" -" Linker flags (Release): /machine:x64 /NODEFAULTLIB:atlthunk.lib /INCREMENTAL:NO /NODEFAULTLIB:libcmtd.lib /NODEFAULTLIB:libcpmtd.lib /NODEFAULTLIB:msvcrtd.lib\n" -" Linker flags (Debug): /machine:x64 /NODEFAULTLIB:atlthunk.lib /debug /INCREMENTAL /NODEFAULTLIB:libcmt.lib /NODEFAULTLIB:libcpmt.lib /NODEFAULTLIB:msvcrt.lib\n" -" ccache: NO\n" -" Precompiled headers: NO\n" -" Extra dependencies: comctl32 gdi32 ole32 setupapi ws2_32\n" -" 3rdparty dependencies: libjpeg-turbo libpng zlib\n" -"\n" -" OpenCV modules:\n" -" To be built: core flann geometry highgui imgcodecs imgproc videoio\n" -" Disabled: world\n" -" Disabled by dependency: calib dnn features java_bindings_generator js_bindings_generator objc_bindings_generator objdetect photo ptcloud python_bindings_generator python_tests stereo stitching video\n" -" Unavailable: java python3 ts\n" -" Applications: -\n" -" Documentation: NO\n" -" Non-free algorithms: NO\n" -"\n" -" Windows RT support: NO\n" -"\n" -" GUI: NONE\n" -" VTK support: NO\n" -"\n" -" Media I/O: \n" -" ZLib: build (ver 1.3.2)\n" -" JPEG: build-libjpeg-turbo (ver 3.1.2-70)\n" -" SIMD Support Request: NO\n" -" PNG: build (ver 1.6.57)\n" -" SIMD Support Request: YES\n" -" SIMD Support: YES (Intel SSE)\n" -" Metadata Support: EXIF XMP ICC cICP\n" -" GIF: NO\n" -" HDR: YES\n" -" SUNRASTER: YES\n" -" PXM: YES\n" -" PFM: YES\n" -"\n" -" Video I/O:\n" -" FFMPEG: YES (find_package)\n" -" avcodec: YES (62.28.102)\n" -" avformat: YES (62.12.102)\n" -" avutil: YES (60.26.102)\n" -" swscale: YES (9.5.102)\n" -" Orbbec: NO\n" -"\n" -" Parallel framework: Concurrency\n" -"\n" -" Trace: YES (built-in)\n" -"\n" -" Other third-party libraries:\n" -" Custom HAL: NO\n" -"\n" -" ONNX Runtime: NO\n" -"\n" -" Python (for build): C:/hostedtoolcache/windows/Python/3.12.10/x64/python3.exe\n" -"\n" -" Install to: install\n" -"-----------------------------------------------------------------\n" -"\n" + ["mcpp_generated/modules/dnn/layers/layers_common.sve.cpp"] = [[ + +#include "modules/dnn/src/precomp.hpp" +#include "modules/dnn/src/layers/layers_common.simd.hpp" ]], ["mcpp_generated/modules/highgui/opencv_highgui_config.hpp"] = [[ // Auto-generated file @@ -10335,6 +13720,7 @@ bool MLASCALL MlasHGemmSupported(CBLAS_TRANSPOSE, CBLAS_TRANSPOSE) { return fals /* #undef OPENCV_ENABLE_NONFREE */ #define HAVE_OPENCV_CORE +#define HAVE_OPENCV_DNN #define HAVE_OPENCV_FLANN #define HAVE_OPENCV_GEOMETRY #define HAVE_OPENCV_HIGHGUI @@ -10401,6 +13787,7 @@ jpeg16 3rdparty/libjpeg-turbo/src/jdmainct.c jpeg16 3rdparty/libjpeg-turbo/src/jdpostct.c jpeg16 3rdparty/libjpeg-turbo/src/jdsample.c jpeg16 3rdparty/libjpeg-turbo/src/jutils.c +?dnn mlasgemm modules/dnn/src/layers/cpu_kernels/mlas_threading.cpp ]], }, include_dirs = { @@ -10419,6 +13806,14 @@ jpeg16 3rdparty/libjpeg-turbo/src/jutils.c "mcpp_generated/modules/geometry", "*/modules/imgproc/include", "mcpp_generated/modules/imgproc", + "*/3rdparty/mlas/inc", + "*/3rdparty/mlas/lib", + "*/modules/dnn/include", + "mcpp_generated/modules/dnn", + "*/modules/dnn/misc/caffe", + "*/modules/dnn/misc/tensorflow", + "*/modules/dnn/misc/onnx", + "*/3rdparty/protobuf/src", "*/3rdparty/libpng", "*/modules/imgcodecs/include", "mcpp_generated/modules/imgcodecs", diff --git a/tests/examples/opencv-dnn/mcpp.toml b/tests/examples/opencv-dnn/mcpp.toml index e87b281..41d33f4 100644 --- a/tests/examples/opencv-dnn/mcpp.toml +++ b/tests/examples/opencv-dnn/mcpp.toml @@ -17,3 +17,9 @@ opencv = { version = "5.0.0", features = ["dnn"] } # dnn closure from source and runs the same blobFromImage assertion. [target.'cfg(macos)'.dependencies.compat] opencv = { version = "5.0.0", features = ["dnn"] } + +# windows-x86_64 dnn: clang-cl builds the same x86 dnn delta (mlas/lib/x86_64 + +# avx/avx2/avx512 kernels) as linux; dnn + vendored protobuf compile clean under +# clang-cl (CI-verified). +[target.'cfg(windows)'.dependencies.compat] +opencv = { version = "5.0.0", features = ["dnn"] } diff --git a/tests/examples/opencv-dnn/tests/opencv_dnn_feature.cpp b/tests/examples/opencv-dnn/tests/opencv_dnn_feature.cpp index f59b8c2..a4a9dad 100644 --- a/tests/examples/opencv-dnn/tests/opencv_dnn_feature.cpp +++ b/tests/examples/opencv-dnn/tests/opencv_dnn_feature.cpp @@ -4,7 +4,7 @@ // dnn feature assertion: blobFromImage produces a correctly-shaped and // correctly-valued NCHW blob (exercises dnn core + the whole protobuf/mlas // link closure), and an empty Net constructs. Linux-only (see mcpp.toml). -#if defined(__linux__) || defined(__APPLE__) +#if defined(__linux__) || defined(__APPLE__) || defined(_WIN32) #include #include #include diff --git a/tests/examples/opencv-module-dnn/mcpp.toml b/tests/examples/opencv-module-dnn/mcpp.toml index 941c707..b43a70d 100644 --- a/tests/examples/opencv-module-dnn/mcpp.toml +++ b/tests/examples/opencv-module-dnn/mcpp.toml @@ -18,3 +18,7 @@ opencv = { version = "0.0.6", features = ["dnn"] } # forwards compat.opencv/dnn which now has the per-OS NEON dnn payload). [target.'cfg(macos)'.dependencies] opencv = { version = "0.0.6", features = ["dnn"] } + +# windows: `import opencv.dnn;` on windows-x86_64 (clang-cl). +[target.'cfg(windows)'.dependencies] +opencv = { version = "0.0.6", features = ["dnn"] } diff --git a/tests/examples/opencv-module-dnn/tests/opencv_dnn_iface.cpp b/tests/examples/opencv-module-dnn/tests/opencv_dnn_iface.cpp index fdc04fc..18972c3 100644 --- a/tests/examples/opencv-module-dnn/tests/opencv_dnn_iface.cpp +++ b/tests/examples/opencv-module-dnn/tests/opencv_dnn_iface.cpp @@ -4,7 +4,7 @@ // Linux-only (see mcpp.toml). Not named dnn.cpp (would collide with the dep's // modules/dnn/src/dnn.cpp — #240 family). Import-only (import std + the opencv // modules): no textual headers, matching the ffmpeg-module member convention. -#if defined(__linux__) || defined(__APPLE__) +#if defined(__linux__) || defined(__APPLE__) || defined(_WIN32) import std; import opencv.cv; import opencv.dnn;