Skip to content

Commit 9e41b05

Browse files
[rom_ctrl, fpga] Add ROM init in fpga bit file
* FPGA tests need ROM initialization to pass * RomInitFile argument and init file paths added to the nix/fpga.nix script
1 parent 8347de4 commit 9e41b05

3 files changed

Lines changed: 15 additions & 4 deletions

File tree

hw/top_chip/chip_mocha_genesys2.core

Lines changed: 7 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -40,6 +40,12 @@ parameters:
4040
default: ""
4141
paramtype: vlogparam
4242

43+
RomInitFile:
44+
datatype: str
45+
description: ROM initialization file in 32 bit vmem hex format
46+
default: ""
47+
paramtype: vlogparam
48+
4349
targets:
4450
default: &default_target
4551
filesets:
@@ -54,6 +60,7 @@ targets:
5460
toplevel: chip_mocha_genesys2
5561
parameters:
5662
- BootRomInitFile
63+
- RomInitFile
5764
tools:
5865
vivado:
5966
part: "xc7k325tffg900-2" # Genesys 2 with K325T

hw/top_chip/rtl/chip_mocha_genesys2.sv

Lines changed: 4 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -3,7 +3,8 @@
33
// SPDX-License-Identifier: Apache-2.0
44

55
module chip_mocha_genesys2 #(
6-
parameter BootRomInitFile = ""
6+
parameter BootRomInitFile = "",
7+
parameter RomInitFile = ""
78
) (
89
// Onboard 200MHz oscillator
910
input logic sysclk_200m_ni,
@@ -146,7 +147,8 @@ module chip_mocha_genesys2 #(
146147

147148
// CHERI Mocha top
148149
top_chip_system #(
149-
.SramInitFile(BootRomInitFile)
150+
.SramInitFile(BootRomInitFile),
151+
.RomInitFile(RomInitFile)
150152
) u_top_chip_system (
151153
// Clock and reset
152154
.clk_i (clk_50m),

nix/fpga.nix

Lines changed: 4 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -8,14 +8,15 @@
88
}: let
99
bitstream_path = "build/lowrisc_mocha_chip_mocha_genesys2_0/synth-vivado";
1010
bootrom_path = "build/sw/device/bootrom";
11+
rom_init_path = "sw/device/tests/rom_ctrl";
1112
in {
1213
bitstream-hash = pkgs.writeShellApplication {
1314
name = "bitstream-hash";
1415
runtimeInputs = [pythonEnv llvm pkgs.gnumake pkgs.cmake pkgs.srecord];
1516
text = ''
1617
# Ask fusesoc to evaluate and generate the dependencies list.
1718
fusesoc --cores-root=. run --target=synth --setup lowrisc:mocha:chip_mocha_genesys2 > /dev/null 2>&1
18-
19+
1920
# Build the bootROM because it's cheap, and copy the vmem to the src to be hashed.
2021
cmake -DCMAKE_BUILD_TYPE=Release -B build/sw -S sw > /dev/null 2>&1
2122
cmake --build build/sw --target bootrom > /dev/null 2>&1
@@ -35,7 +36,8 @@ in {
3536
3637
fusesoc --cores-root=. run --target=synth --setup \
3738
--build lowrisc:mocha:chip_mocha_genesys2 \
38-
--BootRomInitFile="$PWD/${bootrom_path}/bootrom.vmem"
39+
--BootRomInitFile="$PWD/${bootrom_path}/bootrom.vmem" \
40+
--RomInitFile="$PWD/${rom_init_path}/mem_init_file.vmem"
3941
'';
4042
};
4143

0 commit comments

Comments
 (0)