[top,dv] Integrated AXI4 passive VIP and added AXI scoreboard to the top UVM environment

Signed-off-by: Csaba Kiss <csaba.kiss@semify-eda.com>

Author: csabakiss-semify

hw/top_chip/dv/env/top_chip_dv_axi_scoreboard.sv

@@ -0,0 +1,191 @@
+// Copyright lowRISC contributors (COSMIC project).
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+
+class top_chip_dv_axi_scoreboard extends uvm_scoreboard;
+  `uvm_component_utils(top_chip_dv_axi_scoreboard)
+
+  axi_addr_range_t mem_map[$];
+  string             default_subordinate_id = "INTERNAL_XBAR_DEFAULT";
+
+  // Analysis Implementation Ports
+  `uvm_analysis_imp_decl(_mgr0_cva6)
+  `uvm_analysis_imp_decl(_sub0_sram)
+  `uvm_analysis_imp_decl(_sub1_mailbox)
+  `uvm_analysis_imp_decl(_sub2_tlcrossbar)
+  `uvm_analysis_imp_decl(_sub3_dram)
+
+  uvm_analysis_imp_mgr0_cva6       #(uvm_sequence_item, top_chip_dv_axi_scoreboard) mgr0_cva6_imp;
+  uvm_analysis_imp_sub0_sram       #(uvm_sequence_item, top_chip_dv_axi_scoreboard) sub0_sram_imp;
+  uvm_analysis_imp_sub1_mailbox    #(uvm_sequence_item, top_chip_dv_axi_scoreboard) sub1_mailbox_imp;
+  uvm_analysis_imp_sub2_tlcrossbar #(uvm_sequence_item, top_chip_dv_axi_scoreboard) sub2_tlcrossbar_imp;
+  uvm_analysis_imp_sub3_dram       #(uvm_sequence_item, top_chip_dv_axi_scoreboard) sub3_dram_imp;
+
+  // Queues to handle out-of-order monitor arrivals
+  // [SubordinateName][MaskedID]
+  axi4_vip_item expect_q[string][bit[top_pkg::AxiIdWidth-1:0]][$]; // Manager arrived first
+  axi4_vip_item actual_q[string][bit[top_pkg::AxiIdWidth-1:0]][$]; // Subordinate arrived first
+
+  // External Method Declarations
+  extern function new(string name, uvm_component parent);
+  extern virtual function void build_phase(uvm_phase phase);
+  extern function bit [63:0] get_orig_id(bit [top_pkg::AxiIdWidth-1:0] full_id);
+  extern function string decode_addr(bit [63:0] addr);
+  extern virtual function void perform_comparison(axi4_vip_item exp, axi4_vip_item act, string slv);
+  extern virtual function void write_mgr0_cva6(uvm_sequence_item item);
+  extern virtual function void check_subordinate_arrival(uvm_sequence_item item, string slv_id);
+  extern virtual function void write_sub0_sram(uvm_sequence_item tr);
+  extern virtual function void write_sub1_mailbox(uvm_sequence_item tr);
+  extern virtual function void write_sub2_tlcrossbar(uvm_sequence_item tr);
+  extern virtual function void write_sub3_dram(uvm_sequence_item tr);
+  extern virtual function void check_phase(uvm_phase phase);
+
+endclass : top_chip_dv_axi_scoreboard
+
+//------------------------------------------------------------------------------
+// External Method Implementations
+//------------------------------------------------------------------------------
+
+function top_chip_dv_axi_scoreboard::new(string name, uvm_component parent);
+  super.new(name, parent);
+  mgr0_cva6_imp       = new("mgr0_cva6_imp",       this);
+  sub0_sram_imp       = new("sub0_sram_imp",       this);
+  sub1_mailbox_imp    = new("sub1_mailbox_imp",    this);
+  sub2_tlcrossbar_imp = new("sub2_tlcrossbar_imp", this);
+  sub3_dram_imp       = new("sub3_dram_imp",       this);
+endfunction : new
+
+function void top_chip_dv_axi_scoreboard::build_phase(uvm_phase phase);
+  super.build_phase(phase);
+
+  // Specific Address Mapping
+  mem_map.push_back('{"sub0_sram",       (top_pkg::SRAMBase),       (top_pkg::SRAMBase       + top_pkg::SRAMLength     - 1)});
+  mem_map.push_back('{"sub1_mailbox",    (top_pkg::MailboxBase),    (top_pkg::MailboxBase    + top_pkg::MailboxLength  - 1)});
+  mem_map.push_back('{"sub2_tlcrossbar", (top_pkg::TlCrossbarBase), (top_pkg::TlCrossbarBase + top_pkg::TlCrossbarBase - 1)});
+  mem_map.push_back('{"sub3_dram",       (top_pkg::DRAMBase),       (top_pkg::DRAMBase       + top_pkg::DRAMBase       - 1)});
+endfunction : build_phase
+
+function bit [top_pkg::AxiIdWidth-1:0] top_chip_dv_axi_scoreboard::get_orig_id(bit [63:0] full_id);
+  return full_id & ((1 << top_pkg::AxiIdWidth) - 1);
+endfunction : get_orig_id
+
+function string top_chip_dv_axi_scoreboard::decode_addr(bit [63:0] addr);
+  foreach (mem_map[i]) begin
+    if (addr >= mem_map[i].start_addr && addr <= mem_map[i].end_addr)
+      return mem_map[i].subordinate_name;
+  end
+  return default_subordinate_id;
+endfunction : decode_addr
+
+function void top_chip_dv_axi_scoreboard::perform_comparison(axi4_vip_item exp, axi4_vip_item act, string slv);
+  bit [top_pkg::AxiIdWidth-1:0] mid = get_orig_id((act.dir == AXI_WRITE) ? act.bid : act.rid);
+  
+  if (act.dir == AXI_WRITE) begin
+    if (act.awaddr  !== exp.awaddr  || act.awlen   !== exp.awlen  || 
+        act.awsize  !== exp.awsize  || act.awburst !== exp.awburst) begin
+      `uvm_error("SCB_ATTR_WR", $sformatf("Write Attribute mismatch on %s ID:%h", slv, mid))
+    end
+
+    if (act.wdata != exp.wdata) begin
+      `uvm_error("SCB_WDATA", $sformatf("Write Data mismatch on %s ID:%h", slv, mid))
+    end
+
+    if (act.wstrb != exp.wstrb) begin
+      `uvm_error("SCB_WSTRB", $sformatf("Write Strobe mismatch on %s ID:%h", slv, mid))
+    end
+  end else begin
+    if (act.araddr  !== exp.araddr  || act.arlen   !== exp.arlen  || 
+        act.arsize  !== exp.arsize  || act.arburst !== exp.arburst) begin
+      `uvm_error("SCB_ATTR_RD", $sformatf("Read Attribute mismatch on %s ID:%h", slv, mid))
+    end
+
+    if (act.rdata != exp.rdata) begin
+      `uvm_error("SCB_RDATA", $sformatf("Read Data mismatch on %s ID:%h", slv, mid))
+    end
+
+    if (act.rresp != exp.rresp) begin
+      `uvm_error("SCB_RRESP", $sformatf("Read Response mismatch on %s ID:%h", slv, mid))
+    end
+  end
+endfunction : perform_comparison
+
+function void top_chip_dv_axi_scoreboard::write_mgr0_cva6(uvm_sequence_item item);
+  axi4_vip_item tr;
+  if (!$cast(tr, item)) begin
+    `uvm_fatal("TYPE", "Cast failed")
+  end
+
+  begin
+    bit [63:0] addr = (tr.dir == AXI_WRITE) ? tr.awaddr : tr.araddr;
+    bit [63:0] id   = (tr.dir == AXI_WRITE) ? tr.awid   : tr.arid;
+    string target_slv = decode_addr(addr);
+    bit [63:0] mid    = get_orig_id(id);
+
+    if (target_slv == default_subordinate_id) begin
+       // Decoder error check would go here
+    end else begin
+      if (actual_q[target_slv].exists(mid) && actual_q[target_slv][mid].size() > 0) begin
+        axi4_vip_item act_tr = actual_q[target_slv][mid].pop_front();
+        perform_comparison(tr, act_tr, target_slv);
+        if (actual_q[target_slv][mid].size() == 0) actual_q[target_slv].delete(mid);
+      end else begin
+        axi4_vip_item exp_tr;
+        $cast(exp_tr, tr.clone());
+        expect_q[target_slv][mid].push_back(exp_tr);
+      end
+    end
+  end
+endfunction : write_mgr0
+
+function void top_chip_dv_axi_scoreboard::check_subordinate_arrival(uvm_sequence_item item, string slv_id);
+  axi4_vip_item act;
+  if (!$cast(act, item)) `uvm_fatal("TYPE", "Cast failed")
+
+  begin
+    bit [63:0] mid = get_orig_id((act.dir == AXI_WRITE) ? act.bid : act.rid);
+    
+    if (expect_q[slv_id].exists(mid) && expect_q[slv_id][mid].size() > 0) begin
+      axi4_vip_item exp_tr = expect_q[slv_id][mid].pop_front();
+      perform_comparison(exp_tr, act, slv_id);
+      if (expect_q[slv_id][mid].size() == 0) expect_q[slv_id].delete(mid);
+    end else begin
+      axi4_vip_item act_tr;
+      $cast(act_tr, act.clone());
+      actual_q[slv_id][mid].push_back(act_tr);
+    end
+  end
+endfunction : check_subordinate_arrival
+
+function void top_chip_dv_axi_scoreboard::write_sub0_sram(uvm_sequence_item tr); 
+  check_subordinate_arrival(tr, "sub0_sram"); 
+endfunction : write_sub0
+
+function void top_chip_dv_axi_scoreboard::write_sub1_mailbox(uvm_sequence_item tr); 
+  check_subordinate_arrival(tr, "sub1_mailbox"); 
+endfunction : write_sub1
+
+function void top_chip_dv_axi_scoreboard::write_sub2_tlcrossbar(uvm_sequence_item tr); 
+  check_subordinate_arrival(tr, "sub2_tlcrossbar"); 
+endfunction : write_sub2
+
+function void top_chip_dv_axi_scoreboard::write_sub3_dram(uvm_sequence_item tr); 
+  check_subordinate_arrival(tr, "sub3_dram"); 
+endfunction : write_sub3
+
+function void top_chip_dv_axi_scoreboard::check_phase(uvm_phase phase);
+  super.check_phase(phase);
+
+  // Check for requests that entered the fabric but never exited
+  foreach (expect_q[s, i]) begin
+    if (expect_q[s][i].size() > 0) begin
+      `uvm_error("SCB_DRAIN_DROP", $sformatf("DROPPED: Master req for %s (ID %h) lost in fabric", s, i))
+    end
+  end
+  
+  // Check for responses that exited the fabric but weren't requested/seen by Master
+  foreach (actual_q[s, i]) begin
+    if (actual_q[s][i].size() > 0) begin
+      `uvm_error("SCB_DRAIN_GHOST", $sformatf("GHOST: Slave %s (ID %h) responded but Master missed it", s, i))
+    end
+  end
+endfunction : check_phase

hw/top_chip/dv/env/top_chip_dv_env.core

@@ -11,12 +11,14 @@ filesets:
       - lowrisc:dv:dv_utils
       - lowrisc:dv:mem_bkdr_util
       - lowrisc:dv:uart_agent
+      - lowrisc:dv:axi4_vip:0.1
       - lowrisc:dv:common_ifs
     files:
       - top_chip_dv_env_pkg.sv
       - mem_clear_util.sv: {is_include_file: true}
       - top_chip_dv_env_cfg.sv: {is_include_file: true}
       - top_chip_dv_env_cov.sv: {is_include_file: true}
+      - top_chip_dv_axi_scoreboard.sv: {is_include_file: true}
       - top_chip_dv_env.sv: {is_include_file: true}
       - top_chip_dv_virtual_sequencer.sv: {is_include_file: true}
       - seq_lib/top_chip_dv_vseq_list.sv: {is_include_file: true}

hw/top_chip/dv/env/top_chip_dv_env.sv

@@ -12,7 +12,11 @@ class top_chip_dv_env extends uvm_env;
   mem_bkdr_util mem_bkdr_util_h[chip_mem_e];
 
   // Agents
-  uart_agent m_uart_agent;
+  uart_agent   m_uart_agent;
+  axi4_vip_env m_mgr_axi[];
+  axi4_vip_env m_sub_axi[];
+
+  top_chip_dv_axi_scoreboard m_axi_scb;
 
   // Standard SV/UVM methods
   extern function new(string name="", uvm_component parent=null);
@@ -29,6 +33,9 @@ function top_chip_dv_env::new(string name="", uvm_component parent=null);
 endfunction : new
 
 function void top_chip_dv_env::build_phase(uvm_phase phase);
+  top_pkg::axi_hosts_t   axi_mgr_name;
+  top_pkg::axi_devices_t axi_sub_name;
+  
   super.build_phase(phase);
 
   foreach (CHIP_MEM_LIST[i]) begin
@@ -70,6 +77,20 @@ function void top_chip_dv_env::build_phase(uvm_phase phase);
   m_uart_agent = uart_agent::type_id::create("m_uart_agent", this);
   uvm_config_db#(uart_agent_cfg)::set(this, "m_uart_agent*", "cfg", cfg.m_uart_agent_cfg);
 
+  m_mgr_axi = new[NUM_OF_MGR_AXI_IFS];
+  foreach (m_mgr_axi[i]) begin
+    axi_mgr_name = top_pkg::axi_hosts_t'(i);
+    m_mgr_axi[i] = axi4_vip_env::type_id::create(.name($sformatf("m_mgr_axi_%s", axi_mgr_name.name())), .parent(this));
+  end
+
+  m_sub_axi = new[NUM_OF_SUB_AXI_IFS];
+  foreach (m_sub_axi[i]) begin
+    axi_sub_name = top_pkg::axi_devices_t'(i);
+    m_sub_axi[i] = axi4_vip_env::type_id::create(.name($sformatf("m_sub_axi_%s", axi_sub_name.name())), .parent(this));
+  end
+
+  m_axi_scb = top_chip_dv_axi_scoreboard::type_id::create("m_axi_scb", this);
+  
   uvm_config_db#(top_chip_dv_env_cfg)::set(this, "", "cfg", cfg);
 
   top_vsqr = top_chip_dv_virtual_sequencer::type_id::create("top_vsqr", this);
@@ -86,6 +107,12 @@ function void top_chip_dv_env::connect_phase(uvm_phase phase);
   // Connect monitor output to matching FIFO in the virtual sequencer.
   // Allows virtual sequences to check TX items.
   m_uart_agent.monitor.tx_analysis_port.connect(top_vsqr.uart_tx_fifo.analysis_export);
+
+  m_mgr_axi[top_pkg::CVA6]      .m_manager    .m_monitor.tx_ap.connect(m_axi_scb.mgr0_cva6_imp);
+  m_sub_axi[top_pkg::SRAM]      .m_subordinate.m_monitor.tx_ap.connect(m_axi_scb.sub0_sram_imp);
+  m_sub_axi[top_pkg::Mailbox]   .m_subordinate.m_monitor.tx_ap.connect(m_axi_scb.sub1_mailbox_imp);
+  m_sub_axi[top_pkg::TlCrossbar].m_subordinate.m_monitor.tx_ap.connect(m_axi_scb.sub2_tlcrossbar_imp);
+  m_sub_axi[top_pkg::DRAM]      .m_subordinate.m_monitor.tx_ap.connect(m_axi_scb.sub3_dram_imp);
 endfunction : connect_phase
 
 task top_chip_dv_env::load_memories();

hw/top_chip/dv/env/top_chip_dv_env_cfg.sv

@@ -15,6 +15,8 @@ class top_chip_dv_env_cfg extends uvm_object;
 
   // External interface agent configs
   rand uart_agent_cfg    m_uart_agent_cfg;
+  axi4_vip_cfg           m_axi_mgr_cfg[];
+  axi4_vip_cfg           m_axi_sub_cfg[];
 
   `uvm_object_utils_begin(top_chip_dv_env_cfg)
   `uvm_object_utils_end

hw/top_chip/dv/env/top_chip_dv_env_pkg.sv

@@ -9,6 +9,7 @@ package top_chip_dv_env_pkg;
   import mem_bkdr_util_pkg::*;
   import sw_test_status_pkg::*;
   import uart_agent_pkg::*;
+  import axi4_vip_pkg::*;
 
   // Macro includes
   `include "uvm_macros.svh"
@@ -20,6 +21,21 @@ package top_chip_dv_env_pkg;
 
   typedef chip_mem_e chip_mem_list_t[$];
 
+  typedef enum bit[2:0] {
+    mst0 = 0,
+    slv0 = 1,
+    slv1 = 2,
+    slv2 = 3,
+    slv3 = 4
+  } axi_if_t;
+ 
+  // Local Address Map Struct
+  typedef struct {
+    string     subordinate_name;
+    bit [63:0] start_addr;
+    bit [63:0] end_addr;
+  } axi_addr_range_t;
+
   // Generate the list of all chip_mem_e values, this helps to simplify iterating over them with
   // foreach loops.
   const chip_mem_list_t CHIP_MEM_LIST = chip_mem_values();
@@ -46,11 +62,16 @@ package top_chip_dv_env_pkg;
   parameter bit [31:0] SW_DV_TEST_STATUS_ADDR = SW_DV_START_ADDR + 'h00;
   parameter bit [31:0] SW_DV_LOG_ADDR         = SW_DV_START_ADDR + 'h04;
 
+  // Manual set is necessary
+  localparam int NUM_OF_MGR_AXI_IFS = 1;
+  localparam int NUM_OF_SUB_AXI_IFS = 4;
+
   // File includes
   `include "mem_clear_util.sv"
   `include "top_chip_dv_env_cfg.sv"
   `include "top_chip_dv_env_cov.sv"
   `include "top_chip_dv_virtual_sequencer.sv"
+  `include "top_chip_dv_axi_scoreboard.sv"
   `include "top_chip_dv_env.sv"
   `include "top_chip_dv_vseq_list.sv"
 endpackage : top_chip_dv_env_pkg