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Prior to ARM architecture version 3, a condition field of 0b1111 meant that the instruction was never executed. The mnemonic extension for this condition was NV.
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reorder the opcodes so that opcodes that take in the MOST bits should be analysed first, and the least ones goes to the bottom of the table
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search "on reset" to see what kind of stuff needs to be set up upon a reset in the docs
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add noexcept throughout the code
notes:
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big endian in v1 and v2 while little by default in v3 and above (source: https://en.wikipedia.org/wiki/ARM_architecture_family)
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try the bolt post-link optimiser, looks super interesting and promising
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try [[gnu::pure]] and [[gnu::const]] optimisation opportunities
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allow for json settings files as an input argument for the emulator
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rewrite the whole decode (identifier) and execute cycle phases so that they use switches instead of std::maps
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install flamegraph and measure the difference between the std::map<key, std::function> thingy and the switch
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in the future, make a more "memory friendly" option such as making an inner virtual memory system for the memory by using std::vector instead of std::array for the RAM, and using std::vector instead of std::unordered_map for the TLB lookup
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use a better alternative to std::unordered_map that's faster (https://martin.ankerl.com/2022/08/27/hashmap-bench-01/)
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remove the model of minimal types being used for local variables and function parameters, this has almost no benefit on performance. Use a u32 instead of a u8.
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implement LLARM_LOW_MEMORY preprocessor argument