diff --git a/cores/nRF5/CMSIS/Include/mpu_armv7.h b/cores/nRF5/CMSIS/Include/mpu_armv7.h
index d9eedf8..16220d1 100644
--- a/cores/nRF5/CMSIS/Include/mpu_armv7.h
+++ b/cores/nRF5/CMSIS/Include/mpu_armv7.h
@@ -193,7 +193,7 @@ __STATIC_INLINE void ARM_MPU_Enable(uint32_t MPU_Control)
   __DMB();
   MPU->CTRL = MPU_Control | MPU_CTRL_ENABLE_Msk;
 #ifdef SCB_SHCSR_MEMFAULTENA_Msk
-  SCB->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk;
+  SCB->SHCSR = SCB->SHCSR | SCB_SHCSR_MEMFAULTENA_Msk;
 #endif
   __DSB();
   __ISB();
@@ -205,9 +205,9 @@ __STATIC_INLINE void ARM_MPU_Disable(void)
 {
   __DMB();
 #ifdef SCB_SHCSR_MEMFAULTENA_Msk
-  SCB->SHCSR &= ~SCB_SHCSR_MEMFAULTENA_Msk;
+  SCB->SHCSR = SCB->SHCSR & ~SCB_SHCSR_MEMFAULTENA_Msk;
 #endif
-  MPU->CTRL  &= ~MPU_CTRL_ENABLE_Msk;
+  MPU->CTRL  = MPU->CTRL & ~MPU_CTRL_ENABLE_Msk;
   __DSB();
   __ISB();
 }
diff --git a/cores/nRF5/rtos.cpp b/cores/nRF5/rtos.cpp
index 52f5be6..917a5e0 100644
--- a/cores/nRF5/rtos.cpp
+++ b/cores/nRF5/rtos.cpp
@@ -93,4 +93,8 @@ uint32_t nableRtos::getIsrStackHwm() {
    return offset;
 }
 
+TaskHandle_t nableRtos::getMainLoopTaskHandle() {
+    return ::getMainLoopTaskHandle();
+}
+
 nableRtos RTOS;
\ No newline at end of file
diff --git a/cores/nRF5/rtos.h b/cores/nRF5/rtos.h
index dd00ca8..628ce39 100644
--- a/cores/nRF5/rtos.h
+++ b/cores/nRF5/rtos.h
@@ -37,6 +37,7 @@ class nableRtos {
     uint32_t getTimerTaskHwm();
     uint32_t getBleHostTaskHwm();
     uint32_t getBleLLTaskHwm();
+    TaskHandle_t getMainLoopTaskHandle();
 };
 
 extern nableRtos RTOS;
diff --git a/cores/nRF5/utils/debug_utils.cpp b/cores/nRF5/utils/debug_utils.cpp
index fddcf64..5b0261e 100644
--- a/cores/nRF5/utils/debug_utils.cpp
+++ b/cores/nRF5/utils/debug_utils.cpp
@@ -51,7 +51,7 @@ void Hardfault_handler_cpp( uint32_t *p_stack_address )
 __attribute__ ((__weak__))
 void __assert_func(const char *file, int line, const char *func, const char *e)
 {
-    Serial.printf("Assertion Failed: %s at line %d , in function: %s", file, line, func);
+    Serial.printf("Assertion Failed: %s at line %d , in function: %s\n", file, line, func);
     yield();
     NVIC_SystemReset();
     while (1){} // silence compiler
diff --git a/libraries/SPI/SPI.h b/libraries/SPI/SPI.h
index d6232d8..b87a76d 100644
--- a/libraries/SPI/SPI.h
+++ b/libraries/SPI/SPI.h
@@ -145,14 +145,14 @@ extern SPIClass SPI1;
 // For compatibility with sketches designed for AVR @ 16 MHz
 // New programs should use SPI.beginTransaction to set the SPI clock
 #ifdef F_CPU
-#define DIVISOR F_CPU / 16000000
-#define SPI_CLOCK_DIV2   2 * DIVISOR
-#define SPI_CLOCK_DIV4   4 * DIVISOR
-#define SPI_CLOCK_DIV8   8 * DIVISOR
-#define SPI_CLOCK_DIV16  16 * DIVISOR
-#define SPI_CLOCK_DIV32  32 * DIVISOR
-#define SPI_CLOCK_DIV64  64 * DIVISOR
-#define SPI_CLOCK_DIV128 128 * DIVISOR
+static constexpr uint32_t SPI_DIVISOR = (static_cast<uint32_t>(F_CPU) / 16000000UL);
+static constexpr uint32_t SPI_CLOCK_DIV2   = (2UL   * SPI_DIVISOR);
+static constexpr uint32_t SPI_CLOCK_DIV4   = (4UL   * SPI_DIVISOR);
+static constexpr uint32_t SPI_CLOCK_DIV8   = (8UL   * SPI_DIVISOR);
+static constexpr uint32_t SPI_CLOCK_DIV16  = (16UL  * SPI_DIVISOR);
+static constexpr uint32_t SPI_CLOCK_DIV32  = (32UL  * SPI_DIVISOR);
+static constexpr uint32_t SPI_CLOCK_DIV64  = (64UL  * SPI_DIVISOR);
+static constexpr uint32_t SPI_CLOCK_DIV128 = (128UL * SPI_DIVISOR);
 #endif
 
 #endif
\ No newline at end of file