From 3a1d9a08f7319b695a1bd225a3d3d2cb22859f6e Mon Sep 17 00:00:00 2001 From: Alan Hayward Date: Fri, 10 Jul 2026 10:36:29 +0100 Subject: [PATCH] Arm64: keep SP in base operand for large-offset adds Fixes #130437 When generating large stack offsets, the base register can be SP. Therefore ensure that base is not used for reg3. --- src/coreclr/jit/codegenarm64.cpp | 2 +- src/coreclr/jit/emitarm64.cpp | 4 ++-- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/src/coreclr/jit/codegenarm64.cpp b/src/coreclr/jit/codegenarm64.cpp index f5ac76f6c50067..36a7ed714617bd 100644 --- a/src/coreclr/jit/codegenarm64.cpp +++ b/src/coreclr/jit/codegenarm64.cpp @@ -2161,7 +2161,7 @@ void CodeGen::instGen_Set_Reg_To_Base_Plus_Imm(emitAttr size, else { instGen_Set_Reg_To_Imm(size, dstReg, imm); - GetEmitter()->emitIns_R_R_R(INS_add, size, dstReg, dstReg, baseReg); + GetEmitter()->emitIns_R_R_R(INS_add, size, dstReg, baseReg, dstReg); } } diff --git a/src/coreclr/jit/emitarm64.cpp b/src/coreclr/jit/emitarm64.cpp index 49a836ed881ae5..a02a0285dce107 100644 --- a/src/coreclr/jit/emitarm64.cpp +++ b/src/coreclr/jit/emitarm64.cpp @@ -15017,8 +15017,8 @@ void emitter::emitInsLoadStoreOp(instruction ins, emitAttr attr, regNumber dataR // First load/store tmpReg with the large offset constant codeGen->instGen_Set_Reg_To_Imm(EA_PTRSIZE, tmpReg, offset); // Then add the base register - // rd = rd + base - emitIns_R_R_R(INS_add, addType, tmpReg, tmpReg, memBase->GetRegNum()); + // rd = base + rd + emitIns_R_R_R(INS_add, addType, tmpReg, memBase->GetRegNum(), tmpReg); noway_assert(emitInsIsLoad(ins) || (tmpReg != dataReg)); noway_assert(tmpReg != index->GetRegNum());