From afe138d18410786e2e652f57e5313189bcecc003 Mon Sep 17 00:00:00 2001 From: Ugochukwu Mmaduekwe Date: Tue, 7 Jul 2026 00:38:27 +0100 Subject: [PATCH 1/6] Rework SHA-512 x86 SIMD kernels: AVX2 2-block + SIMD-schedule SSE2 x86_64: - AVX2 slot now runs the 2-block kernel (sha512_block_data_order_avx2): two blocks scheduled together in 256-bit lanes. - SSE2 kernel rewritten with a SIMD message schedule (downported from the AVX single-block, interleaved with the GPR compression rounds). - Remove the SSSE3 kernel; SSSE3-capable CPUs now use the faster SSE2. i386: - SSE2 kernel replaced with a port of OpenSSL's sha512-586, its MMX core mechanically converted to pure SSE2 (state in xmm0-xmm7). - Remove the SSSE3 kernel (it was slower than the new SSE2). - Add a shared unit-level K512_Doubled table (each constant stored twice) feeding both the 256-bit AVX2 and 128-bit x86_64 SSE2 reads; the plain K512 table is left unchanged. --- HashLib/src/Crypto/HlpSHA2_512Dispatch.pas | 138 +- .../Simd/SHA512/SHA512CompressAvx2_x86_64.inc | 1803 ++++++++++++----- .../Simd/SHA512/SHA512CompressSse2_i386.inc | 1718 ++++------------ .../Simd/SHA512/SHA512CompressSse2_x86_64.inc | 1755 +++++++++++----- .../Simd/SHA512/SHA512CompressSsse3_i386.inc | 1302 ------------ .../SHA512/SHA512CompressSsse3_x86_64.inc | 483 ----- 6 files changed, 3092 insertions(+), 4107 deletions(-) delete mode 100644 HashLib/src/Include/Simd/SHA512/SHA512CompressSsse3_i386.inc delete mode 100644 HashLib/src/Include/Simd/SHA512/SHA512CompressSsse3_x86_64.inc diff --git a/HashLib/src/Crypto/HlpSHA2_512Dispatch.pas b/HashLib/src/Crypto/HlpSHA2_512Dispatch.pas index 0c1e8ce5..a7296488 100644 --- a/HashLib/src/Crypto/HlpSHA2_512Dispatch.pas +++ b/HashLib/src/Crypto/HlpSHA2_512Dispatch.pas @@ -62,6 +62,96 @@ interface BSWAP64_MASK: array [0 .. 1] of UInt64 = ( UInt64($0001020304050607), UInt64($08090A0B0C0D0E0F) ); + + // Doubled K512 round constants plus the BSWAP64 mask, shared by the AVX2 and + // SSE2 SIMD-schedule SHA-512 kernels. Each 128-bit K512 constant pair is stored + // twice so one table feeds both the 256-bit AVX2 lanes and the 128-bit SSE2 + // reads (read at a 32-byte stride); the 32-byte byte-swap mask (BSWAP64 pattern, + // twice) occupies [160..163]. Derived from K512. + K512_Doubled: array [0 .. 163] of UInt64 = ( + UInt64($428A2F98D728AE22), UInt64($7137449123EF65CD), + UInt64($428A2F98D728AE22), UInt64($7137449123EF65CD), + UInt64($B5C0FBCFEC4D3B2F), UInt64($E9B5DBA58189DBBC), + UInt64($B5C0FBCFEC4D3B2F), UInt64($E9B5DBA58189DBBC), + UInt64($3956C25BF348B538), UInt64($59F111F1B605D019), + UInt64($3956C25BF348B538), UInt64($59F111F1B605D019), + UInt64($923F82A4AF194F9B), UInt64($AB1C5ED5DA6D8118), + UInt64($923F82A4AF194F9B), UInt64($AB1C5ED5DA6D8118), + UInt64($D807AA98A3030242), UInt64($12835B0145706FBE), + UInt64($D807AA98A3030242), UInt64($12835B0145706FBE), + UInt64($243185BE4EE4B28C), UInt64($550C7DC3D5FFB4E2), + UInt64($243185BE4EE4B28C), UInt64($550C7DC3D5FFB4E2), + UInt64($72BE5D74F27B896F), UInt64($80DEB1FE3B1696B1), + UInt64($72BE5D74F27B896F), UInt64($80DEB1FE3B1696B1), + UInt64($9BDC06A725C71235), UInt64($C19BF174CF692694), + UInt64($9BDC06A725C71235), UInt64($C19BF174CF692694), + UInt64($E49B69C19EF14AD2), UInt64($EFBE4786384F25E3), + UInt64($E49B69C19EF14AD2), UInt64($EFBE4786384F25E3), + UInt64($0FC19DC68B8CD5B5), UInt64($240CA1CC77AC9C65), + UInt64($0FC19DC68B8CD5B5), UInt64($240CA1CC77AC9C65), + UInt64($2DE92C6F592B0275), UInt64($4A7484AA6EA6E483), + UInt64($2DE92C6F592B0275), UInt64($4A7484AA6EA6E483), + UInt64($5CB0A9DCBD41FBD4), UInt64($76F988DA831153B5), + UInt64($5CB0A9DCBD41FBD4), UInt64($76F988DA831153B5), + UInt64($983E5152EE66DFAB), UInt64($A831C66D2DB43210), + UInt64($983E5152EE66DFAB), UInt64($A831C66D2DB43210), + UInt64($B00327C898FB213F), UInt64($BF597FC7BEEF0EE4), + UInt64($B00327C898FB213F), UInt64($BF597FC7BEEF0EE4), + UInt64($C6E00BF33DA88FC2), UInt64($D5A79147930AA725), + UInt64($C6E00BF33DA88FC2), UInt64($D5A79147930AA725), + UInt64($06CA6351E003826F), UInt64($142929670A0E6E70), + UInt64($06CA6351E003826F), UInt64($142929670A0E6E70), + UInt64($27B70A8546D22FFC), UInt64($2E1B21385C26C926), + UInt64($27B70A8546D22FFC), UInt64($2E1B21385C26C926), + UInt64($4D2C6DFC5AC42AED), UInt64($53380D139D95B3DF), + UInt64($4D2C6DFC5AC42AED), UInt64($53380D139D95B3DF), + UInt64($650A73548BAF63DE), UInt64($766A0ABB3C77B2A8), + UInt64($650A73548BAF63DE), UInt64($766A0ABB3C77B2A8), + UInt64($81C2C92E47EDAEE6), UInt64($92722C851482353B), + UInt64($81C2C92E47EDAEE6), UInt64($92722C851482353B), + UInt64($A2BFE8A14CF10364), UInt64($A81A664BBC423001), + UInt64($A2BFE8A14CF10364), UInt64($A81A664BBC423001), + UInt64($C24B8B70D0F89791), UInt64($C76C51A30654BE30), + UInt64($C24B8B70D0F89791), UInt64($C76C51A30654BE30), + UInt64($D192E819D6EF5218), UInt64($D69906245565A910), + UInt64($D192E819D6EF5218), UInt64($D69906245565A910), + UInt64($F40E35855771202A), UInt64($106AA07032BBD1B8), + UInt64($F40E35855771202A), UInt64($106AA07032BBD1B8), + UInt64($19A4C116B8D2D0C8), UInt64($1E376C085141AB53), + UInt64($19A4C116B8D2D0C8), UInt64($1E376C085141AB53), + UInt64($2748774CDF8EEB99), UInt64($34B0BCB5E19B48A8), + UInt64($2748774CDF8EEB99), UInt64($34B0BCB5E19B48A8), + UInt64($391C0CB3C5C95A63), UInt64($4ED8AA4AE3418ACB), + UInt64($391C0CB3C5C95A63), UInt64($4ED8AA4AE3418ACB), + UInt64($5B9CCA4F7763E373), UInt64($682E6FF3D6B2B8A3), + UInt64($5B9CCA4F7763E373), UInt64($682E6FF3D6B2B8A3), + UInt64($748F82EE5DEFB2FC), UInt64($78A5636F43172F60), + UInt64($748F82EE5DEFB2FC), UInt64($78A5636F43172F60), + UInt64($84C87814A1F0AB72), UInt64($8CC702081A6439EC), + UInt64($84C87814A1F0AB72), UInt64($8CC702081A6439EC), + UInt64($90BEFFFA23631E28), UInt64($A4506CEBDE82BDE9), + UInt64($90BEFFFA23631E28), UInt64($A4506CEBDE82BDE9), + UInt64($BEF9A3F7B2C67915), UInt64($C67178F2E372532B), + UInt64($BEF9A3F7B2C67915), UInt64($C67178F2E372532B), + UInt64($CA273ECEEA26619C), UInt64($D186B8C721C0C207), + UInt64($CA273ECEEA26619C), UInt64($D186B8C721C0C207), + UInt64($EADA7DD6CDE0EB1E), UInt64($F57D4F7FEE6ED178), + UInt64($EADA7DD6CDE0EB1E), UInt64($F57D4F7FEE6ED178), + UInt64($06F067AA72176FBA), UInt64($0A637DC5A2C898A6), + UInt64($06F067AA72176FBA), UInt64($0A637DC5A2C898A6), + UInt64($113F9804BEF90DAE), UInt64($1B710B35131C471B), + UInt64($113F9804BEF90DAE), UInt64($1B710B35131C471B), + UInt64($28DB77F523047D84), UInt64($32CAAB7B40C72493), + UInt64($28DB77F523047D84), UInt64($32CAAB7B40C72493), + UInt64($3C9EBE0A15C9BEBC), UInt64($431D67C49C100D4C), + UInt64($3C9EBE0A15C9BEBC), UInt64($431D67C49C100D4C), + UInt64($4CC5D4BECB3E42B6), UInt64($597F299CFC657E2A), + UInt64($4CC5D4BECB3E42B6), UInt64($597F299CFC657E2A), + UInt64($5FCB6FAB3AD6FAEC), UInt64($6C44198C4A475817), + UInt64($5FCB6FAB3AD6FAEC), UInt64($6C44198C4A475817), + UInt64($0001020304050607), UInt64($08090A0B0C0D0E0F), + UInt64($0001020304050607), UInt64($08090A0B0C0D0E0F) + ); {$ENDIF HASHLIB_X86_SIMD} implementation @@ -130,8 +220,8 @@ procedure SHA512_Compress_Scalar(AState, AData: Pointer; ANumBlocks: UInt32); // ============================================================================= // SIMD implementations // -// i386: SSE2, SSSE3 -// x86_64: AVX2, SSSE3, SSE2 +// i386: SSE2 +// x86_64: AVX2, SSE2 // aarch64: SHA512 Crypto Extensions // ============================================================================= @@ -143,17 +233,6 @@ procedure SHA512_Compress_Sse2(AState, AData: Pointer; ANumBlocks: UInt32; {$I ..\Include\Simd\SHA512\SHA512CompressSse2_i386.inc} end; -procedure SHA512_Compress_Ssse3(AState, AData: Pointer; ANumBlocks: UInt32; - AConstants, AMask: Pointer); - {$I ..\Include\Simd\Common\SimdProc5Begin_i386.inc} - {$I ..\Include\Simd\SHA512\SHA512CompressSsse3_i386.inc} -end; - -procedure SHA512_Compress_Ssse3_Wrap(AState, AData: Pointer; ANumBlocks: UInt32); -begin - SHA512_Compress_Ssse3(AState, AData, ANumBlocks, @K512, @BSWAP64_MASK); -end; - {$ENDIF HASHLIB_I386_ASM} {$IFDEF HASHLIB_X86_64_ASM} @@ -164,26 +243,15 @@ procedure SHA512_Compress_Sse2(AState, AData: Pointer; ANumBlocks: UInt32; {$I ..\Include\Simd\SHA512\SHA512CompressSse2_x86_64.inc} end; -procedure SHA512_Compress_Ssse3(AState, AData: Pointer; ANumBlocks: UInt32; - AConstants, AMask: Pointer); - {$I ..\Include\Simd\Common\SimdProc5Begin_x86_64.inc} - {$I ..\Include\Simd\SHA512\SHA512CompressSsse3_x86_64.inc} -end; - -procedure SHA512_Compress_Ssse3_Wrap(AState, AData: Pointer; ANumBlocks: UInt32); -begin - SHA512_Compress_Ssse3(AState, AData, ANumBlocks, @K512, @BSWAP64_MASK); -end; - procedure SHA512_Compress_Avx2(AState, AData: Pointer; ANumBlocks: UInt32; - AConstants, AMask: Pointer); - {$I ..\Include\Simd\Common\SimdProc5Begin_x86_64.inc} + AConstants: Pointer); + {$I ..\Include\Simd\Common\SimdProc4Begin_x86_64.inc} {$I ..\Include\Simd\SHA512\SHA512CompressAvx2_x86_64.inc} end; procedure SHA512_Compress_Avx2_Wrap(AState, AData: Pointer; ANumBlocks: UInt32); begin - SHA512_Compress_Avx2(AState, AData, ANumBlocks, @K512, @BSWAP64_MASK); + SHA512_Compress_Avx2(AState, AData, ANumBlocks, @K512_Doubled); end; {$ENDIF HASHLIB_X86_64_ASM} @@ -192,7 +260,11 @@ procedure SHA512_Compress_Avx2_Wrap(AState, AData: Pointer; ANumBlocks: UInt32); procedure SHA512_Compress_Sse2_Wrap(AState, AData: Pointer; ANumBlocks: UInt32); begin +{$IFDEF HASHLIB_X86_64_ASM} + SHA512_Compress_Sse2(AState, AData, ANumBlocks, @K512_Doubled); +{$ELSE} SHA512_Compress_Sse2(AState, AData, ANumBlocks, @K512); +{$ENDIF} end; {$ENDIF HASHLIB_X86_SIMD} @@ -220,11 +292,7 @@ procedure InitDispatch(); begin SHA512_Compress := @SHA512_Compress_Scalar; {$IFDEF HASHLIB_I386_ASM} - case TCpuFeatures.X86.SelectSlot([TX86SimdLevel.SSSE3, TX86SimdLevel.SSE2]) of - TX86SimdLevel.SSSE3: - begin - SHA512_Compress := @SHA512_Compress_Ssse3_Wrap; - end; + case TCpuFeatures.X86.SelectSlot([TX86SimdLevel.SSE2]) of TX86SimdLevel.SSE2: begin SHA512_Compress := @SHA512_Compress_Sse2_Wrap; @@ -232,15 +300,11 @@ procedure InitDispatch(); end; {$ENDIF} {$IFDEF HASHLIB_X86_64_ASM} - case TCpuFeatures.X86.SelectSlot([TX86SimdLevel.AVX2, TX86SimdLevel.SSSE3, TX86SimdLevel.SSE2]) of + case TCpuFeatures.X86.SelectSlot([TX86SimdLevel.AVX2, TX86SimdLevel.SSE2]) of TX86SimdLevel.AVX2: begin SHA512_Compress := @SHA512_Compress_Avx2_Wrap; end; - TX86SimdLevel.SSSE3: - begin - SHA512_Compress := @SHA512_Compress_Ssse3_Wrap; - end; TX86SimdLevel.SSE2: begin SHA512_Compress := @SHA512_Compress_Sse2_Wrap; diff --git a/HashLib/src/Include/Simd/SHA512/SHA512CompressAvx2_x86_64.inc b/HashLib/src/Include/Simd/SHA512/SHA512CompressAvx2_x86_64.inc index 57fd8efe..5300c044 100644 --- a/HashLib/src/Include/Simd/SHA512/SHA512CompressAvx2_x86_64.inc +++ b/HashLib/src/Include/Simd/SHA512/SHA512CompressAvx2_x86_64.inc @@ -1,478 +1,1347 @@ -// SHA-512 AVX2 (VEX-128) implementation. -// Same algorithm as SSSE3 but using VEX-encoded instructions for the initial -// byte-swap and K addition. Eliminates SSE/AVX transition penalties. -// AVX/AVX2 instructions are db-encoded for broad assembler compatibility. -// Expects MS x64 ABI: rcx = state ptr, rdx = data ptr, r8d = numblocks, -// r9 = K512 ptr (80 UInt64 round constants), r10 = BSWAP64 mask ptr (16 bytes). +// SHA-512 AVX2 two-block implementation (VEX-256), ported from OpenSSL's +// sha512-x86_64.pl (CRYPTOGAMS). Two message blocks are scheduled together in +// 256-bit lanes; the compression rounds stay serial (as SHA-512 requires), so +// scheduling two blocks at once is what makes this faster than the single-block +// AVX path. AVX2 and BMI2 (rorx/andn) instructions are db-encoded for broad +// assembler compatibility (every AVX2 CPU also provides BMI2). +// Expects MS x64 ABI (after SimdProc4Begin): rcx = state ptr, rdx = data ptr, +// r8d = numblocks, r9 = doubled-K512 ptr (each 128-bit K512 pair stored twice +// so one table feeds both 256-bit lanes, with the BSWAP64 mask appended; see +// K512_Doubled). The mask is read unaligned, so the Pascal const needs no +// special alignment. // -// MS x64 non-volatile saves: xmm6-xmm7, rbx, rbp, rdi, rsi, r12-r15. -// -// Stack layout (sub rsp, 1016): same as SSSE3 version -// [rsp + 0.. 15]: xmm6 save -// [rsp + 16.. 31]: xmm7 save -// [rsp + 32.. 39]: rbx save -// [rsp + 40.. 47]: rbp save -// [rsp + 48.. 55]: rdi save -// [rsp + 56.. 63]: rsi save -// [rsp + 64.. 71]: r12 save -// [rsp + 72.. 79]: r13 save -// [rsp + 80.. 87]: r14 save -// [rsp + 88.. 95]: r15 save -// [rsp + 96..103]: K512 ptr save -// [rsp + 104..111]: BSWAP mask ptr save -// [rsp + 112..751]: W+K buffer (640 bytes = 80 * 8, 16-byte aligned) -// [rsp + 752..879]: W circular buffer (128 bytes = 16 * 8) +// MS x64 non-volatile saves: xmm6-xmm15 via the shared SimdNonVolatileSave/Restore +// include (no-op on SysV); rbx, rbp, rdi, rsi, r12-r15 in the local frame. {$I ..\Include\Simd\Common\SimdNonVolatileSave_x86_64.inc} - sub rsp, 984 - - mov [rsp + $10], rdi - mov [rsp + $18], rsi - mov [rsp + $00], rbx - mov [rsp + $08], rbp - mov [rsp + $20], r12 - mov [rsp + $28], r13 - mov [rsp + $30], r14 - mov [rsp + $38], r15 - - mov r12, rcx - mov r13, rdx - mov r14d, r8d - mov [rsp + $40], r9 - mov [rsp + $48], r10 - - test r14d, r14d - jz @avx2_512_done - -@avx2_512_block_loop: - - // ========== Phase 1: Load, byte-swap (VEX), expand ========== - - mov rax, [rsp + $48] - db $C5, $FA, $6F, $38 // vmovdqu xmm7, oword [rax] - mov rax, [rsp + $40] - - lea rbp, [rsp + $50] - lea r15, [rsp + $2D0] - - // Load, byte-swap W[0..15], store to W circular buffer and compute W+K - db $C4, $C1, $7A, $6F, $45, $00 // vmovdqu xmm0, oword [r13] - db $C4, $E2, $79, $00, $C7 // vpshufb xmm0, xmm0, xmm7 - db $C4, $C1, $79, $7F, $07 // vmovdqa oword [r15], xmm0 - db $C5, $FA, $6F, $20 // vmovdqu xmm4, oword [rax] - db $C5, $F9, $D4, $E4 // vpaddq xmm4, xmm0, xmm4 - db $C5, $F9, $7F, $65, $00 // vmovdqa oword [rbp], xmm4 - - db $C4, $C1, $7A, $6F, $4D, $10 // vmovdqu xmm1, oword [r13 + $10] - db $C4, $E2, $71, $00, $CF // vpshufb xmm1, xmm1, xmm7 - db $C4, $C1, $79, $7F, $4F, $10 // vmovdqa oword [r15 + $10], xmm1 - db $C5, $FA, $6F, $60, $10 // vmovdqu xmm4, oword [rax + $10] - db $C5, $F1, $D4, $E4 // vpaddq xmm4, xmm1, xmm4 - db $C5, $F9, $7F, $65, $10 // vmovdqa oword [rbp + $10], xmm4 - - db $C4, $C1, $7A, $6F, $55, $20 // vmovdqu xmm2, oword [r13 + $20] - db $C4, $E2, $69, $00, $D7 // vpshufb xmm2, xmm2, xmm7 - db $C4, $C1, $79, $7F, $57, $20 // vmovdqa oword [r15 + $20], xmm2 - db $C5, $FA, $6F, $60, $20 // vmovdqu xmm4, oword [rax + $20] - db $C5, $E9, $D4, $E4 // vpaddq xmm4, xmm2, xmm4 - db $C5, $F9, $7F, $65, $20 // vmovdqa oword [rbp + $20], xmm4 - - db $C4, $C1, $7A, $6F, $5D, $30 // vmovdqu xmm3, oword [r13 + $30] - db $C4, $E2, $61, $00, $DF // vpshufb xmm3, xmm3, xmm7 - db $C4, $C1, $79, $7F, $5F, $30 // vmovdqa oword [r15 + $30], xmm3 - db $C5, $FA, $6F, $60, $30 // vmovdqu xmm4, oword [rax + $30] - db $C5, $E1, $D4, $E4 // vpaddq xmm4, xmm3, xmm4 - db $C5, $F9, $7F, $65, $30 // vmovdqa oword [rbp + $30], xmm4 - - db $C4, $C1, $7A, $6F, $45, $40 // vmovdqu xmm0, oword [r13 + $40] - db $C4, $E2, $79, $00, $C7 // vpshufb xmm0, xmm0, xmm7 - db $C4, $C1, $79, $7F, $47, $40 // vmovdqa oword [r15 + $40], xmm0 - db $C5, $FA, $6F, $60, $40 // vmovdqu xmm4, oword [rax + $40] - db $C5, $F9, $D4, $E4 // vpaddq xmm4, xmm0, xmm4 - db $C5, $F9, $7F, $65, $40 // vmovdqa oword [rbp + $40], xmm4 - - db $C4, $C1, $7A, $6F, $4D, $50 // vmovdqu xmm1, oword [r13 + $50] - db $C4, $E2, $71, $00, $CF // vpshufb xmm1, xmm1, xmm7 - db $C4, $C1, $79, $7F, $4F, $50 // vmovdqa oword [r15 + $50], xmm1 - db $C5, $FA, $6F, $60, $50 // vmovdqu xmm4, oword [rax + $50] - db $C5, $F1, $D4, $E4 // vpaddq xmm4, xmm1, xmm4 - db $C5, $F9, $7F, $65, $50 // vmovdqa oword [rbp + $50], xmm4 - - db $C4, $C1, $7A, $6F, $55, $60 // vmovdqu xmm2, oword [r13 + $60] - db $C4, $E2, $69, $00, $D7 // vpshufb xmm2, xmm2, xmm7 - db $C4, $C1, $79, $7F, $57, $60 // vmovdqa oword [r15 + $60], xmm2 - db $C5, $FA, $6F, $60, $60 // vmovdqu xmm4, oword [rax + $60] - db $C5, $E9, $D4, $E4 // vpaddq xmm4, xmm2, xmm4 - db $C5, $F9, $7F, $65, $60 // vmovdqa oword [rbp + $60], xmm4 - - db $C4, $C1, $7A, $6F, $5D, $70 // vmovdqu xmm3, oword [r13 + $70] - db $C4, $E2, $61, $00, $DF // vpshufb xmm3, xmm3, xmm7 - db $C4, $C1, $79, $7F, $5F, $70 // vmovdqa oword [r15 + $70], xmm3 - db $C5, $FA, $6F, $60, $70 // vmovdqu xmm4, oword [rax + $70] - db $C5, $E1, $D4, $E4 // vpaddq xmm4, xmm3, xmm4 - db $C5, $F9, $7F, $65, $70 // vmovdqa oword [rbp + $70], xmm4 - - // Expand W[16..79] using GPR with circular buffer (identical to SSSE3) - mov ecx, 16 - -@avx2_512_expand_loop: - // W[t] = sigma1(W[t-2]) + W[t-7] + sigma0(W[t-15]) + W[t-16] - - // sigma1(W[t-2]) - mov edx, ecx - sub edx, 2 - and edx, 15 - mov rsi, [r15 + rdx*8] - mov rdi, rsi - ror rdi, 19 - mov r8, rsi - ror r8, 61 - xor rdi, r8 - shr rsi, 6 - xor rdi, rsi - - // + W[t-7] - mov edx, ecx - sub edx, 7 - and edx, 15 - add rdi, [r15 + rdx*8] - - // sigma0(W[t-15]) - mov edx, ecx - sub edx, 15 - and edx, 15 - mov rsi, [r15 + rdx*8] - mov r8, rsi - ror r8, 1 - mov r9, rsi - ror r9, 8 - xor r8, r9 - shr rsi, 7 - xor r8, rsi - add rdi, r8 - - // + W[t-16] - mov edx, ecx - sub edx, 16 - and edx, 15 - add rdi, [r15 + rdx*8] - - // Store W[t] to circular buffer - mov edx, ecx - and edx, 15 - mov [r15 + rdx*8], rdi - - // W[t] + K[t] -> WK buffer - mov rsi, [rax + rcx*8] - add rsi, rdi - mov [rbp + rcx*8], rsi - - inc ecx - cmp ecx, 80 - jb @avx2_512_expand_loop - - // ========== Phase 2: 80 Compression Rounds (GPR, identical to SSSE3) ========== - - mov rax, [r12] - mov rbx, [r12 + $08] - mov rcx, [r12 + $10] - mov rdx, [r12 + $18] - mov r8, [r12 + $20] - mov r9, [r12 + $28] - mov r10, [r12 + $30] - mov r11, [r12 + $38] - - lea r15, [rbp + $280] - -@avx2_512_round_loop: - - // Round 0: a=rax b=rbx c=rcx d=rdx e=r8 f=r9 g=r10 h=r11 - mov rsi, r8 - mov rdi, r8 - ror rsi, 14 - ror rdi, 18 - xor rsi, rdi - ror rdi, 23 - xor rsi, rdi - mov rdi, r9 - xor rdi, r10 - and rdi, r8 - xor rdi, r10 - add rsi, r11 - add rsi, rdi - add rsi, [rbp] - add rdx, rsi - mov rdi, rax - mov r11, rax - ror rdi, 28 - ror r11, 34 - xor rdi, r11 - ror r11, 5 - xor rdi, r11 - add rsi, rdi - mov r11, rax - and r11, rbx - mov rdi, rax - xor rdi, rbx - and rdi, rcx - xor r11, rdi - add r11, rsi - - // Round 1: a=r11 b=rax c=rbx d=rcx e=rdx f=r8 g=r9 h=r10 - mov rsi, rdx - mov rdi, rdx - ror rsi, 14 - ror rdi, 18 - xor rsi, rdi - ror rdi, 23 - xor rsi, rdi - mov rdi, r8 - xor rdi, r9 - and rdi, rdx - xor rdi, r9 - add rsi, r10 - add rsi, rdi - add rsi, [rbp + $08] - add rcx, rsi - mov rdi, r11 - mov r10, r11 - ror rdi, 28 - ror r10, 34 - xor rdi, r10 - ror r10, 5 - xor rdi, r10 - add rsi, rdi - mov r10, r11 - and r10, rax - mov rdi, r11 - xor rdi, rax - and rdi, rbx - xor r10, rdi - add r10, rsi - - // Round 2: a=r10 b=r11 c=rax d=rbx e=rcx f=rdx g=r8 h=r9 - mov rsi, rcx - mov rdi, rcx - ror rsi, 14 - ror rdi, 18 - xor rsi, rdi - ror rdi, 23 - xor rsi, rdi - mov rdi, rdx - xor rdi, r8 - and rdi, rcx - xor rdi, r8 - add rsi, r9 - add rsi, rdi - add rsi, [rbp + $10] - add rbx, rsi - mov rdi, r10 - mov r9, r10 - ror rdi, 28 - ror r9, 34 - xor rdi, r9 - ror r9, 5 - xor rdi, r9 - add rsi, rdi - mov r9, r10 - and r9, r11 - mov rdi, r10 - xor rdi, r11 - and rdi, rax - xor r9, rdi - add r9, rsi - - // Round 3: a=r9 b=r10 c=r11 d=rax e=rbx f=rcx g=rdx h=r8 - mov rsi, rbx - mov rdi, rbx - ror rsi, 14 - ror rdi, 18 - xor rsi, rdi - ror rdi, 23 - xor rsi, rdi - mov rdi, rcx - xor rdi, rdx - and rdi, rbx - xor rdi, rdx - add rsi, r8 - add rsi, rdi - add rsi, [rbp + $18] - add rax, rsi - mov rdi, r9 - mov r8, r9 - ror rdi, 28 - ror r8, 34 - xor rdi, r8 - ror r8, 5 - xor rdi, r8 - add rsi, rdi - mov r8, r9 - and r8, r10 - mov rdi, r9 - xor rdi, r10 - and rdi, r11 - xor r8, rdi - add r8, rsi - - // Round 4: a=r8 b=r9 c=r10 d=r11 e=rax f=rbx g=rcx h=rdx - mov rsi, rax - mov rdi, rax - ror rsi, 14 - ror rdi, 18 - xor rsi, rdi - ror rdi, 23 - xor rsi, rdi - mov rdi, rbx - xor rdi, rcx - and rdi, rax - xor rdi, rcx - add rsi, rdx - add rsi, rdi - add rsi, [rbp + $20] - add r11, rsi - mov rdi, r8 - mov rdx, r8 - ror rdi, 28 - ror rdx, 34 - xor rdi, rdx - ror rdx, 5 - xor rdi, rdx - add rsi, rdi - mov rdx, r8 - and rdx, r9 - mov rdi, r8 - xor rdi, r9 - and rdi, r10 - xor rdx, rdi - add rdx, rsi - - // Round 5: a=rdx b=r8 c=r9 d=r10 e=r11 f=rax g=rbx h=rcx - mov rsi, r11 - mov rdi, r11 - ror rsi, 14 - ror rdi, 18 - xor rsi, rdi - ror rdi, 23 - xor rsi, rdi - mov rdi, rax - xor rdi, rbx - and rdi, r11 - xor rdi, rbx - add rsi, rcx - add rsi, rdi - add rsi, [rbp + $28] - add r10, rsi - mov rdi, rdx - mov rcx, rdx - ror rdi, 28 - ror rcx, 34 - xor rdi, rcx - ror rcx, 5 - xor rdi, rcx - add rsi, rdi - mov rcx, rdx - and rcx, r8 - mov rdi, rdx - xor rdi, r8 - and rdi, r9 - xor rcx, rdi - add rcx, rsi - - // Round 6: a=rcx b=rdx c=r8 d=r9 e=r10 f=r11 g=rax h=rbx - mov rsi, r10 - mov rdi, r10 - ror rsi, 14 - ror rdi, 18 - xor rsi, rdi - ror rdi, 23 - xor rsi, rdi - mov rdi, r11 - xor rdi, rax - and rdi, r10 - xor rdi, rax - add rsi, rbx - add rsi, rdi - add rsi, [rbp + $30] - add r9, rsi - mov rdi, rcx - mov rbx, rcx - ror rdi, 28 - ror rbx, 34 - xor rdi, rbx - ror rbx, 5 - xor rdi, rbx - add rsi, rdi - mov rbx, rcx - and rbx, rdx - mov rdi, rcx - xor rdi, rdx - and rdi, r8 - xor rbx, rdi - add rbx, rsi - - // Round 7: a=rbx b=rcx c=rdx d=r8 e=r9 f=r10 g=r11 h=rax - mov rsi, r9 - mov rdi, r9 - ror rsi, 14 - ror rdi, 18 - xor rsi, rdi - ror rdi, 23 - xor rsi, rdi - mov rdi, r10 - xor rdi, r11 - and rdi, r9 - xor rdi, r11 - add rsi, rax - add rsi, rdi - add rsi, [rbp + $38] - add r8, rsi - mov rdi, rbx - mov rax, rbx - ror rdi, 28 - ror rax, 34 - xor rdi, rax - ror rax, 5 - xor rdi, rax - add rsi, rdi - mov rax, rbx - and rax, rcx - mov rdi, rbx - xor rdi, rcx - and rdi, rdx - xor rax, rdi - add rax, rsi - - add rbp, $40 - cmp rbp, r15 - jb @avx2_512_round_loop + mov rax, rsp + push r9 + push rbx + push rbp + push rsi + push rdi + push r12 + push r13 + push r14 + push r15 + mov rdi, rcx + mov rsi, rdx + mov edx, r8d + sub rsp, $580 + shl rdx, $4 + and rsp, $FFFFFFFFFFFFF800 + lea rdx, [rsi + rdx*8] + add rsp, $480 + mov qword [rsp + $80], rdi + mov qword [rsp + $88], rsi + mov qword [rsp + $90], rdx + mov qword [rsp + $98], rax - // Add round results to state - add [r12], rax - add [r12 + $08], rbx - add [r12 + $10], rcx - add [r12 + $18], rdx - add [r12 + $20], r8 - add [r12 + $28], r9 - add [r12 + $30], r10 - add [r12 + $38], r11 +@prologue: + db $C5, $F8, $77 // vzeroupper + sub rsi, $FFFFFFFFFFFFFF80 + mov rax, qword [rdi] + mov r12, rsi + mov rbx, qword [rdi + $8] + cmp rsi, rdx + mov rcx, qword [rdi + $10] + cmove r12, rsp + mov rdx, qword [rdi + $18] + mov r8, qword [rdi + $20] + mov r9, qword [rdi + $28] + mov r10, qword [rdi + $30] + mov r11, qword [rdi + $38] + jmp @block_loop - add r13, $80 - dec r14d - jnz @avx2_512_block_loop +@block_loop: + db $C5, $FA, $6F, $46, $80 // vmovdqu xmm0, oword [rsi - $80] + db $C5, $FA, $6F, $4E, $90 // vmovdqu xmm1, oword [rsi - $70] + db $C5, $FA, $6F, $56, $A0 // vmovdqu xmm2, oword [rsi - $60] + mov rbp, qword [rsp + $98] + mov rbp, qword [rbp - $8] + add rbp, $80 + db $C5, $FA, $6F, $5E, $B0 // vmovdqu xmm3, oword [rsi - $50] + db $C5, $FA, $6F, $66, $C0 // vmovdqu xmm4, oword [rsi - $40] + db $C5, $FA, $6F, $6E, $D0 // vmovdqu xmm5, oword [rsi - $30] + db $C5, $FA, $6F, $76, $E0 // vmovdqu xmm6, oword [rsi - $20] + db $C5, $FA, $6F, $7E, $F0 // vmovdqu xmm7, oword [rsi - $10] + db $C5, $7E, $6F, $95, $80, $04, $00, $00 // vmovdqu ymm10, yword [rbp + $480] + db $C4, $C3, $7D, $38, $04, $24, $01 // vinserti128 ymm0, ymm0, oword [r12], $1 + db $C4, $C3, $75, $38, $4C, $24, $10, $01 // vinserti128 ymm1, ymm1, oword [r12 + $10], $1 + db $C4, $C2, $7D, $00, $C2 // vpshufb ymm0, ymm0, ymm10 + db $C4, $C3, $6D, $38, $54, $24, $20, $01 // vinserti128 ymm2, ymm2, oword [r12 + $20], $1 + db $C4, $C2, $75, $00, $CA // vpshufb ymm1, ymm1, ymm10 + db $C4, $C3, $65, $38, $5C, $24, $30, $01 // vinserti128 ymm3, ymm3, oword [r12 + $30], $1 + db $C4, $C2, $6D, $00, $D2 // vpshufb ymm2, ymm2, ymm10 + db $C4, $C3, $5D, $38, $64, $24, $40, $01 // vinserti128 ymm4, ymm4, oword [r12 + $40], $1 + db $C4, $C2, $65, $00, $DA // vpshufb ymm3, ymm3, ymm10 + db $C4, $C3, $55, $38, $6C, $24, $50, $01 // vinserti128 ymm5, ymm5, oword [r12 + $50], $1 + db $C4, $C2, $5D, $00, $E2 // vpshufb ymm4, ymm4, ymm10 + db $C4, $C3, $4D, $38, $74, $24, $60, $01 // vinserti128 ymm6, ymm6, oword [r12 + $60], $1 + db $C4, $C2, $55, $00, $EA // vpshufb ymm5, ymm5, ymm10 + db $C4, $C3, $45, $38, $7C, $24, $70, $01 // vinserti128 ymm7, ymm7, oword [r12 + $70], $1 + db $C5, $7D, $D4, $45, $80 // vpaddq ymm8, ymm0, yword [rbp - $80] + db $C4, $C2, $4D, $00, $F2 // vpshufb ymm6, ymm6, ymm10 + db $C5, $75, $D4, $4D, $A0 // vpaddq ymm9, ymm1, yword [rbp - $60] + db $C4, $C2, $45, $00, $FA // vpshufb ymm7, ymm7, ymm10 + db $C5, $6D, $D4, $55, $C0 // vpaddq ymm10, ymm2, yword [rbp - $40] + db $C5, $65, $D4, $5D, $E0 // vpaddq ymm11, ymm3, yword [rbp - $20] + db $C5, $7D, $7F, $04, $24 // vmovdqa yword [rsp], ymm8 + db $C5, $5D, $D4, $45, $00 // vpaddq ymm8, ymm4, yword [rbp + $0] + db $C5, $7D, $7F, $4C, $24, $20 // vmovdqa yword [rsp + $20], ymm9 + db $C5, $55, $D4, $4D, $20 // vpaddq ymm9, ymm5, yword [rbp + $20] + db $C5, $7D, $7F, $54, $24, $40 // vmovdqa yword [rsp + $40], ymm10 + db $C5, $4D, $D4, $55, $40 // vpaddq ymm10, ymm6, yword [rbp + $40] + db $C5, $7D, $7F, $5C, $24, $60 // vmovdqa yword [rsp + $60], ymm11 + lea rsp, [rsp - $80] + db $C5, $45, $D4, $5D, $60 // vpaddq ymm11, ymm7, yword [rbp + $60] + db $C5, $7D, $7F, $04, $24 // vmovdqa yword [rsp], ymm8 + xor r14, r14 + db $C5, $7D, $7F, $4C, $24, $20 // vmovdqa yword [rsp + $20], ymm9 + mov rdi, rbx + db $C5, $7D, $7F, $54, $24, $40 // vmovdqa yword [rsp + $40], ymm10 + xor rdi, rcx + db $C5, $7D, $7F, $5C, $24, $60 // vmovdqa yword [rsp + $60], ymm11 + mov r12, r9 + add rbp, $100 + jmp @sched_loop -@avx2_512_done: +@sched_loop: + lea rsp, [rsp - $80] + db $C4, $63, $75, $0F, $C0, $08 // vpalignr ymm8, ymm1, ymm0, $8 + add r11, qword [rsp + $100] + and r12, r8 + db $C4, $43, $FB, $F0, $E8, $29 // rorx r13, r8, $29 + db $C4, $63, $55, $0F, $DC, $08 // vpalignr ymm11, ymm5, ymm4, $8 + db $C4, $43, $FB, $F0, $F8, $12 // rorx r15, r8, $12 + lea rax, [rax + r14*1] + lea r11, [r11 + r12*1] + db $C4, $C1, $2D, $73, $D0, $01 // vpsrlq ymm10, ymm8, $1 + db $C4, $42, $B8, $F2, $E2 // andn r12, r8, r10 + xor r13, r15 + db $C4, $43, $FB, $F0, $F0, $0E // rorx r14, r8, $E + db $C4, $C1, $7D, $D4, $C3 // vpaddq ymm0, ymm0, ymm11 + db $C4, $C1, $25, $73, $D0, $07 // vpsrlq ymm11, ymm8, $7 + lea r11, [r11 + r12*1] + xor r13, r14 + mov r15, rax + db $C4, $C1, $35, $73, $F0, $38 // vpsllq ymm9, ymm8, $38 + db $C4, $41, $25, $EF, $C2 // vpxor ymm8, ymm11, ymm10 + db $C4, $63, $FB, $F0, $E0, $27 // rorx r12, rax, $27 + lea r11, [r11 + r13*1] + xor r15, rbx + db $C4, $C1, $2D, $73, $D2, $07 // vpsrlq ymm10, ymm10, $7 + db $C4, $41, $3D, $EF, $C1 // vpxor ymm8, ymm8, ymm9 + db $C4, $63, $FB, $F0, $F0, $22 // rorx r14, rax, $22 + db $C4, $63, $FB, $F0, $E8, $1C // rorx r13, rax, $1C + lea rdx, [rdx + r11*1] + db $C4, $C1, $35, $73, $F1, $07 // vpsllq ymm9, ymm9, $7 + db $C4, $41, $3D, $EF, $C2 // vpxor ymm8, ymm8, ymm10 + and rdi, r15 + xor r14, r12 + xor rdi, rbx + db $C5, $A5, $73, $D7, $06 // vpsrlq ymm11, ymm7, $6 + db $C4, $41, $3D, $EF, $C1 // vpxor ymm8, ymm8, ymm9 + xor r14, r13 + lea r11, [r11 + rdi*1] + mov r12, r8 + db $C5, $AD, $73, $F7, $03 // vpsllq ymm10, ymm7, $3 + db $C4, $C1, $7D, $D4, $C0 // vpaddq ymm0, ymm0, ymm8 + add r10, qword [rsp + $108] + and r12, rdx + db $C4, $63, $FB, $F0, $EA, $29 // rorx r13, rdx, $29 + db $C5, $B5, $73, $D7, $13 // vpsrlq ymm9, ymm7, $13 + db $C4, $41, $25, $EF, $DA // vpxor ymm11, ymm11, ymm10 + db $C4, $E3, $FB, $F0, $FA, $12 // rorx rdi, rdx, $12 + lea r11, [r11 + r14*1] + lea r10, [r10 + r12*1] + db $C4, $C1, $2D, $73, $F2, $2A // vpsllq ymm10, ymm10, $2A + db $C4, $41, $25, $EF, $D9 // vpxor ymm11, ymm11, ymm9 + db $C4, $42, $E8, $F2, $E1 // andn r12, rdx, r9 + xor r13, rdi + db $C4, $63, $FB, $F0, $F2, $0E // rorx r14, rdx, $E + db $C4, $C1, $35, $73, $D1, $2A // vpsrlq ymm9, ymm9, $2A + db $C4, $41, $25, $EF, $DA // vpxor ymm11, ymm11, ymm10 + lea r10, [r10 + r12*1] + xor r13, r14 + mov rdi, r11 + db $C4, $41, $25, $EF, $D9 // vpxor ymm11, ymm11, ymm9 + db $C4, $43, $FB, $F0, $E3, $27 // rorx r12, r11, $27 + lea r10, [r10 + r13*1] + xor rdi, rax + db $C4, $C1, $7D, $D4, $C3 // vpaddq ymm0, ymm0, ymm11 + db $C4, $43, $FB, $F0, $F3, $22 // rorx r14, r11, $22 + db $C4, $43, $FB, $F0, $EB, $1C // rorx r13, r11, $1C + lea rcx, [rcx + r10*1] + db $C5, $7D, $D4, $55, $80 // vpaddq ymm10, ymm0, yword [rbp - $80] + and r15, rdi + xor r14, r12 + xor r15, rax + xor r14, r13 + lea r10, [r10 + r15*1] + mov r12, rdx + db $C5, $7D, $7F, $14, $24 // vmovdqa yword [rsp], ymm10 + db $C4, $63, $6D, $0F, $C1, $08 // vpalignr ymm8, ymm2, ymm1, $8 + add r9, qword [rsp + $120] + and r12, rcx + db $C4, $63, $FB, $F0, $E9, $29 // rorx r13, rcx, $29 + db $C4, $63, $4D, $0F, $DD, $08 // vpalignr ymm11, ymm6, ymm5, $8 + db $C4, $63, $FB, $F0, $F9, $12 // rorx r15, rcx, $12 + lea r10, [r10 + r14*1] + lea r9, [r9 + r12*1] + db $C4, $C1, $2D, $73, $D0, $01 // vpsrlq ymm10, ymm8, $1 + db $C4, $42, $F0, $F2, $E0 // andn r12, rcx, r8 + xor r13, r15 + db $C4, $63, $FB, $F0, $F1, $0E // rorx r14, rcx, $E + db $C4, $C1, $75, $D4, $CB // vpaddq ymm1, ymm1, ymm11 + db $C4, $C1, $25, $73, $D0, $07 // vpsrlq ymm11, ymm8, $7 + lea r9, [r9 + r12*1] + xor r13, r14 + mov r15, r10 + db $C4, $C1, $35, $73, $F0, $38 // vpsllq ymm9, ymm8, $38 + db $C4, $41, $25, $EF, $C2 // vpxor ymm8, ymm11, ymm10 + db $C4, $43, $FB, $F0, $E2, $27 // rorx r12, r10, $27 + lea r9, [r9 + r13*1] + xor r15, r11 + db $C4, $C1, $2D, $73, $D2, $07 // vpsrlq ymm10, ymm10, $7 + db $C4, $41, $3D, $EF, $C1 // vpxor ymm8, ymm8, ymm9 + db $C4, $43, $FB, $F0, $F2, $22 // rorx r14, r10, $22 + db $C4, $43, $FB, $F0, $EA, $1C // rorx r13, r10, $1C + lea rbx, [rbx + r9*1] + db $C4, $C1, $35, $73, $F1, $07 // vpsllq ymm9, ymm9, $7 + db $C4, $41, $3D, $EF, $C2 // vpxor ymm8, ymm8, ymm10 + and rdi, r15 + xor r14, r12 + xor rdi, r11 + db $C5, $A5, $73, $D0, $06 // vpsrlq ymm11, ymm0, $6 + db $C4, $41, $3D, $EF, $C1 // vpxor ymm8, ymm8, ymm9 + xor r14, r13 + lea r9, [r9 + rdi*1] + mov r12, rcx + db $C5, $AD, $73, $F0, $03 // vpsllq ymm10, ymm0, $3 + db $C4, $C1, $75, $D4, $C8 // vpaddq ymm1, ymm1, ymm8 + add r8, qword [rsp + $128] + and r12, rbx + db $C4, $63, $FB, $F0, $EB, $29 // rorx r13, rbx, $29 + db $C5, $B5, $73, $D0, $13 // vpsrlq ymm9, ymm0, $13 + db $C4, $41, $25, $EF, $DA // vpxor ymm11, ymm11, ymm10 + db $C4, $E3, $FB, $F0, $FB, $12 // rorx rdi, rbx, $12 + lea r9, [r9 + r14*1] + lea r8, [r8 + r12*1] + db $C4, $C1, $2D, $73, $F2, $2A // vpsllq ymm10, ymm10, $2A + db $C4, $41, $25, $EF, $D9 // vpxor ymm11, ymm11, ymm9 + db $C4, $62, $E0, $F2, $E2 // andn r12, rbx, rdx + xor r13, rdi + db $C4, $63, $FB, $F0, $F3, $0E // rorx r14, rbx, $E + db $C4, $C1, $35, $73, $D1, $2A // vpsrlq ymm9, ymm9, $2A + db $C4, $41, $25, $EF, $DA // vpxor ymm11, ymm11, ymm10 + lea r8, [r8 + r12*1] + xor r13, r14 + mov rdi, r9 + db $C4, $41, $25, $EF, $D9 // vpxor ymm11, ymm11, ymm9 + db $C4, $43, $FB, $F0, $E1, $27 // rorx r12, r9, $27 + lea r8, [r8 + r13*1] + xor rdi, r10 + db $C4, $C1, $75, $D4, $CB // vpaddq ymm1, ymm1, ymm11 + db $C4, $43, $FB, $F0, $F1, $22 // rorx r14, r9, $22 + db $C4, $43, $FB, $F0, $E9, $1C // rorx r13, r9, $1C + lea rax, [rax + r8*1] + db $C5, $75, $D4, $55, $A0 // vpaddq ymm10, ymm1, yword [rbp - $60] + and r15, rdi + xor r14, r12 + xor r15, r10 + xor r14, r13 + lea r8, [r8 + r15*1] + mov r12, rbx + db $C5, $7D, $7F, $54, $24, $20 // vmovdqa yword [rsp + $20], ymm10 + db $C4, $63, $65, $0F, $C2, $08 // vpalignr ymm8, ymm3, ymm2, $8 + add rdx, qword [rsp + $140] + and r12, rax + db $C4, $63, $FB, $F0, $E8, $29 // rorx r13, rax, $29 + db $C4, $63, $45, $0F, $DE, $08 // vpalignr ymm11, ymm7, ymm6, $8 + db $C4, $63, $FB, $F0, $F8, $12 // rorx r15, rax, $12 + lea r8, [r8 + r14*1] + lea rdx, [rdx + r12*1] + db $C4, $C1, $2D, $73, $D0, $01 // vpsrlq ymm10, ymm8, $1 + db $C4, $62, $F8, $F2, $E1 // andn r12, rax, rcx + xor r13, r15 + db $C4, $63, $FB, $F0, $F0, $0E // rorx r14, rax, $E + db $C4, $C1, $6D, $D4, $D3 // vpaddq ymm2, ymm2, ymm11 + db $C4, $C1, $25, $73, $D0, $07 // vpsrlq ymm11, ymm8, $7 + lea rdx, [rdx + r12*1] + xor r13, r14 + mov r15, r8 + db $C4, $C1, $35, $73, $F0, $38 // vpsllq ymm9, ymm8, $38 + db $C4, $41, $25, $EF, $C2 // vpxor ymm8, ymm11, ymm10 + db $C4, $43, $FB, $F0, $E0, $27 // rorx r12, r8, $27 + lea rdx, [rdx + r13*1] + xor r15, r9 + db $C4, $C1, $2D, $73, $D2, $07 // vpsrlq ymm10, ymm10, $7 + db $C4, $41, $3D, $EF, $C1 // vpxor ymm8, ymm8, ymm9 + db $C4, $43, $FB, $F0, $F0, $22 // rorx r14, r8, $22 + db $C4, $43, $FB, $F0, $E8, $1C // rorx r13, r8, $1C + lea r11, [r11 + rdx*1] + db $C4, $C1, $35, $73, $F1, $07 // vpsllq ymm9, ymm9, $7 + db $C4, $41, $3D, $EF, $C2 // vpxor ymm8, ymm8, ymm10 + and rdi, r15 + xor r14, r12 + xor rdi, r9 + db $C5, $A5, $73, $D1, $06 // vpsrlq ymm11, ymm1, $6 + db $C4, $41, $3D, $EF, $C1 // vpxor ymm8, ymm8, ymm9 + xor r14, r13 + lea rdx, [rdx + rdi*1] + mov r12, rax + db $C5, $AD, $73, $F1, $03 // vpsllq ymm10, ymm1, $3 + db $C4, $C1, $6D, $D4, $D0 // vpaddq ymm2, ymm2, ymm8 + add rcx, qword [rsp + $148] + and r12, r11 + db $C4, $43, $FB, $F0, $EB, $29 // rorx r13, r11, $29 + db $C5, $B5, $73, $D1, $13 // vpsrlq ymm9, ymm1, $13 + db $C4, $41, $25, $EF, $DA // vpxor ymm11, ymm11, ymm10 + db $C4, $C3, $FB, $F0, $FB, $12 // rorx rdi, r11, $12 + lea rdx, [rdx + r14*1] + lea rcx, [rcx + r12*1] + db $C4, $C1, $2D, $73, $F2, $2A // vpsllq ymm10, ymm10, $2A + db $C4, $41, $25, $EF, $D9 // vpxor ymm11, ymm11, ymm9 + db $C4, $62, $A0, $F2, $E3 // andn r12, r11, rbx + xor r13, rdi + db $C4, $43, $FB, $F0, $F3, $0E // rorx r14, r11, $E + db $C4, $C1, $35, $73, $D1, $2A // vpsrlq ymm9, ymm9, $2A + db $C4, $41, $25, $EF, $DA // vpxor ymm11, ymm11, ymm10 + lea rcx, [rcx + r12*1] + xor r13, r14 + mov rdi, rdx + db $C4, $41, $25, $EF, $D9 // vpxor ymm11, ymm11, ymm9 + db $C4, $63, $FB, $F0, $E2, $27 // rorx r12, rdx, $27 + lea rcx, [rcx + r13*1] + xor rdi, r8 + db $C4, $C1, $6D, $D4, $D3 // vpaddq ymm2, ymm2, ymm11 + db $C4, $63, $FB, $F0, $F2, $22 // rorx r14, rdx, $22 + db $C4, $63, $FB, $F0, $EA, $1C // rorx r13, rdx, $1C + lea r10, [r10 + rcx*1] + db $C5, $6D, $D4, $55, $C0 // vpaddq ymm10, ymm2, yword [rbp - $40] + and r15, rdi + xor r14, r12 + xor r15, r8 + xor r14, r13 + lea rcx, [rcx + r15*1] + mov r12, r11 + db $C5, $7D, $7F, $54, $24, $40 // vmovdqa yword [rsp + $40], ymm10 + db $C4, $63, $5D, $0F, $C3, $08 // vpalignr ymm8, ymm4, ymm3, $8 + add rbx, qword [rsp + $160] + and r12, r10 + db $C4, $43, $FB, $F0, $EA, $29 // rorx r13, r10, $29 + db $C4, $63, $7D, $0F, $DF, $08 // vpalignr ymm11, ymm0, ymm7, $8 + db $C4, $43, $FB, $F0, $FA, $12 // rorx r15, r10, $12 + lea rcx, [rcx + r14*1] + lea rbx, [rbx + r12*1] + db $C4, $C1, $2D, $73, $D0, $01 // vpsrlq ymm10, ymm8, $1 + db $C4, $62, $A8, $F2, $E0 // andn r12, r10, rax + xor r13, r15 + db $C4, $43, $FB, $F0, $F2, $0E // rorx r14, r10, $E + db $C4, $C1, $65, $D4, $DB // vpaddq ymm3, ymm3, ymm11 + db $C4, $C1, $25, $73, $D0, $07 // vpsrlq ymm11, ymm8, $7 + lea rbx, [rbx + r12*1] + xor r13, r14 + mov r15, rcx + db $C4, $C1, $35, $73, $F0, $38 // vpsllq ymm9, ymm8, $38 + db $C4, $41, $25, $EF, $C2 // vpxor ymm8, ymm11, ymm10 + db $C4, $63, $FB, $F0, $E1, $27 // rorx r12, rcx, $27 + lea rbx, [rbx + r13*1] + xor r15, rdx + db $C4, $C1, $2D, $73, $D2, $07 // vpsrlq ymm10, ymm10, $7 + db $C4, $41, $3D, $EF, $C1 // vpxor ymm8, ymm8, ymm9 + db $C4, $63, $FB, $F0, $F1, $22 // rorx r14, rcx, $22 + db $C4, $63, $FB, $F0, $E9, $1C // rorx r13, rcx, $1C + lea r9, [r9 + rbx*1] + db $C4, $C1, $35, $73, $F1, $07 // vpsllq ymm9, ymm9, $7 + db $C4, $41, $3D, $EF, $C2 // vpxor ymm8, ymm8, ymm10 + and rdi, r15 + xor r14, r12 + xor rdi, rdx + db $C5, $A5, $73, $D2, $06 // vpsrlq ymm11, ymm2, $6 + db $C4, $41, $3D, $EF, $C1 // vpxor ymm8, ymm8, ymm9 + xor r14, r13 + lea rbx, [rbx + rdi*1] + mov r12, r10 + db $C5, $AD, $73, $F2, $03 // vpsllq ymm10, ymm2, $3 + db $C4, $C1, $65, $D4, $D8 // vpaddq ymm3, ymm3, ymm8 + add rax, qword [rsp + $168] + and r12, r9 + db $C4, $43, $FB, $F0, $E9, $29 // rorx r13, r9, $29 + db $C5, $B5, $73, $D2, $13 // vpsrlq ymm9, ymm2, $13 + db $C4, $41, $25, $EF, $DA // vpxor ymm11, ymm11, ymm10 + db $C4, $C3, $FB, $F0, $F9, $12 // rorx rdi, r9, $12 + lea rbx, [rbx + r14*1] + lea rax, [rax + r12*1] + db $C4, $C1, $2D, $73, $F2, $2A // vpsllq ymm10, ymm10, $2A + db $C4, $41, $25, $EF, $D9 // vpxor ymm11, ymm11, ymm9 + db $C4, $42, $B0, $F2, $E3 // andn r12, r9, r11 + xor r13, rdi + db $C4, $43, $FB, $F0, $F1, $0E // rorx r14, r9, $E + db $C4, $C1, $35, $73, $D1, $2A // vpsrlq ymm9, ymm9, $2A + db $C4, $41, $25, $EF, $DA // vpxor ymm11, ymm11, ymm10 + lea rax, [rax + r12*1] + xor r13, r14 + mov rdi, rbx + db $C4, $41, $25, $EF, $D9 // vpxor ymm11, ymm11, ymm9 + db $C4, $63, $FB, $F0, $E3, $27 // rorx r12, rbx, $27 + lea rax, [rax + r13*1] + xor rdi, rcx + db $C4, $C1, $65, $D4, $DB // vpaddq ymm3, ymm3, ymm11 + db $C4, $63, $FB, $F0, $F3, $22 // rorx r14, rbx, $22 + db $C4, $63, $FB, $F0, $EB, $1C // rorx r13, rbx, $1C + lea r8, [r8 + rax*1] + db $C5, $65, $D4, $55, $E0 // vpaddq ymm10, ymm3, yword [rbp - $20] + and r15, rdi + xor r14, r12 + xor r15, rcx + xor r14, r13 + lea rax, [rax + r15*1] + mov r12, r9 + db $C5, $7D, $7F, $54, $24, $60 // vmovdqa yword [rsp + $60], ymm10 + lea rsp, [rsp - $80] + db $C4, $63, $55, $0F, $C4, $08 // vpalignr ymm8, ymm5, ymm4, $8 + add r11, qword [rsp + $100] + and r12, r8 + db $C4, $43, $FB, $F0, $E8, $29 // rorx r13, r8, $29 + db $C4, $63, $75, $0F, $D8, $08 // vpalignr ymm11, ymm1, ymm0, $8 + db $C4, $43, $FB, $F0, $F8, $12 // rorx r15, r8, $12 + lea rax, [rax + r14*1] + lea r11, [r11 + r12*1] + db $C4, $C1, $2D, $73, $D0, $01 // vpsrlq ymm10, ymm8, $1 + db $C4, $42, $B8, $F2, $E2 // andn r12, r8, r10 + xor r13, r15 + db $C4, $43, $FB, $F0, $F0, $0E // rorx r14, r8, $E + db $C4, $C1, $5D, $D4, $E3 // vpaddq ymm4, ymm4, ymm11 + db $C4, $C1, $25, $73, $D0, $07 // vpsrlq ymm11, ymm8, $7 + lea r11, [r11 + r12*1] + xor r13, r14 + mov r15, rax + db $C4, $C1, $35, $73, $F0, $38 // vpsllq ymm9, ymm8, $38 + db $C4, $41, $25, $EF, $C2 // vpxor ymm8, ymm11, ymm10 + db $C4, $63, $FB, $F0, $E0, $27 // rorx r12, rax, $27 + lea r11, [r11 + r13*1] + xor r15, rbx + db $C4, $C1, $2D, $73, $D2, $07 // vpsrlq ymm10, ymm10, $7 + db $C4, $41, $3D, $EF, $C1 // vpxor ymm8, ymm8, ymm9 + db $C4, $63, $FB, $F0, $F0, $22 // rorx r14, rax, $22 + db $C4, $63, $FB, $F0, $E8, $1C // rorx r13, rax, $1C + lea rdx, [rdx + r11*1] + db $C4, $C1, $35, $73, $F1, $07 // vpsllq ymm9, ymm9, $7 + db $C4, $41, $3D, $EF, $C2 // vpxor ymm8, ymm8, ymm10 + and rdi, r15 + xor r14, r12 + xor rdi, rbx + db $C5, $A5, $73, $D3, $06 // vpsrlq ymm11, ymm3, $6 + db $C4, $41, $3D, $EF, $C1 // vpxor ymm8, ymm8, ymm9 + xor r14, r13 + lea r11, [r11 + rdi*1] + mov r12, r8 + db $C5, $AD, $73, $F3, $03 // vpsllq ymm10, ymm3, $3 + db $C4, $C1, $5D, $D4, $E0 // vpaddq ymm4, ymm4, ymm8 + add r10, qword [rsp + $108] + and r12, rdx + db $C4, $63, $FB, $F0, $EA, $29 // rorx r13, rdx, $29 + db $C5, $B5, $73, $D3, $13 // vpsrlq ymm9, ymm3, $13 + db $C4, $41, $25, $EF, $DA // vpxor ymm11, ymm11, ymm10 + db $C4, $E3, $FB, $F0, $FA, $12 // rorx rdi, rdx, $12 + lea r11, [r11 + r14*1] + lea r10, [r10 + r12*1] + db $C4, $C1, $2D, $73, $F2, $2A // vpsllq ymm10, ymm10, $2A + db $C4, $41, $25, $EF, $D9 // vpxor ymm11, ymm11, ymm9 + db $C4, $42, $E8, $F2, $E1 // andn r12, rdx, r9 + xor r13, rdi + db $C4, $63, $FB, $F0, $F2, $0E // rorx r14, rdx, $E + db $C4, $C1, $35, $73, $D1, $2A // vpsrlq ymm9, ymm9, $2A + db $C4, $41, $25, $EF, $DA // vpxor ymm11, ymm11, ymm10 + lea r10, [r10 + r12*1] + xor r13, r14 + mov rdi, r11 + db $C4, $41, $25, $EF, $D9 // vpxor ymm11, ymm11, ymm9 + db $C4, $43, $FB, $F0, $E3, $27 // rorx r12, r11, $27 + lea r10, [r10 + r13*1] + xor rdi, rax + db $C4, $C1, $5D, $D4, $E3 // vpaddq ymm4, ymm4, ymm11 + db $C4, $43, $FB, $F0, $F3, $22 // rorx r14, r11, $22 + db $C4, $43, $FB, $F0, $EB, $1C // rorx r13, r11, $1C + lea rcx, [rcx + r10*1] + db $C5, $5D, $D4, $55, $00 // vpaddq ymm10, ymm4, yword [rbp + $0] + and r15, rdi + xor r14, r12 + xor r15, rax + xor r14, r13 + lea r10, [r10 + r15*1] + mov r12, rdx + db $C5, $7D, $7F, $14, $24 // vmovdqa yword [rsp], ymm10 + db $C4, $63, $4D, $0F, $C5, $08 // vpalignr ymm8, ymm6, ymm5, $8 + add r9, qword [rsp + $120] + and r12, rcx + db $C4, $63, $FB, $F0, $E9, $29 // rorx r13, rcx, $29 + db $C4, $63, $6D, $0F, $D9, $08 // vpalignr ymm11, ymm2, ymm1, $8 + db $C4, $63, $FB, $F0, $F9, $12 // rorx r15, rcx, $12 + lea r10, [r10 + r14*1] + lea r9, [r9 + r12*1] + db $C4, $C1, $2D, $73, $D0, $01 // vpsrlq ymm10, ymm8, $1 + db $C4, $42, $F0, $F2, $E0 // andn r12, rcx, r8 + xor r13, r15 + db $C4, $63, $FB, $F0, $F1, $0E // rorx r14, rcx, $E + db $C4, $C1, $55, $D4, $EB // vpaddq ymm5, ymm5, ymm11 + db $C4, $C1, $25, $73, $D0, $07 // vpsrlq ymm11, ymm8, $7 + lea r9, [r9 + r12*1] + xor r13, r14 + mov r15, r10 + db $C4, $C1, $35, $73, $F0, $38 // vpsllq ymm9, ymm8, $38 + db $C4, $41, $25, $EF, $C2 // vpxor ymm8, ymm11, ymm10 + db $C4, $43, $FB, $F0, $E2, $27 // rorx r12, r10, $27 + lea r9, [r9 + r13*1] + xor r15, r11 + db $C4, $C1, $2D, $73, $D2, $07 // vpsrlq ymm10, ymm10, $7 + db $C4, $41, $3D, $EF, $C1 // vpxor ymm8, ymm8, ymm9 + db $C4, $43, $FB, $F0, $F2, $22 // rorx r14, r10, $22 + db $C4, $43, $FB, $F0, $EA, $1C // rorx r13, r10, $1C + lea rbx, [rbx + r9*1] + db $C4, $C1, $35, $73, $F1, $07 // vpsllq ymm9, ymm9, $7 + db $C4, $41, $3D, $EF, $C2 // vpxor ymm8, ymm8, ymm10 + and rdi, r15 + xor r14, r12 + xor rdi, r11 + db $C5, $A5, $73, $D4, $06 // vpsrlq ymm11, ymm4, $6 + db $C4, $41, $3D, $EF, $C1 // vpxor ymm8, ymm8, ymm9 + xor r14, r13 + lea r9, [r9 + rdi*1] + mov r12, rcx + db $C5, $AD, $73, $F4, $03 // vpsllq ymm10, ymm4, $3 + db $C4, $C1, $55, $D4, $E8 // vpaddq ymm5, ymm5, ymm8 + add r8, qword [rsp + $128] + and r12, rbx + db $C4, $63, $FB, $F0, $EB, $29 // rorx r13, rbx, $29 + db $C5, $B5, $73, $D4, $13 // vpsrlq ymm9, ymm4, $13 + db $C4, $41, $25, $EF, $DA // vpxor ymm11, ymm11, ymm10 + db $C4, $E3, $FB, $F0, $FB, $12 // rorx rdi, rbx, $12 + lea r9, [r9 + r14*1] + lea r8, [r8 + r12*1] + db $C4, $C1, $2D, $73, $F2, $2A // vpsllq ymm10, ymm10, $2A + db $C4, $41, $25, $EF, $D9 // vpxor ymm11, ymm11, ymm9 + db $C4, $62, $E0, $F2, $E2 // andn r12, rbx, rdx + xor r13, rdi + db $C4, $63, $FB, $F0, $F3, $0E // rorx r14, rbx, $E + db $C4, $C1, $35, $73, $D1, $2A // vpsrlq ymm9, ymm9, $2A + db $C4, $41, $25, $EF, $DA // vpxor ymm11, ymm11, ymm10 + lea r8, [r8 + r12*1] + xor r13, r14 + mov rdi, r9 + db $C4, $41, $25, $EF, $D9 // vpxor ymm11, ymm11, ymm9 + db $C4, $43, $FB, $F0, $E1, $27 // rorx r12, r9, $27 + lea r8, [r8 + r13*1] + xor rdi, r10 + db $C4, $C1, $55, $D4, $EB // vpaddq ymm5, ymm5, ymm11 + db $C4, $43, $FB, $F0, $F1, $22 // rorx r14, r9, $22 + db $C4, $43, $FB, $F0, $E9, $1C // rorx r13, r9, $1C + lea rax, [rax + r8*1] + db $C5, $55, $D4, $55, $20 // vpaddq ymm10, ymm5, yword [rbp + $20] + and r15, rdi + xor r14, r12 + xor r15, r10 + xor r14, r13 + lea r8, [r8 + r15*1] + mov r12, rbx + db $C5, $7D, $7F, $54, $24, $20 // vmovdqa yword [rsp + $20], ymm10 + db $C4, $63, $45, $0F, $C6, $08 // vpalignr ymm8, ymm7, ymm6, $8 + add rdx, qword [rsp + $140] + and r12, rax + db $C4, $63, $FB, $F0, $E8, $29 // rorx r13, rax, $29 + db $C4, $63, $65, $0F, $DA, $08 // vpalignr ymm11, ymm3, ymm2, $8 + db $C4, $63, $FB, $F0, $F8, $12 // rorx r15, rax, $12 + lea r8, [r8 + r14*1] + lea rdx, [rdx + r12*1] + db $C4, $C1, $2D, $73, $D0, $01 // vpsrlq ymm10, ymm8, $1 + db $C4, $62, $F8, $F2, $E1 // andn r12, rax, rcx + xor r13, r15 + db $C4, $63, $FB, $F0, $F0, $0E // rorx r14, rax, $E + db $C4, $C1, $4D, $D4, $F3 // vpaddq ymm6, ymm6, ymm11 + db $C4, $C1, $25, $73, $D0, $07 // vpsrlq ymm11, ymm8, $7 + lea rdx, [rdx + r12*1] + xor r13, r14 + mov r15, r8 + db $C4, $C1, $35, $73, $F0, $38 // vpsllq ymm9, ymm8, $38 + db $C4, $41, $25, $EF, $C2 // vpxor ymm8, ymm11, ymm10 + db $C4, $43, $FB, $F0, $E0, $27 // rorx r12, r8, $27 + lea rdx, [rdx + r13*1] + xor r15, r9 + db $C4, $C1, $2D, $73, $D2, $07 // vpsrlq ymm10, ymm10, $7 + db $C4, $41, $3D, $EF, $C1 // vpxor ymm8, ymm8, ymm9 + db $C4, $43, $FB, $F0, $F0, $22 // rorx r14, r8, $22 + db $C4, $43, $FB, $F0, $E8, $1C // rorx r13, r8, $1C + lea r11, [r11 + rdx*1] + db $C4, $C1, $35, $73, $F1, $07 // vpsllq ymm9, ymm9, $7 + db $C4, $41, $3D, $EF, $C2 // vpxor ymm8, ymm8, ymm10 + and rdi, r15 + xor r14, r12 + xor rdi, r9 + db $C5, $A5, $73, $D5, $06 // vpsrlq ymm11, ymm5, $6 + db $C4, $41, $3D, $EF, $C1 // vpxor ymm8, ymm8, ymm9 + xor r14, r13 + lea rdx, [rdx + rdi*1] + mov r12, rax + db $C5, $AD, $73, $F5, $03 // vpsllq ymm10, ymm5, $3 + db $C4, $C1, $4D, $D4, $F0 // vpaddq ymm6, ymm6, ymm8 + add rcx, qword [rsp + $148] + and r12, r11 + db $C4, $43, $FB, $F0, $EB, $29 // rorx r13, r11, $29 + db $C5, $B5, $73, $D5, $13 // vpsrlq ymm9, ymm5, $13 + db $C4, $41, $25, $EF, $DA // vpxor ymm11, ymm11, ymm10 + db $C4, $C3, $FB, $F0, $FB, $12 // rorx rdi, r11, $12 + lea rdx, [rdx + r14*1] + lea rcx, [rcx + r12*1] + db $C4, $C1, $2D, $73, $F2, $2A // vpsllq ymm10, ymm10, $2A + db $C4, $41, $25, $EF, $D9 // vpxor ymm11, ymm11, ymm9 + db $C4, $62, $A0, $F2, $E3 // andn r12, r11, rbx + xor r13, rdi + db $C4, $43, $FB, $F0, $F3, $0E // rorx r14, r11, $E + db $C4, $C1, $35, $73, $D1, $2A // vpsrlq ymm9, ymm9, $2A + db $C4, $41, $25, $EF, $DA // vpxor ymm11, ymm11, ymm10 + lea rcx, [rcx + r12*1] + xor r13, r14 + mov rdi, rdx + db $C4, $41, $25, $EF, $D9 // vpxor ymm11, ymm11, ymm9 + db $C4, $63, $FB, $F0, $E2, $27 // rorx r12, rdx, $27 + lea rcx, [rcx + r13*1] + xor rdi, r8 + db $C4, $C1, $4D, $D4, $F3 // vpaddq ymm6, ymm6, ymm11 + db $C4, $63, $FB, $F0, $F2, $22 // rorx r14, rdx, $22 + db $C4, $63, $FB, $F0, $EA, $1C // rorx r13, rdx, $1C + lea r10, [r10 + rcx*1] + db $C5, $4D, $D4, $55, $40 // vpaddq ymm10, ymm6, yword [rbp + $40] + and r15, rdi + xor r14, r12 + xor r15, r8 + xor r14, r13 + lea rcx, [rcx + r15*1] + mov r12, r11 + db $C5, $7D, $7F, $54, $24, $40 // vmovdqa yword [rsp + $40], ymm10 + db $C4, $63, $7D, $0F, $C7, $08 // vpalignr ymm8, ymm0, ymm7, $8 + add rbx, qword [rsp + $160] + and r12, r10 + db $C4, $43, $FB, $F0, $EA, $29 // rorx r13, r10, $29 + db $C4, $63, $5D, $0F, $DB, $08 // vpalignr ymm11, ymm4, ymm3, $8 + db $C4, $43, $FB, $F0, $FA, $12 // rorx r15, r10, $12 + lea rcx, [rcx + r14*1] + lea rbx, [rbx + r12*1] + db $C4, $C1, $2D, $73, $D0, $01 // vpsrlq ymm10, ymm8, $1 + db $C4, $62, $A8, $F2, $E0 // andn r12, r10, rax + xor r13, r15 + db $C4, $43, $FB, $F0, $F2, $0E // rorx r14, r10, $E + db $C4, $C1, $45, $D4, $FB // vpaddq ymm7, ymm7, ymm11 + db $C4, $C1, $25, $73, $D0, $07 // vpsrlq ymm11, ymm8, $7 + lea rbx, [rbx + r12*1] + xor r13, r14 + mov r15, rcx + db $C4, $C1, $35, $73, $F0, $38 // vpsllq ymm9, ymm8, $38 + db $C4, $41, $25, $EF, $C2 // vpxor ymm8, ymm11, ymm10 + db $C4, $63, $FB, $F0, $E1, $27 // rorx r12, rcx, $27 + lea rbx, [rbx + r13*1] + xor r15, rdx + db $C4, $C1, $2D, $73, $D2, $07 // vpsrlq ymm10, ymm10, $7 + db $C4, $41, $3D, $EF, $C1 // vpxor ymm8, ymm8, ymm9 + db $C4, $63, $FB, $F0, $F1, $22 // rorx r14, rcx, $22 + db $C4, $63, $FB, $F0, $E9, $1C // rorx r13, rcx, $1C + lea r9, [r9 + rbx*1] + db $C4, $C1, $35, $73, $F1, $07 // vpsllq ymm9, ymm9, $7 + db $C4, $41, $3D, $EF, $C2 // vpxor ymm8, ymm8, ymm10 + and rdi, r15 + xor r14, r12 + xor rdi, rdx + db $C5, $A5, $73, $D6, $06 // vpsrlq ymm11, ymm6, $6 + db $C4, $41, $3D, $EF, $C1 // vpxor ymm8, ymm8, ymm9 + xor r14, r13 + lea rbx, [rbx + rdi*1] + mov r12, r10 + db $C5, $AD, $73, $F6, $03 // vpsllq ymm10, ymm6, $3 + db $C4, $C1, $45, $D4, $F8 // vpaddq ymm7, ymm7, ymm8 + add rax, qword [rsp + $168] + and r12, r9 + db $C4, $43, $FB, $F0, $E9, $29 // rorx r13, r9, $29 + db $C5, $B5, $73, $D6, $13 // vpsrlq ymm9, ymm6, $13 + db $C4, $41, $25, $EF, $DA // vpxor ymm11, ymm11, ymm10 + db $C4, $C3, $FB, $F0, $F9, $12 // rorx rdi, r9, $12 + lea rbx, [rbx + r14*1] + lea rax, [rax + r12*1] + db $C4, $C1, $2D, $73, $F2, $2A // vpsllq ymm10, ymm10, $2A + db $C4, $41, $25, $EF, $D9 // vpxor ymm11, ymm11, ymm9 + db $C4, $42, $B0, $F2, $E3 // andn r12, r9, r11 + xor r13, rdi + db $C4, $43, $FB, $F0, $F1, $0E // rorx r14, r9, $E + db $C4, $C1, $35, $73, $D1, $2A // vpsrlq ymm9, ymm9, $2A + db $C4, $41, $25, $EF, $DA // vpxor ymm11, ymm11, ymm10 + lea rax, [rax + r12*1] + xor r13, r14 + mov rdi, rbx + db $C4, $41, $25, $EF, $D9 // vpxor ymm11, ymm11, ymm9 + db $C4, $63, $FB, $F0, $E3, $27 // rorx r12, rbx, $27 + lea rax, [rax + r13*1] + xor rdi, rcx + db $C4, $C1, $45, $D4, $FB // vpaddq ymm7, ymm7, ymm11 + db $C4, $63, $FB, $F0, $F3, $22 // rorx r14, rbx, $22 + db $C4, $63, $FB, $F0, $EB, $1C // rorx r13, rbx, $1C + lea r8, [r8 + rax*1] + db $C5, $45, $D4, $55, $60 // vpaddq ymm10, ymm7, yword [rbp + $60] + and r15, rdi + xor r14, r12 + xor r15, rcx + xor r14, r13 + lea rax, [rax + r15*1] + mov r12, r9 + db $C5, $7D, $7F, $54, $24, $60 // vmovdqa yword [rsp + $60], ymm10 + lea rbp, [rbp + $100] + cmp byte [rbp - $79], $0 + jne @sched_loop + add r11, qword [rsp + $80] + and r12, r8 + db $C4, $43, $FB, $F0, $E8, $29 // rorx r13, r8, $29 + db $C4, $43, $FB, $F0, $F8, $12 // rorx r15, r8, $12 + lea rax, [rax + r14*1] + lea r11, [r11 + r12*1] + db $C4, $42, $B8, $F2, $E2 // andn r12, r8, r10 + xor r13, r15 + db $C4, $43, $FB, $F0, $F0, $0E // rorx r14, r8, $E + lea r11, [r11 + r12*1] + xor r13, r14 + mov r15, rax + db $C4, $63, $FB, $F0, $E0, $27 // rorx r12, rax, $27 + lea r11, [r11 + r13*1] + xor r15, rbx + db $C4, $63, $FB, $F0, $F0, $22 // rorx r14, rax, $22 + db $C4, $63, $FB, $F0, $E8, $1C // rorx r13, rax, $1C + lea rdx, [rdx + r11*1] + and rdi, r15 + xor r14, r12 + xor rdi, rbx + xor r14, r13 + lea r11, [r11 + rdi*1] + mov r12, r8 + add r10, qword [rsp + $88] + and r12, rdx + db $C4, $63, $FB, $F0, $EA, $29 // rorx r13, rdx, $29 + db $C4, $E3, $FB, $F0, $FA, $12 // rorx rdi, rdx, $12 + lea r11, [r11 + r14*1] + lea r10, [r10 + r12*1] + db $C4, $42, $E8, $F2, $E1 // andn r12, rdx, r9 + xor r13, rdi + db $C4, $63, $FB, $F0, $F2, $0E // rorx r14, rdx, $E + lea r10, [r10 + r12*1] + xor r13, r14 + mov rdi, r11 + db $C4, $43, $FB, $F0, $E3, $27 // rorx r12, r11, $27 + lea r10, [r10 + r13*1] + xor rdi, rax + db $C4, $43, $FB, $F0, $F3, $22 // rorx r14, r11, $22 + db $C4, $43, $FB, $F0, $EB, $1C // rorx r13, r11, $1C + lea rcx, [rcx + r10*1] + and r15, rdi + xor r14, r12 + xor r15, rax + xor r14, r13 + lea r10, [r10 + r15*1] + mov r12, rdx + add r9, qword [rsp + $A0] + and r12, rcx + db $C4, $63, $FB, $F0, $E9, $29 // rorx r13, rcx, $29 + db $C4, $63, $FB, $F0, $F9, $12 // rorx r15, rcx, $12 + lea r10, [r10 + r14*1] + lea r9, [r9 + r12*1] + db $C4, $42, $F0, $F2, $E0 // andn r12, rcx, r8 + xor r13, r15 + db $C4, $63, $FB, $F0, $F1, $0E // rorx r14, rcx, $E + lea r9, [r9 + r12*1] + xor r13, r14 + mov r15, r10 + db $C4, $43, $FB, $F0, $E2, $27 // rorx r12, r10, $27 + lea r9, [r9 + r13*1] + xor r15, r11 + db $C4, $43, $FB, $F0, $F2, $22 // rorx r14, r10, $22 + db $C4, $43, $FB, $F0, $EA, $1C // rorx r13, r10, $1C + lea rbx, [rbx + r9*1] + and rdi, r15 + xor r14, r12 + xor rdi, r11 + xor r14, r13 + lea r9, [r9 + rdi*1] + mov r12, rcx + add r8, qword [rsp + $A8] + and r12, rbx + db $C4, $63, $FB, $F0, $EB, $29 // rorx r13, rbx, $29 + db $C4, $E3, $FB, $F0, $FB, $12 // rorx rdi, rbx, $12 + lea r9, [r9 + r14*1] + lea r8, [r8 + r12*1] + db $C4, $62, $E0, $F2, $E2 // andn r12, rbx, rdx + xor r13, rdi + db $C4, $63, $FB, $F0, $F3, $0E // rorx r14, rbx, $E + lea r8, [r8 + r12*1] + xor r13, r14 + mov rdi, r9 + db $C4, $43, $FB, $F0, $E1, $27 // rorx r12, r9, $27 + lea r8, [r8 + r13*1] + xor rdi, r10 + db $C4, $43, $FB, $F0, $F1, $22 // rorx r14, r9, $22 + db $C4, $43, $FB, $F0, $E9, $1C // rorx r13, r9, $1C + lea rax, [rax + r8*1] + and r15, rdi + xor r14, r12 + xor r15, r10 + xor r14, r13 + lea r8, [r8 + r15*1] + mov r12, rbx + add rdx, qword [rsp + $C0] + and r12, rax + db $C4, $63, $FB, $F0, $E8, $29 // rorx r13, rax, $29 + db $C4, $63, $FB, $F0, $F8, $12 // rorx r15, rax, $12 + lea r8, [r8 + r14*1] + lea rdx, [rdx + r12*1] + db $C4, $62, $F8, $F2, $E1 // andn r12, rax, rcx + xor r13, r15 + db $C4, $63, $FB, $F0, $F0, $0E // rorx r14, rax, $E + lea rdx, [rdx + r12*1] + xor r13, r14 + mov r15, r8 + db $C4, $43, $FB, $F0, $E0, $27 // rorx r12, r8, $27 + lea rdx, [rdx + r13*1] + xor r15, r9 + db $C4, $43, $FB, $F0, $F0, $22 // rorx r14, r8, $22 + db $C4, $43, $FB, $F0, $E8, $1C // rorx r13, r8, $1C + lea r11, [r11 + rdx*1] + and rdi, r15 + xor r14, r12 + xor rdi, r9 + xor r14, r13 + lea rdx, [rdx + rdi*1] + mov r12, rax + add rcx, qword [rsp + $C8] + and r12, r11 + db $C4, $43, $FB, $F0, $EB, $29 // rorx r13, r11, $29 + db $C4, $C3, $FB, $F0, $FB, $12 // rorx rdi, r11, $12 + lea rdx, [rdx + r14*1] + lea rcx, [rcx + r12*1] + db $C4, $62, $A0, $F2, $E3 // andn r12, r11, rbx + xor r13, rdi + db $C4, $43, $FB, $F0, $F3, $0E // rorx r14, r11, $E + lea rcx, [rcx + r12*1] + xor r13, r14 + mov rdi, rdx + db $C4, $63, $FB, $F0, $E2, $27 // rorx r12, rdx, $27 + lea rcx, [rcx + r13*1] + xor rdi, r8 + db $C4, $63, $FB, $F0, $F2, $22 // rorx r14, rdx, $22 + db $C4, $63, $FB, $F0, $EA, $1C // rorx r13, rdx, $1C + lea r10, [r10 + rcx*1] + and r15, rdi + xor r14, r12 + xor r15, r8 + xor r14, r13 + lea rcx, [rcx + r15*1] + mov r12, r11 + add rbx, qword [rsp + $E0] + and r12, r10 + db $C4, $43, $FB, $F0, $EA, $29 // rorx r13, r10, $29 + db $C4, $43, $FB, $F0, $FA, $12 // rorx r15, r10, $12 + lea rcx, [rcx + r14*1] + lea rbx, [rbx + r12*1] + db $C4, $62, $A8, $F2, $E0 // andn r12, r10, rax + xor r13, r15 + db $C4, $43, $FB, $F0, $F2, $0E // rorx r14, r10, $E + lea rbx, [rbx + r12*1] + xor r13, r14 + mov r15, rcx + db $C4, $63, $FB, $F0, $E1, $27 // rorx r12, rcx, $27 + lea rbx, [rbx + r13*1] + xor r15, rdx + db $C4, $63, $FB, $F0, $F1, $22 // rorx r14, rcx, $22 + db $C4, $63, $FB, $F0, $E9, $1C // rorx r13, rcx, $1C + lea r9, [r9 + rbx*1] + and rdi, r15 + xor r14, r12 + xor rdi, rdx + xor r14, r13 + lea rbx, [rbx + rdi*1] + mov r12, r10 + add rax, qword [rsp + $E8] + and r12, r9 + db $C4, $43, $FB, $F0, $E9, $29 // rorx r13, r9, $29 + db $C4, $C3, $FB, $F0, $F9, $12 // rorx rdi, r9, $12 + lea rbx, [rbx + r14*1] + lea rax, [rax + r12*1] + db $C4, $42, $B0, $F2, $E3 // andn r12, r9, r11 + xor r13, rdi + db $C4, $43, $FB, $F0, $F1, $0E // rorx r14, r9, $E + lea rax, [rax + r12*1] + xor r13, r14 + mov rdi, rbx + db $C4, $63, $FB, $F0, $E3, $27 // rorx r12, rbx, $27 + lea rax, [rax + r13*1] + xor rdi, rcx + db $C4, $63, $FB, $F0, $F3, $22 // rorx r14, rbx, $22 + db $C4, $63, $FB, $F0, $EB, $1C // rorx r13, rbx, $1C + lea r8, [r8 + rax*1] + and r15, rdi + xor r14, r12 + xor r15, rcx + xor r14, r13 + lea rax, [rax + r15*1] + mov r12, r9 + add r11, qword [rsp] + and r12, r8 + db $C4, $43, $FB, $F0, $E8, $29 // rorx r13, r8, $29 + db $C4, $43, $FB, $F0, $F8, $12 // rorx r15, r8, $12 + lea rax, [rax + r14*1] + lea r11, [r11 + r12*1] + db $C4, $42, $B8, $F2, $E2 // andn r12, r8, r10 + xor r13, r15 + db $C4, $43, $FB, $F0, $F0, $0E // rorx r14, r8, $E + lea r11, [r11 + r12*1] + xor r13, r14 + mov r15, rax + db $C4, $63, $FB, $F0, $E0, $27 // rorx r12, rax, $27 + lea r11, [r11 + r13*1] + xor r15, rbx + db $C4, $63, $FB, $F0, $F0, $22 // rorx r14, rax, $22 + db $C4, $63, $FB, $F0, $E8, $1C // rorx r13, rax, $1C + lea rdx, [rdx + r11*1] + and rdi, r15 + xor r14, r12 + xor rdi, rbx + xor r14, r13 + lea r11, [r11 + rdi*1] + mov r12, r8 + add r10, qword [rsp + $8] + and r12, rdx + db $C4, $63, $FB, $F0, $EA, $29 // rorx r13, rdx, $29 + db $C4, $E3, $FB, $F0, $FA, $12 // rorx rdi, rdx, $12 + lea r11, [r11 + r14*1] + lea r10, [r10 + r12*1] + db $C4, $42, $E8, $F2, $E1 // andn r12, rdx, r9 + xor r13, rdi + db $C4, $63, $FB, $F0, $F2, $0E // rorx r14, rdx, $E + lea r10, [r10 + r12*1] + xor r13, r14 + mov rdi, r11 + db $C4, $43, $FB, $F0, $E3, $27 // rorx r12, r11, $27 + lea r10, [r10 + r13*1] + xor rdi, rax + db $C4, $43, $FB, $F0, $F3, $22 // rorx r14, r11, $22 + db $C4, $43, $FB, $F0, $EB, $1C // rorx r13, r11, $1C + lea rcx, [rcx + r10*1] + and r15, rdi + xor r14, r12 + xor r15, rax + xor r14, r13 + lea r10, [r10 + r15*1] + mov r12, rdx + add r9, qword [rsp + $20] + and r12, rcx + db $C4, $63, $FB, $F0, $E9, $29 // rorx r13, rcx, $29 + db $C4, $63, $FB, $F0, $F9, $12 // rorx r15, rcx, $12 + lea r10, [r10 + r14*1] + lea r9, [r9 + r12*1] + db $C4, $42, $F0, $F2, $E0 // andn r12, rcx, r8 + xor r13, r15 + db $C4, $63, $FB, $F0, $F1, $0E // rorx r14, rcx, $E + lea r9, [r9 + r12*1] + xor r13, r14 + mov r15, r10 + db $C4, $43, $FB, $F0, $E2, $27 // rorx r12, r10, $27 + lea r9, [r9 + r13*1] + xor r15, r11 + db $C4, $43, $FB, $F0, $F2, $22 // rorx r14, r10, $22 + db $C4, $43, $FB, $F0, $EA, $1C // rorx r13, r10, $1C + lea rbx, [rbx + r9*1] + and rdi, r15 + xor r14, r12 + xor rdi, r11 + xor r14, r13 + lea r9, [r9 + rdi*1] + mov r12, rcx + add r8, qword [rsp + $28] + and r12, rbx + db $C4, $63, $FB, $F0, $EB, $29 // rorx r13, rbx, $29 + db $C4, $E3, $FB, $F0, $FB, $12 // rorx rdi, rbx, $12 + lea r9, [r9 + r14*1] + lea r8, [r8 + r12*1] + db $C4, $62, $E0, $F2, $E2 // andn r12, rbx, rdx + xor r13, rdi + db $C4, $63, $FB, $F0, $F3, $0E // rorx r14, rbx, $E + lea r8, [r8 + r12*1] + xor r13, r14 + mov rdi, r9 + db $C4, $43, $FB, $F0, $E1, $27 // rorx r12, r9, $27 + lea r8, [r8 + r13*1] + xor rdi, r10 + db $C4, $43, $FB, $F0, $F1, $22 // rorx r14, r9, $22 + db $C4, $43, $FB, $F0, $E9, $1C // rorx r13, r9, $1C + lea rax, [rax + r8*1] + and r15, rdi + xor r14, r12 + xor r15, r10 + xor r14, r13 + lea r8, [r8 + r15*1] + mov r12, rbx + add rdx, qword [rsp + $40] + and r12, rax + db $C4, $63, $FB, $F0, $E8, $29 // rorx r13, rax, $29 + db $C4, $63, $FB, $F0, $F8, $12 // rorx r15, rax, $12 + lea r8, [r8 + r14*1] + lea rdx, [rdx + r12*1] + db $C4, $62, $F8, $F2, $E1 // andn r12, rax, rcx + xor r13, r15 + db $C4, $63, $FB, $F0, $F0, $0E // rorx r14, rax, $E + lea rdx, [rdx + r12*1] + xor r13, r14 + mov r15, r8 + db $C4, $43, $FB, $F0, $E0, $27 // rorx r12, r8, $27 + lea rdx, [rdx + r13*1] + xor r15, r9 + db $C4, $43, $FB, $F0, $F0, $22 // rorx r14, r8, $22 + db $C4, $43, $FB, $F0, $E8, $1C // rorx r13, r8, $1C + lea r11, [r11 + rdx*1] + and rdi, r15 + xor r14, r12 + xor rdi, r9 + xor r14, r13 + lea rdx, [rdx + rdi*1] + mov r12, rax + add rcx, qword [rsp + $48] + and r12, r11 + db $C4, $43, $FB, $F0, $EB, $29 // rorx r13, r11, $29 + db $C4, $C3, $FB, $F0, $FB, $12 // rorx rdi, r11, $12 + lea rdx, [rdx + r14*1] + lea rcx, [rcx + r12*1] + db $C4, $62, $A0, $F2, $E3 // andn r12, r11, rbx + xor r13, rdi + db $C4, $43, $FB, $F0, $F3, $0E // rorx r14, r11, $E + lea rcx, [rcx + r12*1] + xor r13, r14 + mov rdi, rdx + db $C4, $63, $FB, $F0, $E2, $27 // rorx r12, rdx, $27 + lea rcx, [rcx + r13*1] + xor rdi, r8 + db $C4, $63, $FB, $F0, $F2, $22 // rorx r14, rdx, $22 + db $C4, $63, $FB, $F0, $EA, $1C // rorx r13, rdx, $1C + lea r10, [r10 + rcx*1] + and r15, rdi + xor r14, r12 + xor r15, r8 + xor r14, r13 + lea rcx, [rcx + r15*1] + mov r12, r11 + add rbx, qword [rsp + $60] + and r12, r10 + db $C4, $43, $FB, $F0, $EA, $29 // rorx r13, r10, $29 + db $C4, $43, $FB, $F0, $FA, $12 // rorx r15, r10, $12 + lea rcx, [rcx + r14*1] + lea rbx, [rbx + r12*1] + db $C4, $62, $A8, $F2, $E0 // andn r12, r10, rax + xor r13, r15 + db $C4, $43, $FB, $F0, $F2, $0E // rorx r14, r10, $E + lea rbx, [rbx + r12*1] + xor r13, r14 + mov r15, rcx + db $C4, $63, $FB, $F0, $E1, $27 // rorx r12, rcx, $27 + lea rbx, [rbx + r13*1] + xor r15, rdx + db $C4, $63, $FB, $F0, $F1, $22 // rorx r14, rcx, $22 + db $C4, $63, $FB, $F0, $E9, $1C // rorx r13, rcx, $1C + lea r9, [r9 + rbx*1] + and rdi, r15 + xor r14, r12 + xor rdi, rdx + xor r14, r13 + lea rbx, [rbx + rdi*1] + mov r12, r10 + add rax, qword [rsp + $68] + and r12, r9 + db $C4, $43, $FB, $F0, $E9, $29 // rorx r13, r9, $29 + db $C4, $C3, $FB, $F0, $F9, $12 // rorx rdi, r9, $12 + lea rbx, [rbx + r14*1] + lea rax, [rax + r12*1] + db $C4, $42, $B0, $F2, $E3 // andn r12, r9, r11 + xor r13, rdi + db $C4, $43, $FB, $F0, $F1, $0E // rorx r14, r9, $E + lea rax, [rax + r12*1] + xor r13, r14 + mov rdi, rbx + db $C4, $63, $FB, $F0, $E3, $27 // rorx r12, rbx, $27 + lea rax, [rax + r13*1] + xor rdi, rcx + db $C4, $63, $FB, $F0, $F3, $22 // rorx r14, rbx, $22 + db $C4, $63, $FB, $F0, $EB, $1C // rorx r13, rbx, $1C + lea r8, [r8 + rax*1] + and r15, rdi + xor r14, r12 + xor r15, rcx + xor r14, r13 + lea rax, [rax + r15*1] + mov r12, r9 + mov rdi, qword [rsp + $500] + add rax, r14 + lea rbp, [rsp + $480] + add rax, qword [rdi] + add rbx, qword [rdi + $8] + add rcx, qword [rdi + $10] + add rdx, qword [rdi + $18] + add r8, qword [rdi + $20] + add r9, qword [rdi + $28] + add r10, qword [rdi + $30] + add r11, qword [rdi + $38] + mov qword [rdi], rax + mov qword [rdi + $8], rbx + mov qword [rdi + $10], rcx + mov qword [rdi + $18], rdx + mov qword [rdi + $20], r8 + mov qword [rdi + $28], r9 + mov qword [rdi + $30], r10 + mov qword [rdi + $38], r11 + cmp rsi, qword [rbp + $90] + je @done + xor r14, r14 + mov rdi, rbx + xor rdi, rcx + mov r12, r9 + jmp @tail_loop - mov rbx, [rsp + $00] - mov rbp, [rsp + $08] - mov r12, [rsp + $20] - mov r13, [rsp + $28] - mov r14, [rsp + $30] - mov r15, [rsp + $38] - mov rdi, [rsp + $10] - mov rsi, [rsp + $18] - add rsp, 984 +@tail_loop: + add r11, qword [rbp + $10] + and r12, r8 + db $C4, $43, $FB, $F0, $E8, $29 // rorx r13, r8, $29 + db $C4, $43, $FB, $F0, $F8, $12 // rorx r15, r8, $12 + lea rax, [rax + r14*1] + lea r11, [r11 + r12*1] + db $C4, $42, $B8, $F2, $E2 // andn r12, r8, r10 + xor r13, r15 + db $C4, $43, $FB, $F0, $F0, $0E // rorx r14, r8, $E + lea r11, [r11 + r12*1] + xor r13, r14 + mov r15, rax + db $C4, $63, $FB, $F0, $E0, $27 // rorx r12, rax, $27 + lea r11, [r11 + r13*1] + xor r15, rbx + db $C4, $63, $FB, $F0, $F0, $22 // rorx r14, rax, $22 + db $C4, $63, $FB, $F0, $E8, $1C // rorx r13, rax, $1C + lea rdx, [rdx + r11*1] + and rdi, r15 + xor r14, r12 + xor rdi, rbx + xor r14, r13 + lea r11, [r11 + rdi*1] + mov r12, r8 + add r10, qword [rbp + $18] + and r12, rdx + db $C4, $63, $FB, $F0, $EA, $29 // rorx r13, rdx, $29 + db $C4, $E3, $FB, $F0, $FA, $12 // rorx rdi, rdx, $12 + lea r11, [r11 + r14*1] + lea r10, [r10 + r12*1] + db $C4, $42, $E8, $F2, $E1 // andn r12, rdx, r9 + xor r13, rdi + db $C4, $63, $FB, $F0, $F2, $0E // rorx r14, rdx, $E + lea r10, [r10 + r12*1] + xor r13, r14 + mov rdi, r11 + db $C4, $43, $FB, $F0, $E3, $27 // rorx r12, r11, $27 + lea r10, [r10 + r13*1] + xor rdi, rax + db $C4, $43, $FB, $F0, $F3, $22 // rorx r14, r11, $22 + db $C4, $43, $FB, $F0, $EB, $1C // rorx r13, r11, $1C + lea rcx, [rcx + r10*1] + and r15, rdi + xor r14, r12 + xor r15, rax + xor r14, r13 + lea r10, [r10 + r15*1] + mov r12, rdx + add r9, qword [rbp + $30] + and r12, rcx + db $C4, $63, $FB, $F0, $E9, $29 // rorx r13, rcx, $29 + db $C4, $63, $FB, $F0, $F9, $12 // rorx r15, rcx, $12 + lea r10, [r10 + r14*1] + lea r9, [r9 + r12*1] + db $C4, $42, $F0, $F2, $E0 // andn r12, rcx, r8 + xor r13, r15 + db $C4, $63, $FB, $F0, $F1, $0E // rorx r14, rcx, $E + lea r9, [r9 + r12*1] + xor r13, r14 + mov r15, r10 + db $C4, $43, $FB, $F0, $E2, $27 // rorx r12, r10, $27 + lea r9, [r9 + r13*1] + xor r15, r11 + db $C4, $43, $FB, $F0, $F2, $22 // rorx r14, r10, $22 + db $C4, $43, $FB, $F0, $EA, $1C // rorx r13, r10, $1C + lea rbx, [rbx + r9*1] + and rdi, r15 + xor r14, r12 + xor rdi, r11 + xor r14, r13 + lea r9, [r9 + rdi*1] + mov r12, rcx + add r8, qword [rbp + $38] + and r12, rbx + db $C4, $63, $FB, $F0, $EB, $29 // rorx r13, rbx, $29 + db $C4, $E3, $FB, $F0, $FB, $12 // rorx rdi, rbx, $12 + lea r9, [r9 + r14*1] + lea r8, [r8 + r12*1] + db $C4, $62, $E0, $F2, $E2 // andn r12, rbx, rdx + xor r13, rdi + db $C4, $63, $FB, $F0, $F3, $0E // rorx r14, rbx, $E + lea r8, [r8 + r12*1] + xor r13, r14 + mov rdi, r9 + db $C4, $43, $FB, $F0, $E1, $27 // rorx r12, r9, $27 + lea r8, [r8 + r13*1] + xor rdi, r10 + db $C4, $43, $FB, $F0, $F1, $22 // rorx r14, r9, $22 + db $C4, $43, $FB, $F0, $E9, $1C // rorx r13, r9, $1C + lea rax, [rax + r8*1] + and r15, rdi + xor r14, r12 + xor r15, r10 + xor r14, r13 + lea r8, [r8 + r15*1] + mov r12, rbx + add rdx, qword [rbp + $50] + and r12, rax + db $C4, $63, $FB, $F0, $E8, $29 // rorx r13, rax, $29 + db $C4, $63, $FB, $F0, $F8, $12 // rorx r15, rax, $12 + lea r8, [r8 + r14*1] + lea rdx, [rdx + r12*1] + db $C4, $62, $F8, $F2, $E1 // andn r12, rax, rcx + xor r13, r15 + db $C4, $63, $FB, $F0, $F0, $0E // rorx r14, rax, $E + lea rdx, [rdx + r12*1] + xor r13, r14 + mov r15, r8 + db $C4, $43, $FB, $F0, $E0, $27 // rorx r12, r8, $27 + lea rdx, [rdx + r13*1] + xor r15, r9 + db $C4, $43, $FB, $F0, $F0, $22 // rorx r14, r8, $22 + db $C4, $43, $FB, $F0, $E8, $1C // rorx r13, r8, $1C + lea r11, [r11 + rdx*1] + and rdi, r15 + xor r14, r12 + xor rdi, r9 + xor r14, r13 + lea rdx, [rdx + rdi*1] + mov r12, rax + add rcx, qword [rbp + $58] + and r12, r11 + db $C4, $43, $FB, $F0, $EB, $29 // rorx r13, r11, $29 + db $C4, $C3, $FB, $F0, $FB, $12 // rorx rdi, r11, $12 + lea rdx, [rdx + r14*1] + lea rcx, [rcx + r12*1] + db $C4, $62, $A0, $F2, $E3 // andn r12, r11, rbx + xor r13, rdi + db $C4, $43, $FB, $F0, $F3, $0E // rorx r14, r11, $E + lea rcx, [rcx + r12*1] + xor r13, r14 + mov rdi, rdx + db $C4, $63, $FB, $F0, $E2, $27 // rorx r12, rdx, $27 + lea rcx, [rcx + r13*1] + xor rdi, r8 + db $C4, $63, $FB, $F0, $F2, $22 // rorx r14, rdx, $22 + db $C4, $63, $FB, $F0, $EA, $1C // rorx r13, rdx, $1C + lea r10, [r10 + rcx*1] + and r15, rdi + xor r14, r12 + xor r15, r8 + xor r14, r13 + lea rcx, [rcx + r15*1] + mov r12, r11 + add rbx, qword [rbp + $70] + and r12, r10 + db $C4, $43, $FB, $F0, $EA, $29 // rorx r13, r10, $29 + db $C4, $43, $FB, $F0, $FA, $12 // rorx r15, r10, $12 + lea rcx, [rcx + r14*1] + lea rbx, [rbx + r12*1] + db $C4, $62, $A8, $F2, $E0 // andn r12, r10, rax + xor r13, r15 + db $C4, $43, $FB, $F0, $F2, $0E // rorx r14, r10, $E + lea rbx, [rbx + r12*1] + xor r13, r14 + mov r15, rcx + db $C4, $63, $FB, $F0, $E1, $27 // rorx r12, rcx, $27 + lea rbx, [rbx + r13*1] + xor r15, rdx + db $C4, $63, $FB, $F0, $F1, $22 // rorx r14, rcx, $22 + db $C4, $63, $FB, $F0, $E9, $1C // rorx r13, rcx, $1C + lea r9, [r9 + rbx*1] + and rdi, r15 + xor r14, r12 + xor rdi, rdx + xor r14, r13 + lea rbx, [rbx + rdi*1] + mov r12, r10 + add rax, qword [rbp + $78] + and r12, r9 + db $C4, $43, $FB, $F0, $E9, $29 // rorx r13, r9, $29 + db $C4, $C3, $FB, $F0, $F9, $12 // rorx rdi, r9, $12 + lea rbx, [rbx + r14*1] + lea rax, [rax + r12*1] + db $C4, $42, $B0, $F2, $E3 // andn r12, r9, r11 + xor r13, rdi + db $C4, $43, $FB, $F0, $F1, $0E // rorx r14, r9, $E + lea rax, [rax + r12*1] + xor r13, r14 + mov rdi, rbx + db $C4, $63, $FB, $F0, $E3, $27 // rorx r12, rbx, $27 + lea rax, [rax + r13*1] + xor rdi, rcx + db $C4, $63, $FB, $F0, $F3, $22 // rorx r14, rbx, $22 + db $C4, $63, $FB, $F0, $EB, $1C // rorx r13, rbx, $1C + lea r8, [r8 + rax*1] + and r15, rdi + xor r14, r12 + xor r15, rcx + xor r14, r13 + lea rax, [rax + r15*1] + mov r12, r9 + lea rbp, [rbp - $80] + cmp rbp, rsp + jae @tail_loop + mov rdi, qword [rsp + $500] + add rax, r14 + lea rsp, [rsp + $480] + add rax, qword [rdi] + add rbx, qword [rdi + $8] + add rcx, qword [rdi + $10] + add rdx, qword [rdi + $18] + add r8, qword [rdi + $20] + add r9, qword [rdi + $28] + lea rsi, [rsi + $100] + add r10, qword [rdi + $30] + mov r12, rsi + add r11, qword [rdi + $38] + cmp rsi, qword [rsp + $90] + mov qword [rdi], rax + cmove r12, rsp + mov qword [rdi + $8], rbx + mov qword [rdi + $10], rcx + mov qword [rdi + $18], rdx + mov qword [rdi + $20], r8 + mov qword [rdi + $28], r9 + mov qword [rdi + $30], r10 + mov qword [rdi + $38], r11 + jbe @block_loop + lea rbp, [rsp] - db $C5, $F8, $77 // vzeroupper +@done: + mov rsi, qword [rbp + $98] + db $C5, $F8, $77 // vzeroupper + mov r15, qword [rsi - $48] + mov r14, qword [rsi - $40] + mov r13, qword [rsi - $38] + mov r12, qword [rsi - $30] + mov rdi, qword [rsi - $28] + mov rbp, qword [rsi - $18] + mov rbx, qword [rsi - $10] + mov rax, qword [rsi - $20] + lea rsp, [rsi] + mov rsi, rax {$I ..\Include\Simd\Common\SimdNonVolatileRestore_x86_64.inc} diff --git a/HashLib/src/Include/Simd/SHA512/SHA512CompressSse2_i386.inc b/HashLib/src/Include/Simd/SHA512/SHA512CompressSse2_i386.inc index 1b8b413a..bb128372 100644 --- a/HashLib/src/Include/Simd/SHA512/SHA512CompressSse2_i386.inc +++ b/HashLib/src/Include/Simd/SHA512/SHA512CompressSse2_i386.inc @@ -1,1338 +1,382 @@ -// SHA-512 SSE2 implementation (IA-32). -// Based on SHA512CompressSse2_x86_64.inc (x86-64); same algorithm. -// IA-32: after SimdProc4Begin_i386 — ebx = state, esi = data, edi = numblocks, eax = K512 ptr -// (parallel to MS x64 ABI: rcx, rdx, r8d, r9). -// K512: 80 UInt64 round constants (640 bytes). -// Phase 1: SSE2 xmm0/xmm4; ebx = W ring @ [esp+$2F0], ebp = W+K @ [esp+$70]. -// Phase 2: rax..r11 in [esp+880]..[esp+936] (8 qwords). -// Scratch: expand [esp+$3B8]..$3E0; shrd [esp+1000]/[esp+1004]; and M,M [esp+1008]..1015. -// After expand, [esp+$3BC] = W+K end ptr (K512 ptr only during expand); x64 r15 equivalent. - - - sub esp, 1016 - - movdqu oword ptr [esp], xmm6 - movdqu oword ptr [esp + $10], xmm7 - mov dword ptr [esp + $20], ebx - mov dword ptr [esp + $24], esi - mov dword ptr [esp + $28], edi - mov dword ptr [esp + $2C], eax - mov dword ptr [esp + $30], ebp - - cmp dword ptr [esp + $28], 0 - jz @sse2_512_done - -@sse2_512_block_loop: - mov eax, dword ptr [esp + $2C] - lea ebp, [esp + $70] - lea ebx, [esp + $2F0] - mov esi, dword ptr [esp + $24] - - movdqu xmm0, oword ptr [esi+$0] - pshuflw xmm0, xmm0, $1B - pshufhw xmm0, xmm0, $1B - movdqa xmm4, xmm0 - psrlw xmm0, 8 - psllw xmm4, 8 - por xmm0, xmm4 - movdqu oword ptr [ebx+$0], xmm0 - movdqu xmm4, oword ptr [eax+$0] - paddq xmm4, xmm0 - movdqu oword ptr [ebp+$0], xmm4 - - movdqu xmm0, oword ptr [esi+$10] - pshuflw xmm0, xmm0, $1B - pshufhw xmm0, xmm0, $1B - movdqa xmm4, xmm0 - psrlw xmm0, 8 - psllw xmm4, 8 - por xmm0, xmm4 - movdqu oword ptr [ebx+$10], xmm0 - movdqu xmm4, oword ptr [eax+$10] - paddq xmm4, xmm0 - movdqu oword ptr [ebp+$10], xmm4 - - movdqu xmm0, oword ptr [esi+$20] - pshuflw xmm0, xmm0, $1B - pshufhw xmm0, xmm0, $1B - movdqa xmm4, xmm0 - psrlw xmm0, 8 - psllw xmm4, 8 - por xmm0, xmm4 - movdqu oword ptr [ebx+$20], xmm0 - movdqu xmm4, oword ptr [eax+$20] - paddq xmm4, xmm0 - movdqu oword ptr [ebp+$20], xmm4 - - movdqu xmm0, oword ptr [esi+$30] - pshuflw xmm0, xmm0, $1B - pshufhw xmm0, xmm0, $1B - movdqa xmm4, xmm0 - psrlw xmm0, 8 - psllw xmm4, 8 - por xmm0, xmm4 - movdqu oword ptr [ebx+$30], xmm0 - movdqu xmm4, oword ptr [eax+$30] - paddq xmm4, xmm0 - movdqu oword ptr [ebp+$30], xmm4 - - movdqu xmm0, oword ptr [esi+$40] - pshuflw xmm0, xmm0, $1B - pshufhw xmm0, xmm0, $1B - movdqa xmm4, xmm0 - psrlw xmm0, 8 - psllw xmm4, 8 - por xmm0, xmm4 - movdqu oword ptr [ebx+$40], xmm0 - movdqu xmm4, oword ptr [eax+$40] - paddq xmm4, xmm0 - movdqu oword ptr [ebp+$40], xmm4 - - movdqu xmm0, oword ptr [esi+$50] - pshuflw xmm0, xmm0, $1B - pshufhw xmm0, xmm0, $1B - movdqa xmm4, xmm0 - psrlw xmm0, 8 - psllw xmm4, 8 - por xmm0, xmm4 - movdqu oword ptr [ebx+$50], xmm0 - movdqu xmm4, oword ptr [eax+$50] - paddq xmm4, xmm0 - movdqu oword ptr [ebp+$50], xmm4 - - movdqu xmm0, oword ptr [esi+$60] - pshuflw xmm0, xmm0, $1B - pshufhw xmm0, xmm0, $1B - movdqa xmm4, xmm0 - psrlw xmm0, 8 - psllw xmm4, 8 - por xmm0, xmm4 - movdqu oword ptr [ebx+$60], xmm0 - movdqu xmm4, oword ptr [eax+$60] - paddq xmm4, xmm0 - movdqu oword ptr [ebp+$60], xmm4 - - movdqu xmm0, oword ptr [esi+$70] - pshuflw xmm0, xmm0, $1B - pshufhw xmm0, xmm0, $1B - movdqa xmm4, xmm0 - psrlw xmm0, 8 - psllw xmm4, 8 - por xmm0, xmm4 - movdqu oword ptr [ebx+$70], xmm0 - movdqu xmm4, oword ptr [eax+$70] +// SHA-512 SSE2 implementation (IA-32), derived from OpenSSL's sha512-586 +// (CRYPTOGAMS). The 64-bit state and message schedule are held in xmm0-xmm7 (low +// 64 bits) and computed entirely in SSE2 (paddq/psrlq/psllq/pxor), so the whole +// hash runs in the vector unit - avoiding IA-32's 32-bit-GPR bottleneck. +// Expects (after SimdProc4Begin_i386): ebx = state, esi = data, edi = numblocks, +// eax = K512 ptr (80 UInt64). SimdProc4Begin pushes ebx/esi/edi; ebp is pushed +// here as the K512 walk pointer; state is loaded into xmm0-xmm7. + + push ebp + mov ebp, eax + mov eax, edi + mov edi, esi + mov esi, ebx + mov ebx, esp + sub esp, $10 + and esp, $FFFFFFC0 + shl eax, $7 + add eax, edi + mov dword [esp], esi + mov dword [esp + $4], edi + mov dword [esp + $8], eax + mov dword [esp + $C], ebx + movq xmm0, qword [esi] + movq xmm1, qword [esi + $8] + movq xmm2, qword [esi + $10] + movq xmm3, qword [esi + $18] + movq xmm4, qword [esi + $20] + movq xmm5, qword [esi + $28] + movq xmm6, qword [esi + $30] + movq xmm7, qword [esi + $38] + sub esp, $50 + jmp @loop + +@loop: + movq qword [esp + $8], xmm1 + movq qword [esp + $10], xmm2 + movq qword [esp + $18], xmm3 + movq qword [esp + $28], xmm5 + movq qword [esp + $30], xmm6 + pxor xmm2, xmm1 + movq qword [esp + $38], xmm7 + movdqa xmm3, xmm0 + mov eax, dword [edi] + mov ebx, dword [edi + $4] + add edi, $8 + mov edx, $F + bswap eax + bswap ebx + jmp @rounds_00_14 + +@rounds_00_14: + movd xmm1, eax + mov eax, dword [edi] + movd xmm7, ebx + mov ebx, dword [edi + $4] + add edi, $8 + bswap eax + bswap ebx + punpckldq xmm7, xmm1 + movdqa xmm1, xmm4 + pxor xmm5, xmm6 + psrlq xmm1, $E + movq qword [esp + $20], xmm4 + pand xmm5, xmm4 + psllq xmm4, $17 + movdqa xmm0, xmm3 + movq qword [esp + $48], xmm7 + movdqa xmm3, xmm1 + psrlq xmm1, $4 + pxor xmm5, xmm6 + pxor xmm3, xmm4 + psllq xmm4, $17 + pxor xmm3, xmm1 + movq qword [esp], xmm0 + paddq xmm7, xmm5 + pxor xmm3, xmm4 + psrlq xmm1, $17 + movq xmm5, qword [esp + $38] + paddq xmm7, xmm5 + pxor xmm3, xmm1 + psllq xmm4, $4 + movq xmm1, qword [ebp + $0] + paddq xmm7, xmm1 + pxor xmm3, xmm4 + movq xmm4, qword [esp + $18] + paddq xmm3, xmm7 + movdqa xmm5, xmm0 + psrlq xmm5, $1C + paddq xmm4, xmm3 + movdqa xmm6, xmm0 + movdqa xmm7, xmm5 + psllq xmm6, $19 + movq xmm1, qword [esp + $8] + psrlq xmm5, $6 + pxor xmm7, xmm6 + sub esp, $8 + psllq xmm6, $5 + pxor xmm7, xmm5 + pxor xmm0, xmm1 + psrlq xmm5, $5 + pxor xmm7, xmm6 + pand xmm2, xmm0 + psllq xmm6, $6 + pxor xmm7, xmm5 + pxor xmm2, xmm1 + pxor xmm6, xmm7 + movq xmm5, qword [esp + $28] + paddq xmm3, xmm2 + movdqa xmm2, xmm0 + add ebp, $8 + paddq xmm3, xmm6 + movq xmm6, qword [esp + $30] + dec edx + jnz @rounds_00_14 + movd xmm1, eax + movd xmm7, ebx + punpckldq xmm7, xmm1 + movdqa xmm1, xmm4 + pxor xmm5, xmm6 + psrlq xmm1, $E + movq qword [esp + $20], xmm4 + pand xmm5, xmm4 + psllq xmm4, $17 + movdqa xmm0, xmm3 + movq qword [esp + $48], xmm7 + movdqa xmm3, xmm1 + psrlq xmm1, $4 + pxor xmm5, xmm6 + pxor xmm3, xmm4 + psllq xmm4, $17 + pxor xmm3, xmm1 + movq qword [esp], xmm0 + paddq xmm7, xmm5 + pxor xmm3, xmm4 + psrlq xmm1, $17 + movq xmm5, qword [esp + $38] + paddq xmm7, xmm5 + pxor xmm3, xmm1 + psllq xmm4, $4 + movq xmm1, qword [ebp + $0] + paddq xmm7, xmm1 + pxor xmm3, xmm4 + movq xmm4, qword [esp + $18] + paddq xmm3, xmm7 + movdqa xmm5, xmm0 + psrlq xmm5, $1C + paddq xmm4, xmm3 + movdqa xmm6, xmm0 + movdqa xmm7, xmm5 + psllq xmm6, $19 + movq xmm1, qword [esp + $8] + psrlq xmm5, $6 + pxor xmm7, xmm6 + sub esp, $8 + psllq xmm6, $5 + pxor xmm7, xmm5 + pxor xmm0, xmm1 + psrlq xmm5, $5 + pxor xmm7, xmm6 + pand xmm2, xmm0 + psllq xmm6, $6 + pxor xmm7, xmm5 + pxor xmm2, xmm1 + pxor xmm6, xmm7 + movq xmm7, qword [esp + $C0] + paddq xmm3, xmm2 + movdqa xmm2, xmm0 + add ebp, $8 + paddq xmm3, xmm6 + pxor xmm0, xmm0 + mov edx, $20 + jmp @rounds_16_79 + +@rounds_16_79: + movq xmm5, qword [esp + $58] + movdqa xmm1, xmm7 + psrlq xmm7, $1 + movdqa xmm6, xmm5 + psrlq xmm5, $6 + psllq xmm1, $38 + paddq xmm0, xmm3 + movdqa xmm3, xmm7 + psrlq xmm7, $6 + pxor xmm3, xmm1 + psllq xmm1, $7 + pxor xmm3, xmm7 + psrlq xmm7, $1 + pxor xmm3, xmm1 + movdqa xmm1, xmm5 + psrlq xmm5, $D + pxor xmm7, xmm3 + psllq xmm6, $3 + pxor xmm1, xmm5 + movq xmm3, qword [esp + $C8] + paddq xmm7, xmm3 + pxor xmm1, xmm6 + psrlq xmm5, $2A + movq xmm3, qword [esp + $80] + paddq xmm7, xmm3 + pxor xmm1, xmm5 + psllq xmm6, $2A + movq xmm5, qword [esp + $28] + pxor xmm1, xmm6 + movq xmm6, qword [esp + $30] + paddq xmm7, xmm1 + movdqa xmm1, xmm4 + pxor xmm5, xmm6 + psrlq xmm1, $E + movq qword [esp + $20], xmm4 + pand xmm5, xmm4 + psllq xmm4, $17 + movq qword [esp + $48], xmm7 + movdqa xmm3, xmm1 + psrlq xmm1, $4 + pxor xmm5, xmm6 + pxor xmm3, xmm4 + psllq xmm4, $17 + pxor xmm3, xmm1 + movq qword [esp], xmm0 + paddq xmm7, xmm5 + pxor xmm3, xmm4 + psrlq xmm1, $17 + movq xmm5, qword [esp + $38] + paddq xmm7, xmm5 + pxor xmm3, xmm1 + psllq xmm4, $4 + movq xmm1, qword [ebp + $0] + paddq xmm7, xmm1 + pxor xmm3, xmm4 + movq xmm4, qword [esp + $18] + paddq xmm3, xmm7 + movdqa xmm5, xmm0 + psrlq xmm5, $1C + paddq xmm4, xmm3 + movdqa xmm6, xmm0 + movdqa xmm7, xmm5 + psllq xmm6, $19 + movq xmm1, qword [esp + $8] + psrlq xmm5, $6 + pxor xmm7, xmm6 + sub esp, $8 + psllq xmm6, $5 + pxor xmm7, xmm5 + pxor xmm0, xmm1 + psrlq xmm5, $5 + pxor xmm7, xmm6 + pand xmm2, xmm0 + psllq xmm6, $6 + pxor xmm7, xmm5 + pxor xmm2, xmm1 + pxor xmm6, xmm7 + movq xmm7, qword [esp + $C0] + paddq xmm2, xmm6 + add ebp, $8 + movq xmm5, qword [esp + $58] + movdqa xmm1, xmm7 + psrlq xmm7, $1 + movdqa xmm6, xmm5 + psrlq xmm5, $6 + psllq xmm1, $38 + paddq xmm2, xmm3 + movdqa xmm3, xmm7 + psrlq xmm7, $6 + pxor xmm3, xmm1 + psllq xmm1, $7 + pxor xmm3, xmm7 + psrlq xmm7, $1 + pxor xmm3, xmm1 + movdqa xmm1, xmm5 + psrlq xmm5, $D + pxor xmm7, xmm3 + psllq xmm6, $3 + pxor xmm1, xmm5 + movq xmm3, qword [esp + $C8] + paddq xmm7, xmm3 + pxor xmm1, xmm6 + psrlq xmm5, $2A + movq xmm3, qword [esp + $80] + paddq xmm7, xmm3 + pxor xmm1, xmm5 + psllq xmm6, $2A + movq xmm5, qword [esp + $28] + pxor xmm1, xmm6 + movq xmm6, qword [esp + $30] + paddq xmm7, xmm1 + movdqa xmm1, xmm4 + pxor xmm5, xmm6 + psrlq xmm1, $E + movq qword [esp + $20], xmm4 + pand xmm5, xmm4 + psllq xmm4, $17 + movq qword [esp + $48], xmm7 + movdqa xmm3, xmm1 + psrlq xmm1, $4 + pxor xmm5, xmm6 + pxor xmm3, xmm4 + psllq xmm4, $17 + pxor xmm3, xmm1 + movq qword [esp], xmm2 + paddq xmm7, xmm5 + pxor xmm3, xmm4 + psrlq xmm1, $17 + movq xmm5, qword [esp + $38] + paddq xmm7, xmm5 + pxor xmm3, xmm1 + psllq xmm4, $4 + movq xmm1, qword [ebp + $0] + paddq xmm7, xmm1 + pxor xmm3, xmm4 + movq xmm4, qword [esp + $18] + paddq xmm3, xmm7 + movdqa xmm5, xmm2 + psrlq xmm5, $1C + paddq xmm4, xmm3 + movdqa xmm6, xmm2 + movdqa xmm7, xmm5 + psllq xmm6, $19 + movq xmm1, qword [esp + $8] + psrlq xmm5, $6 + pxor xmm7, xmm6 + sub esp, $8 + psllq xmm6, $5 + pxor xmm7, xmm5 + pxor xmm2, xmm1 + psrlq xmm5, $5 + pxor xmm7, xmm6 + pand xmm0, xmm2 + psllq xmm6, $6 + pxor xmm7, xmm5 + pxor xmm0, xmm1 + pxor xmm6, xmm7 + movq xmm7, qword [esp + $C0] + paddq xmm0, xmm6 + add ebp, $8 + dec edx + jnz @rounds_16_79 + paddq xmm0, xmm3 + movq xmm1, qword [esp + $8] + movq xmm3, qword [esp + $18] + movq xmm5, qword [esp + $28] + movq xmm6, qword [esp + $30] + movq xmm7, qword [esp + $38] + pxor xmm2, xmm1 + sub esp, $8 + movq qword [esp], xmm7 + movq xmm7, qword [esi] + paddq xmm0, xmm7 + movq qword [esi], xmm0 + movq xmm0, qword [esi + $8] + paddq xmm1, xmm0 + movq qword [esi + $8], xmm1 + movq xmm0, qword [esi + $10] + paddq xmm2, xmm0 + movq qword [esi + $10], xmm2 + movq xmm0, qword [esi + $18] + paddq xmm3, xmm0 + movq qword [esi + $18], xmm3 + movq xmm0, qword [esi + $20] paddq xmm4, xmm0 - movdqu oword ptr [ebp+$70], xmm4 - - mov dword ptr [esp + $3BC], eax - - mov dword ptr [esp + $3B8], 16 - -@sse2_512_expand_loop: - mov ecx, dword ptr [esp + $3B8] - mov edx, ecx - sub edx, 2 - and edx, 15 - mov esi, dword ptr [ebx+edx*8] - mov edi, dword ptr [ebx+edx*8+4] - - mov eax, esi - mov edx, edi - mov dword ptr [esp + $3E0], ecx - mov ecx, eax - shrd eax, edx, 19 - shrd edx, ecx, 19 - mov ecx, dword ptr [esp + $3E0] - mov dword ptr [esp + $3C0], eax - mov dword ptr [esp + $3C4], edx - - mov eax, esi - mov edx, edi - mov dword ptr [esp + $3E0], ecx - xchg eax, edx - mov ecx, eax - shrd eax, edx, 29 - shrd edx, ecx, 29 - mov ecx, dword ptr [esp + $3E0] - xor dword ptr [esp + $3C0], eax - xor dword ptr [esp + $3C4], edx - - mov eax, esi - mov edx, edi - shrd eax, edx, 6 - shr edx, 6 - xor dword ptr [esp + $3C0], eax - xor dword ptr [esp + $3C4], edx - - mov ecx, dword ptr [esp + $3B8] - mov esi, ecx - sub esi, 7 - and esi, 15 - mov eax, dword ptr [ebx+esi*8] - mov edx, dword ptr [ebx+esi*8+4] - add eax, dword ptr [esp + $3C0] - adc edx, dword ptr [esp + $3C4] - mov dword ptr [esp + $3C0], eax - mov dword ptr [esp + $3C4], edx - - mov ecx, dword ptr [esp + $3B8] - mov esi, ecx - sub esi, 15 - and esi, 15 - mov eax, dword ptr [ebx+esi*8] - mov edx, dword ptr [ebx+esi*8+4] - - mov esi, eax - mov edi, edx - mov eax, esi - mov edx, edi - mov dword ptr [esp + $3E0], ecx - mov ecx, eax - shrd eax, edx, 1 - shrd edx, ecx, 1 - mov ecx, dword ptr [esp + $3E0] - mov dword ptr [esp + $3C8], eax - mov dword ptr [esp + $3CC], edx - - mov eax, esi - mov edx, edi - mov dword ptr [esp + $3E0], ecx - mov ecx, eax - shrd eax, edx, 8 - shrd edx, ecx, 8 - mov ecx, dword ptr [esp + $3E0] - xor dword ptr [esp + $3C8], eax - xor dword ptr [esp + $3CC], edx - - mov eax, esi - mov edx, edi - shrd eax, edx, 7 - shr edx, 7 - xor dword ptr [esp + $3C8], eax - xor dword ptr [esp + $3CC], edx - - mov eax, dword ptr [esp + $3C0] - mov edx, dword ptr [esp + $3C4] - add eax, dword ptr [esp + $3C8] - adc edx, dword ptr [esp + $3CC] - mov dword ptr [esp + $3C0], eax - mov dword ptr [esp + $3C4], edx - - mov ecx, dword ptr [esp + $3B8] - mov esi, ecx - sub esi, 16 - and esi, 15 - add eax, dword ptr [ebx+esi*8] - adc edx, dword ptr [ebx+esi*8+4] - - mov ecx, dword ptr [esp + $3B8] - mov esi, ecx - and esi, 15 - mov dword ptr [ebx+esi*8], eax - mov dword ptr [ebx+esi*8+4], edx - - mov dword ptr [esp + $3D0], eax - mov dword ptr [esp + $3D4], edx - mov ecx, dword ptr [esp + $3B8] - mov eax, dword ptr [esp + $3BC] - mov esi, dword ptr [eax+ecx*8] - mov edi, dword ptr [eax+ecx*8+4] - add esi, dword ptr [esp + $3D0] - adc edi, dword ptr [esp + $3D4] - mov dword ptr [ebp+ecx*8], esi - mov dword ptr [ebp+ecx*8+4], edi - - inc dword ptr [esp + $3B8] - mov ecx, dword ptr [esp + $3B8] - cmp ecx, 80 - jb @sse2_512_expand_loop - mov esi, dword ptr [esp+$20] - mov eax, dword ptr [esi+$0] - mov edx, dword ptr [esi+$0+4] - mov dword ptr [esp+880], eax - mov dword ptr [esp+880+4], edx - mov eax, dword ptr [esi+$8] - mov edx, dword ptr [esi+$8+4] - mov dword ptr [esp+888], eax - mov dword ptr [esp+888+4], edx - mov eax, dword ptr [esi+$10] - mov edx, dword ptr [esi+$10+4] - mov dword ptr [esp+896], eax - mov dword ptr [esp+896+4], edx - mov eax, dword ptr [esi+$18] - mov edx, dword ptr [esi+$18+4] - mov dword ptr [esp+904], eax - mov dword ptr [esp+904+4], edx - mov eax, dword ptr [esi+$20] - mov edx, dword ptr [esi+$20+4] - mov dword ptr [esp+912], eax - mov dword ptr [esp+912+4], edx - mov eax, dword ptr [esi+$28] - mov edx, dword ptr [esi+$28+4] - mov dword ptr [esp+920], eax - mov dword ptr [esp+920+4], edx - mov eax, dword ptr [esi+$30] - mov edx, dword ptr [esi+$30+4] - mov dword ptr [esp+928], eax - mov dword ptr [esp+928+4], edx - mov eax, dword ptr [esi+$38] - mov edx, dword ptr [esi+$38+4] - mov dword ptr [esp+936], eax - mov dword ptr [esp+936+4], edx - - lea eax, [ebp + $280] - mov dword ptr [esp + $3BC], eax - -@sse2_512_round_loop: - mov esi, dword ptr [esp+912] - mov edi, dword ptr [esp+912+4] - mov ebx, dword ptr [esp+912] - mov ecx, dword ptr [esp+912+4] - mov dword ptr [esp+1000], esi - shrd esi, edi, 14 - mov eax, dword ptr [esp+1000] - shrd edi, eax, 14 - mov dword ptr [esp+1000], ebx - shrd ebx, ecx, 18 - mov eax, dword ptr [esp+1000] - shrd ecx, eax, 18 - xor esi, ebx - xor edi, ecx - mov dword ptr [esp+1000], ebx - shrd ebx, ecx, 23 - mov eax, dword ptr [esp+1000] - shrd ecx, eax, 23 - xor esi, ebx - xor edi, ecx - mov ebx, dword ptr [esp+920] - mov ecx, dword ptr [esp+920+4] - mov eax, dword ptr [esp+928] - mov edx, dword ptr [esp+928+4] - xor ebx, eax - xor ecx, edx - mov eax, dword ptr [esp+912] - mov edx, dword ptr [esp+912+4] - and ebx, eax - and ecx, edx - mov eax, dword ptr [esp+928] - mov edx, dword ptr [esp+928+4] - xor ebx, eax - xor ecx, edx - mov eax, dword ptr [esp+936] - mov edx, dword ptr [esp+936+4] - add esi, eax - adc edi, edx - add esi, ebx - adc edi, ecx - add esi, dword ptr [ebp+0] - adc edi, dword ptr [ebp+0+4] - mov eax, dword ptr [esp+904] - mov edx, dword ptr [esp+904+4] - add eax, esi - adc edx, edi - mov dword ptr [esp+904], eax - mov dword ptr [esp+904+4], edx - mov ebx, dword ptr [esp+880] - mov ecx, dword ptr [esp+880+4] - mov eax, dword ptr [esp+880] - mov edx, dword ptr [esp+880+4] - mov dword ptr [esp+936], eax - mov dword ptr [esp+936+4], edx - mov dword ptr [esp+1000], ebx - shrd ebx, ecx, 28 - mov eax, dword ptr [esp+1000] - shrd ecx, eax, 28 - mov eax, dword ptr [esp+936] - mov edx, dword ptr [esp+936+4] - xchg eax, edx - mov dword ptr [esp+1000], eax - shrd eax, edx, 2 - mov dword ptr [esp+1004], eax - mov eax, dword ptr [esp+1000] - shrd edx, eax, 2 - mov eax, dword ptr [esp+1004] - mov dword ptr [esp+936], eax - mov dword ptr [esp+936+4], edx - mov eax, dword ptr [esp+936] - mov edx, dword ptr [esp+936+4] - xor ebx, eax - xor ecx, edx - mov eax, dword ptr [esp+936] - mov edx, dword ptr [esp+936+4] - mov dword ptr [esp+1000], eax - shrd eax, edx, 5 - mov dword ptr [esp+1004], eax - mov eax, dword ptr [esp+1000] - shrd edx, eax, 5 - mov eax, dword ptr [esp+1004] - mov dword ptr [esp+936], eax - mov dword ptr [esp+936+4], edx - mov eax, dword ptr [esp+936] - mov edx, dword ptr [esp+936+4] - xor ebx, eax - xor ecx, edx - add esi, ebx - adc edi, ecx - mov eax, dword ptr [esp+880] - mov edx, dword ptr [esp+880+4] - mov dword ptr [esp+936], eax - mov dword ptr [esp+936+4], edx - mov eax, dword ptr [esp+888] - mov dword ptr [esp+1008], eax - mov eax, dword ptr [esp+888+4] - mov dword ptr [esp+1008+4], eax - mov eax, dword ptr [esp+936] - mov edx, dword ptr [esp+936+4] - and eax, dword ptr [esp+1008] - and edx, dword ptr [esp+1008+4] - mov dword ptr [esp+936], eax - mov dword ptr [esp+936+4], edx - mov ebx, dword ptr [esp+880] - mov ecx, dword ptr [esp+880+4] - mov eax, dword ptr [esp+888] - mov edx, dword ptr [esp+888+4] - xor ebx, eax - xor ecx, edx - mov eax, dword ptr [esp+896] - mov edx, dword ptr [esp+896+4] - and ebx, eax - and ecx, edx - mov eax, dword ptr [esp+936] - mov edx, dword ptr [esp+936+4] - xor eax, ebx - xor edx, ecx - mov dword ptr [esp+936], eax - mov dword ptr [esp+936+4], edx - mov eax, dword ptr [esp+936] - mov edx, dword ptr [esp+936+4] - add eax, esi - adc edx, edi - mov dword ptr [esp+936], eax - mov dword ptr [esp+936+4], edx - mov esi, dword ptr [esp+904] - mov edi, dword ptr [esp+904+4] - mov ebx, dword ptr [esp+904] - mov ecx, dword ptr [esp+904+4] - mov dword ptr [esp+1000], esi - shrd esi, edi, 14 - mov eax, dword ptr [esp+1000] - shrd edi, eax, 14 - mov dword ptr [esp+1000], ebx - shrd ebx, ecx, 18 - mov eax, dword ptr [esp+1000] - shrd ecx, eax, 18 - xor esi, ebx - xor edi, ecx - mov dword ptr [esp+1000], ebx - shrd ebx, ecx, 23 - mov eax, dword ptr [esp+1000] - shrd ecx, eax, 23 - xor esi, ebx - xor edi, ecx - mov ebx, dword ptr [esp+912] - mov ecx, dword ptr [esp+912+4] - mov eax, dword ptr [esp+920] - mov edx, dword ptr [esp+920+4] - xor ebx, eax - xor ecx, edx - mov eax, dword ptr [esp+904] - mov edx, dword ptr [esp+904+4] - and ebx, eax - and ecx, edx - mov eax, dword ptr [esp+920] - mov edx, dword ptr [esp+920+4] - xor ebx, eax - xor ecx, edx - mov eax, dword ptr [esp+928] - mov edx, dword ptr [esp+928+4] - add esi, eax - adc edi, edx - add esi, ebx - adc edi, ecx - add esi, dword ptr [ebp+8] - adc edi, dword ptr [ebp+8+4] - mov eax, dword ptr [esp+896] - mov edx, dword ptr [esp+896+4] - add eax, esi - adc edx, edi - mov dword ptr [esp+896], eax - mov dword ptr [esp+896+4], edx - mov ebx, dword ptr [esp+936] - mov ecx, dword ptr [esp+936+4] - mov eax, dword ptr [esp+936] - mov edx, dword ptr [esp+936+4] - mov dword ptr [esp+928], eax - mov dword ptr [esp+928+4], edx - mov dword ptr [esp+1000], ebx - shrd ebx, ecx, 28 - mov eax, dword ptr [esp+1000] - shrd ecx, eax, 28 - mov eax, dword ptr [esp+928] - mov edx, dword ptr [esp+928+4] - xchg eax, edx - mov dword ptr [esp+1000], eax - shrd eax, edx, 2 - mov dword ptr [esp+1004], eax - mov eax, dword ptr [esp+1000] - shrd edx, eax, 2 - mov eax, dword ptr [esp+1004] - mov dword ptr [esp+928], eax - mov dword ptr [esp+928+4], edx - mov eax, dword ptr [esp+928] - mov edx, dword ptr [esp+928+4] - xor ebx, eax - xor ecx, edx - mov eax, dword ptr [esp+928] - mov edx, dword ptr [esp+928+4] - mov dword ptr [esp+1000], eax - shrd eax, edx, 5 - mov dword ptr [esp+1004], eax - mov eax, dword ptr [esp+1000] - shrd edx, eax, 5 - mov eax, dword ptr [esp+1004] - mov dword ptr [esp+928], eax - mov dword ptr [esp+928+4], edx - mov eax, dword ptr [esp+928] - mov edx, dword ptr [esp+928+4] - xor ebx, eax - xor ecx, edx - add esi, ebx - adc edi, ecx - mov eax, dword ptr [esp+936] - mov edx, dword ptr [esp+936+4] - mov dword ptr [esp+928], eax - mov dword ptr [esp+928+4], edx - mov eax, dword ptr [esp+880] - mov dword ptr [esp+1008], eax - mov eax, dword ptr [esp+880+4] - mov dword ptr [esp+1008+4], eax - mov eax, dword ptr [esp+928] - mov edx, dword ptr [esp+928+4] - and eax, dword ptr [esp+1008] - and edx, dword ptr [esp+1008+4] - mov dword ptr [esp+928], eax - mov dword ptr [esp+928+4], edx - mov ebx, dword ptr [esp+936] - mov ecx, dword ptr [esp+936+4] - mov eax, dword ptr [esp+880] - mov edx, dword ptr [esp+880+4] - xor ebx, eax - xor ecx, edx - mov eax, dword ptr [esp+888] - mov edx, dword ptr [esp+888+4] - and ebx, eax - and ecx, edx - mov eax, dword ptr [esp+928] - mov edx, dword ptr [esp+928+4] - xor eax, ebx - xor edx, ecx - mov dword ptr [esp+928], eax - mov dword ptr [esp+928+4], edx - mov eax, dword ptr [esp+928] - mov edx, dword ptr [esp+928+4] - add eax, esi - adc edx, edi - mov dword ptr [esp+928], eax - mov dword ptr [esp+928+4], edx - mov esi, dword ptr [esp+896] - mov edi, dword ptr [esp+896+4] - mov ebx, dword ptr [esp+896] - mov ecx, dword ptr [esp+896+4] - mov dword ptr [esp+1000], esi - shrd esi, edi, 14 - mov eax, dword ptr [esp+1000] - shrd edi, eax, 14 - mov dword ptr [esp+1000], ebx - shrd ebx, ecx, 18 - mov eax, dword ptr [esp+1000] - shrd ecx, eax, 18 - xor esi, ebx - xor edi, ecx - mov dword ptr [esp+1000], ebx - shrd ebx, ecx, 23 - mov eax, dword ptr [esp+1000] - shrd ecx, eax, 23 - xor esi, ebx - xor edi, ecx - mov ebx, dword ptr [esp+904] - mov ecx, dword ptr [esp+904+4] - mov eax, dword ptr [esp+912] - mov edx, dword ptr [esp+912+4] - xor ebx, eax - xor ecx, edx - mov eax, dword ptr [esp+896] - mov edx, dword ptr [esp+896+4] - and ebx, eax - and ecx, edx - mov eax, dword ptr [esp+912] - mov edx, dword ptr [esp+912+4] - xor ebx, eax - xor ecx, edx - mov eax, dword ptr [esp+920] - mov edx, dword ptr [esp+920+4] - add esi, eax - adc edi, edx - add esi, ebx - adc edi, ecx - add esi, dword ptr [ebp+16] - adc edi, dword ptr [ebp+16+4] - mov eax, dword ptr [esp+888] - mov edx, dword ptr [esp+888+4] - add eax, esi - adc edx, edi - mov dword ptr [esp+888], eax - mov dword ptr [esp+888+4], edx - mov ebx, dword ptr [esp+928] - mov ecx, dword ptr [esp+928+4] - mov eax, dword ptr [esp+928] - mov edx, dword ptr [esp+928+4] - mov dword ptr [esp+920], eax - mov dword ptr [esp+920+4], edx - mov dword ptr [esp+1000], ebx - shrd ebx, ecx, 28 - mov eax, dword ptr [esp+1000] - shrd ecx, eax, 28 - mov eax, dword ptr [esp+920] - mov edx, dword ptr [esp+920+4] - xchg eax, edx - mov dword ptr [esp+1000], eax - shrd eax, edx, 2 - mov dword ptr [esp+1004], eax - mov eax, dword ptr [esp+1000] - shrd edx, eax, 2 - mov eax, dword ptr [esp+1004] - mov dword ptr [esp+920], eax - mov dword ptr [esp+920+4], edx - mov eax, dword ptr [esp+920] - mov edx, dword ptr [esp+920+4] - xor ebx, eax - xor ecx, edx - mov eax, dword ptr [esp+920] - mov edx, dword ptr [esp+920+4] - mov dword ptr [esp+1000], eax - shrd eax, edx, 5 - mov dword ptr [esp+1004], eax - mov eax, dword ptr [esp+1000] - shrd edx, eax, 5 - mov eax, dword ptr [esp+1004] - mov dword ptr [esp+920], eax - mov dword ptr [esp+920+4], edx - mov eax, dword ptr [esp+920] - mov edx, dword ptr [esp+920+4] - xor ebx, eax - xor ecx, edx - add esi, ebx - adc edi, ecx - mov eax, dword ptr [esp+928] - mov edx, dword ptr [esp+928+4] - mov dword ptr [esp+920], eax - mov dword ptr [esp+920+4], edx - mov eax, dword ptr [esp+936] - mov dword ptr [esp+1008], eax - mov eax, dword ptr [esp+936+4] - mov dword ptr [esp+1008+4], eax - mov eax, dword ptr [esp+920] - mov edx, dword ptr [esp+920+4] - and eax, dword ptr [esp+1008] - and edx, dword ptr [esp+1008+4] - mov dword ptr [esp+920], eax - mov dword ptr [esp+920+4], edx - mov ebx, dword ptr [esp+928] - mov ecx, dword ptr [esp+928+4] - mov eax, dword ptr [esp+936] - mov edx, dword ptr [esp+936+4] - xor ebx, eax - xor ecx, edx - mov eax, dword ptr [esp+880] - mov edx, dword ptr [esp+880+4] - and ebx, eax - and ecx, edx - mov eax, dword ptr [esp+920] - mov edx, dword ptr [esp+920+4] - xor eax, ebx - xor edx, ecx - mov dword ptr [esp+920], eax - mov dword ptr [esp+920+4], edx - mov eax, dword ptr [esp+920] - mov edx, dword ptr [esp+920+4] - add eax, esi - adc edx, edi - mov dword ptr [esp+920], eax - mov dword ptr [esp+920+4], edx - mov esi, dword ptr [esp+888] - mov edi, dword ptr [esp+888+4] - mov ebx, dword ptr [esp+888] - mov ecx, dword ptr [esp+888+4] - mov dword ptr [esp+1000], esi - shrd esi, edi, 14 - mov eax, dword ptr [esp+1000] - shrd edi, eax, 14 - mov dword ptr [esp+1000], ebx - shrd ebx, ecx, 18 - mov eax, dword ptr [esp+1000] - shrd ecx, eax, 18 - xor esi, ebx - xor edi, ecx - mov dword ptr [esp+1000], ebx - shrd ebx, ecx, 23 - mov eax, dword ptr [esp+1000] - shrd ecx, eax, 23 - xor esi, ebx - xor edi, ecx - mov ebx, dword ptr [esp+896] - mov ecx, dword ptr [esp+896+4] - mov eax, dword ptr [esp+904] - mov edx, dword ptr [esp+904+4] - xor ebx, eax - xor ecx, edx - mov eax, dword ptr [esp+888] - mov edx, dword ptr [esp+888+4] - and ebx, eax - and ecx, edx - mov eax, dword ptr [esp+904] - mov edx, dword ptr [esp+904+4] - xor ebx, eax - xor ecx, edx - mov eax, dword ptr [esp+912] - mov edx, dword ptr [esp+912+4] - add esi, eax - adc edi, edx - add esi, ebx - adc edi, ecx - add esi, dword ptr [ebp+24] - adc edi, dword ptr [ebp+24+4] - mov eax, dword ptr [esp+880] - mov edx, dword ptr [esp+880+4] - add eax, esi - adc edx, edi - mov dword ptr [esp+880], eax - mov dword ptr [esp+880+4], edx - mov ebx, dword ptr [esp+920] - mov ecx, dword ptr [esp+920+4] - mov eax, dword ptr [esp+920] - mov edx, dword ptr [esp+920+4] - mov dword ptr [esp+912], eax - mov dword ptr [esp+912+4], edx - mov dword ptr [esp+1000], ebx - shrd ebx, ecx, 28 - mov eax, dword ptr [esp+1000] - shrd ecx, eax, 28 - mov eax, dword ptr [esp+912] - mov edx, dword ptr [esp+912+4] - xchg eax, edx - mov dword ptr [esp+1000], eax - shrd eax, edx, 2 - mov dword ptr [esp+1004], eax - mov eax, dword ptr [esp+1000] - shrd edx, eax, 2 - mov eax, dword ptr [esp+1004] - mov dword ptr [esp+912], eax - mov dword ptr [esp+912+4], edx - mov eax, dword ptr [esp+912] - mov edx, dword ptr [esp+912+4] - xor ebx, eax - xor ecx, edx - mov eax, dword ptr [esp+912] - mov edx, dword ptr [esp+912+4] - mov dword ptr [esp+1000], eax - shrd eax, edx, 5 - mov dword ptr [esp+1004], eax - mov eax, dword ptr [esp+1000] - shrd edx, eax, 5 - mov eax, dword ptr [esp+1004] - mov dword ptr [esp+912], eax - mov dword ptr [esp+912+4], edx - mov eax, dword ptr [esp+912] - mov edx, dword ptr [esp+912+4] - xor ebx, eax - xor ecx, edx - add esi, ebx - adc edi, ecx - mov eax, dword ptr [esp+920] - mov edx, dword ptr [esp+920+4] - mov dword ptr [esp+912], eax - mov dword ptr [esp+912+4], edx - mov eax, dword ptr [esp+928] - mov dword ptr [esp+1008], eax - mov eax, dword ptr [esp+928+4] - mov dword ptr [esp+1008+4], eax - mov eax, dword ptr [esp+912] - mov edx, dword ptr [esp+912+4] - and eax, dword ptr [esp+1008] - and edx, dword ptr [esp+1008+4] - mov dword ptr [esp+912], eax - mov dword ptr [esp+912+4], edx - mov ebx, dword ptr [esp+920] - mov ecx, dword ptr [esp+920+4] - mov eax, dword ptr [esp+928] - mov edx, dword ptr [esp+928+4] - xor ebx, eax - xor ecx, edx - mov eax, dword ptr [esp+936] - mov edx, dword ptr [esp+936+4] - and ebx, eax - and ecx, edx - mov eax, dword ptr [esp+912] - mov edx, dword ptr [esp+912+4] - xor eax, ebx - xor edx, ecx - mov dword ptr [esp+912], eax - mov dword ptr [esp+912+4], edx - mov eax, dword ptr [esp+912] - mov edx, dword ptr [esp+912+4] - add eax, esi - adc edx, edi - mov dword ptr [esp+912], eax - mov dword ptr [esp+912+4], edx - mov esi, dword ptr [esp+880] - mov edi, dword ptr [esp+880+4] - mov ebx, dword ptr [esp+880] - mov ecx, dword ptr [esp+880+4] - mov dword ptr [esp+1000], esi - shrd esi, edi, 14 - mov eax, dword ptr [esp+1000] - shrd edi, eax, 14 - mov dword ptr [esp+1000], ebx - shrd ebx, ecx, 18 - mov eax, dword ptr [esp+1000] - shrd ecx, eax, 18 - xor esi, ebx - xor edi, ecx - mov dword ptr [esp+1000], ebx - shrd ebx, ecx, 23 - mov eax, dword ptr [esp+1000] - shrd ecx, eax, 23 - xor esi, ebx - xor edi, ecx - mov ebx, dword ptr [esp+888] - mov ecx, dword ptr [esp+888+4] - mov eax, dword ptr [esp+896] - mov edx, dword ptr [esp+896+4] - xor ebx, eax - xor ecx, edx - mov eax, dword ptr [esp+880] - mov edx, dword ptr [esp+880+4] - and ebx, eax - and ecx, edx - mov eax, dword ptr [esp+896] - mov edx, dword ptr [esp+896+4] - xor ebx, eax - xor ecx, edx - mov eax, dword ptr [esp+904] - mov edx, dword ptr [esp+904+4] - add esi, eax - adc edi, edx - add esi, ebx - adc edi, ecx - add esi, dword ptr [ebp+32] - adc edi, dword ptr [ebp+32+4] - mov eax, dword ptr [esp+936] - mov edx, dword ptr [esp+936+4] - add eax, esi - adc edx, edi - mov dword ptr [esp+936], eax - mov dword ptr [esp+936+4], edx - mov ebx, dword ptr [esp+912] - mov ecx, dword ptr [esp+912+4] - mov eax, dword ptr [esp+912] - mov edx, dword ptr [esp+912+4] - mov dword ptr [esp+904], eax - mov dword ptr [esp+904+4], edx - mov dword ptr [esp+1000], ebx - shrd ebx, ecx, 28 - mov eax, dword ptr [esp+1000] - shrd ecx, eax, 28 - mov eax, dword ptr [esp+904] - mov edx, dword ptr [esp+904+4] - xchg eax, edx - mov dword ptr [esp+1000], eax - shrd eax, edx, 2 - mov dword ptr [esp+1004], eax - mov eax, dword ptr [esp+1000] - shrd edx, eax, 2 - mov eax, dword ptr [esp+1004] - mov dword ptr [esp+904], eax - mov dword ptr [esp+904+4], edx - mov eax, dword ptr [esp+904] - mov edx, dword ptr [esp+904+4] - xor ebx, eax - xor ecx, edx - mov eax, dword ptr [esp+904] - mov edx, dword ptr [esp+904+4] - mov dword ptr [esp+1000], eax - shrd eax, edx, 5 - mov dword ptr [esp+1004], eax - mov eax, dword ptr [esp+1000] - shrd edx, eax, 5 - mov eax, dword ptr [esp+1004] - mov dword ptr [esp+904], eax - mov dword ptr [esp+904+4], edx - mov eax, dword ptr [esp+904] - mov edx, dword ptr [esp+904+4] - xor ebx, eax - xor ecx, edx - add esi, ebx - adc edi, ecx - mov eax, dword ptr [esp+912] - mov edx, dword ptr [esp+912+4] - mov dword ptr [esp+904], eax - mov dword ptr [esp+904+4], edx - mov eax, dword ptr [esp+920] - mov dword ptr [esp+1008], eax - mov eax, dword ptr [esp+920+4] - mov dword ptr [esp+1008+4], eax - mov eax, dword ptr [esp+904] - mov edx, dword ptr [esp+904+4] - and eax, dword ptr [esp+1008] - and edx, dword ptr [esp+1008+4] - mov dword ptr [esp+904], eax - mov dword ptr [esp+904+4], edx - mov ebx, dword ptr [esp+912] - mov ecx, dword ptr [esp+912+4] - mov eax, dword ptr [esp+920] - mov edx, dword ptr [esp+920+4] - xor ebx, eax - xor ecx, edx - mov eax, dword ptr [esp+928] - mov edx, dword ptr [esp+928+4] - and ebx, eax - and ecx, edx - mov eax, dword ptr [esp+904] - mov edx, dword ptr [esp+904+4] - xor eax, ebx - xor edx, ecx - mov dword ptr [esp+904], eax - mov dword ptr [esp+904+4], edx - mov eax, dword ptr [esp+904] - mov edx, dword ptr [esp+904+4] - add eax, esi - adc edx, edi - mov dword ptr [esp+904], eax - mov dword ptr [esp+904+4], edx - mov esi, dword ptr [esp+936] - mov edi, dword ptr [esp+936+4] - mov ebx, dword ptr [esp+936] - mov ecx, dword ptr [esp+936+4] - mov dword ptr [esp+1000], esi - shrd esi, edi, 14 - mov eax, dword ptr [esp+1000] - shrd edi, eax, 14 - mov dword ptr [esp+1000], ebx - shrd ebx, ecx, 18 - mov eax, dword ptr [esp+1000] - shrd ecx, eax, 18 - xor esi, ebx - xor edi, ecx - mov dword ptr [esp+1000], ebx - shrd ebx, ecx, 23 - mov eax, dword ptr [esp+1000] - shrd ecx, eax, 23 - xor esi, ebx - xor edi, ecx - mov ebx, dword ptr [esp+880] - mov ecx, dword ptr [esp+880+4] - mov eax, dword ptr [esp+888] - mov edx, dword ptr [esp+888+4] - xor ebx, eax - xor ecx, edx - mov eax, dword ptr [esp+936] - mov edx, dword ptr [esp+936+4] - and ebx, eax - and ecx, edx - mov eax, dword ptr [esp+888] - mov edx, dword ptr [esp+888+4] - xor ebx, eax - xor ecx, edx - mov eax, dword ptr [esp+896] - mov edx, dword ptr [esp+896+4] - add esi, eax - adc edi, edx - add esi, ebx - adc edi, ecx - add esi, dword ptr [ebp+40] - adc edi, dword ptr [ebp+40+4] - mov eax, dword ptr [esp+928] - mov edx, dword ptr [esp+928+4] - add eax, esi - adc edx, edi - mov dword ptr [esp+928], eax - mov dword ptr [esp+928+4], edx - mov ebx, dword ptr [esp+904] - mov ecx, dword ptr [esp+904+4] - mov eax, dword ptr [esp+904] - mov edx, dword ptr [esp+904+4] - mov dword ptr [esp+896], eax - mov dword ptr [esp+896+4], edx - mov dword ptr [esp+1000], ebx - shrd ebx, ecx, 28 - mov eax, dword ptr [esp+1000] - shrd ecx, eax, 28 - mov eax, dword ptr [esp+896] - mov edx, dword ptr [esp+896+4] - xchg eax, edx - mov dword ptr [esp+1000], eax - shrd eax, edx, 2 - mov dword ptr [esp+1004], eax - mov eax, dword ptr [esp+1000] - shrd edx, eax, 2 - mov eax, dword ptr [esp+1004] - mov dword ptr [esp+896], eax - mov dword ptr [esp+896+4], edx - mov eax, dword ptr [esp+896] - mov edx, dword ptr [esp+896+4] - xor ebx, eax - xor ecx, edx - mov eax, dword ptr [esp+896] - mov edx, dword ptr [esp+896+4] - mov dword ptr [esp+1000], eax - shrd eax, edx, 5 - mov dword ptr [esp+1004], eax - mov eax, dword ptr [esp+1000] - shrd edx, eax, 5 - mov eax, dword ptr [esp+1004] - mov dword ptr [esp+896], eax - mov dword ptr [esp+896+4], edx - mov eax, dword ptr [esp+896] - mov edx, dword ptr [esp+896+4] - xor ebx, eax - xor ecx, edx - add esi, ebx - adc edi, ecx - mov eax, dword ptr [esp+904] - mov edx, dword ptr [esp+904+4] - mov dword ptr [esp+896], eax - mov dword ptr [esp+896+4], edx - mov eax, dword ptr [esp+912] - mov dword ptr [esp+1008], eax - mov eax, dword ptr [esp+912+4] - mov dword ptr [esp+1008+4], eax - mov eax, dword ptr [esp+896] - mov edx, dword ptr [esp+896+4] - and eax, dword ptr [esp+1008] - and edx, dword ptr [esp+1008+4] - mov dword ptr [esp+896], eax - mov dword ptr [esp+896+4], edx - mov ebx, dword ptr [esp+904] - mov ecx, dword ptr [esp+904+4] - mov eax, dword ptr [esp+912] - mov edx, dword ptr [esp+912+4] - xor ebx, eax - xor ecx, edx - mov eax, dword ptr [esp+920] - mov edx, dword ptr [esp+920+4] - and ebx, eax - and ecx, edx - mov eax, dword ptr [esp+896] - mov edx, dword ptr [esp+896+4] - xor eax, ebx - xor edx, ecx - mov dword ptr [esp+896], eax - mov dword ptr [esp+896+4], edx - mov eax, dword ptr [esp+896] - mov edx, dword ptr [esp+896+4] - add eax, esi - adc edx, edi - mov dword ptr [esp+896], eax - mov dword ptr [esp+896+4], edx - mov esi, dword ptr [esp+928] - mov edi, dword ptr [esp+928+4] - mov ebx, dword ptr [esp+928] - mov ecx, dword ptr [esp+928+4] - mov dword ptr [esp+1000], esi - shrd esi, edi, 14 - mov eax, dword ptr [esp+1000] - shrd edi, eax, 14 - mov dword ptr [esp+1000], ebx - shrd ebx, ecx, 18 - mov eax, dword ptr [esp+1000] - shrd ecx, eax, 18 - xor esi, ebx - xor edi, ecx - mov dword ptr [esp+1000], ebx - shrd ebx, ecx, 23 - mov eax, dword ptr [esp+1000] - shrd ecx, eax, 23 - xor esi, ebx - xor edi, ecx - mov ebx, dword ptr [esp+936] - mov ecx, dword ptr [esp+936+4] - mov eax, dword ptr [esp+880] - mov edx, dword ptr [esp+880+4] - xor ebx, eax - xor ecx, edx - mov eax, dword ptr [esp+928] - mov edx, dword ptr [esp+928+4] - and ebx, eax - and ecx, edx - mov eax, dword ptr [esp+880] - mov edx, dword ptr [esp+880+4] - xor ebx, eax - xor ecx, edx - mov eax, dword ptr [esp+888] - mov edx, dword ptr [esp+888+4] - add esi, eax - adc edi, edx - add esi, ebx - adc edi, ecx - add esi, dword ptr [ebp+48] - adc edi, dword ptr [ebp+48+4] - mov eax, dword ptr [esp+920] - mov edx, dword ptr [esp+920+4] - add eax, esi - adc edx, edi - mov dword ptr [esp+920], eax - mov dword ptr [esp+920+4], edx - mov ebx, dword ptr [esp+896] - mov ecx, dword ptr [esp+896+4] - mov eax, dword ptr [esp+896] - mov edx, dword ptr [esp+896+4] - mov dword ptr [esp+888], eax - mov dword ptr [esp+888+4], edx - mov dword ptr [esp+1000], ebx - shrd ebx, ecx, 28 - mov eax, dword ptr [esp+1000] - shrd ecx, eax, 28 - mov eax, dword ptr [esp+888] - mov edx, dword ptr [esp+888+4] - xchg eax, edx - mov dword ptr [esp+1000], eax - shrd eax, edx, 2 - mov dword ptr [esp+1004], eax - mov eax, dword ptr [esp+1000] - shrd edx, eax, 2 - mov eax, dword ptr [esp+1004] - mov dword ptr [esp+888], eax - mov dword ptr [esp+888+4], edx - mov eax, dword ptr [esp+888] - mov edx, dword ptr [esp+888+4] - xor ebx, eax - xor ecx, edx - mov eax, dword ptr [esp+888] - mov edx, dword ptr [esp+888+4] - mov dword ptr [esp+1000], eax - shrd eax, edx, 5 - mov dword ptr [esp+1004], eax - mov eax, dword ptr [esp+1000] - shrd edx, eax, 5 - mov eax, dword ptr [esp+1004] - mov dword ptr [esp+888], eax - mov dword ptr [esp+888+4], edx - mov eax, dword ptr [esp+888] - mov edx, dword ptr [esp+888+4] - xor ebx, eax - xor ecx, edx - add esi, ebx - adc edi, ecx - mov eax, dword ptr [esp+896] - mov edx, dword ptr [esp+896+4] - mov dword ptr [esp+888], eax - mov dword ptr [esp+888+4], edx - mov eax, dword ptr [esp+904] - mov dword ptr [esp+1008], eax - mov eax, dword ptr [esp+904+4] - mov dword ptr [esp+1008+4], eax - mov eax, dword ptr [esp+888] - mov edx, dword ptr [esp+888+4] - and eax, dword ptr [esp+1008] - and edx, dword ptr [esp+1008+4] - mov dword ptr [esp+888], eax - mov dword ptr [esp+888+4], edx - mov ebx, dword ptr [esp+896] - mov ecx, dword ptr [esp+896+4] - mov eax, dword ptr [esp+904] - mov edx, dword ptr [esp+904+4] - xor ebx, eax - xor ecx, edx - mov eax, dword ptr [esp+912] - mov edx, dword ptr [esp+912+4] - and ebx, eax - and ecx, edx - mov eax, dword ptr [esp+888] - mov edx, dword ptr [esp+888+4] - xor eax, ebx - xor edx, ecx - mov dword ptr [esp+888], eax - mov dword ptr [esp+888+4], edx - mov eax, dword ptr [esp+888] - mov edx, dword ptr [esp+888+4] - add eax, esi - adc edx, edi - mov dword ptr [esp+888], eax - mov dword ptr [esp+888+4], edx - mov esi, dword ptr [esp+920] - mov edi, dword ptr [esp+920+4] - mov ebx, dword ptr [esp+920] - mov ecx, dword ptr [esp+920+4] - mov dword ptr [esp+1000], esi - shrd esi, edi, 14 - mov eax, dword ptr [esp+1000] - shrd edi, eax, 14 - mov dword ptr [esp+1000], ebx - shrd ebx, ecx, 18 - mov eax, dword ptr [esp+1000] - shrd ecx, eax, 18 - xor esi, ebx - xor edi, ecx - mov dword ptr [esp+1000], ebx - shrd ebx, ecx, 23 - mov eax, dword ptr [esp+1000] - shrd ecx, eax, 23 - xor esi, ebx - xor edi, ecx - mov ebx, dword ptr [esp+928] - mov ecx, dword ptr [esp+928+4] - mov eax, dword ptr [esp+936] - mov edx, dword ptr [esp+936+4] - xor ebx, eax - xor ecx, edx - mov eax, dword ptr [esp+920] - mov edx, dword ptr [esp+920+4] - and ebx, eax - and ecx, edx - mov eax, dword ptr [esp+936] - mov edx, dword ptr [esp+936+4] - xor ebx, eax - xor ecx, edx - mov eax, dword ptr [esp+880] - mov edx, dword ptr [esp+880+4] - add esi, eax - adc edi, edx - add esi, ebx - adc edi, ecx - add esi, dword ptr [ebp+56] - adc edi, dword ptr [ebp+56+4] - mov eax, dword ptr [esp+912] - mov edx, dword ptr [esp+912+4] - add eax, esi - adc edx, edi - mov dword ptr [esp+912], eax - mov dword ptr [esp+912+4], edx - mov ebx, dword ptr [esp+888] - mov ecx, dword ptr [esp+888+4] - mov eax, dword ptr [esp+888] - mov edx, dword ptr [esp+888+4] - mov dword ptr [esp+880], eax - mov dword ptr [esp+880+4], edx - mov dword ptr [esp+1000], ebx - shrd ebx, ecx, 28 - mov eax, dword ptr [esp+1000] - shrd ecx, eax, 28 - mov eax, dword ptr [esp+880] - mov edx, dword ptr [esp+880+4] - xchg eax, edx - mov dword ptr [esp+1000], eax - shrd eax, edx, 2 - mov dword ptr [esp+1004], eax - mov eax, dword ptr [esp+1000] - shrd edx, eax, 2 - mov eax, dword ptr [esp+1004] - mov dword ptr [esp+880], eax - mov dword ptr [esp+880+4], edx - mov eax, dword ptr [esp+880] - mov edx, dword ptr [esp+880+4] - xor ebx, eax - xor ecx, edx - mov eax, dword ptr [esp+880] - mov edx, dword ptr [esp+880+4] - mov dword ptr [esp+1000], eax - shrd eax, edx, 5 - mov dword ptr [esp+1004], eax - mov eax, dword ptr [esp+1000] - shrd edx, eax, 5 - mov eax, dword ptr [esp+1004] - mov dword ptr [esp+880], eax - mov dword ptr [esp+880+4], edx - mov eax, dword ptr [esp+880] - mov edx, dword ptr [esp+880+4] - xor ebx, eax - xor ecx, edx - add esi, ebx - adc edi, ecx - mov eax, dword ptr [esp+888] - mov edx, dword ptr [esp+888+4] - mov dword ptr [esp+880], eax - mov dword ptr [esp+880+4], edx - mov eax, dword ptr [esp+896] - mov dword ptr [esp+1008], eax - mov eax, dword ptr [esp+896+4] - mov dword ptr [esp+1008+4], eax - mov eax, dword ptr [esp+880] - mov edx, dword ptr [esp+880+4] - and eax, dword ptr [esp+1008] - and edx, dword ptr [esp+1008+4] - mov dword ptr [esp+880], eax - mov dword ptr [esp+880+4], edx - mov ebx, dword ptr [esp+888] - mov ecx, dword ptr [esp+888+4] - mov eax, dword ptr [esp+896] - mov edx, dword ptr [esp+896+4] - xor ebx, eax - xor ecx, edx - mov eax, dword ptr [esp+904] - mov edx, dword ptr [esp+904+4] - and ebx, eax - and ecx, edx - mov eax, dword ptr [esp+880] - mov edx, dword ptr [esp+880+4] - xor eax, ebx - xor edx, ecx - mov dword ptr [esp+880], eax - mov dword ptr [esp+880+4], edx - mov eax, dword ptr [esp+880] - mov edx, dword ptr [esp+880+4] - add eax, esi - adc edx, edi - mov dword ptr [esp+880], eax - mov dword ptr [esp+880+4], edx - add ebp, $40 - mov eax, dword ptr [esp + $3BC] - cmp ebp, eax - jb @sse2_512_round_loop - mov esi, dword ptr [esp+$20] - mov eax, dword ptr [esp+880] - mov edx, dword ptr [esp+880+4] - add dword ptr [esi+$0], eax - adc dword ptr [esi+$0+4], edx - mov eax, dword ptr [esp+888] - mov edx, dword ptr [esp+888+4] - add dword ptr [esi+$8], eax - adc dword ptr [esi+$8+4], edx - mov eax, dword ptr [esp+896] - mov edx, dword ptr [esp+896+4] - add dword ptr [esi+$10], eax - adc dword ptr [esi+$10+4], edx - mov eax, dword ptr [esp+904] - mov edx, dword ptr [esp+904+4] - add dword ptr [esi+$18], eax - adc dword ptr [esi+$18+4], edx - mov eax, dword ptr [esp+912] - mov edx, dword ptr [esp+912+4] - add dword ptr [esi+$20], eax - adc dword ptr [esi+$20+4], edx - mov eax, dword ptr [esp+920] - mov edx, dword ptr [esp+920+4] - add dword ptr [esi+$28], eax - adc dword ptr [esi+$28+4], edx - mov eax, dword ptr [esp+928] - mov edx, dword ptr [esp+928+4] - add dword ptr [esi+$30], eax - adc dword ptr [esi+$30+4], edx - mov eax, dword ptr [esp+936] - mov edx, dword ptr [esp+936+4] - add dword ptr [esi+$38], eax - adc dword ptr [esi+$38+4], edx - - mov esi, dword ptr [esp+$24] - add esi, $80 - mov dword ptr [esp+$24], esi - dec dword ptr [esp+$28] - jnz @sse2_512_block_loop - -@sse2_512_done: - movdqu xmm6, oword ptr [esp] - movdqu xmm7, oword ptr [esp + $10] - mov ebp, dword ptr [esp + $30] - add esp, 1016 - pop edi - pop esi - pop ebx + movq qword [esi + $20], xmm4 + movq xmm0, qword [esi + $28] + paddq xmm5, xmm0 + movq qword [esi + $28], xmm5 + movq xmm0, qword [esi + $30] + paddq xmm6, xmm0 + movq qword [esi + $30], xmm6 + movq xmm7, qword [esp] + add esp, $8 + movq xmm0, qword [esi + $38] + paddq xmm7, xmm0 + movq qword [esi + $38], xmm7 + mov eax, $280 + movq xmm0, qword [esi] + lea esp, [esp + eax*1] + sub ebp, eax + cmp edi, dword [esp + $58] + jb @loop + mov esp, dword [esp + $5C] + pop ebp + pop edi + pop esi + pop ebx diff --git a/HashLib/src/Include/Simd/SHA512/SHA512CompressSse2_x86_64.inc b/HashLib/src/Include/Simd/SHA512/SHA512CompressSse2_x86_64.inc index 19b26341..19c8b034 100644 --- a/HashLib/src/Include/Simd/SHA512/SHA512CompressSse2_x86_64.inc +++ b/HashLib/src/Include/Simd/SHA512/SHA512CompressSse2_x86_64.inc @@ -1,489 +1,1282 @@ -// SHA-512 SSE2 implementation. -// Based on SSSE3 implementation (see SHA512CompressSsse3_x86_64.inc). -// Same as SSSE3 but byte-swap uses SSE2 emulation (pshuflw/pshufhw + psrlw/psllw/por) -// instead of SSSE3 pshufb. Message schedule expansion and compression use GPR only. -// Expects MS x64 ABI: rcx = state ptr, rdx = data ptr, r8d = numblocks, r9 = K512 ptr. -// K512: 80 UInt64 round constants (640 bytes). SSE2 byte-swaps without a mask (4-param path). -// Uses xmm0, xmm4, all GPR. +// SHA-512 SSE2 implementation with a SIMD message schedule, downported from the +// AVX single-block kernel (OpenSSL / CRYPTOGAMS design): the sigma schedule runs +// in 128-bit SSE2 and is interleaved with the 64-bit GPR compression rounds, so +// the vector and integer units run in parallel. This is much faster than a scalar +// message schedule. +// Expects MS x64 ABI (after SimdProc4Begin): rcx = state ptr, rdx = data ptr, +// r8d = numblocks, r9 = doubled-K512 ptr (K512_Doubled: each 128-bit K512 pair +// stored twice, read at a 32-byte stride). The big-endian input byte-swap is +// emulated with pshuflw/pshufhw/psrlw/psllw/por (SSE2 has no pshufb), so no mask +// table is needed. // -// Stack layout (sub rsp, 1016): same as SSSE3 version (xmm6-xmm7 save slots unused) +// MS x64 non-volatile saves: xmm6-xmm15 via the shared SimdNonVolatileSave/Restore +// include (no-op on SysV); rbx, rbp, rdi, rsi, r12-r15 in the local frame. - sub rsp, 1016 + {$I ..\Include\Simd\Common\SimdNonVolatileSave_x86_64.inc} - mov [rsp + $30], rdi - mov [rsp + $38], rsi - mov [rsp + $20], rbx - mov [rsp + $28], rbp - mov [rsp + $40], r12 - mov [rsp + $48], r13 - mov [rsp + $50], r14 - mov [rsp + $58], r15 + push rbx + push rbp + push rsi + push rdi + push r12 + push r13 + push r14 + push r15 + mov rax, rsp + sub rsp, $100 + and rsp, $FFFFFFFFFFFFFFC0 + mov qword [rsp + $98], rax + mov qword [rsp + $A0], r9 + mov qword [rsp + $80], rcx + mov r11d, r8d + shl r11, $7 + lea r11, [rdx + r11*1] + mov qword [rsp + $90], r11 + mov rsi, rdx + mov rdi, qword [rsp + $80] + mov rax, qword [rdi] + mov rbx, qword [rdi + $8] + mov rcx, qword [rdi + $10] + mov rdx, qword [rdi + $18] + mov r8, qword [rdi + $20] + mov r9, qword [rdi + $28] + mov r10, qword [rdi + $30] + mov r11, qword [rdi + $38] - mov r12, rcx - mov r13, rdx - mov r14d, r8d - mov [rsp + $60], r9 - - test r14d, r14d - jz @sse2_512_done - -@sse2_512_block_loop: - - // ========== Phase 1: Load, byte-swap, expand message schedule ========== - - mov rax, [rsp + $60] - - lea rbp, [rsp + $70] - lea r15, [rsp + $2F0] - - // SSE2 64-bit byte-swap: reverse bytes within each qword - // pshuflw/pshufhw $1B reverses 16-bit words, then psrlw/psllw/por swaps bytes in words - - movdqu xmm0, oword [r13] - pshuflw xmm0, xmm0, $1B - pshufhw xmm0, xmm0, $1B - movdqa xmm4, xmm0 - psrlw xmm0, 8 - psllw xmm4, 8 - por xmm0, xmm4 - movdqa oword [r15], xmm0 - movdqu xmm4, oword [rax] - paddq xmm4, xmm0 - movdqa oword [rbp], xmm4 - - movdqu xmm0, oword [r13 + $10] - pshuflw xmm0, xmm0, $1B - pshufhw xmm0, xmm0, $1B - movdqa xmm4, xmm0 - psrlw xmm0, 8 - psllw xmm4, 8 - por xmm0, xmm4 - movdqa oword [r15 + $10], xmm0 - movdqu xmm4, oword [rax + $10] - paddq xmm4, xmm0 - movdqa oword [rbp + $10], xmm4 - - movdqu xmm0, oword [r13 + $20] - pshuflw xmm0, xmm0, $1B - pshufhw xmm0, xmm0, $1B - movdqa xmm4, xmm0 - psrlw xmm0, 8 - psllw xmm4, 8 - por xmm0, xmm4 - movdqa oword [r15 + $20], xmm0 - movdqu xmm4, oword [rax + $20] - paddq xmm4, xmm0 - movdqa oword [rbp + $20], xmm4 - - movdqu xmm0, oword [r13 + $30] - pshuflw xmm0, xmm0, $1B - pshufhw xmm0, xmm0, $1B - movdqa xmm4, xmm0 - psrlw xmm0, 8 - psllw xmm4, 8 - por xmm0, xmm4 - movdqa oword [r15 + $30], xmm0 - movdqu xmm4, oword [rax + $30] - paddq xmm4, xmm0 - movdqa oword [rbp + $30], xmm4 - - movdqu xmm0, oword [r13 + $40] - pshuflw xmm0, xmm0, $1B - pshufhw xmm0, xmm0, $1B - movdqa xmm4, xmm0 - psrlw xmm0, 8 - psllw xmm4, 8 - por xmm0, xmm4 - movdqa oword [r15 + $40], xmm0 - movdqu xmm4, oword [rax + $40] - paddq xmm4, xmm0 - movdqa oword [rbp + $40], xmm4 - - movdqu xmm0, oword [r13 + $50] - pshuflw xmm0, xmm0, $1B - pshufhw xmm0, xmm0, $1B - movdqa xmm4, xmm0 - psrlw xmm0, 8 - psllw xmm4, 8 - por xmm0, xmm4 - movdqa oword [r15 + $50], xmm0 - movdqu xmm4, oword [rax + $50] - paddq xmm4, xmm0 - movdqa oword [rbp + $50], xmm4 - - movdqu xmm0, oword [r13 + $60] - pshuflw xmm0, xmm0, $1B - pshufhw xmm0, xmm0, $1B - movdqa xmm4, xmm0 - psrlw xmm0, 8 - psllw xmm4, 8 - por xmm0, xmm4 - movdqa oword [r15 + $60], xmm0 - movdqu xmm4, oword [rax + $60] - paddq xmm4, xmm0 - movdqa oword [rbp + $60], xmm4 - - movdqu xmm0, oword [r13 + $70] +@block_loop: + movdqu xmm0, oword [rsi] + mov rbp, qword [rsp + $A0] + add rbp, $80 + movdqu xmm1, oword [rsi + $10] + movdqu xmm2, oword [rsi + $20] pshuflw xmm0, xmm0, $1B pshufhw xmm0, xmm0, $1B - movdqa xmm4, xmm0 - psrlw xmm0, 8 - psllw xmm4, 8 - por xmm0, xmm4 - movdqa oword [r15 + $70], xmm0 - movdqu xmm4, oword [rax + $70] - paddq xmm4, xmm0 - movdqa oword [rbp + $70], xmm4 - - // Expand W[16..79] using GPR with circular buffer (identical to SSSE3) - - mov ecx, 16 - -@sse2_512_expand_loop: - mov edx, ecx - sub edx, 2 - and edx, 15 - mov rsi, [r15 + rdx*8] - mov rdi, rsi - ror rdi, 19 - mov r8, rsi - ror r8, 61 - xor rdi, r8 - shr rsi, 6 - xor rdi, rsi - - mov edx, ecx - sub edx, 7 - and edx, 15 - add rdi, [r15 + rdx*8] - - mov edx, ecx - sub edx, 15 - and edx, 15 - mov rsi, [r15 + rdx*8] - mov r8, rsi - ror r8, 1 - mov r9, rsi - ror r9, 8 - xor r8, r9 - shr rsi, 7 - xor r8, rsi - add rdi, r8 - - mov edx, ecx - sub edx, 16 - and edx, 15 - add rdi, [r15 + rdx*8] - - mov edx, ecx - and edx, 15 - mov [r15 + rdx*8], rdi - - mov rsi, [rax + rcx*8] - add rsi, rdi - mov [rbp + rcx*8], rsi - - inc ecx - cmp ecx, 80 - jb @sse2_512_expand_loop - - // ========== Phase 2: 80 Compression Rounds (identical to SSSE3) ========== - - mov rax, [r12] - mov rbx, [r12 + $08] - mov rcx, [r12 + $10] - mov rdx, [r12 + $18] - mov r8, [r12 + $20] - mov r9, [r12 + $28] - mov r10, [r12 + $30] - mov r11, [r12 + $38] - - lea r15, [rbp + $280] - -@sse2_512_round_loop: - - // Round 0: a=rax b=rbx c=rcx d=rdx e=r8 f=r9 g=r10 h=r11 - mov rsi, r8 - mov rdi, r8 - ror rsi, 14 - ror rdi, 18 - xor rsi, rdi - ror rdi, 23 - xor rsi, rdi - mov rdi, r9 - xor rdi, r10 - and rdi, r8 - xor rdi, r10 - add rsi, r11 - add rsi, rdi - add rsi, [rbp] - add rdx, rsi - mov rdi, rax - mov r11, rax - ror rdi, 28 - ror r11, 34 - xor rdi, r11 - ror r11, 5 - xor rdi, r11 - add rsi, rdi - mov r11, rax - and r11, rbx - mov rdi, rax - xor rdi, rbx - and rdi, rcx - xor r11, rdi - add r11, rsi - - // Round 1: a=r11 b=rax c=rbx d=rcx e=rdx f=r8 g=r9 h=r10 - mov rsi, rdx - mov rdi, rdx - ror rsi, 14 - ror rdi, 18 - xor rsi, rdi - ror rdi, 23 - xor rsi, rdi - mov rdi, r8 - xor rdi, r9 - and rdi, rdx - xor rdi, r9 - add rsi, r10 - add rsi, rdi - add rsi, [rbp + $08] - add rcx, rsi - mov rdi, r11 - mov r10, r11 - ror rdi, 28 - ror r10, 34 - xor rdi, r10 - ror r10, 5 - xor rdi, r10 - add rsi, rdi - mov r10, r11 - and r10, rax - mov rdi, r11 - xor rdi, rax - and rdi, rbx - xor r10, rdi - add r10, rsi - - // Round 2: a=r10 b=r11 c=rax d=rbx e=rcx f=rdx g=r8 h=r9 - mov rsi, rcx - mov rdi, rcx - ror rsi, 14 - ror rdi, 18 - xor rsi, rdi - ror rdi, 23 - xor rsi, rdi - mov rdi, rdx - xor rdi, r8 - and rdi, rcx - xor rdi, r8 - add rsi, r9 - add rsi, rdi - add rsi, [rbp + $10] - add rbx, rsi - mov rdi, r10 - mov r9, r10 - ror rdi, 28 - ror r9, 34 - xor rdi, r9 - ror r9, 5 - xor rdi, r9 - add rsi, rdi - mov r9, r10 - and r9, r11 - mov rdi, r10 - xor rdi, r11 - and rdi, rax - xor r9, rdi - add r9, rsi - - // Round 3: a=r9 b=r10 c=r11 d=rax e=rbx f=rcx g=rdx h=r8 - mov rsi, rbx - mov rdi, rbx - ror rsi, 14 - ror rdi, 18 - xor rsi, rdi - ror rdi, 23 - xor rsi, rdi - mov rdi, rcx - xor rdi, rdx - and rdi, rbx - xor rdi, rdx - add rsi, r8 - add rsi, rdi - add rsi, [rbp + $18] - add rax, rsi - mov rdi, r9 - mov r8, r9 - ror rdi, 28 - ror r8, 34 - xor rdi, r8 - ror r8, 5 - xor rdi, r8 - add rsi, rdi - mov r8, r9 - and r8, r10 - mov rdi, r9 - xor rdi, r10 - and rdi, r11 - xor r8, rdi - add r8, rsi - - // Round 4: a=r8 b=r9 c=r10 d=r11 e=rax f=rbx g=rcx h=rdx - mov rsi, rax - mov rdi, rax - ror rsi, 14 - ror rdi, 18 - xor rsi, rdi - ror rdi, 23 - xor rsi, rdi - mov rdi, rbx - xor rdi, rcx - and rdi, rax - xor rdi, rcx - add rsi, rdx - add rsi, rdi - add rsi, [rbp + $20] - add r11, rsi - mov rdi, r8 - mov rdx, r8 - ror rdi, 28 - ror rdx, 34 - xor rdi, rdx - ror rdx, 5 - xor rdi, rdx - add rsi, rdi - mov rdx, r8 - and rdx, r9 - mov rdi, r8 - xor rdi, r9 - and rdi, r10 - xor rdx, rdi - add rdx, rsi - - // Round 5: a=rdx b=r8 c=r9 d=r10 e=r11 f=rax g=rbx h=rcx - mov rsi, r11 - mov rdi, r11 - ror rsi, 14 - ror rdi, 18 - xor rsi, rdi - ror rdi, 23 - xor rsi, rdi - mov rdi, rax - xor rdi, rbx - and rdi, r11 - xor rdi, rbx - add rsi, rcx - add rsi, rdi - add rsi, [rbp + $28] - add r10, rsi - mov rdi, rdx - mov rcx, rdx - ror rdi, 28 - ror rcx, 34 - xor rdi, rcx - ror rcx, 5 - xor rdi, rcx - add rsi, rdi - mov rcx, rdx - and rcx, r8 - mov rdi, rdx - xor rdi, r8 - and rdi, r9 - xor rcx, rdi - add rcx, rsi - - // Round 6: a=rcx b=rdx c=r8 d=r9 e=r10 f=r11 g=rax h=rbx - mov rsi, r10 - mov rdi, r10 - ror rsi, 14 - ror rdi, 18 - xor rsi, rdi - ror rdi, 23 - xor rsi, rdi - mov rdi, r11 - xor rdi, rax - and rdi, r10 - xor rdi, rax - add rsi, rbx - add rsi, rdi - add rsi, [rbp + $30] - add r9, rsi - mov rdi, rcx - mov rbx, rcx - ror rdi, 28 - ror rbx, 34 - xor rdi, rbx - ror rbx, 5 - xor rdi, rbx - add rsi, rdi - mov rbx, rcx - and rbx, rdx - mov rdi, rcx - xor rdi, rdx - and rdi, r8 - xor rbx, rdi - add rbx, rsi - - // Round 7: a=rbx b=rcx c=rdx d=r8 e=r9 f=r10 g=r11 h=rax - mov rsi, r9 - mov rdi, r9 - ror rsi, 14 - ror rdi, 18 - xor rsi, rdi - ror rdi, 23 - xor rsi, rdi - mov rdi, r10 - xor rdi, r11 - and rdi, r9 - xor rdi, r11 - add rsi, rax - add rsi, rdi - add rsi, [rbp + $38] - add r8, rsi - mov rdi, rbx - mov rax, rbx - ror rdi, 28 - ror rax, 34 - xor rdi, rax - ror rax, 5 - xor rdi, rax - add rsi, rdi - mov rax, rbx - and rax, rcx - mov rdi, rbx - xor rdi, rcx - and rdi, rdx - xor rax, rdi - add rax, rsi - - add rbp, $40 - cmp rbp, r15 - jb @sse2_512_round_loop - - // Add round results to state - add [r12], rax - add [r12 + $08], rbx - add [r12 + $10], rcx - add [r12 + $18], rdx - add [r12 + $20], r8 - add [r12 + $28], r9 - add [r12 + $30], r10 - add [r12 + $38], r11 - - add r13, $80 - dec r14d - jnz @sse2_512_block_loop + movdqa xmm12, xmm0 + psrlw xmm0, $8 + psllw xmm12, $8 + por xmm0, xmm12 + movdqu xmm3, oword [rsi + $30] + pshuflw xmm1, xmm1, $1B + pshufhw xmm1, xmm1, $1B + movdqa xmm12, xmm1 + psrlw xmm1, $8 + psllw xmm12, $8 + por xmm1, xmm12 + movdqu xmm4, oword [rsi + $40] + pshuflw xmm2, xmm2, $1B + pshufhw xmm2, xmm2, $1B + movdqa xmm12, xmm2 + psrlw xmm2, $8 + psllw xmm12, $8 + por xmm2, xmm12 + movdqu xmm5, oword [rsi + $50] + pshuflw xmm3, xmm3, $1B + pshufhw xmm3, xmm3, $1B + movdqa xmm12, xmm3 + psrlw xmm3, $8 + psllw xmm12, $8 + por xmm3, xmm12 + movdqu xmm6, oword [rsi + $60] + pshuflw xmm4, xmm4, $1B + pshufhw xmm4, xmm4, $1B + movdqa xmm12, xmm4 + psrlw xmm4, $8 + psllw xmm12, $8 + por xmm4, xmm12 + movdqu xmm7, oword [rsi + $70] + pshuflw xmm5, xmm5, $1B + pshufhw xmm5, xmm5, $1B + movdqa xmm12, xmm5 + psrlw xmm5, $8 + psllw xmm12, $8 + por xmm5, xmm12 + movdqa xmm8, xmm0 + paddq xmm8, oword [rbp - $80] + pshuflw xmm6, xmm6, $1B + pshufhw xmm6, xmm6, $1B + movdqa xmm12, xmm6 + psrlw xmm6, $8 + psllw xmm12, $8 + por xmm6, xmm12 + movdqa xmm9, xmm1 + paddq xmm9, oword [rbp - $60] + pshuflw xmm7, xmm7, $1B + pshufhw xmm7, xmm7, $1B + movdqa xmm12, xmm7 + psrlw xmm7, $8 + psllw xmm12, $8 + por xmm7, xmm12 + movdqa xmm10, xmm2 + paddq xmm10, oword [rbp - $40] + movdqa xmm11, xmm3 + paddq xmm11, oword [rbp - $20] + movdqa oword [rsp], xmm8 + movdqa xmm8, xmm4 + paddq xmm8, oword [rbp + $0] + movdqa oword [rsp + $10], xmm9 + movdqa xmm9, xmm5 + paddq xmm9, oword [rbp + $20] + movdqa oword [rsp + $20], xmm10 + movdqa xmm10, xmm6 + paddq xmm10, oword [rbp + $40] + movdqa oword [rsp + $30], xmm11 + movdqa xmm11, xmm7 + paddq xmm11, oword [rbp + $60] + movdqa oword [rsp + $40], xmm8 + mov r14, rax + movdqa oword [rsp + $50], xmm9 + mov rdi, rbx + movdqa oword [rsp + $60], xmm10 + xor rdi, rcx + movdqa oword [rsp + $70], xmm11 + mov r13, r8 + jmp @sched_loop -@sse2_512_done: +@sched_loop: + add rbp, $100 + movdqa xmm8, xmm0 + shufpd xmm8, xmm1, $1 + shrd r13, r13, $17 + mov rax, r14 + movdqa xmm11, xmm4 + shufpd xmm11, xmm5, $1 + mov r12, r9 + shrd r14, r14, $5 + movdqa xmm10, xmm8 + psrlq xmm10, $1 + xor r13, r8 + xor r12, r10 + paddq xmm0, xmm11 + shrd r13, r13, $4 + xor r14, rax + movdqa xmm11, xmm8 + psrlq xmm11, $7 + and r12, r8 + xor r13, r8 + movdqa xmm9, xmm8 + psllq xmm9, $38 + add r11, qword [rsp] + mov r15, rax + movdqa xmm8, xmm11 + pxor xmm8, xmm10 + xor r12, r10 + shrd r14, r14, $6 + psrlq xmm10, $7 + xor r15, rbx + add r11, r12 + pxor xmm8, xmm9 + shrd r13, r13, $E + and rdi, r15 + psllq xmm9, $7 + xor r14, rax + add r11, r13 + pxor xmm8, xmm10 + xor rdi, rbx + shrd r14, r14, $1C + movdqa xmm11, xmm7 + psrlq xmm11, $6 + add rdx, r11 + add r11, rdi + pxor xmm8, xmm9 + mov r13, rdx + add r14, r11 + movdqa xmm10, xmm7 + psllq xmm10, $3 + shrd r13, r13, $17 + mov r11, r14 + paddq xmm0, xmm8 + mov r12, r8 + shrd r14, r14, $5 + movdqa xmm9, xmm7 + psrlq xmm9, $13 + xor r13, rdx + xor r12, r9 + pxor xmm11, xmm10 + shrd r13, r13, $4 + xor r14, r11 + psllq xmm10, $2A + and r12, rdx + xor r13, rdx + pxor xmm11, xmm9 + add r10, qword [rsp + $8] + mov rdi, r11 + psrlq xmm9, $2A + xor r12, r9 + shrd r14, r14, $6 + pxor xmm11, xmm10 + xor rdi, rax + add r10, r12 + pxor xmm11, xmm9 + shrd r13, r13, $E + and r15, rdi + paddq xmm0, xmm11 + xor r14, r11 + add r10, r13 + movdqa xmm10, xmm0 + paddq xmm10, oword [rbp - $80] + xor r15, rax + shrd r14, r14, $1C + add rcx, r10 + add r10, r15 + mov r13, rcx + add r14, r10 + movdqa oword [rsp], xmm10 + movdqa xmm8, xmm1 + shufpd xmm8, xmm2, $1 + shrd r13, r13, $17 + mov r10, r14 + movdqa xmm11, xmm5 + shufpd xmm11, xmm6, $1 + mov r12, rdx + shrd r14, r14, $5 + movdqa xmm10, xmm8 + psrlq xmm10, $1 + xor r13, rcx + xor r12, r8 + paddq xmm1, xmm11 + shrd r13, r13, $4 + xor r14, r10 + movdqa xmm11, xmm8 + psrlq xmm11, $7 + and r12, rcx + xor r13, rcx + movdqa xmm9, xmm8 + psllq xmm9, $38 + add r9, qword [rsp + $10] + mov r15, r10 + movdqa xmm8, xmm11 + pxor xmm8, xmm10 + xor r12, r8 + shrd r14, r14, $6 + psrlq xmm10, $7 + xor r15, r11 + add r9, r12 + pxor xmm8, xmm9 + shrd r13, r13, $E + and rdi, r15 + psllq xmm9, $7 + xor r14, r10 + add r9, r13 + pxor xmm8, xmm10 + xor rdi, r11 + shrd r14, r14, $1C + movdqa xmm11, xmm0 + psrlq xmm11, $6 + add rbx, r9 + add r9, rdi + pxor xmm8, xmm9 + mov r13, rbx + add r14, r9 + movdqa xmm10, xmm0 + psllq xmm10, $3 + shrd r13, r13, $17 + mov r9, r14 + paddq xmm1, xmm8 + mov r12, rcx + shrd r14, r14, $5 + movdqa xmm9, xmm0 + psrlq xmm9, $13 + xor r13, rbx + xor r12, rdx + pxor xmm11, xmm10 + shrd r13, r13, $4 + xor r14, r9 + psllq xmm10, $2A + and r12, rbx + xor r13, rbx + pxor xmm11, xmm9 + add r8, qword [rsp + $18] + mov rdi, r9 + psrlq xmm9, $2A + xor r12, rdx + shrd r14, r14, $6 + pxor xmm11, xmm10 + xor rdi, r10 + add r8, r12 + pxor xmm11, xmm9 + shrd r13, r13, $E + and r15, rdi + paddq xmm1, xmm11 + xor r14, r9 + add r8, r13 + movdqa xmm10, xmm1 + paddq xmm10, oword [rbp - $60] + xor r15, r10 + shrd r14, r14, $1C + add rax, r8 + add r8, r15 + mov r13, rax + add r14, r8 + movdqa oword [rsp + $10], xmm10 + movdqa xmm8, xmm2 + shufpd xmm8, xmm3, $1 + shrd r13, r13, $17 + mov r8, r14 + movdqa xmm11, xmm6 + shufpd xmm11, xmm7, $1 + mov r12, rbx + shrd r14, r14, $5 + movdqa xmm10, xmm8 + psrlq xmm10, $1 + xor r13, rax + xor r12, rcx + paddq xmm2, xmm11 + shrd r13, r13, $4 + xor r14, r8 + movdqa xmm11, xmm8 + psrlq xmm11, $7 + and r12, rax + xor r13, rax + movdqa xmm9, xmm8 + psllq xmm9, $38 + add rdx, qword [rsp + $20] + mov r15, r8 + movdqa xmm8, xmm11 + pxor xmm8, xmm10 + xor r12, rcx + shrd r14, r14, $6 + psrlq xmm10, $7 + xor r15, r9 + add rdx, r12 + pxor xmm8, xmm9 + shrd r13, r13, $E + and rdi, r15 + psllq xmm9, $7 + xor r14, r8 + add rdx, r13 + pxor xmm8, xmm10 + xor rdi, r9 + shrd r14, r14, $1C + movdqa xmm11, xmm1 + psrlq xmm11, $6 + add r11, rdx + add rdx, rdi + pxor xmm8, xmm9 + mov r13, r11 + add r14, rdx + movdqa xmm10, xmm1 + psllq xmm10, $3 + shrd r13, r13, $17 + mov rdx, r14 + paddq xmm2, xmm8 + mov r12, rax + shrd r14, r14, $5 + movdqa xmm9, xmm1 + psrlq xmm9, $13 + xor r13, r11 + xor r12, rbx + pxor xmm11, xmm10 + shrd r13, r13, $4 + xor r14, rdx + psllq xmm10, $2A + and r12, r11 + xor r13, r11 + pxor xmm11, xmm9 + add rcx, qword [rsp + $28] + mov rdi, rdx + psrlq xmm9, $2A + xor r12, rbx + shrd r14, r14, $6 + pxor xmm11, xmm10 + xor rdi, r8 + add rcx, r12 + pxor xmm11, xmm9 + shrd r13, r13, $E + and r15, rdi + paddq xmm2, xmm11 + xor r14, rdx + add rcx, r13 + movdqa xmm10, xmm2 + paddq xmm10, oword [rbp - $40] + xor r15, r8 + shrd r14, r14, $1C + add r10, rcx + add rcx, r15 + mov r13, r10 + add r14, rcx + movdqa oword [rsp + $20], xmm10 + movdqa xmm8, xmm3 + shufpd xmm8, xmm4, $1 + shrd r13, r13, $17 + mov rcx, r14 + movdqa xmm11, xmm7 + shufpd xmm11, xmm0, $1 + mov r12, r11 + shrd r14, r14, $5 + movdqa xmm10, xmm8 + psrlq xmm10, $1 + xor r13, r10 + xor r12, rax + paddq xmm3, xmm11 + shrd r13, r13, $4 + xor r14, rcx + movdqa xmm11, xmm8 + psrlq xmm11, $7 + and r12, r10 + xor r13, r10 + movdqa xmm9, xmm8 + psllq xmm9, $38 + add rbx, qword [rsp + $30] + mov r15, rcx + movdqa xmm8, xmm11 + pxor xmm8, xmm10 + xor r12, rax + shrd r14, r14, $6 + psrlq xmm10, $7 + xor r15, rdx + add rbx, r12 + pxor xmm8, xmm9 + shrd r13, r13, $E + and rdi, r15 + psllq xmm9, $7 + xor r14, rcx + add rbx, r13 + pxor xmm8, xmm10 + xor rdi, rdx + shrd r14, r14, $1C + movdqa xmm11, xmm2 + psrlq xmm11, $6 + add r9, rbx + add rbx, rdi + pxor xmm8, xmm9 + mov r13, r9 + add r14, rbx + movdqa xmm10, xmm2 + psllq xmm10, $3 + shrd r13, r13, $17 + mov rbx, r14 + paddq xmm3, xmm8 + mov r12, r10 + shrd r14, r14, $5 + movdqa xmm9, xmm2 + psrlq xmm9, $13 + xor r13, r9 + xor r12, r11 + pxor xmm11, xmm10 + shrd r13, r13, $4 + xor r14, rbx + psllq xmm10, $2A + and r12, r9 + xor r13, r9 + pxor xmm11, xmm9 + add rax, qword [rsp + $38] + mov rdi, rbx + psrlq xmm9, $2A + xor r12, r11 + shrd r14, r14, $6 + pxor xmm11, xmm10 + xor rdi, rcx + add rax, r12 + pxor xmm11, xmm9 + shrd r13, r13, $E + and r15, rdi + paddq xmm3, xmm11 + xor r14, rbx + add rax, r13 + movdqa xmm10, xmm3 + paddq xmm10, oword [rbp - $20] + xor r15, rcx + shrd r14, r14, $1C + add r8, rax + add rax, r15 + mov r13, r8 + add r14, rax + movdqa oword [rsp + $30], xmm10 + movdqa xmm8, xmm4 + shufpd xmm8, xmm5, $1 + shrd r13, r13, $17 + mov rax, r14 + movdqa xmm11, xmm0 + shufpd xmm11, xmm1, $1 + mov r12, r9 + shrd r14, r14, $5 + movdqa xmm10, xmm8 + psrlq xmm10, $1 + xor r13, r8 + xor r12, r10 + paddq xmm4, xmm11 + shrd r13, r13, $4 + xor r14, rax + movdqa xmm11, xmm8 + psrlq xmm11, $7 + and r12, r8 + xor r13, r8 + movdqa xmm9, xmm8 + psllq xmm9, $38 + add r11, qword [rsp + $40] + mov r15, rax + movdqa xmm8, xmm11 + pxor xmm8, xmm10 + xor r12, r10 + shrd r14, r14, $6 + psrlq xmm10, $7 + xor r15, rbx + add r11, r12 + pxor xmm8, xmm9 + shrd r13, r13, $E + and rdi, r15 + psllq xmm9, $7 + xor r14, rax + add r11, r13 + pxor xmm8, xmm10 + xor rdi, rbx + shrd r14, r14, $1C + movdqa xmm11, xmm3 + psrlq xmm11, $6 + add rdx, r11 + add r11, rdi + pxor xmm8, xmm9 + mov r13, rdx + add r14, r11 + movdqa xmm10, xmm3 + psllq xmm10, $3 + shrd r13, r13, $17 + mov r11, r14 + paddq xmm4, xmm8 + mov r12, r8 + shrd r14, r14, $5 + movdqa xmm9, xmm3 + psrlq xmm9, $13 + xor r13, rdx + xor r12, r9 + pxor xmm11, xmm10 + shrd r13, r13, $4 + xor r14, r11 + psllq xmm10, $2A + and r12, rdx + xor r13, rdx + pxor xmm11, xmm9 + add r10, qword [rsp + $48] + mov rdi, r11 + psrlq xmm9, $2A + xor r12, r9 + shrd r14, r14, $6 + pxor xmm11, xmm10 + xor rdi, rax + add r10, r12 + pxor xmm11, xmm9 + shrd r13, r13, $E + and r15, rdi + paddq xmm4, xmm11 + xor r14, r11 + add r10, r13 + movdqa xmm10, xmm4 + paddq xmm10, oword [rbp + $0] + xor r15, rax + shrd r14, r14, $1C + add rcx, r10 + add r10, r15 + mov r13, rcx + add r14, r10 + movdqa oword [rsp + $40], xmm10 + movdqa xmm8, xmm5 + shufpd xmm8, xmm6, $1 + shrd r13, r13, $17 + mov r10, r14 + movdqa xmm11, xmm1 + shufpd xmm11, xmm2, $1 + mov r12, rdx + shrd r14, r14, $5 + movdqa xmm10, xmm8 + psrlq xmm10, $1 + xor r13, rcx + xor r12, r8 + paddq xmm5, xmm11 + shrd r13, r13, $4 + xor r14, r10 + movdqa xmm11, xmm8 + psrlq xmm11, $7 + and r12, rcx + xor r13, rcx + movdqa xmm9, xmm8 + psllq xmm9, $38 + add r9, qword [rsp + $50] + mov r15, r10 + movdqa xmm8, xmm11 + pxor xmm8, xmm10 + xor r12, r8 + shrd r14, r14, $6 + psrlq xmm10, $7 + xor r15, r11 + add r9, r12 + pxor xmm8, xmm9 + shrd r13, r13, $E + and rdi, r15 + psllq xmm9, $7 + xor r14, r10 + add r9, r13 + pxor xmm8, xmm10 + xor rdi, r11 + shrd r14, r14, $1C + movdqa xmm11, xmm4 + psrlq xmm11, $6 + add rbx, r9 + add r9, rdi + pxor xmm8, xmm9 + mov r13, rbx + add r14, r9 + movdqa xmm10, xmm4 + psllq xmm10, $3 + shrd r13, r13, $17 + mov r9, r14 + paddq xmm5, xmm8 + mov r12, rcx + shrd r14, r14, $5 + movdqa xmm9, xmm4 + psrlq xmm9, $13 + xor r13, rbx + xor r12, rdx + pxor xmm11, xmm10 + shrd r13, r13, $4 + xor r14, r9 + psllq xmm10, $2A + and r12, rbx + xor r13, rbx + pxor xmm11, xmm9 + add r8, qword [rsp + $58] + mov rdi, r9 + psrlq xmm9, $2A + xor r12, rdx + shrd r14, r14, $6 + pxor xmm11, xmm10 + xor rdi, r10 + add r8, r12 + pxor xmm11, xmm9 + shrd r13, r13, $E + and r15, rdi + paddq xmm5, xmm11 + xor r14, r9 + add r8, r13 + movdqa xmm10, xmm5 + paddq xmm10, oword [rbp + $20] + xor r15, r10 + shrd r14, r14, $1C + add rax, r8 + add r8, r15 + mov r13, rax + add r14, r8 + movdqa oword [rsp + $50], xmm10 + movdqa xmm8, xmm6 + shufpd xmm8, xmm7, $1 + shrd r13, r13, $17 + mov r8, r14 + movdqa xmm11, xmm2 + shufpd xmm11, xmm3, $1 + mov r12, rbx + shrd r14, r14, $5 + movdqa xmm10, xmm8 + psrlq xmm10, $1 + xor r13, rax + xor r12, rcx + paddq xmm6, xmm11 + shrd r13, r13, $4 + xor r14, r8 + movdqa xmm11, xmm8 + psrlq xmm11, $7 + and r12, rax + xor r13, rax + movdqa xmm9, xmm8 + psllq xmm9, $38 + add rdx, qword [rsp + $60] + mov r15, r8 + movdqa xmm8, xmm11 + pxor xmm8, xmm10 + xor r12, rcx + shrd r14, r14, $6 + psrlq xmm10, $7 + xor r15, r9 + add rdx, r12 + pxor xmm8, xmm9 + shrd r13, r13, $E + and rdi, r15 + psllq xmm9, $7 + xor r14, r8 + add rdx, r13 + pxor xmm8, xmm10 + xor rdi, r9 + shrd r14, r14, $1C + movdqa xmm11, xmm5 + psrlq xmm11, $6 + add r11, rdx + add rdx, rdi + pxor xmm8, xmm9 + mov r13, r11 + add r14, rdx + movdqa xmm10, xmm5 + psllq xmm10, $3 + shrd r13, r13, $17 + mov rdx, r14 + paddq xmm6, xmm8 + mov r12, rax + shrd r14, r14, $5 + movdqa xmm9, xmm5 + psrlq xmm9, $13 + xor r13, r11 + xor r12, rbx + pxor xmm11, xmm10 + shrd r13, r13, $4 + xor r14, rdx + psllq xmm10, $2A + and r12, r11 + xor r13, r11 + pxor xmm11, xmm9 + add rcx, qword [rsp + $68] + mov rdi, rdx + psrlq xmm9, $2A + xor r12, rbx + shrd r14, r14, $6 + pxor xmm11, xmm10 + xor rdi, r8 + add rcx, r12 + pxor xmm11, xmm9 + shrd r13, r13, $E + and r15, rdi + paddq xmm6, xmm11 + xor r14, rdx + add rcx, r13 + movdqa xmm10, xmm6 + paddq xmm10, oword [rbp + $40] + xor r15, r8 + shrd r14, r14, $1C + add r10, rcx + add rcx, r15 + mov r13, r10 + add r14, rcx + movdqa oword [rsp + $60], xmm10 + movdqa xmm8, xmm7 + shufpd xmm8, xmm0, $1 + shrd r13, r13, $17 + mov rcx, r14 + movdqa xmm11, xmm3 + shufpd xmm11, xmm4, $1 + mov r12, r11 + shrd r14, r14, $5 + movdqa xmm10, xmm8 + psrlq xmm10, $1 + xor r13, r10 + xor r12, rax + paddq xmm7, xmm11 + shrd r13, r13, $4 + xor r14, rcx + movdqa xmm11, xmm8 + psrlq xmm11, $7 + and r12, r10 + xor r13, r10 + movdqa xmm9, xmm8 + psllq xmm9, $38 + add rbx, qword [rsp + $70] + mov r15, rcx + movdqa xmm8, xmm11 + pxor xmm8, xmm10 + xor r12, rax + shrd r14, r14, $6 + psrlq xmm10, $7 + xor r15, rdx + add rbx, r12 + pxor xmm8, xmm9 + shrd r13, r13, $E + and rdi, r15 + psllq xmm9, $7 + xor r14, rcx + add rbx, r13 + pxor xmm8, xmm10 + xor rdi, rdx + shrd r14, r14, $1C + movdqa xmm11, xmm6 + psrlq xmm11, $6 + add r9, rbx + add rbx, rdi + pxor xmm8, xmm9 + mov r13, r9 + add r14, rbx + movdqa xmm10, xmm6 + psllq xmm10, $3 + shrd r13, r13, $17 + mov rbx, r14 + paddq xmm7, xmm8 + mov r12, r10 + shrd r14, r14, $5 + movdqa xmm9, xmm6 + psrlq xmm9, $13 + xor r13, r9 + xor r12, r11 + pxor xmm11, xmm10 + shrd r13, r13, $4 + xor r14, rbx + psllq xmm10, $2A + and r12, r9 + xor r13, r9 + pxor xmm11, xmm9 + add rax, qword [rsp + $78] + mov rdi, rbx + psrlq xmm9, $2A + xor r12, r11 + shrd r14, r14, $6 + pxor xmm11, xmm10 + xor rdi, rcx + add rax, r12 + pxor xmm11, xmm9 + shrd r13, r13, $E + and r15, rdi + paddq xmm7, xmm11 + xor r14, rbx + add rax, r13 + movdqa xmm10, xmm7 + paddq xmm10, oword [rbp + $60] + xor r15, rcx + shrd r14, r14, $1C + add r8, rax + add rax, r15 + mov r13, r8 + add r14, rax + movdqa oword [rsp + $70], xmm10 + cmp byte [rbp + $87], $0 + jne @sched_loop + shrd r13, r13, $17 + mov rax, r14 + mov r12, r9 + shrd r14, r14, $5 + xor r13, r8 + xor r12, r10 + shrd r13, r13, $4 + xor r14, rax + and r12, r8 + xor r13, r8 + add r11, qword [rsp] + mov r15, rax + xor r12, r10 + shrd r14, r14, $6 + xor r15, rbx + add r11, r12 + shrd r13, r13, $E + and rdi, r15 + xor r14, rax + add r11, r13 + xor rdi, rbx + shrd r14, r14, $1C + add rdx, r11 + add r11, rdi + mov r13, rdx + add r14, r11 + shrd r13, r13, $17 + mov r11, r14 + mov r12, r8 + shrd r14, r14, $5 + xor r13, rdx + xor r12, r9 + shrd r13, r13, $4 + xor r14, r11 + and r12, rdx + xor r13, rdx + add r10, qword [rsp + $8] + mov rdi, r11 + xor r12, r9 + shrd r14, r14, $6 + xor rdi, rax + add r10, r12 + shrd r13, r13, $E + and r15, rdi + xor r14, r11 + add r10, r13 + xor r15, rax + shrd r14, r14, $1C + add rcx, r10 + add r10, r15 + mov r13, rcx + add r14, r10 + shrd r13, r13, $17 + mov r10, r14 + mov r12, rdx + shrd r14, r14, $5 + xor r13, rcx + xor r12, r8 + shrd r13, r13, $4 + xor r14, r10 + and r12, rcx + xor r13, rcx + add r9, qword [rsp + $10] + mov r15, r10 + xor r12, r8 + shrd r14, r14, $6 + xor r15, r11 + add r9, r12 + shrd r13, r13, $E + and rdi, r15 + xor r14, r10 + add r9, r13 + xor rdi, r11 + shrd r14, r14, $1C + add rbx, r9 + add r9, rdi + mov r13, rbx + add r14, r9 + shrd r13, r13, $17 + mov r9, r14 + mov r12, rcx + shrd r14, r14, $5 + xor r13, rbx + xor r12, rdx + shrd r13, r13, $4 + xor r14, r9 + and r12, rbx + xor r13, rbx + add r8, qword [rsp + $18] + mov rdi, r9 + xor r12, rdx + shrd r14, r14, $6 + xor rdi, r10 + add r8, r12 + shrd r13, r13, $E + and r15, rdi + xor r14, r9 + add r8, r13 + xor r15, r10 + shrd r14, r14, $1C + add rax, r8 + add r8, r15 + mov r13, rax + add r14, r8 + shrd r13, r13, $17 + mov r8, r14 + mov r12, rbx + shrd r14, r14, $5 + xor r13, rax + xor r12, rcx + shrd r13, r13, $4 + xor r14, r8 + and r12, rax + xor r13, rax + add rdx, qword [rsp + $20] + mov r15, r8 + xor r12, rcx + shrd r14, r14, $6 + xor r15, r9 + add rdx, r12 + shrd r13, r13, $E + and rdi, r15 + xor r14, r8 + add rdx, r13 + xor rdi, r9 + shrd r14, r14, $1C + add r11, rdx + add rdx, rdi + mov r13, r11 + add r14, rdx + shrd r13, r13, $17 + mov rdx, r14 + mov r12, rax + shrd r14, r14, $5 + xor r13, r11 + xor r12, rbx + shrd r13, r13, $4 + xor r14, rdx + and r12, r11 + xor r13, r11 + add rcx, qword [rsp + $28] + mov rdi, rdx + xor r12, rbx + shrd r14, r14, $6 + xor rdi, r8 + add rcx, r12 + shrd r13, r13, $E + and r15, rdi + xor r14, rdx + add rcx, r13 + xor r15, r8 + shrd r14, r14, $1C + add r10, rcx + add rcx, r15 + mov r13, r10 + add r14, rcx + shrd r13, r13, $17 + mov rcx, r14 + mov r12, r11 + shrd r14, r14, $5 + xor r13, r10 + xor r12, rax + shrd r13, r13, $4 + xor r14, rcx + and r12, r10 + xor r13, r10 + add rbx, qword [rsp + $30] + mov r15, rcx + xor r12, rax + shrd r14, r14, $6 + xor r15, rdx + add rbx, r12 + shrd r13, r13, $E + and rdi, r15 + xor r14, rcx + add rbx, r13 + xor rdi, rdx + shrd r14, r14, $1C + add r9, rbx + add rbx, rdi + mov r13, r9 + add r14, rbx + shrd r13, r13, $17 + mov rbx, r14 + mov r12, r10 + shrd r14, r14, $5 + xor r13, r9 + xor r12, r11 + shrd r13, r13, $4 + xor r14, rbx + and r12, r9 + xor r13, r9 + add rax, qword [rsp + $38] + mov rdi, rbx + xor r12, r11 + shrd r14, r14, $6 + xor rdi, rcx + add rax, r12 + shrd r13, r13, $E + and r15, rdi + xor r14, rbx + add rax, r13 + xor r15, rcx + shrd r14, r14, $1C + add r8, rax + add rax, r15 + mov r13, r8 + add r14, rax + shrd r13, r13, $17 + mov rax, r14 + mov r12, r9 + shrd r14, r14, $5 + xor r13, r8 + xor r12, r10 + shrd r13, r13, $4 + xor r14, rax + and r12, r8 + xor r13, r8 + add r11, qword [rsp + $40] + mov r15, rax + xor r12, r10 + shrd r14, r14, $6 + xor r15, rbx + add r11, r12 + shrd r13, r13, $E + and rdi, r15 + xor r14, rax + add r11, r13 + xor rdi, rbx + shrd r14, r14, $1C + add rdx, r11 + add r11, rdi + mov r13, rdx + add r14, r11 + shrd r13, r13, $17 + mov r11, r14 + mov r12, r8 + shrd r14, r14, $5 + xor r13, rdx + xor r12, r9 + shrd r13, r13, $4 + xor r14, r11 + and r12, rdx + xor r13, rdx + add r10, qword [rsp + $48] + mov rdi, r11 + xor r12, r9 + shrd r14, r14, $6 + xor rdi, rax + add r10, r12 + shrd r13, r13, $E + and r15, rdi + xor r14, r11 + add r10, r13 + xor r15, rax + shrd r14, r14, $1C + add rcx, r10 + add r10, r15 + mov r13, rcx + add r14, r10 + shrd r13, r13, $17 + mov r10, r14 + mov r12, rdx + shrd r14, r14, $5 + xor r13, rcx + xor r12, r8 + shrd r13, r13, $4 + xor r14, r10 + and r12, rcx + xor r13, rcx + add r9, qword [rsp + $50] + mov r15, r10 + xor r12, r8 + shrd r14, r14, $6 + xor r15, r11 + add r9, r12 + shrd r13, r13, $E + and rdi, r15 + xor r14, r10 + add r9, r13 + xor rdi, r11 + shrd r14, r14, $1C + add rbx, r9 + add r9, rdi + mov r13, rbx + add r14, r9 + shrd r13, r13, $17 + mov r9, r14 + mov r12, rcx + shrd r14, r14, $5 + xor r13, rbx + xor r12, rdx + shrd r13, r13, $4 + xor r14, r9 + and r12, rbx + xor r13, rbx + add r8, qword [rsp + $58] + mov rdi, r9 + xor r12, rdx + shrd r14, r14, $6 + xor rdi, r10 + add r8, r12 + shrd r13, r13, $E + and r15, rdi + xor r14, r9 + add r8, r13 + xor r15, r10 + shrd r14, r14, $1C + add rax, r8 + add r8, r15 + mov r13, rax + add r14, r8 + shrd r13, r13, $17 + mov r8, r14 + mov r12, rbx + shrd r14, r14, $5 + xor r13, rax + xor r12, rcx + shrd r13, r13, $4 + xor r14, r8 + and r12, rax + xor r13, rax + add rdx, qword [rsp + $60] + mov r15, r8 + xor r12, rcx + shrd r14, r14, $6 + xor r15, r9 + add rdx, r12 + shrd r13, r13, $E + and rdi, r15 + xor r14, r8 + add rdx, r13 + xor rdi, r9 + shrd r14, r14, $1C + add r11, rdx + add rdx, rdi + mov r13, r11 + add r14, rdx + shrd r13, r13, $17 + mov rdx, r14 + mov r12, rax + shrd r14, r14, $5 + xor r13, r11 + xor r12, rbx + shrd r13, r13, $4 + xor r14, rdx + and r12, r11 + xor r13, r11 + add rcx, qword [rsp + $68] + mov rdi, rdx + xor r12, rbx + shrd r14, r14, $6 + xor rdi, r8 + add rcx, r12 + shrd r13, r13, $E + and r15, rdi + xor r14, rdx + add rcx, r13 + xor r15, r8 + shrd r14, r14, $1C + add r10, rcx + add rcx, r15 + mov r13, r10 + add r14, rcx + shrd r13, r13, $17 + mov rcx, r14 + mov r12, r11 + shrd r14, r14, $5 + xor r13, r10 + xor r12, rax + shrd r13, r13, $4 + xor r14, rcx + and r12, r10 + xor r13, r10 + add rbx, qword [rsp + $70] + mov r15, rcx + xor r12, rax + shrd r14, r14, $6 + xor r15, rdx + add rbx, r12 + shrd r13, r13, $E + and rdi, r15 + xor r14, rcx + add rbx, r13 + xor rdi, rdx + shrd r14, r14, $1C + add r9, rbx + add rbx, rdi + mov r13, r9 + add r14, rbx + shrd r13, r13, $17 + mov rbx, r14 + mov r12, r10 + shrd r14, r14, $5 + xor r13, r9 + xor r12, r11 + shrd r13, r13, $4 + xor r14, rbx + and r12, r9 + xor r13, r9 + add rax, qword [rsp + $78] + mov rdi, rbx + xor r12, r11 + shrd r14, r14, $6 + xor rdi, rcx + add rax, r12 + shrd r13, r13, $E + and r15, rdi + xor r14, rbx + add rax, r13 + xor r15, rcx + shrd r14, r14, $1C + add r8, rax + add rax, r15 + mov r13, r8 + add r14, rax + mov rdi, qword [rsp + $80] + mov rax, r14 + add rax, qword [rdi] + lea rsi, [rsi + $80] + add rbx, qword [rdi + $8] + add rcx, qword [rdi + $10] + add rdx, qword [rdi + $18] + add r8, qword [rdi + $20] + add r9, qword [rdi + $28] + add r10, qword [rdi + $30] + add r11, qword [rdi + $38] + cmp rsi, qword [rsp + $90] + mov qword [rdi], rax + mov qword [rdi + $8], rbx + mov qword [rdi + $10], rcx + mov qword [rdi + $18], rdx + mov qword [rdi + $20], r8 + mov qword [rdi + $28], r9 + mov qword [rdi + $30], r10 + mov qword [rdi + $38], r11 + jb @block_loop + mov rsp, qword [rsp + $98] + pop r15 + pop r14 + pop r13 + pop r12 + pop rdi + pop rsi + pop rbp + pop rbx - mov rbx, [rsp + $20] - mov rbp, [rsp + $28] - mov r12, [rsp + $40] - mov r13, [rsp + $48] - mov r14, [rsp + $50] - mov r15, [rsp + $58] - mov rdi, [rsp + $30] - mov rsi, [rsp + $38] - add rsp, 1016 + {$I ..\Include\Simd\Common\SimdNonVolatileRestore_x86_64.inc} diff --git a/HashLib/src/Include/Simd/SHA512/SHA512CompressSsse3_i386.inc b/HashLib/src/Include/Simd/SHA512/SHA512CompressSsse3_i386.inc deleted file mode 100644 index d0fcfe41..00000000 --- a/HashLib/src/Include/Simd/SHA512/SHA512CompressSsse3_i386.inc +++ /dev/null @@ -1,1302 +0,0 @@ -// SHA-512 SSSE3 implementation (IA-32). -// Based on SHA512CompressSsse3_x86_64.inc (x86-64); same algorithm as SSE2 i386 but Phase 1 uses pshufb. -// IA-32: after SimdProc5Begin_i386 — ebx = state, esi = data, edi = numblocks, -// eax = K512 ptr (80 UInt64 round constants), ecx = BSWAP64 mask ptr (16 bytes) -// (parallel to MS x64 ABI: rcx, rdx, r8d, r9, r10). -// maskptr saved to [esp+$34] in the prologue; reloaded (into eax) each block. -// Phase 1: SSSE3 xmm0/xmm4/xmm7 (mask); ebx = W ring @ [esp+$2F0], ebp = W+K @ [esp+$70]. -// Phase 2: rax..r11 in [esp+880]..[esp+936] (8 qwords). -// Scratch: expand [esp+$3B8]..$3E0; shrd [esp+1000]/[esp+1004]; and M,M [esp+1008]..1015. -// After expand, [esp+$3BC] = W+K end ptr (K512 ptr only during expand); x64 r15 equivalent. - - - sub esp, 1016 - - movdqu oword ptr [esp], xmm6 - movdqu oword ptr [esp + $10], xmm7 - mov dword ptr [esp + $20], ebx - mov dword ptr [esp + $24], esi - mov dword ptr [esp + $28], edi - mov dword ptr [esp + $2C], eax - mov dword ptr [esp + $30], ebp - mov dword ptr [esp + $34], ecx - - cmp dword ptr [esp + $28], 0 - jz @ssse3_512_done - -@ssse3_512_block_loop: - mov eax, dword ptr [esp + $34] - movdqu xmm7, oword ptr [eax] - mov eax, dword ptr [esp + $2C] - lea ebp, [esp + $70] - lea ebx, [esp + $2F0] - mov esi, dword ptr [esp + $24] - - movdqu xmm0, oword ptr [esi+$0] - pshufb xmm0, xmm7 - movdqu oword ptr [ebx+$0], xmm0 - movdqu xmm4, oword ptr [eax+$0] - paddq xmm4, xmm0 - movdqu oword ptr [ebp+$0], xmm4 - - movdqu xmm0, oword ptr [esi+$10] - pshufb xmm0, xmm7 - movdqu oword ptr [ebx+$10], xmm0 - movdqu xmm4, oword ptr [eax+$10] - paddq xmm4, xmm0 - movdqu oword ptr [ebp+$10], xmm4 - - movdqu xmm0, oword ptr [esi+$20] - pshufb xmm0, xmm7 - movdqu oword ptr [ebx+$20], xmm0 - movdqu xmm4, oword ptr [eax+$20] - paddq xmm4, xmm0 - movdqu oword ptr [ebp+$20], xmm4 - - movdqu xmm0, oword ptr [esi+$30] - pshufb xmm0, xmm7 - movdqu oword ptr [ebx+$30], xmm0 - movdqu xmm4, oword ptr [eax+$30] - paddq xmm4, xmm0 - movdqu oword ptr [ebp+$30], xmm4 - - movdqu xmm0, oword ptr [esi+$40] - pshufb xmm0, xmm7 - movdqu oword ptr [ebx+$40], xmm0 - movdqu xmm4, oword ptr [eax+$40] - paddq xmm4, xmm0 - movdqu oword ptr [ebp+$40], xmm4 - - movdqu xmm0, oword ptr [esi+$50] - pshufb xmm0, xmm7 - movdqu oword ptr [ebx+$50], xmm0 - movdqu xmm4, oword ptr [eax+$50] - paddq xmm4, xmm0 - movdqu oword ptr [ebp+$50], xmm4 - - movdqu xmm0, oword ptr [esi+$60] - pshufb xmm0, xmm7 - movdqu oword ptr [ebx+$60], xmm0 - movdqu xmm4, oword ptr [eax+$60] - paddq xmm4, xmm0 - movdqu oword ptr [ebp+$60], xmm4 - - movdqu xmm0, oword ptr [esi+$70] - pshufb xmm0, xmm7 - movdqu oword ptr [ebx+$70], xmm0 - movdqu xmm4, oword ptr [eax+$70] - paddq xmm4, xmm0 - movdqu oword ptr [ebp+$70], xmm4 - - mov dword ptr [esp + $3BC], eax - - mov dword ptr [esp + $3B8], 16 - -@ssse3_512_expand_loop: - mov ecx, dword ptr [esp + $3B8] - mov edx, ecx - sub edx, 2 - and edx, 15 - mov esi, dword ptr [ebx+edx*8] - mov edi, dword ptr [ebx+edx*8+4] - - mov eax, esi - mov edx, edi - mov dword ptr [esp + $3E0], ecx - mov ecx, eax - shrd eax, edx, 19 - shrd edx, ecx, 19 - mov ecx, dword ptr [esp + $3E0] - mov dword ptr [esp + $3C0], eax - mov dword ptr [esp + $3C4], edx - - mov eax, esi - mov edx, edi - mov dword ptr [esp + $3E0], ecx - xchg eax, edx - mov ecx, eax - shrd eax, edx, 29 - shrd edx, ecx, 29 - mov ecx, dword ptr [esp + $3E0] - xor dword ptr [esp + $3C0], eax - xor dword ptr [esp + $3C4], edx - - mov eax, esi - mov edx, edi - shrd eax, edx, 6 - shr edx, 6 - xor dword ptr [esp + $3C0], eax - xor dword ptr [esp + $3C4], edx - - mov ecx, dword ptr [esp + $3B8] - mov esi, ecx - sub esi, 7 - and esi, 15 - mov eax, dword ptr [ebx+esi*8] - mov edx, dword ptr [ebx+esi*8+4] - add eax, dword ptr [esp + $3C0] - adc edx, dword ptr [esp + $3C4] - mov dword ptr [esp + $3C0], eax - mov dword ptr [esp + $3C4], edx - - mov ecx, dword ptr [esp + $3B8] - mov esi, ecx - sub esi, 15 - and esi, 15 - mov eax, dword ptr [ebx+esi*8] - mov edx, dword ptr [ebx+esi*8+4] - - mov esi, eax - mov edi, edx - mov eax, esi - mov edx, edi - mov dword ptr [esp + $3E0], ecx - mov ecx, eax - shrd eax, edx, 1 - shrd edx, ecx, 1 - mov ecx, dword ptr [esp + $3E0] - mov dword ptr [esp + $3C8], eax - mov dword ptr [esp + $3CC], edx - - mov eax, esi - mov edx, edi - mov dword ptr [esp + $3E0], ecx - mov ecx, eax - shrd eax, edx, 8 - shrd edx, ecx, 8 - mov ecx, dword ptr [esp + $3E0] - xor dword ptr [esp + $3C8], eax - xor dword ptr [esp + $3CC], edx - - mov eax, esi - mov edx, edi - shrd eax, edx, 7 - shr edx, 7 - xor dword ptr [esp + $3C8], eax - xor dword ptr [esp + $3CC], edx - - mov eax, dword ptr [esp + $3C0] - mov edx, dword ptr [esp + $3C4] - add eax, dword ptr [esp + $3C8] - adc edx, dword ptr [esp + $3CC] - mov dword ptr [esp + $3C0], eax - mov dword ptr [esp + $3C4], edx - - mov ecx, dword ptr [esp + $3B8] - mov esi, ecx - sub esi, 16 - and esi, 15 - add eax, dword ptr [ebx+esi*8] - adc edx, dword ptr [ebx+esi*8+4] - - mov ecx, dword ptr [esp + $3B8] - mov esi, ecx - and esi, 15 - mov dword ptr [ebx+esi*8], eax - mov dword ptr [ebx+esi*8+4], edx - - mov dword ptr [esp + $3D0], eax - mov dword ptr [esp + $3D4], edx - mov ecx, dword ptr [esp + $3B8] - mov eax, dword ptr [esp + $3BC] - mov esi, dword ptr [eax+ecx*8] - mov edi, dword ptr [eax+ecx*8+4] - add esi, dword ptr [esp + $3D0] - adc edi, dword ptr [esp + $3D4] - mov dword ptr [ebp+ecx*8], esi - mov dword ptr [ebp+ecx*8+4], edi - - inc dword ptr [esp + $3B8] - mov ecx, dword ptr [esp + $3B8] - cmp ecx, 80 - jb @ssse3_512_expand_loop - mov esi, dword ptr [esp+$20] - mov eax, dword ptr [esi+$0] - mov edx, dword ptr [esi+$0+4] - mov dword ptr [esp+880], eax - mov dword ptr [esp+880+4], edx - mov eax, dword ptr [esi+$8] - mov edx, dword ptr [esi+$8+4] - mov dword ptr [esp+888], eax - mov dword ptr [esp+888+4], edx - mov eax, dword ptr [esi+$10] - mov edx, dword ptr [esi+$10+4] - mov dword ptr [esp+896], eax - mov dword ptr [esp+896+4], edx - mov eax, dword ptr [esi+$18] - mov edx, dword ptr [esi+$18+4] - mov dword ptr [esp+904], eax - mov dword ptr [esp+904+4], edx - mov eax, dword ptr [esi+$20] - mov edx, dword ptr [esi+$20+4] - mov dword ptr [esp+912], eax - mov dword ptr [esp+912+4], edx - mov eax, dword ptr [esi+$28] - mov edx, dword ptr [esi+$28+4] - mov dword ptr [esp+920], eax - mov dword ptr [esp+920+4], edx - mov eax, dword ptr [esi+$30] - mov edx, dword ptr [esi+$30+4] - mov dword ptr [esp+928], eax - mov dword ptr [esp+928+4], edx - mov eax, dword ptr [esi+$38] - mov edx, dword ptr [esi+$38+4] - mov dword ptr [esp+936], eax - mov dword ptr [esp+936+4], edx - - lea eax, [ebp + $280] - mov dword ptr [esp + $3BC], eax - -@ssse3_512_round_loop: - mov esi, dword ptr [esp+912] - mov edi, dword ptr [esp+912+4] - mov ebx, dword ptr [esp+912] - mov ecx, dword ptr [esp+912+4] - mov dword ptr [esp+1000], esi - shrd esi, edi, 14 - mov eax, dword ptr [esp+1000] - shrd edi, eax, 14 - mov dword ptr [esp+1000], ebx - shrd ebx, ecx, 18 - mov eax, dword ptr [esp+1000] - shrd ecx, eax, 18 - xor esi, ebx - xor edi, ecx - mov dword ptr [esp+1000], ebx - shrd ebx, ecx, 23 - mov eax, dword ptr [esp+1000] - shrd ecx, eax, 23 - xor esi, ebx - xor edi, ecx - mov ebx, dword ptr [esp+920] - mov ecx, dword ptr [esp+920+4] - mov eax, dword ptr [esp+928] - mov edx, dword ptr [esp+928+4] - xor ebx, eax - xor ecx, edx - mov eax, dword ptr [esp+912] - mov edx, dword ptr [esp+912+4] - and ebx, eax - and ecx, edx - mov eax, dword ptr [esp+928] - mov edx, dword ptr [esp+928+4] - xor ebx, eax - xor ecx, edx - mov eax, dword ptr [esp+936] - mov edx, dword ptr [esp+936+4] - add esi, eax - adc edi, edx - add esi, ebx - adc edi, ecx - add esi, dword ptr [ebp+0] - adc edi, dword ptr [ebp+0+4] - mov eax, dword ptr [esp+904] - mov edx, dword ptr [esp+904+4] - add eax, esi - adc edx, edi - mov dword ptr [esp+904], eax - mov dword ptr [esp+904+4], edx - mov ebx, dword ptr [esp+880] - mov ecx, dword ptr [esp+880+4] - mov eax, dword ptr [esp+880] - mov edx, dword ptr [esp+880+4] - mov dword ptr [esp+936], eax - mov dword ptr [esp+936+4], edx - mov dword ptr [esp+1000], ebx - shrd ebx, ecx, 28 - mov eax, dword ptr [esp+1000] - shrd ecx, eax, 28 - mov eax, dword ptr [esp+936] - mov edx, dword ptr [esp+936+4] - xchg eax, edx - mov dword ptr [esp+1000], eax - shrd eax, edx, 2 - mov dword ptr [esp+1004], eax - mov eax, dword ptr [esp+1000] - shrd edx, eax, 2 - mov eax, dword ptr [esp+1004] - mov dword ptr [esp+936], eax - mov dword ptr [esp+936+4], edx - mov eax, dword ptr [esp+936] - mov edx, dword ptr [esp+936+4] - xor ebx, eax - xor ecx, edx - mov eax, dword ptr [esp+936] - mov edx, dword ptr [esp+936+4] - mov dword ptr [esp+1000], eax - shrd eax, edx, 5 - mov dword ptr [esp+1004], eax - mov eax, dword ptr [esp+1000] - shrd edx, eax, 5 - mov eax, dword ptr [esp+1004] - mov dword ptr [esp+936], eax - mov dword ptr [esp+936+4], edx - mov eax, dword ptr [esp+936] - mov edx, dword ptr [esp+936+4] - xor ebx, eax - xor ecx, edx - add esi, ebx - adc edi, ecx - mov eax, dword ptr [esp+880] - mov edx, dword ptr [esp+880+4] - mov dword ptr [esp+936], eax - mov dword ptr [esp+936+4], edx - mov eax, dword ptr [esp+888] - mov dword ptr [esp+1008], eax - mov eax, dword ptr [esp+888+4] - mov dword ptr [esp+1008+4], eax - mov eax, dword ptr [esp+936] - mov edx, dword ptr [esp+936+4] - and eax, dword ptr [esp+1008] - and edx, dword ptr [esp+1008+4] - mov dword ptr [esp+936], eax - mov dword ptr [esp+936+4], edx - mov ebx, dword ptr [esp+880] - mov ecx, dword ptr [esp+880+4] - mov eax, dword ptr [esp+888] - mov edx, dword ptr [esp+888+4] - xor ebx, eax - xor ecx, edx - mov eax, dword ptr [esp+896] - mov edx, dword ptr [esp+896+4] - and ebx, eax - and ecx, edx - mov eax, dword ptr [esp+936] - mov edx, dword ptr [esp+936+4] - xor eax, ebx - xor edx, ecx - mov dword ptr [esp+936], eax - mov dword ptr [esp+936+4], edx - mov eax, dword ptr [esp+936] - mov edx, dword ptr [esp+936+4] - add eax, esi - adc edx, edi - mov dword ptr [esp+936], eax - mov dword ptr [esp+936+4], edx - mov esi, dword ptr [esp+904] - mov edi, dword ptr [esp+904+4] - mov ebx, dword ptr [esp+904] - mov ecx, dword ptr [esp+904+4] - mov dword ptr [esp+1000], esi - shrd esi, edi, 14 - mov eax, dword ptr [esp+1000] - shrd edi, eax, 14 - mov dword ptr [esp+1000], ebx - shrd ebx, ecx, 18 - mov eax, dword ptr [esp+1000] - shrd ecx, eax, 18 - xor esi, ebx - xor edi, ecx - mov dword ptr [esp+1000], ebx - shrd ebx, ecx, 23 - mov eax, dword ptr [esp+1000] - shrd ecx, eax, 23 - xor esi, ebx - xor edi, ecx - mov ebx, dword ptr [esp+912] - mov ecx, dword ptr [esp+912+4] - mov eax, dword ptr [esp+920] - mov edx, dword ptr [esp+920+4] - xor ebx, eax - xor ecx, edx - mov eax, dword ptr [esp+904] - mov edx, dword ptr [esp+904+4] - and ebx, eax - and ecx, edx - mov eax, dword ptr [esp+920] - mov edx, dword ptr [esp+920+4] - xor ebx, eax - xor ecx, edx - mov eax, dword ptr [esp+928] - mov edx, dword ptr [esp+928+4] - add esi, eax - adc edi, edx - add esi, ebx - adc edi, ecx - add esi, dword ptr [ebp+8] - adc edi, dword ptr [ebp+8+4] - mov eax, dword ptr [esp+896] - mov edx, dword ptr [esp+896+4] - add eax, esi - adc edx, edi - mov dword ptr [esp+896], eax - mov dword ptr [esp+896+4], edx - mov ebx, dword ptr [esp+936] - mov ecx, dword ptr [esp+936+4] - mov eax, dword ptr [esp+936] - mov edx, dword ptr [esp+936+4] - mov dword ptr [esp+928], eax - mov dword ptr [esp+928+4], edx - mov dword ptr [esp+1000], ebx - shrd ebx, ecx, 28 - mov eax, dword ptr [esp+1000] - shrd ecx, eax, 28 - mov eax, dword ptr [esp+928] - mov edx, dword ptr [esp+928+4] - xchg eax, edx - mov dword ptr [esp+1000], eax - shrd eax, edx, 2 - mov dword ptr [esp+1004], eax - mov eax, dword ptr [esp+1000] - shrd edx, eax, 2 - mov eax, dword ptr [esp+1004] - mov dword ptr [esp+928], eax - mov dword ptr [esp+928+4], edx - mov eax, dword ptr [esp+928] - mov edx, dword ptr [esp+928+4] - xor ebx, eax - xor ecx, edx - mov eax, dword ptr [esp+928] - mov edx, dword ptr [esp+928+4] - mov dword ptr [esp+1000], eax - shrd eax, edx, 5 - mov dword ptr [esp+1004], eax - mov eax, dword ptr [esp+1000] - shrd edx, eax, 5 - mov eax, dword ptr [esp+1004] - mov dword ptr [esp+928], eax - mov dword ptr [esp+928+4], edx - mov eax, dword ptr [esp+928] - mov edx, dword ptr [esp+928+4] - xor ebx, eax - xor ecx, edx - add esi, ebx - adc edi, ecx - mov eax, dword ptr [esp+936] - mov edx, dword ptr [esp+936+4] - mov dword ptr [esp+928], eax - mov dword ptr [esp+928+4], edx - mov eax, dword ptr [esp+880] - mov dword ptr [esp+1008], eax - mov eax, dword ptr [esp+880+4] - mov dword ptr [esp+1008+4], eax - mov eax, dword ptr [esp+928] - mov edx, dword ptr [esp+928+4] - and eax, dword ptr [esp+1008] - and edx, dword ptr [esp+1008+4] - mov dword ptr [esp+928], eax - mov dword ptr [esp+928+4], edx - mov ebx, dword ptr [esp+936] - mov ecx, dword ptr [esp+936+4] - mov eax, dword ptr [esp+880] - mov edx, dword ptr [esp+880+4] - xor ebx, eax - xor ecx, edx - mov eax, dword ptr [esp+888] - mov edx, dword ptr [esp+888+4] - and ebx, eax - and ecx, edx - mov eax, dword ptr [esp+928] - mov edx, dword ptr [esp+928+4] - xor eax, ebx - xor edx, ecx - mov dword ptr [esp+928], eax - mov dword ptr [esp+928+4], edx - mov eax, dword ptr [esp+928] - mov edx, dword ptr [esp+928+4] - add eax, esi - adc edx, edi - mov dword ptr [esp+928], eax - mov dword ptr [esp+928+4], edx - mov esi, dword ptr [esp+896] - mov edi, dword ptr [esp+896+4] - mov ebx, dword ptr [esp+896] - mov ecx, dword ptr [esp+896+4] - mov dword ptr [esp+1000], esi - shrd esi, edi, 14 - mov eax, dword ptr [esp+1000] - shrd edi, eax, 14 - mov dword ptr [esp+1000], ebx - shrd ebx, ecx, 18 - mov eax, dword ptr [esp+1000] - shrd ecx, eax, 18 - xor esi, ebx - xor edi, ecx - mov dword ptr [esp+1000], ebx - shrd ebx, ecx, 23 - mov eax, dword ptr [esp+1000] - shrd ecx, eax, 23 - xor esi, ebx - xor edi, ecx - mov ebx, dword ptr [esp+904] - mov ecx, dword ptr [esp+904+4] - mov eax, dword ptr [esp+912] - mov edx, dword ptr [esp+912+4] - xor ebx, eax - xor ecx, edx - mov eax, dword ptr [esp+896] - mov edx, dword ptr [esp+896+4] - and ebx, eax - and ecx, edx - mov eax, dword ptr [esp+912] - mov edx, dword ptr [esp+912+4] - xor ebx, eax - xor ecx, edx - mov eax, dword ptr [esp+920] - mov edx, dword ptr [esp+920+4] - add esi, eax - adc edi, edx - add esi, ebx - adc edi, ecx - add esi, dword ptr [ebp+16] - adc edi, dword ptr [ebp+16+4] - mov eax, dword ptr [esp+888] - mov edx, dword ptr [esp+888+4] - add eax, esi - adc edx, edi - mov dword ptr [esp+888], eax - mov dword ptr [esp+888+4], edx - mov ebx, dword ptr [esp+928] - mov ecx, dword ptr [esp+928+4] - mov eax, dword ptr [esp+928] - mov edx, dword ptr [esp+928+4] - mov dword ptr [esp+920], eax - mov dword ptr [esp+920+4], edx - mov dword ptr [esp+1000], ebx - shrd ebx, ecx, 28 - mov eax, dword ptr [esp+1000] - shrd ecx, eax, 28 - mov eax, dword ptr [esp+920] - mov edx, dword ptr [esp+920+4] - xchg eax, edx - mov dword ptr [esp+1000], eax - shrd eax, edx, 2 - mov dword ptr [esp+1004], eax - mov eax, dword ptr [esp+1000] - shrd edx, eax, 2 - mov eax, dword ptr [esp+1004] - mov dword ptr [esp+920], eax - mov dword ptr [esp+920+4], edx - mov eax, dword ptr [esp+920] - mov edx, dword ptr [esp+920+4] - xor ebx, eax - xor ecx, edx - mov eax, dword ptr [esp+920] - mov edx, dword ptr [esp+920+4] - mov dword ptr [esp+1000], eax - shrd eax, edx, 5 - mov dword ptr [esp+1004], eax - mov eax, dword ptr [esp+1000] - shrd edx, eax, 5 - mov eax, dword ptr [esp+1004] - mov dword ptr [esp+920], eax - mov dword ptr [esp+920+4], edx - mov eax, dword ptr [esp+920] - mov edx, dword ptr [esp+920+4] - xor ebx, eax - xor ecx, edx - add esi, ebx - adc edi, ecx - mov eax, dword ptr [esp+928] - mov edx, dword ptr [esp+928+4] - mov dword ptr [esp+920], eax - mov dword ptr [esp+920+4], edx - mov eax, dword ptr [esp+936] - mov dword ptr [esp+1008], eax - mov eax, dword ptr [esp+936+4] - mov dword ptr [esp+1008+4], eax - mov eax, dword ptr [esp+920] - mov edx, dword ptr [esp+920+4] - and eax, dword ptr [esp+1008] - and edx, dword ptr [esp+1008+4] - mov dword ptr [esp+920], eax - mov dword ptr [esp+920+4], edx - mov ebx, dword ptr [esp+928] - mov ecx, dword ptr [esp+928+4] - mov eax, dword ptr [esp+936] - mov edx, dword ptr [esp+936+4] - xor ebx, eax - xor ecx, edx - mov eax, dword ptr [esp+880] - mov edx, dword ptr [esp+880+4] - and ebx, eax - and ecx, edx - mov eax, dword ptr [esp+920] - mov edx, dword ptr [esp+920+4] - xor eax, ebx - xor edx, ecx - mov dword ptr [esp+920], eax - mov dword ptr [esp+920+4], edx - mov eax, dword ptr [esp+920] - mov edx, dword ptr [esp+920+4] - add eax, esi - adc edx, edi - mov dword ptr [esp+920], eax - mov dword ptr [esp+920+4], edx - mov esi, dword ptr [esp+888] - mov edi, dword ptr [esp+888+4] - mov ebx, dword ptr [esp+888] - mov ecx, dword ptr [esp+888+4] - mov dword ptr [esp+1000], esi - shrd esi, edi, 14 - mov eax, dword ptr [esp+1000] - shrd edi, eax, 14 - mov dword ptr [esp+1000], ebx - shrd ebx, ecx, 18 - mov eax, dword ptr [esp+1000] - shrd ecx, eax, 18 - xor esi, ebx - xor edi, ecx - mov dword ptr [esp+1000], ebx - shrd ebx, ecx, 23 - mov eax, dword ptr [esp+1000] - shrd ecx, eax, 23 - xor esi, ebx - xor edi, ecx - mov ebx, dword ptr [esp+896] - mov ecx, dword ptr [esp+896+4] - mov eax, dword ptr [esp+904] - mov edx, dword ptr [esp+904+4] - xor ebx, eax - xor ecx, edx - mov eax, dword ptr [esp+888] - mov edx, dword ptr [esp+888+4] - and ebx, eax - and ecx, edx - mov eax, dword ptr [esp+904] - mov edx, dword ptr [esp+904+4] - xor ebx, eax - xor ecx, edx - mov eax, dword ptr [esp+912] - mov edx, dword ptr [esp+912+4] - add esi, eax - adc edi, edx - add esi, ebx - adc edi, ecx - add esi, dword ptr [ebp+24] - adc edi, dword ptr [ebp+24+4] - mov eax, dword ptr [esp+880] - mov edx, dword ptr [esp+880+4] - add eax, esi - adc edx, edi - mov dword ptr [esp+880], eax - mov dword ptr [esp+880+4], edx - mov ebx, dword ptr [esp+920] - mov ecx, dword ptr [esp+920+4] - mov eax, dword ptr [esp+920] - mov edx, dword ptr [esp+920+4] - mov dword ptr [esp+912], eax - mov dword ptr [esp+912+4], edx - mov dword ptr [esp+1000], ebx - shrd ebx, ecx, 28 - mov eax, dword ptr [esp+1000] - shrd ecx, eax, 28 - mov eax, dword ptr [esp+912] - mov edx, dword ptr [esp+912+4] - xchg eax, edx - mov dword ptr [esp+1000], eax - shrd eax, edx, 2 - mov dword ptr [esp+1004], eax - mov eax, dword ptr [esp+1000] - shrd edx, eax, 2 - mov eax, dword ptr [esp+1004] - mov dword ptr [esp+912], eax - mov dword ptr [esp+912+4], edx - mov eax, dword ptr [esp+912] - mov edx, dword ptr [esp+912+4] - xor ebx, eax - xor ecx, edx - mov eax, dword ptr [esp+912] - mov edx, dword ptr [esp+912+4] - mov dword ptr [esp+1000], eax - shrd eax, edx, 5 - mov dword ptr [esp+1004], eax - mov eax, dword ptr [esp+1000] - shrd edx, eax, 5 - mov eax, dword ptr [esp+1004] - mov dword ptr [esp+912], eax - mov dword ptr [esp+912+4], edx - mov eax, dword ptr [esp+912] - mov edx, dword ptr [esp+912+4] - xor ebx, eax - xor ecx, edx - add esi, ebx - adc edi, ecx - mov eax, dword ptr [esp+920] - mov edx, dword ptr [esp+920+4] - mov dword ptr [esp+912], eax - mov dword ptr [esp+912+4], edx - mov eax, dword ptr [esp+928] - mov dword ptr [esp+1008], eax - mov eax, dword ptr [esp+928+4] - mov dword ptr [esp+1008+4], eax - mov eax, dword ptr [esp+912] - mov edx, dword ptr [esp+912+4] - and eax, dword ptr [esp+1008] - and edx, dword ptr [esp+1008+4] - mov dword ptr [esp+912], eax - mov dword ptr [esp+912+4], edx - mov ebx, dword ptr [esp+920] - mov ecx, dword ptr [esp+920+4] - mov eax, dword ptr [esp+928] - mov edx, dword ptr [esp+928+4] - xor ebx, eax - xor ecx, edx - mov eax, dword ptr [esp+936] - mov edx, dword ptr [esp+936+4] - and ebx, eax - and ecx, edx - mov eax, dword ptr [esp+912] - mov edx, dword ptr [esp+912+4] - xor eax, ebx - xor edx, ecx - mov dword ptr [esp+912], eax - mov dword ptr [esp+912+4], edx - mov eax, dword ptr [esp+912] - mov edx, dword ptr [esp+912+4] - add eax, esi - adc edx, edi - mov dword ptr [esp+912], eax - mov dword ptr [esp+912+4], edx - mov esi, dword ptr [esp+880] - mov edi, dword ptr [esp+880+4] - mov ebx, dword ptr [esp+880] - mov ecx, dword ptr [esp+880+4] - mov dword ptr [esp+1000], esi - shrd esi, edi, 14 - mov eax, dword ptr [esp+1000] - shrd edi, eax, 14 - mov dword ptr [esp+1000], ebx - shrd ebx, ecx, 18 - mov eax, dword ptr [esp+1000] - shrd ecx, eax, 18 - xor esi, ebx - xor edi, ecx - mov dword ptr [esp+1000], ebx - shrd ebx, ecx, 23 - mov eax, dword ptr [esp+1000] - shrd ecx, eax, 23 - xor esi, ebx - xor edi, ecx - mov ebx, dword ptr [esp+888] - mov ecx, dword ptr [esp+888+4] - mov eax, dword ptr [esp+896] - mov edx, dword ptr [esp+896+4] - xor ebx, eax - xor ecx, edx - mov eax, dword ptr [esp+880] - mov edx, dword ptr [esp+880+4] - and ebx, eax - and ecx, edx - mov eax, dword ptr [esp+896] - mov edx, dword ptr [esp+896+4] - xor ebx, eax - xor ecx, edx - mov eax, dword ptr [esp+904] - mov edx, dword ptr [esp+904+4] - add esi, eax - adc edi, edx - add esi, ebx - adc edi, ecx - add esi, dword ptr [ebp+32] - adc edi, dword ptr [ebp+32+4] - mov eax, dword ptr [esp+936] - mov edx, dword ptr [esp+936+4] - add eax, esi - adc edx, edi - mov dword ptr [esp+936], eax - mov dword ptr [esp+936+4], edx - mov ebx, dword ptr [esp+912] - mov ecx, dword ptr [esp+912+4] - mov eax, dword ptr [esp+912] - mov edx, dword ptr [esp+912+4] - mov dword ptr [esp+904], eax - mov dword ptr [esp+904+4], edx - mov dword ptr [esp+1000], ebx - shrd ebx, ecx, 28 - mov eax, dword ptr [esp+1000] - shrd ecx, eax, 28 - mov eax, dword ptr [esp+904] - mov edx, dword ptr [esp+904+4] - xchg eax, edx - mov dword ptr [esp+1000], eax - shrd eax, edx, 2 - mov dword ptr [esp+1004], eax - mov eax, dword ptr [esp+1000] - shrd edx, eax, 2 - mov eax, dword ptr [esp+1004] - mov dword ptr [esp+904], eax - mov dword ptr [esp+904+4], edx - mov eax, dword ptr [esp+904] - mov edx, dword ptr [esp+904+4] - xor ebx, eax - xor ecx, edx - mov eax, dword ptr [esp+904] - mov edx, dword ptr [esp+904+4] - mov dword ptr [esp+1000], eax - shrd eax, edx, 5 - mov dword ptr [esp+1004], eax - mov eax, dword ptr [esp+1000] - shrd edx, eax, 5 - mov eax, dword ptr [esp+1004] - mov dword ptr [esp+904], eax - mov dword ptr [esp+904+4], edx - mov eax, dword ptr [esp+904] - mov edx, dword ptr [esp+904+4] - xor ebx, eax - xor ecx, edx - add esi, ebx - adc edi, ecx - mov eax, dword ptr [esp+912] - mov edx, dword ptr [esp+912+4] - mov dword ptr [esp+904], eax - mov dword ptr [esp+904+4], edx - mov eax, dword ptr [esp+920] - mov dword ptr [esp+1008], eax - mov eax, dword ptr [esp+920+4] - mov dword ptr [esp+1008+4], eax - mov eax, dword ptr [esp+904] - mov edx, dword ptr [esp+904+4] - and eax, dword ptr [esp+1008] - and edx, dword ptr [esp+1008+4] - mov dword ptr [esp+904], eax - mov dword ptr [esp+904+4], edx - mov ebx, dword ptr [esp+912] - mov ecx, dword ptr [esp+912+4] - mov eax, dword ptr [esp+920] - mov edx, dword ptr [esp+920+4] - xor ebx, eax - xor ecx, edx - mov eax, dword ptr [esp+928] - mov edx, dword ptr [esp+928+4] - and ebx, eax - and ecx, edx - mov eax, dword ptr [esp+904] - mov edx, dword ptr [esp+904+4] - xor eax, ebx - xor edx, ecx - mov dword ptr [esp+904], eax - mov dword ptr [esp+904+4], edx - mov eax, dword ptr [esp+904] - mov edx, dword ptr [esp+904+4] - add eax, esi - adc edx, edi - mov dword ptr [esp+904], eax - mov dword ptr [esp+904+4], edx - mov esi, dword ptr [esp+936] - mov edi, dword ptr [esp+936+4] - mov ebx, dword ptr [esp+936] - mov ecx, dword ptr [esp+936+4] - mov dword ptr [esp+1000], esi - shrd esi, edi, 14 - mov eax, dword ptr [esp+1000] - shrd edi, eax, 14 - mov dword ptr [esp+1000], ebx - shrd ebx, ecx, 18 - mov eax, dword ptr [esp+1000] - shrd ecx, eax, 18 - xor esi, ebx - xor edi, ecx - mov dword ptr [esp+1000], ebx - shrd ebx, ecx, 23 - mov eax, dword ptr [esp+1000] - shrd ecx, eax, 23 - xor esi, ebx - xor edi, ecx - mov ebx, dword ptr [esp+880] - mov ecx, dword ptr [esp+880+4] - mov eax, dword ptr [esp+888] - mov edx, dword ptr [esp+888+4] - xor ebx, eax - xor ecx, edx - mov eax, dword ptr [esp+936] - mov edx, dword ptr [esp+936+4] - and ebx, eax - and ecx, edx - mov eax, dword ptr [esp+888] - mov edx, dword ptr [esp+888+4] - xor ebx, eax - xor ecx, edx - mov eax, dword ptr [esp+896] - mov edx, dword ptr [esp+896+4] - add esi, eax - adc edi, edx - add esi, ebx - adc edi, ecx - add esi, dword ptr [ebp+40] - adc edi, dword ptr [ebp+40+4] - mov eax, dword ptr [esp+928] - mov edx, dword ptr [esp+928+4] - add eax, esi - adc edx, edi - mov dword ptr [esp+928], eax - mov dword ptr [esp+928+4], edx - mov ebx, dword ptr [esp+904] - mov ecx, dword ptr [esp+904+4] - mov eax, dword ptr [esp+904] - mov edx, dword ptr [esp+904+4] - mov dword ptr [esp+896], eax - mov dword ptr [esp+896+4], edx - mov dword ptr [esp+1000], ebx - shrd ebx, ecx, 28 - mov eax, dword ptr [esp+1000] - shrd ecx, eax, 28 - mov eax, dword ptr [esp+896] - mov edx, dword ptr [esp+896+4] - xchg eax, edx - mov dword ptr [esp+1000], eax - shrd eax, edx, 2 - mov dword ptr [esp+1004], eax - mov eax, dword ptr [esp+1000] - shrd edx, eax, 2 - mov eax, dword ptr [esp+1004] - mov dword ptr [esp+896], eax - mov dword ptr [esp+896+4], edx - mov eax, dword ptr [esp+896] - mov edx, dword ptr [esp+896+4] - xor ebx, eax - xor ecx, edx - mov eax, dword ptr [esp+896] - mov edx, dword ptr [esp+896+4] - mov dword ptr [esp+1000], eax - shrd eax, edx, 5 - mov dword ptr [esp+1004], eax - mov eax, dword ptr [esp+1000] - shrd edx, eax, 5 - mov eax, dword ptr [esp+1004] - mov dword ptr [esp+896], eax - mov dword ptr [esp+896+4], edx - mov eax, dword ptr [esp+896] - mov edx, dword ptr [esp+896+4] - xor ebx, eax - xor ecx, edx - add esi, ebx - adc edi, ecx - mov eax, dword ptr [esp+904] - mov edx, dword ptr [esp+904+4] - mov dword ptr [esp+896], eax - mov dword ptr [esp+896+4], edx - mov eax, dword ptr [esp+912] - mov dword ptr [esp+1008], eax - mov eax, dword ptr [esp+912+4] - mov dword ptr [esp+1008+4], eax - mov eax, dword ptr [esp+896] - mov edx, dword ptr [esp+896+4] - and eax, dword ptr [esp+1008] - and edx, dword ptr [esp+1008+4] - mov dword ptr [esp+896], eax - mov dword ptr [esp+896+4], edx - mov ebx, dword ptr [esp+904] - mov ecx, dword ptr [esp+904+4] - mov eax, dword ptr [esp+912] - mov edx, dword ptr [esp+912+4] - xor ebx, eax - xor ecx, edx - mov eax, dword ptr [esp+920] - mov edx, dword ptr [esp+920+4] - and ebx, eax - and ecx, edx - mov eax, dword ptr [esp+896] - mov edx, dword ptr [esp+896+4] - xor eax, ebx - xor edx, ecx - mov dword ptr [esp+896], eax - mov dword ptr [esp+896+4], edx - mov eax, dword ptr [esp+896] - mov edx, dword ptr [esp+896+4] - add eax, esi - adc edx, edi - mov dword ptr [esp+896], eax - mov dword ptr [esp+896+4], edx - mov esi, dword ptr [esp+928] - mov edi, dword ptr [esp+928+4] - mov ebx, dword ptr [esp+928] - mov ecx, dword ptr [esp+928+4] - mov dword ptr [esp+1000], esi - shrd esi, edi, 14 - mov eax, dword ptr [esp+1000] - shrd edi, eax, 14 - mov dword ptr [esp+1000], ebx - shrd ebx, ecx, 18 - mov eax, dword ptr [esp+1000] - shrd ecx, eax, 18 - xor esi, ebx - xor edi, ecx - mov dword ptr [esp+1000], ebx - shrd ebx, ecx, 23 - mov eax, dword ptr [esp+1000] - shrd ecx, eax, 23 - xor esi, ebx - xor edi, ecx - mov ebx, dword ptr [esp+936] - mov ecx, dword ptr [esp+936+4] - mov eax, dword ptr [esp+880] - mov edx, dword ptr [esp+880+4] - xor ebx, eax - xor ecx, edx - mov eax, dword ptr [esp+928] - mov edx, dword ptr [esp+928+4] - and ebx, eax - and ecx, edx - mov eax, dword ptr [esp+880] - mov edx, dword ptr [esp+880+4] - xor ebx, eax - xor ecx, edx - mov eax, dword ptr [esp+888] - mov edx, dword ptr [esp+888+4] - add esi, eax - adc edi, edx - add esi, ebx - adc edi, ecx - add esi, dword ptr [ebp+48] - adc edi, dword ptr [ebp+48+4] - mov eax, dword ptr [esp+920] - mov edx, dword ptr [esp+920+4] - add eax, esi - adc edx, edi - mov dword ptr [esp+920], eax - mov dword ptr [esp+920+4], edx - mov ebx, dword ptr [esp+896] - mov ecx, dword ptr [esp+896+4] - mov eax, dword ptr [esp+896] - mov edx, dword ptr [esp+896+4] - mov dword ptr [esp+888], eax - mov dword ptr [esp+888+4], edx - mov dword ptr [esp+1000], ebx - shrd ebx, ecx, 28 - mov eax, dword ptr [esp+1000] - shrd ecx, eax, 28 - mov eax, dword ptr [esp+888] - mov edx, dword ptr [esp+888+4] - xchg eax, edx - mov dword ptr [esp+1000], eax - shrd eax, edx, 2 - mov dword ptr [esp+1004], eax - mov eax, dword ptr [esp+1000] - shrd edx, eax, 2 - mov eax, dword ptr [esp+1004] - mov dword ptr [esp+888], eax - mov dword ptr [esp+888+4], edx - mov eax, dword ptr [esp+888] - mov edx, dword ptr [esp+888+4] - xor ebx, eax - xor ecx, edx - mov eax, dword ptr [esp+888] - mov edx, dword ptr [esp+888+4] - mov dword ptr [esp+1000], eax - shrd eax, edx, 5 - mov dword ptr [esp+1004], eax - mov eax, dword ptr [esp+1000] - shrd edx, eax, 5 - mov eax, dword ptr [esp+1004] - mov dword ptr [esp+888], eax - mov dword ptr [esp+888+4], edx - mov eax, dword ptr [esp+888] - mov edx, dword ptr [esp+888+4] - xor ebx, eax - xor ecx, edx - add esi, ebx - adc edi, ecx - mov eax, dword ptr [esp+896] - mov edx, dword ptr [esp+896+4] - mov dword ptr [esp+888], eax - mov dword ptr [esp+888+4], edx - mov eax, dword ptr [esp+904] - mov dword ptr [esp+1008], eax - mov eax, dword ptr [esp+904+4] - mov dword ptr [esp+1008+4], eax - mov eax, dword ptr [esp+888] - mov edx, dword ptr [esp+888+4] - and eax, dword ptr [esp+1008] - and edx, dword ptr [esp+1008+4] - mov dword ptr [esp+888], eax - mov dword ptr [esp+888+4], edx - mov ebx, dword ptr [esp+896] - mov ecx, dword ptr [esp+896+4] - mov eax, dword ptr [esp+904] - mov edx, dword ptr [esp+904+4] - xor ebx, eax - xor ecx, edx - mov eax, dword ptr [esp+912] - mov edx, dword ptr [esp+912+4] - and ebx, eax - and ecx, edx - mov eax, dword ptr [esp+888] - mov edx, dword ptr [esp+888+4] - xor eax, ebx - xor edx, ecx - mov dword ptr [esp+888], eax - mov dword ptr [esp+888+4], edx - mov eax, dword ptr [esp+888] - mov edx, dword ptr [esp+888+4] - add eax, esi - adc edx, edi - mov dword ptr [esp+888], eax - mov dword ptr [esp+888+4], edx - mov esi, dword ptr [esp+920] - mov edi, dword ptr [esp+920+4] - mov ebx, dword ptr [esp+920] - mov ecx, dword ptr [esp+920+4] - mov dword ptr [esp+1000], esi - shrd esi, edi, 14 - mov eax, dword ptr [esp+1000] - shrd edi, eax, 14 - mov dword ptr [esp+1000], ebx - shrd ebx, ecx, 18 - mov eax, dword ptr [esp+1000] - shrd ecx, eax, 18 - xor esi, ebx - xor edi, ecx - mov dword ptr [esp+1000], ebx - shrd ebx, ecx, 23 - mov eax, dword ptr [esp+1000] - shrd ecx, eax, 23 - xor esi, ebx - xor edi, ecx - mov ebx, dword ptr [esp+928] - mov ecx, dword ptr [esp+928+4] - mov eax, dword ptr [esp+936] - mov edx, dword ptr [esp+936+4] - xor ebx, eax - xor ecx, edx - mov eax, dword ptr [esp+920] - mov edx, dword ptr [esp+920+4] - and ebx, eax - and ecx, edx - mov eax, dword ptr [esp+936] - mov edx, dword ptr [esp+936+4] - xor ebx, eax - xor ecx, edx - mov eax, dword ptr [esp+880] - mov edx, dword ptr [esp+880+4] - add esi, eax - adc edi, edx - add esi, ebx - adc edi, ecx - add esi, dword ptr [ebp+56] - adc edi, dword ptr [ebp+56+4] - mov eax, dword ptr [esp+912] - mov edx, dword ptr [esp+912+4] - add eax, esi - adc edx, edi - mov dword ptr [esp+912], eax - mov dword ptr [esp+912+4], edx - mov ebx, dword ptr [esp+888] - mov ecx, dword ptr [esp+888+4] - mov eax, dword ptr [esp+888] - mov edx, dword ptr [esp+888+4] - mov dword ptr [esp+880], eax - mov dword ptr [esp+880+4], edx - mov dword ptr [esp+1000], ebx - shrd ebx, ecx, 28 - mov eax, dword ptr [esp+1000] - shrd ecx, eax, 28 - mov eax, dword ptr [esp+880] - mov edx, dword ptr [esp+880+4] - xchg eax, edx - mov dword ptr [esp+1000], eax - shrd eax, edx, 2 - mov dword ptr [esp+1004], eax - mov eax, dword ptr [esp+1000] - shrd edx, eax, 2 - mov eax, dword ptr [esp+1004] - mov dword ptr [esp+880], eax - mov dword ptr [esp+880+4], edx - mov eax, dword ptr [esp+880] - mov edx, dword ptr [esp+880+4] - xor ebx, eax - xor ecx, edx - mov eax, dword ptr [esp+880] - mov edx, dword ptr [esp+880+4] - mov dword ptr [esp+1000], eax - shrd eax, edx, 5 - mov dword ptr [esp+1004], eax - mov eax, dword ptr [esp+1000] - shrd edx, eax, 5 - mov eax, dword ptr [esp+1004] - mov dword ptr [esp+880], eax - mov dword ptr [esp+880+4], edx - mov eax, dword ptr [esp+880] - mov edx, dword ptr [esp+880+4] - xor ebx, eax - xor ecx, edx - add esi, ebx - adc edi, ecx - mov eax, dword ptr [esp+888] - mov edx, dword ptr [esp+888+4] - mov dword ptr [esp+880], eax - mov dword ptr [esp+880+4], edx - mov eax, dword ptr [esp+896] - mov dword ptr [esp+1008], eax - mov eax, dword ptr [esp+896+4] - mov dword ptr [esp+1008+4], eax - mov eax, dword ptr [esp+880] - mov edx, dword ptr [esp+880+4] - and eax, dword ptr [esp+1008] - and edx, dword ptr [esp+1008+4] - mov dword ptr [esp+880], eax - mov dword ptr [esp+880+4], edx - mov ebx, dword ptr [esp+888] - mov ecx, dword ptr [esp+888+4] - mov eax, dword ptr [esp+896] - mov edx, dword ptr [esp+896+4] - xor ebx, eax - xor ecx, edx - mov eax, dword ptr [esp+904] - mov edx, dword ptr [esp+904+4] - and ebx, eax - and ecx, edx - mov eax, dword ptr [esp+880] - mov edx, dword ptr [esp+880+4] - xor eax, ebx - xor edx, ecx - mov dword ptr [esp+880], eax - mov dword ptr [esp+880+4], edx - mov eax, dword ptr [esp+880] - mov edx, dword ptr [esp+880+4] - add eax, esi - adc edx, edi - mov dword ptr [esp+880], eax - mov dword ptr [esp+880+4], edx - add ebp, $40 - mov eax, dword ptr [esp + $3BC] - cmp ebp, eax - jb @ssse3_512_round_loop - mov esi, dword ptr [esp+$20] - mov eax, dword ptr [esp+880] - mov edx, dword ptr [esp+880+4] - add dword ptr [esi+$0], eax - adc dword ptr [esi+$0+4], edx - mov eax, dword ptr [esp+888] - mov edx, dword ptr [esp+888+4] - add dword ptr [esi+$8], eax - adc dword ptr [esi+$8+4], edx - mov eax, dword ptr [esp+896] - mov edx, dword ptr [esp+896+4] - add dword ptr [esi+$10], eax - adc dword ptr [esi+$10+4], edx - mov eax, dword ptr [esp+904] - mov edx, dword ptr [esp+904+4] - add dword ptr [esi+$18], eax - adc dword ptr [esi+$18+4], edx - mov eax, dword ptr [esp+912] - mov edx, dword ptr [esp+912+4] - add dword ptr [esi+$20], eax - adc dword ptr [esi+$20+4], edx - mov eax, dword ptr [esp+920] - mov edx, dword ptr [esp+920+4] - add dword ptr [esi+$28], eax - adc dword ptr [esi+$28+4], edx - mov eax, dword ptr [esp+928] - mov edx, dword ptr [esp+928+4] - add dword ptr [esi+$30], eax - adc dword ptr [esi+$30+4], edx - mov eax, dword ptr [esp+936] - mov edx, dword ptr [esp+936+4] - add dword ptr [esi+$38], eax - adc dword ptr [esi+$38+4], edx - - mov esi, dword ptr [esp+$24] - add esi, $80 - mov dword ptr [esp+$24], esi - dec dword ptr [esp+$28] - jnz @ssse3_512_block_loop - -@ssse3_512_done: - movdqu xmm6, oword ptr [esp] - movdqu xmm7, oword ptr [esp + $10] - mov ebp, dword ptr [esp + $30] - add esp, 1016 - pop edi - pop esi - pop ebx diff --git a/HashLib/src/Include/Simd/SHA512/SHA512CompressSsse3_x86_64.inc b/HashLib/src/Include/Simd/SHA512/SHA512CompressSsse3_x86_64.inc deleted file mode 100644 index 1969b06f..00000000 --- a/HashLib/src/Include/Simd/SHA512/SHA512CompressSsse3_x86_64.inc +++ /dev/null @@ -1,483 +0,0 @@ -// SHA-512 SSSE3 implementation. -// Expects MS x64 ABI: rcx = state ptr, rdx = data ptr, r8d = numblocks, -// r9 = K512 ptr (80 UInt64 round constants), r10 = BSWAP64 mask ptr (16 bytes). -// Uses xmm0-xmm7 (byte-swap only), all GPR. -// -// SSSE3 pshufb is used for the initial 128-byte big-endian to little-endian byte swap. -// Message schedule expansion W[16..79] and compression rounds use GPR only (64-bit words). -// W values are kept in a 16-entry circular buffer on the stack. -// -// MS x64 non-volatile saves: xmm6-xmm7, rbx, rbp, rdi, rsi, r12-r15. -// -// Stack layout (sub rsp, 1016): -// [rsp + 0.. 15]: xmm6 save -// [rsp + 16.. 31]: xmm7 save -// [rsp + 32.. 39]: rbx save -// [rsp + 40.. 47]: rbp save -// [rsp + 48.. 55]: rdi save -// [rsp + 56.. 63]: rsi save -// [rsp + 64.. 71]: r12 save -// [rsp + 72.. 79]: r13 save -// [rsp + 80.. 87]: r14 save -// [rsp + 88.. 95]: r15 save -// [rsp + 96..103]: K512 ptr save -// [rsp + 104..111]: BSWAP mask ptr save -// [rsp + 112..751]: W+K buffer (640 bytes = 80 * 8, 16-byte aligned) -// [rsp + 752..879]: W circular buffer (128 bytes = 16 * 8) - - {$I ..\Include\Simd\Common\SimdNonVolatileSave_x86_64.inc} - - sub rsp, 984 - - mov [rsp + $10], rdi - mov [rsp + $18], rsi - mov [rsp + $00], rbx - mov [rsp + $08], rbp - mov [rsp + $20], r12 - mov [rsp + $28], r13 - mov [rsp + $30], r14 - mov [rsp + $38], r15 - - mov r12, rcx - mov r13, rdx - mov r14d, r8d - mov [rsp + $40], r9 - mov [rsp + $48], r10 - - test r14d, r14d - jz @ssse3_512_done - -@ssse3_512_block_loop: - - // ========== Phase 1: Load, byte-swap, expand message schedule ========== - - mov rax, [rsp + $48] - movdqu xmm7, oword [rax] - mov rax, [rsp + $40] - - lea rbp, [rsp + $50] - lea r15, [rsp + $2D0] - - // Load, byte-swap W[0..15], store to W circular buffer and compute W+K - movdqu xmm0, oword [r13] - pshufb xmm0, xmm7 - movdqa oword [r15], xmm0 - movdqu xmm4, oword [rax] - paddq xmm4, xmm0 - movdqa oword [rbp], xmm4 - - movdqu xmm1, oword [r13 + $10] - pshufb xmm1, xmm7 - movdqa oword [r15 + $10], xmm1 - movdqu xmm4, oword [rax + $10] - paddq xmm4, xmm1 - movdqa oword [rbp + $10], xmm4 - - movdqu xmm2, oword [r13 + $20] - pshufb xmm2, xmm7 - movdqa oword [r15 + $20], xmm2 - movdqu xmm4, oword [rax + $20] - paddq xmm4, xmm2 - movdqa oword [rbp + $20], xmm4 - - movdqu xmm3, oword [r13 + $30] - pshufb xmm3, xmm7 - movdqa oword [r15 + $30], xmm3 - movdqu xmm4, oword [rax + $30] - paddq xmm4, xmm3 - movdqa oword [rbp + $30], xmm4 - - movdqu xmm0, oword [r13 + $40] - pshufb xmm0, xmm7 - movdqa oword [r15 + $40], xmm0 - movdqu xmm4, oword [rax + $40] - paddq xmm4, xmm0 - movdqa oword [rbp + $40], xmm4 - - movdqu xmm1, oword [r13 + $50] - pshufb xmm1, xmm7 - movdqa oword [r15 + $50], xmm1 - movdqu xmm4, oword [rax + $50] - paddq xmm4, xmm1 - movdqa oword [rbp + $50], xmm4 - - movdqu xmm2, oword [r13 + $60] - pshufb xmm2, xmm7 - movdqa oword [r15 + $60], xmm2 - movdqu xmm4, oword [rax + $60] - paddq xmm4, xmm2 - movdqa oword [rbp + $60], xmm4 - - movdqu xmm3, oword [r13 + $70] - pshufb xmm3, xmm7 - movdqa oword [r15 + $70], xmm3 - movdqu xmm4, oword [rax + $70] - paddq xmm4, xmm3 - movdqa oword [rbp + $70], xmm4 - - // Expand W[16..79] using GPR with circular buffer - // r15 = W circular buffer base (16 entries) - // rbp = WK buffer base, rax = K512 base - // Use rsi, rdi, rcx, rdx, r8-r11 as temps - - mov ecx, 16 - -@ssse3_512_expand_loop: - // W[t] = sigma1(W[t-2]) + W[t-7] + sigma0(W[t-15]) + W[t-16] - - // sigma1(W[t-2]) - mov edx, ecx - sub edx, 2 - and edx, 15 - mov rsi, [r15 + rdx*8] - mov rdi, rsi - ror rdi, 19 - mov r8, rsi - ror r8, 61 - xor rdi, r8 - shr rsi, 6 - xor rdi, rsi - - // + W[t-7] - mov edx, ecx - sub edx, 7 - and edx, 15 - add rdi, [r15 + rdx*8] - - // sigma0(W[t-15]) - mov edx, ecx - sub edx, 15 - and edx, 15 - mov rsi, [r15 + rdx*8] - mov r8, rsi - ror r8, 1 - mov r9, rsi - ror r9, 8 - xor r8, r9 - shr rsi, 7 - xor r8, rsi - add rdi, r8 - - // + W[t-16] - mov edx, ecx - sub edx, 16 - and edx, 15 - add rdi, [r15 + rdx*8] - - // Store W[t] to circular buffer - mov edx, ecx - and edx, 15 - mov [r15 + rdx*8], rdi - - // W[t] + K[t] -> WK buffer - mov rsi, [rax + rcx*8] - add rsi, rdi - mov [rbp + rcx*8], rsi - - inc ecx - cmp ecx, 80 - jb @ssse3_512_expand_loop - - // ========== Phase 2: 80 Compression Rounds ========== - - mov rax, [r12] - mov rbx, [r12 + $08] - mov rcx, [r12 + $10] - mov rdx, [r12 + $18] - mov r8, [r12 + $20] - mov r9, [r12 + $28] - mov r10, [r12 + $30] - mov r11, [r12 + $38] - - // rbp = WK base, r15 = WK end - lea r15, [rbp + $280] - -@ssse3_512_round_loop: - - // Round 0: a=rax b=rbx c=rcx d=rdx e=r8 f=r9 g=r10 h=r11 - mov rsi, r8 - mov rdi, r8 - ror rsi, 14 - ror rdi, 18 - xor rsi, rdi - ror rdi, 23 - xor rsi, rdi - mov rdi, r9 - xor rdi, r10 - and rdi, r8 - xor rdi, r10 - add rsi, r11 - add rsi, rdi - add rsi, [rbp] - add rdx, rsi - mov rdi, rax - mov r11, rax - ror rdi, 28 - ror r11, 34 - xor rdi, r11 - ror r11, 5 - xor rdi, r11 - add rsi, rdi - mov r11, rax - and r11, rbx - mov rdi, rax - xor rdi, rbx - and rdi, rcx - xor r11, rdi - add r11, rsi - - // Round 1: a=r11 b=rax c=rbx d=rcx e=rdx f=r8 g=r9 h=r10 - mov rsi, rdx - mov rdi, rdx - ror rsi, 14 - ror rdi, 18 - xor rsi, rdi - ror rdi, 23 - xor rsi, rdi - mov rdi, r8 - xor rdi, r9 - and rdi, rdx - xor rdi, r9 - add rsi, r10 - add rsi, rdi - add rsi, [rbp + $08] - add rcx, rsi - mov rdi, r11 - mov r10, r11 - ror rdi, 28 - ror r10, 34 - xor rdi, r10 - ror r10, 5 - xor rdi, r10 - add rsi, rdi - mov r10, r11 - and r10, rax - mov rdi, r11 - xor rdi, rax - and rdi, rbx - xor r10, rdi - add r10, rsi - - // Round 2: a=r10 b=r11 c=rax d=rbx e=rcx f=rdx g=r8 h=r9 - mov rsi, rcx - mov rdi, rcx - ror rsi, 14 - ror rdi, 18 - xor rsi, rdi - ror rdi, 23 - xor rsi, rdi - mov rdi, rdx - xor rdi, r8 - and rdi, rcx - xor rdi, r8 - add rsi, r9 - add rsi, rdi - add rsi, [rbp + $10] - add rbx, rsi - mov rdi, r10 - mov r9, r10 - ror rdi, 28 - ror r9, 34 - xor rdi, r9 - ror r9, 5 - xor rdi, r9 - add rsi, rdi - mov r9, r10 - and r9, r11 - mov rdi, r10 - xor rdi, r11 - and rdi, rax - xor r9, rdi - add r9, rsi - - // Round 3: a=r9 b=r10 c=r11 d=rax e=rbx f=rcx g=rdx h=r8 - mov rsi, rbx - mov rdi, rbx - ror rsi, 14 - ror rdi, 18 - xor rsi, rdi - ror rdi, 23 - xor rsi, rdi - mov rdi, rcx - xor rdi, rdx - and rdi, rbx - xor rdi, rdx - add rsi, r8 - add rsi, rdi - add rsi, [rbp + $18] - add rax, rsi - mov rdi, r9 - mov r8, r9 - ror rdi, 28 - ror r8, 34 - xor rdi, r8 - ror r8, 5 - xor rdi, r8 - add rsi, rdi - mov r8, r9 - and r8, r10 - mov rdi, r9 - xor rdi, r10 - and rdi, r11 - xor r8, rdi - add r8, rsi - - // Round 4: a=r8 b=r9 c=r10 d=r11 e=rax f=rbx g=rcx h=rdx - mov rsi, rax - mov rdi, rax - ror rsi, 14 - ror rdi, 18 - xor rsi, rdi - ror rdi, 23 - xor rsi, rdi - mov rdi, rbx - xor rdi, rcx - and rdi, rax - xor rdi, rcx - add rsi, rdx - add rsi, rdi - add rsi, [rbp + $20] - add r11, rsi - mov rdi, r8 - mov rdx, r8 - ror rdi, 28 - ror rdx, 34 - xor rdi, rdx - ror rdx, 5 - xor rdi, rdx - add rsi, rdi - mov rdx, r8 - and rdx, r9 - mov rdi, r8 - xor rdi, r9 - and rdi, r10 - xor rdx, rdi - add rdx, rsi - - // Round 5: a=rdx b=r8 c=r9 d=r10 e=r11 f=rax g=rbx h=rcx - mov rsi, r11 - mov rdi, r11 - ror rsi, 14 - ror rdi, 18 - xor rsi, rdi - ror rdi, 23 - xor rsi, rdi - mov rdi, rax - xor rdi, rbx - and rdi, r11 - xor rdi, rbx - add rsi, rcx - add rsi, rdi - add rsi, [rbp + $28] - add r10, rsi - mov rdi, rdx - mov rcx, rdx - ror rdi, 28 - ror rcx, 34 - xor rdi, rcx - ror rcx, 5 - xor rdi, rcx - add rsi, rdi - mov rcx, rdx - and rcx, r8 - mov rdi, rdx - xor rdi, r8 - and rdi, r9 - xor rcx, rdi - add rcx, rsi - - // Round 6: a=rcx b=rdx c=r8 d=r9 e=r10 f=r11 g=rax h=rbx - mov rsi, r10 - mov rdi, r10 - ror rsi, 14 - ror rdi, 18 - xor rsi, rdi - ror rdi, 23 - xor rsi, rdi - mov rdi, r11 - xor rdi, rax - and rdi, r10 - xor rdi, rax - add rsi, rbx - add rsi, rdi - add rsi, [rbp + $30] - add r9, rsi - mov rdi, rcx - mov rbx, rcx - ror rdi, 28 - ror rbx, 34 - xor rdi, rbx - ror rbx, 5 - xor rdi, rbx - add rsi, rdi - mov rbx, rcx - and rbx, rdx - mov rdi, rcx - xor rdi, rdx - and rdi, r8 - xor rbx, rdi - add rbx, rsi - - // Round 7: a=rbx b=rcx c=rdx d=r8 e=r9 f=r10 g=r11 h=rax - mov rsi, r9 - mov rdi, r9 - ror rsi, 14 - ror rdi, 18 - xor rsi, rdi - ror rdi, 23 - xor rsi, rdi - mov rdi, r10 - xor rdi, r11 - and rdi, r9 - xor rdi, r11 - add rsi, rax - add rsi, rdi - add rsi, [rbp + $38] - add r8, rsi - mov rdi, rbx - mov rax, rbx - ror rdi, 28 - ror rax, 34 - xor rdi, rax - ror rax, 5 - xor rdi, rax - add rsi, rdi - mov rax, rbx - and rax, rcx - mov rdi, rbx - xor rdi, rcx - and rdi, rdx - xor rax, rdi - add rax, rsi - - add rbp, $40 - cmp rbp, r15 - jb @ssse3_512_round_loop - - // Add round results to state - add [r12], rax - add [r12 + $08], rbx - add [r12 + $10], rcx - add [r12 + $18], rdx - add [r12 + $20], r8 - add [r12 + $28], r9 - add [r12 + $30], r10 - add [r12 + $38], r11 - - add r13, $80 - dec r14d - jnz @ssse3_512_block_loop - -@ssse3_512_done: - - mov rbx, [rsp + $00] - mov rbp, [rsp + $08] - mov r12, [rsp + $20] - mov r13, [rsp + $28] - mov r14, [rsp + $30] - mov r15, [rsp + $38] - mov rdi, [rsp + $10] - mov rsi, [rsp + $18] - add rsp, 984 - - {$I ..\Include\Simd\Common\SimdNonVolatileRestore_x86_64.inc} From 652f3e6a5de9e5eea2af83ea74bba70cb2487d46 Mon Sep 17 00:00:00 2001 From: Ugochukwu Mmaduekwe Date: Tue, 7 Jul 2026 00:54:22 +0100 Subject: [PATCH 2/6] clean up unused sha512 bswap constant --- HashLib/src/Crypto/HlpSHA2_512Dispatch.pas | 7 ------- 1 file changed, 7 deletions(-) diff --git a/HashLib/src/Crypto/HlpSHA2_512Dispatch.pas b/HashLib/src/Crypto/HlpSHA2_512Dispatch.pas index a7296488..6318b525 100644 --- a/HashLib/src/Crypto/HlpSHA2_512Dispatch.pas +++ b/HashLib/src/Crypto/HlpSHA2_512Dispatch.pas @@ -56,13 +56,6 @@ interface ); {$IFDEF HASHLIB_X86_SIMD} - // BSWAP64 shuffle mask for pshufb (x86 SIMD only): reverses bytes within each - // qword. Not a SHA-512 constant; passed separately to the SIMD kernels. ARM - // byte-swaps with REV64 and needs no mask table. - BSWAP64_MASK: array [0 .. 1] of UInt64 = ( - UInt64($0001020304050607), UInt64($08090A0B0C0D0E0F) - ); - // Doubled K512 round constants plus the BSWAP64 mask, shared by the AVX2 and // SSE2 SIMD-schedule SHA-512 kernels. Each 128-bit K512 constant pair is stored // twice so one table feeds both the 256-bit AVX2 lanes and the 128-bit SSE2 From a1b01f691c4452b64080c1b6a38803913547f8a2 Mon Sep 17 00:00:00 2001 From: Ugochukwu Mmaduekwe Date: Tue, 7 Jul 2026 02:55:18 +0100 Subject: [PATCH 3/6] Optimize SHA-256 x86 SIMD kernels (AVX2 2-block + SIMD-schedule SSE2) Replace the two-phase SHA-256 kernels with OpenSSL/CRYPTOGAMS interleaved SIMD-schedule designs, mirroring the earlier SHA-512 work. x86_64: - AVX2: port sha256_block_data_order_avx2 (two blocks scheduled together in 256-bit lanes; compression stays serial). - SSE2: port OpenSSL's SSSE3 kernel with its two SSSE3-only ops emulated in SSE2 (pshufb dword byte-swap -> psrlw/psllw/por + pshuflw/pshufhw; palignr -> psrldq/pslldq/por). Remove the SSSE3 tier. i386: - SSE2: port sha256-586's SSSE3 kernel with the same emulation (scratch xmm chosen per site by liveness), K strides doubled so it shares K256_Doubled. Remove the SSSE3 tier. --- HashLib/src/Crypto/HlpSHA2_256Dispatch.pas | 99 +- HashLib/src/Crypto/HlpSHA2_512Dispatch.pas | 5 +- .../Simd/SHA256/SHA256CompressAvx2_x86_64.inc | 1684 +++++++++++----- .../Simd/SHA256/SHA256CompressSse2_i386.inc | 1727 ++++++++++++----- .../Simd/SHA256/SHA256CompressSse2_x86_64.inc | 1561 ++++++++++----- .../Simd/SHA256/SHA256CompressSsse3_i386.inc | 477 ----- .../SHA256/SHA256CompressSsse3_x86_64.inc | 467 ----- .../Simd/SHA512/SHA512CompressSse2_x86_64.inc | 48 +- 8 files changed, 3693 insertions(+), 2375 deletions(-) delete mode 100644 HashLib/src/Include/Simd/SHA256/SHA256CompressSsse3_i386.inc delete mode 100644 HashLib/src/Include/Simd/SHA256/SHA256CompressSsse3_x86_64.inc diff --git a/HashLib/src/Crypto/HlpSHA2_256Dispatch.pas b/HashLib/src/Crypto/HlpSHA2_256Dispatch.pas index 09e03b5b..32292a79 100644 --- a/HashLib/src/Crypto/HlpSHA2_256Dispatch.pas +++ b/HashLib/src/Crypto/HlpSHA2_256Dispatch.pas @@ -38,6 +38,55 @@ interface BSWAP32_MASK: array [0 .. 3] of UInt32 = ( $00010203, $04050607, $08090A0B, $0C0D0E0F ); + + // Doubled K256 round constants plus the three AVX2 message-schedule masks, + // shared by the AVX2 and SSE2 SIMD-schedule SHA-256 kernels. Each 128-bit K256 + // quadruple is stored twice so one table feeds both the 256-bit AVX2 lanes and + // the 128-bit SSE2 reads (both read at a 32-byte stride, skipping the duplicate + // halves). Only the AVX2 kernel uses the appended masks: the byte-swap mask + // (BSWAP32 pattern, twice) occupies [128..135] and the two schedule shuffle + // masks follow at [136..143] and [144..151]; the SSE2 kernel computes its + // byte-swap and needs no mask. Derived from K256. + K256_Doubled: array [0 .. 151] of UInt32 = ( + $428A2F98, $71374491, $B5C0FBCF, $E9B5DBA5, + $428A2F98, $71374491, $B5C0FBCF, $E9B5DBA5, + $3956C25B, $59F111F1, $923F82A4, $AB1C5ED5, + $3956C25B, $59F111F1, $923F82A4, $AB1C5ED5, + $D807AA98, $12835B01, $243185BE, $550C7DC3, + $D807AA98, $12835B01, $243185BE, $550C7DC3, + $72BE5D74, $80DEB1FE, $9BDC06A7, $C19BF174, + $72BE5D74, $80DEB1FE, $9BDC06A7, $C19BF174, + $E49B69C1, $EFBE4786, $0FC19DC6, $240CA1CC, + $E49B69C1, $EFBE4786, $0FC19DC6, $240CA1CC, + $2DE92C6F, $4A7484AA, $5CB0A9DC, $76F988DA, + $2DE92C6F, $4A7484AA, $5CB0A9DC, $76F988DA, + $983E5152, $A831C66D, $B00327C8, $BF597FC7, + $983E5152, $A831C66D, $B00327C8, $BF597FC7, + $C6E00BF3, $D5A79147, $06CA6351, $14292967, + $C6E00BF3, $D5A79147, $06CA6351, $14292967, + $27B70A85, $2E1B2138, $4D2C6DFC, $53380D13, + $27B70A85, $2E1B2138, $4D2C6DFC, $53380D13, + $650A7354, $766A0ABB, $81C2C92E, $92722C85, + $650A7354, $766A0ABB, $81C2C92E, $92722C85, + $A2BFE8A1, $A81A664B, $C24B8B70, $C76C51A3, + $A2BFE8A1, $A81A664B, $C24B8B70, $C76C51A3, + $D192E819, $D6990624, $F40E3585, $106AA070, + $D192E819, $D6990624, $F40E3585, $106AA070, + $19A4C116, $1E376C08, $2748774C, $34B0BCB5, + $19A4C116, $1E376C08, $2748774C, $34B0BCB5, + $391C0CB3, $4ED8AA4A, $5B9CCA4F, $682E6FF3, + $391C0CB3, $4ED8AA4A, $5B9CCA4F, $682E6FF3, + $748F82EE, $78A5636F, $84C87814, $8CC70208, + $748F82EE, $78A5636F, $84C87814, $8CC70208, + $90BEFFFA, $A4506CEB, $BEF9A3F7, $C67178F2, + $90BEFFFA, $A4506CEB, $BEF9A3F7, $C67178F2, + $00010203, $04050607, $08090A0B, $0C0D0E0F, + $00010203, $04050607, $08090A0B, $0C0D0E0F, + $03020100, $0B0A0908, $FFFFFFFF, $FFFFFFFF, + $03020100, $0B0A0908, $FFFFFFFF, $FFFFFFFF, + $FFFFFFFF, $FFFFFFFF, $03020100, $0B0A0908, + $FFFFFFFF, $FFFFFFFF, $03020100, $0B0A0908 + ); {$ENDIF HASHLIB_X86_SIMD} implementation @@ -106,8 +155,8 @@ procedure SHA256_Compress_Scalar(AState, AData: Pointer; ANumBlocks: UInt32); // ============================================================================= // SIMD implementations // -// i386: SSE2, SSSE3 -// x86_64: ShaNi, AVX2, SSSE3, SSE2 +// i386: SSE2 +// x86_64: ShaNi, AVX2, SSE2 // aarch64: SHA256 Crypto Extensions // ============================================================================= @@ -119,12 +168,6 @@ procedure SHA256_Compress_Sse2(AState, AData: Pointer; ANumBlocks: UInt32; {$I ..\Include\Simd\SHA256\SHA256CompressSse2_i386.inc} end; -procedure SHA256_Compress_Ssse3(AState, AData: Pointer; ANumBlocks: UInt32; - AConstants, AMask: Pointer); - {$I ..\Include\Simd\Common\SimdProc5Begin_i386.inc} - {$I ..\Include\Simd\SHA256\SHA256CompressSsse3_i386.inc} -end; - {$ENDIF HASHLIB_I386_ASM} {$IFDEF HASHLIB_X86_64_ASM} @@ -146,26 +189,15 @@ procedure SHA256_Compress_Sse2(AState, AData: Pointer; ANumBlocks: UInt32; {$I ..\Include\Simd\SHA256\SHA256CompressSse2_x86_64.inc} end; -procedure SHA256_Compress_Ssse3(AState, AData: Pointer; ANumBlocks: UInt32; - AConstants, AMask: Pointer); - {$I ..\Include\Simd\Common\SimdProc5Begin_x86_64.inc} - {$I ..\Include\Simd\SHA256\SHA256CompressSsse3_x86_64.inc} -end; - -procedure SHA256_Compress_Ssse3_Wrap(AState, AData: Pointer; ANumBlocks: UInt32); -begin - SHA256_Compress_Ssse3(AState, AData, ANumBlocks, @K256, @BSWAP32_MASK); -end; - procedure SHA256_Compress_Avx2(AState, AData: Pointer; ANumBlocks: UInt32; - AConstants, AMask: Pointer); - {$I ..\Include\Simd\Common\SimdProc5Begin_x86_64.inc} + AConstants: Pointer); + {$I ..\Include\Simd\Common\SimdProc4Begin_x86_64.inc} {$I ..\Include\Simd\SHA256\SHA256CompressAvx2_x86_64.inc} end; procedure SHA256_Compress_Avx2_Wrap(AState, AData: Pointer; ANumBlocks: UInt32); begin - SHA256_Compress_Avx2(AState, AData, ANumBlocks, @K256, @BSWAP32_MASK); + SHA256_Compress_Avx2(AState, AData, ANumBlocks, @K256_Doubled); end; {$ENDIF HASHLIB_X86_64_ASM} @@ -174,18 +206,9 @@ procedure SHA256_Compress_Avx2_Wrap(AState, AData: Pointer; ANumBlocks: UInt32); procedure SHA256_Compress_Sse2_Wrap(AState, AData: Pointer; ANumBlocks: UInt32); begin - SHA256_Compress_Sse2(AState, AData, ANumBlocks, @K256); -end; - -{$IFDEF HASHLIB_I386_ASM} - -procedure SHA256_Compress_Ssse3_Wrap(AState, AData: Pointer; ANumBlocks: UInt32); -begin - SHA256_Compress_Ssse3(AState, AData, ANumBlocks, @K256, @BSWAP32_MASK); + SHA256_Compress_Sse2(AState, AData, ANumBlocks, @K256_Doubled); end; -{$ENDIF HASHLIB_I386_ASM} - {$ENDIF HASHLIB_X86_SIMD} {$IFDEF HASHLIB_AARCH64_ASM} @@ -211,11 +234,7 @@ procedure InitDispatch(); begin SHA256_Compress := @SHA256_Compress_Scalar; {$IFDEF HASHLIB_I386_ASM} - case TCpuFeatures.X86.SelectSlot([TX86SimdLevel.SSSE3, TX86SimdLevel.SSE2]) of - TX86SimdLevel.SSSE3: - begin - SHA256_Compress := @SHA256_Compress_Ssse3_Wrap; - end; + case TCpuFeatures.X86.SelectSlot([TX86SimdLevel.SSE2]) of TX86SimdLevel.SSE2: begin SHA256_Compress := @SHA256_Compress_Sse2_Wrap; @@ -228,15 +247,11 @@ procedure InitDispatch(); SHA256_Compress := @SHA256_Compress_ShaNi_Wrap; Exit; end; - case TCpuFeatures.X86.SelectSlot([TX86SimdLevel.AVX2, TX86SimdLevel.SSSE3, TX86SimdLevel.SSE2]) of + case TCpuFeatures.X86.SelectSlot([TX86SimdLevel.AVX2, TX86SimdLevel.SSE2]) of TX86SimdLevel.AVX2: begin SHA256_Compress := @SHA256_Compress_Avx2_Wrap; end; - TX86SimdLevel.SSSE3: - begin - SHA256_Compress := @SHA256_Compress_Ssse3_Wrap; - end; TX86SimdLevel.SSE2: begin SHA256_Compress := @SHA256_Compress_Sse2_Wrap; diff --git a/HashLib/src/Crypto/HlpSHA2_512Dispatch.pas b/HashLib/src/Crypto/HlpSHA2_512Dispatch.pas index 6318b525..bd5677d9 100644 --- a/HashLib/src/Crypto/HlpSHA2_512Dispatch.pas +++ b/HashLib/src/Crypto/HlpSHA2_512Dispatch.pas @@ -59,8 +59,9 @@ interface // Doubled K512 round constants plus the BSWAP64 mask, shared by the AVX2 and // SSE2 SIMD-schedule SHA-512 kernels. Each 128-bit K512 constant pair is stored // twice so one table feeds both the 256-bit AVX2 lanes and the 128-bit SSE2 - // reads (read at a 32-byte stride); the 32-byte byte-swap mask (BSWAP64 pattern, - // twice) occupies [160..163]. Derived from K512. + // reads (both read at a 32-byte stride). Only the AVX2 kernel uses the appended + // byte-swap mask (BSWAP64 pattern, twice) at [160..163]; the SSE2 kernel computes + // its byte-swap and needs no mask. Derived from K512. K512_Doubled: array [0 .. 163] of UInt64 = ( UInt64($428A2F98D728AE22), UInt64($7137449123EF65CD), UInt64($428A2F98D728AE22), UInt64($7137449123EF65CD), diff --git a/HashLib/src/Include/Simd/SHA256/SHA256CompressAvx2_x86_64.inc b/HashLib/src/Include/Simd/SHA256/SHA256CompressAvx2_x86_64.inc index 51b651b5..5d92f891 100644 --- a/HashLib/src/Include/Simd/SHA256/SHA256CompressAvx2_x86_64.inc +++ b/HashLib/src/Include/Simd/SHA256/SHA256CompressAvx2_x86_64.inc @@ -1,455 +1,1255 @@ -// SHA-256 AVX2 (VEX-128) implementation with SIMD message schedule. -// Same algorithm as SSSE3 but using VEX-encoded instructions for 3-operand -// non-destructive forms, shorter encoding, and no SSE/AVX transition penalties. -// AVX/AVX2 instructions are db-encoded for broad assembler compatibility. -// Expects MS x64 ABI: rcx = state ptr, rdx = data ptr, r8d = numblocks, -// r9 = K256 ptr (64 UInt32 round constants), r10 = BSWAP32 mask ptr (16 bytes). -// -// Two-phase per block: -// Phase 1 (VEX-128 SIMD): Compute W+K[0..63] using message schedule, store to stack -// Phase 2 (GPR): Run 64 compression rounds reading W+K from stack +// SHA-256 AVX2 two-block implementation (VEX-256), ported from OpenSSL's +// sha512-x86_64.pl (CRYPTOGAMS; that generator emits both the SHA-256 and the +// SHA-512 kernels). Two message blocks are scheduled together in 256-bit lanes; +// the compression rounds stay serial (as SHA-256 requires), so scheduling two +// blocks at once is what makes this faster than the single-block AVX path. AVX2 +// and BMI2 (rorx/andn) instructions are db-encoded for broad assembler +// compatibility (every AVX2 CPU also provides BMI2). +// Expects MS x64 ABI (after SimdProc4Begin): rcx = state ptr, rdx = data ptr, +// r8d = numblocks, r9 = doubled-K256 ptr (each 128-bit K256 quadruple stored +// twice so one table feeds both 256-bit lanes, with the byte-swap and two +// message-schedule masks appended; see K256_Doubled). The masks are read +// unaligned, so the Pascal const needs no special alignment. // // MS x64 non-volatile saves: xmm6-xmm15 via the shared SimdNonVolatileSave/Restore // include (no-op on SysV); rbx, rbp, rdi, rsi, r12-r15 in the local frame. -// -// Stack layout (sub rsp, 344): same as SSSE3 version -// [rsp + 0.. 7]: rbx save -// [rsp + 8.. 15]: rbp save -// [rsp + 16.. 23]: rdi save -// [rsp + 24.. 31]: rsi save -// [rsp + 32.. 39]: r12 save -// [rsp + 40.. 47]: r13 save -// [rsp + 48.. 55]: r14 save -// [rsp + 56.. 63]: r15 save -// [rsp + 64.. 71]: K256 ptr save -// [rsp + 72.. 79]: BSWAP mask ptr save -// [rsp + 80..335]: W+K buffer (256 bytes) {$I ..\Include\Simd\Common\SimdNonVolatileSave_x86_64.inc} - sub rsp, 344 - - mov [rsp + $10], rdi - mov [rsp + $18], rsi - mov [rsp + $00], rbx - mov [rsp + $08], rbp - mov [rsp + $20], r12 - mov [rsp + $28], r13 - mov [rsp + $30], r14 - mov [rsp + $38], r15 - - mov r12, rcx - mov r13, rdx - mov r14d, r8d - mov [rsp + $40], r9 - mov [rsp + $48], r10 - - test r14d, r14d - jz @avx2_done - -@avx2_block_loop: - - // ========== Phase 1: Message Schedule (VEX-128) ========== - - mov rax, [rsp + $48] - db $C5, $FA, $6F, $38 // vmovdqu xmm7, oword [rax] - mov rax, [rsp + $40] - - db $C4, $C1, $7A, $6F, $45, $00 // vmovdqu xmm0, oword [r13] - db $C4, $E2, $79, $00, $C7 // vpshufb xmm0, xmm0, xmm7 - db $C4, $C1, $7A, $6F, $4D, $10 // vmovdqu xmm1, oword [r13 + $10] - db $C4, $E2, $71, $00, $CF // vpshufb xmm1, xmm1, xmm7 - db $C4, $C1, $7A, $6F, $55, $20 // vmovdqu xmm2, oword [r13 + $20] - db $C4, $E2, $69, $00, $D7 // vpshufb xmm2, xmm2, xmm7 - db $C4, $C1, $7A, $6F, $5D, $30 // vmovdqu xmm3, oword [r13 + $30] - db $C4, $E2, $61, $00, $DF // vpshufb xmm3, xmm3, xmm7 - - lea rbp, [rsp + $50] - - db $C5, $FA, $6F, $20 // vmovdqu xmm4, oword [rax] - db $C5, $F9, $FE, $E4 // vpaddd xmm4, xmm0, xmm4 - db $C5, $F9, $7F, $65, $00 // vmovdqa oword [rbp], xmm4 - - db $C5, $FA, $6F, $60, $10 // vmovdqu xmm4, oword [rax + $10] - db $C5, $F1, $FE, $E4 // vpaddd xmm4, xmm1, xmm4 - db $C5, $F9, $7F, $65, $10 // vmovdqa oword [rbp + $10], xmm4 - - db $C5, $FA, $6F, $60, $20 // vmovdqu xmm4, oword [rax + $20] - db $C5, $E9, $FE, $E4 // vpaddd xmm4, xmm2, xmm4 - db $C5, $F9, $7F, $65, $20 // vmovdqa oword [rbp + $20], xmm4 - - db $C5, $FA, $6F, $60, $30 // vmovdqu xmm4, oword [rax + $30] - db $C5, $E1, $FE, $E4 // vpaddd xmm4, xmm3, xmm4 - db $C5, $F9, $7F, $65, $30 // vmovdqa oword [rbp + $30], xmm4 - - add rax, $40 - add rbp, $40 - mov ecx, 12 - -@avx2_expand_loop: - - // sigma0(W[t-15..t-12]) - db $C4, $E3, $71, $0F, $E0, $04 // vpalignr xmm4, xmm1, xmm0, 4 - db $C5, $D1, $72, $D4, $07 // vpsrld xmm5, xmm4, 7 - db $C5, $C9, $72, $F4, $0E // vpslld xmm6, xmm4, 14 - db $C5, $D9, $72, $D4, $03 // vpsrld xmm4, xmm4, 3 - db $C5, $D9, $EF, $E5 // vpxor xmm4, xmm4, xmm5 - db $C5, $D1, $72, $D5, $0B // vpsrld xmm5, xmm5, 11 - db $C5, $D9, $EF, $E6 // vpxor xmm4, xmm4, xmm6 - db $C5, $C9, $72, $F6, $0B // vpslld xmm6, xmm6, 11 - db $C5, $D9, $EF, $E5 // vpxor xmm4, xmm4, xmm5 - db $C5, $D9, $EF, $E6 // vpxor xmm4, xmm4, xmm6 - - db $C5, $F9, $FE, $C4 // vpaddd xmm0, xmm0, xmm4 - - // W[t-7..t-4] - db $C4, $E3, $61, $0F, $E2, $04 // vpalignr xmm4, xmm3, xmm2, 4 - db $C5, $F9, $FE, $C4 // vpaddd xmm0, xmm0, xmm4 - - // sigma1 phase 1: W[t-2..t-1] - db $C5, $D9, $73, $DB, $08 // vpsrldq xmm4, xmm3, 8 - db $C5, $D1, $72, $D4, $11 // vpsrld xmm5, xmm4, 17 - db $C5, $C9, $72, $F4, $0D // vpslld xmm6, xmm4, 13 - db $C5, $D9, $72, $D4, $0A // vpsrld xmm4, xmm4, 10 - db $C5, $D9, $EF, $E5 // vpxor xmm4, xmm4, xmm5 - db $C5, $D1, $72, $D5, $02 // vpsrld xmm5, xmm5, 2 - db $C5, $D9, $EF, $E6 // vpxor xmm4, xmm4, xmm6 - db $C5, $C9, $72, $F6, $02 // vpslld xmm6, xmm6, 2 - db $C5, $D9, $EF, $E5 // vpxor xmm4, xmm4, xmm5 - db $C5, $D9, $EF, $E6 // vpxor xmm4, xmm4, xmm6 - db $C5, $F9, $FE, $C4 // vpaddd xmm0, xmm0, xmm4 - - // sigma1 phase 2: W[t..t+1] - db $C5, $D9, $73, $F8, $08 // vpslldq xmm4, xmm0, 8 - db $C5, $D1, $72, $D4, $11 // vpsrld xmm5, xmm4, 17 - db $C5, $C9, $72, $F4, $0D // vpslld xmm6, xmm4, 13 - db $C5, $D9, $72, $D4, $0A // vpsrld xmm4, xmm4, 10 - db $C5, $D9, $EF, $E5 // vpxor xmm4, xmm4, xmm5 - db $C5, $D1, $72, $D5, $02 // vpsrld xmm5, xmm5, 2 - db $C5, $D9, $EF, $E6 // vpxor xmm4, xmm4, xmm6 - db $C5, $C9, $72, $F6, $02 // vpslld xmm6, xmm6, 2 - db $C5, $D9, $EF, $E5 // vpxor xmm4, xmm4, xmm5 - db $C5, $D9, $EF, $E6 // vpxor xmm4, xmm4, xmm6 - db $C5, $F9, $FE, $C4 // vpaddd xmm0, xmm0, xmm4 - - db $C5, $FA, $6F, $20 // vmovdqu xmm4, oword [rax] - db $C5, $F9, $FE, $E4 // vpaddd xmm4, xmm0, xmm4 - db $C5, $F9, $7F, $65, $00 // vmovdqa oword [rbp], xmm4 - - // Rotate message window - db $C5, $F9, $6F, $E0 // vmovdqa xmm4, xmm0 - db $C5, $F9, $6F, $C1 // vmovdqa xmm0, xmm1 - db $C5, $F9, $6F, $CA // vmovdqa xmm1, xmm2 - db $C5, $F9, $6F, $D3 // vmovdqa xmm2, xmm3 - db $C5, $F9, $6F, $DC // vmovdqa xmm3, xmm4 - - add rax, $10 - add rbp, $10 - dec ecx - jnz @avx2_expand_loop - - // ========== Phase 2: 64 Compression Rounds (GPR, identical to SSSE3) ========== - - mov eax, [r12] - mov ebx, [r12 + $04] - mov ecx, [r12 + $08] - mov edx, [r12 + $0C] - mov r8d, [r12 + $10] - mov r9d, [r12 + $14] - mov r10d, [r12 + $18] - mov r11d, [r12 + $1C] - - lea rbp, [rsp + $50] - lea r15, [rsp + $50 + $100] - -@avx2_round_loop: - - // Round 0: a=eax b=ebx c=ecx d=edx e=r8d f=r9d g=r10d h=r11d - mov esi, r8d - mov edi, r8d - ror esi, 6 - ror edi, 11 - xor esi, edi - ror edi, 14 - xor esi, edi - mov edi, r9d - xor edi, r10d - and edi, r8d - xor edi, r10d - add esi, r11d - add esi, edi - add esi, [rbp] - add edx, esi - mov edi, eax - mov r11d, eax - ror edi, 2 - ror r11d, 13 - xor edi, r11d - ror r11d, 9 - xor edi, r11d - add esi, edi - mov r11d, eax - and r11d, ebx - mov edi, eax - xor edi, ebx - and edi, ecx - xor r11d, edi - add r11d, esi - - // Round 1: a=r11d b=eax c=ebx d=ecx e=edx f=r8d g=r9d h=r10d - mov esi, edx - mov edi, edx - ror esi, 6 - ror edi, 11 - xor esi, edi - ror edi, 14 - xor esi, edi - mov edi, r8d - xor edi, r9d - and edi, edx - xor edi, r9d - add esi, r10d - add esi, edi - add esi, [rbp + $04] - add ecx, esi - mov edi, r11d - mov r10d, r11d - ror edi, 2 - ror r10d, 13 - xor edi, r10d - ror r10d, 9 - xor edi, r10d - add esi, edi - mov r10d, r11d - and r10d, eax - mov edi, r11d - xor edi, eax - and edi, ebx - xor r10d, edi - add r10d, esi - - // Round 2: a=r10d b=r11d c=eax d=ebx e=ecx f=edx g=r8d h=r9d - mov esi, ecx - mov edi, ecx - ror esi, 6 - ror edi, 11 - xor esi, edi - ror edi, 14 - xor esi, edi - mov edi, edx - xor edi, r8d - and edi, ecx - xor edi, r8d - add esi, r9d - add esi, edi - add esi, [rbp + $08] - add ebx, esi - mov edi, r10d - mov r9d, r10d - ror edi, 2 - ror r9d, 13 - xor edi, r9d - ror r9d, 9 - xor edi, r9d - add esi, edi - mov r9d, r10d - and r9d, r11d - mov edi, r10d - xor edi, r11d - and edi, eax - xor r9d, edi - add r9d, esi - - // Round 3: a=r9d b=r10d c=r11d d=eax e=ebx f=ecx g=edx h=r8d - mov esi, ebx - mov edi, ebx - ror esi, 6 - ror edi, 11 - xor esi, edi - ror edi, 14 - xor esi, edi - mov edi, ecx - xor edi, edx - and edi, ebx - xor edi, edx - add esi, r8d - add esi, edi - add esi, [rbp + $0C] - add eax, esi - mov edi, r9d - mov r8d, r9d - ror edi, 2 - ror r8d, 13 - xor edi, r8d - ror r8d, 9 - xor edi, r8d - add esi, edi - mov r8d, r9d - and r8d, r10d - mov edi, r9d - xor edi, r10d - and edi, r11d - xor r8d, edi - add r8d, esi - - // Round 4: a=r8d b=r9d c=r10d d=r11d e=eax f=ebx g=ecx h=edx - mov esi, eax - mov edi, eax - ror esi, 6 - ror edi, 11 - xor esi, edi - ror edi, 14 - xor esi, edi - mov edi, ebx - xor edi, ecx - and edi, eax - xor edi, ecx - add esi, edx - add esi, edi - add esi, [rbp + $10] - add r11d, esi - mov edi, r8d - mov edx, r8d - ror edi, 2 - ror edx, 13 - xor edi, edx - ror edx, 9 - xor edi, edx - add esi, edi - mov edx, r8d - and edx, r9d - mov edi, r8d - xor edi, r9d - and edi, r10d - xor edx, edi - add edx, esi - - // Round 5: a=edx b=r8d c=r9d d=r10d e=r11d f=eax g=ebx h=ecx - mov esi, r11d - mov edi, r11d - ror esi, 6 - ror edi, 11 - xor esi, edi - ror edi, 14 - xor esi, edi - mov edi, eax - xor edi, ebx - and edi, r11d - xor edi, ebx - add esi, ecx - add esi, edi - add esi, [rbp + $14] - add r10d, esi - mov edi, edx - mov ecx, edx - ror edi, 2 - ror ecx, 13 - xor edi, ecx - ror ecx, 9 - xor edi, ecx - add esi, edi - mov ecx, edx - and ecx, r8d - mov edi, edx - xor edi, r8d - and edi, r9d - xor ecx, edi - add ecx, esi - - // Round 6: a=ecx b=edx c=r8d d=r9d e=r10d f=r11d g=eax h=ebx - mov esi, r10d - mov edi, r10d - ror esi, 6 - ror edi, 11 - xor esi, edi - ror edi, 14 - xor esi, edi - mov edi, r11d - xor edi, eax - and edi, r10d - xor edi, eax - add esi, ebx - add esi, edi - add esi, [rbp + $18] - add r9d, esi - mov edi, ecx - mov ebx, ecx - ror edi, 2 - ror ebx, 13 - xor edi, ebx - ror ebx, 9 - xor edi, ebx - add esi, edi - mov ebx, ecx - and ebx, edx - mov edi, ecx - xor edi, edx - and edi, r8d - xor ebx, edi - add ebx, esi - - // Round 7: a=ebx b=ecx c=edx d=r8d e=r9d f=r10d g=r11d h=eax - mov esi, r9d - mov edi, r9d - ror esi, 6 - ror edi, 11 - xor esi, edi - ror edi, 14 - xor esi, edi - mov edi, r10d - xor edi, r11d - and edi, r9d - xor edi, r11d - add esi, eax - add esi, edi - add esi, [rbp + $1C] - add r8d, esi - mov edi, ebx - mov eax, ebx - ror edi, 2 - ror eax, 13 - xor edi, eax - ror eax, 9 - xor edi, eax - add esi, edi - mov eax, ebx - and eax, ecx - mov edi, ebx - xor edi, ecx - and edi, edx - xor eax, edi - add eax, esi - - add rbp, $20 - cmp rbp, r15 - jb @avx2_round_loop + mov rax, rsp + push r9 + push rbx + push rbp + push rsi + push rdi + push r12 + push r13 + push r14 + push r15 + mov rdi, rcx + mov rsi, rdx + mov edx, r8d + sub rsp, $260 + shl rdx, $4 + and rsp, $FFFFFFFFFFFFFC00 + lea rdx, [rsi + rdx*4] + add rsp, $1C0 + mov qword [rsp + $40], rdi + mov qword [rsp + $48], rsi + mov qword [rsp + $50], rdx + mov qword [rsp + $58], rax - // Add round results to state - add [r12], eax - add [r12 + $04], ebx - add [r12 + $08], ecx - add [r12 + $0C], edx - add [r12 + $10], r8d - add [r12 + $14], r9d - add [r12 + $18], r10d - add [r12 + $1C], r11d +@prologue: + mov rbp, qword [rsp + $58] + mov rbp, qword [rbp - $8] + db $C5, $F8, $77 // vzeroupper + sub rsi, $FFFFFFFFFFFFFFC0 + mov eax, dword [rdi] + mov r12, rsi + mov ebx, dword [rdi + $4] + cmp rsi, rdx + mov ecx, dword [rdi + $8] + cmove r12, rsp + mov edx, dword [rdi + $C] + mov r8d, dword [rdi + $10] + mov r9d, dword [rdi + $14] + mov r10d, dword [rdi + $18] + mov r11d, dword [rdi + $1C] + db $C5, $7E, $6F, $85, $20, $02, $00, $00 // vmovdqu ymm8, yword [rbp + $220] + db $C5, $7E, $6F, $8D, $40, $02, $00, $00 // vmovdqu ymm9, yword [rbp + $240] + jmp @block_loop - add r13, $40 - dec r14d - jnz @avx2_block_loop +@block_loop: + mov rbp, qword [rsp + $58] + mov rbp, qword [rbp - $8] + db $C5, $FE, $6F, $BD, $00, $02, $00, $00 // vmovdqu ymm7, yword [rbp + $200] + db $C5, $FA, $6F, $46, $C0 // vmovdqu xmm0, oword [rsi - $40] + db $C5, $FA, $6F, $4E, $D0 // vmovdqu xmm1, oword [rsi - $30] + db $C5, $FA, $6F, $56, $E0 // vmovdqu xmm2, oword [rsi - $20] + db $C5, $FA, $6F, $5E, $F0 // vmovdqu xmm3, oword [rsi - $10] + db $C4, $C3, $7D, $38, $04, $24, $01 // vinserti128 ymm0, ymm0, oword [r12], $1 + db $C4, $C3, $75, $38, $4C, $24, $10, $01 // vinserti128 ymm1, ymm1, oword [r12 + $10], $1 + db $C4, $E2, $7D, $00, $C7 // vpshufb ymm0, ymm0, ymm7 + db $C4, $C3, $6D, $38, $54, $24, $20, $01 // vinserti128 ymm2, ymm2, oword [r12 + $20], $1 + db $C4, $E2, $75, $00, $CF // vpshufb ymm1, ymm1, ymm7 + db $C4, $C3, $65, $38, $5C, $24, $30, $01 // vinserti128 ymm3, ymm3, oword [r12 + $30], $1 + db $C4, $E2, $6D, $00, $D7 // vpshufb ymm2, ymm2, ymm7 + db $C5, $FD, $FE, $65, $00 // vpaddd ymm4, ymm0, yword [rbp + $0] + db $C4, $E2, $65, $00, $DF // vpshufb ymm3, ymm3, ymm7 + db $C5, $F5, $FE, $6D, $20 // vpaddd ymm5, ymm1, yword [rbp + $20] + db $C5, $ED, $FE, $75, $40 // vpaddd ymm6, ymm2, yword [rbp + $40] + db $C5, $E5, $FE, $7D, $60 // vpaddd ymm7, ymm3, yword [rbp + $60] + db $C5, $FD, $7F, $24, $24 // vmovdqa yword [rsp], ymm4 + xor r14d, r14d + db $C5, $FD, $7F, $6C, $24, $20 // vmovdqa yword [rsp + $20], ymm5 + lea rsp, [rsp - $40] + mov edi, ebx + db $C5, $FD, $7F, $34, $24 // vmovdqa yword [rsp], ymm6 + xor edi, ecx + db $C5, $FD, $7F, $7C, $24, $20 // vmovdqa yword [rsp + $20], ymm7 + mov r12d, r9d + sub rbp, $FFFFFFFFFFFFFF80 + jmp @sched_loop -@avx2_done: +@sched_loop: + lea rsp, [rsp - $40] + db $C4, $E3, $75, $0F, $E0, $04 // vpalignr ymm4, ymm1, ymm0, $4 + add r11d, dword [rsp + $80] + and r12d, r8d + db $C4, $43, $7B, $F0, $E8, $19 // rorx r13d, r8d, $19 + db $C4, $E3, $65, $0F, $FA, $04 // vpalignr ymm7, ymm3, ymm2, $4 + db $C4, $43, $7B, $F0, $F8, $0B // rorx r15d, r8d, $B + lea eax, [rax + r14*1] + lea r11d, [r11 + r12*1] + db $C5, $CD, $72, $D4, $07 // vpsrld ymm6, ymm4, $7 + db $C4, $42, $38, $F2, $E2 // andn r12d, r8d, r10d + xor r13d, r15d + db $C4, $43, $7B, $F0, $F0, $06 // rorx r14d, r8d, $6 + db $C5, $FD, $FE, $C7 // vpaddd ymm0, ymm0, ymm7 + lea r11d, [r11 + r12*1] + xor r13d, r14d + mov r15d, eax + db $C5, $C5, $72, $D4, $03 // vpsrld ymm7, ymm4, $3 + db $C4, $63, $7B, $F0, $E0, $16 // rorx r12d, eax, $16 + lea r11d, [r11 + r13*1] + xor r15d, ebx + db $C5, $D5, $72, $F4, $0E // vpslld ymm5, ymm4, $E + db $C4, $63, $7B, $F0, $F0, $0D // rorx r14d, eax, $D + db $C4, $63, $7B, $F0, $E8, $02 // rorx r13d, eax, $2 + lea edx, [rdx + r11*1] + db $C5, $C5, $EF, $E6 // vpxor ymm4, ymm7, ymm6 + and edi, r15d + xor r14d, r12d + xor edi, ebx + db $C5, $FD, $70, $FB, $FA // vpshufd ymm7, ymm3, $FA + xor r14d, r13d + lea r11d, [r11 + rdi*1] + mov r12d, r8d + db $C5, $CD, $72, $D6, $0B // vpsrld ymm6, ymm6, $B + add r10d, dword [rsp + $84] + and r12d, edx + db $C4, $63, $7B, $F0, $EA, $19 // rorx r13d, edx, $19 + db $C5, $DD, $EF, $E5 // vpxor ymm4, ymm4, ymm5 + db $C4, $E3, $7B, $F0, $FA, $0B // rorx edi, edx, $B + lea r11d, [r11 + r14*1] + lea r10d, [r10 + r12*1] + db $C5, $D5, $72, $F5, $0B // vpslld ymm5, ymm5, $B + db $C4, $42, $68, $F2, $E1 // andn r12d, edx, r9d + xor r13d, edi + db $C4, $63, $7B, $F0, $F2, $06 // rorx r14d, edx, $6 + db $C5, $DD, $EF, $E6 // vpxor ymm4, ymm4, ymm6 + lea r10d, [r10 + r12*1] + xor r13d, r14d + mov edi, r11d + db $C5, $CD, $72, $D7, $0A // vpsrld ymm6, ymm7, $A + db $C4, $43, $7B, $F0, $E3, $16 // rorx r12d, r11d, $16 + lea r10d, [r10 + r13*1] + xor edi, eax + db $C5, $DD, $EF, $E5 // vpxor ymm4, ymm4, ymm5 + db $C4, $43, $7B, $F0, $F3, $0D // rorx r14d, r11d, $D + db $C4, $43, $7B, $F0, $EB, $02 // rorx r13d, r11d, $2 + lea ecx, [rcx + r10*1] + db $C5, $C5, $73, $D7, $11 // vpsrlq ymm7, ymm7, $11 + and r15d, edi + xor r14d, r12d + xor r15d, eax + db $C5, $FD, $FE, $C4 // vpaddd ymm0, ymm0, ymm4 + xor r14d, r13d + lea r10d, [r10 + r15*1] + mov r12d, edx + db $C5, $CD, $EF, $F7 // vpxor ymm6, ymm6, ymm7 + add r9d, dword [rsp + $88] + and r12d, ecx + db $C4, $63, $7B, $F0, $E9, $19 // rorx r13d, ecx, $19 + db $C5, $C5, $73, $D7, $02 // vpsrlq ymm7, ymm7, $2 + db $C4, $63, $7B, $F0, $F9, $0B // rorx r15d, ecx, $B + lea r10d, [r10 + r14*1] + lea r9d, [r9 + r12*1] + db $C5, $CD, $EF, $F7 // vpxor ymm6, ymm6, ymm7 + db $C4, $42, $70, $F2, $E0 // andn r12d, ecx, r8d + xor r13d, r15d + db $C4, $63, $7B, $F0, $F1, $06 // rorx r14d, ecx, $6 + db $C4, $C2, $4D, $00, $F0 // vpshufb ymm6, ymm6, ymm8 + lea r9d, [r9 + r12*1] + xor r13d, r14d + mov r15d, r10d + db $C5, $FD, $FE, $C6 // vpaddd ymm0, ymm0, ymm6 + db $C4, $43, $7B, $F0, $E2, $16 // rorx r12d, r10d, $16 + lea r9d, [r9 + r13*1] + xor r15d, r11d + db $C5, $FD, $70, $F8, $50 // vpshufd ymm7, ymm0, $50 + db $C4, $43, $7B, $F0, $F2, $0D // rorx r14d, r10d, $D + db $C4, $43, $7B, $F0, $EA, $02 // rorx r13d, r10d, $2 + lea ebx, [rbx + r9*1] + db $C5, $CD, $72, $D7, $0A // vpsrld ymm6, ymm7, $A + and edi, r15d + xor r14d, r12d + xor edi, r11d + db $C5, $C5, $73, $D7, $11 // vpsrlq ymm7, ymm7, $11 + xor r14d, r13d + lea r9d, [r9 + rdi*1] + mov r12d, ecx + db $C5, $CD, $EF, $F7 // vpxor ymm6, ymm6, ymm7 + add r8d, dword [rsp + $8C] + and r12d, ebx + db $C4, $63, $7B, $F0, $EB, $19 // rorx r13d, ebx, $19 + db $C5, $C5, $73, $D7, $02 // vpsrlq ymm7, ymm7, $2 + db $C4, $E3, $7B, $F0, $FB, $0B // rorx edi, ebx, $B + lea r9d, [r9 + r14*1] + lea r8d, [r8 + r12*1] + db $C5, $CD, $EF, $F7 // vpxor ymm6, ymm6, ymm7 + db $C4, $62, $60, $F2, $E2 // andn r12d, ebx, edx + xor r13d, edi + db $C4, $63, $7B, $F0, $F3, $06 // rorx r14d, ebx, $6 + db $C4, $C2, $4D, $00, $F1 // vpshufb ymm6, ymm6, ymm9 + lea r8d, [r8 + r12*1] + xor r13d, r14d + mov edi, r9d + db $C5, $FD, $FE, $C6 // vpaddd ymm0, ymm0, ymm6 + db $C4, $43, $7B, $F0, $E1, $16 // rorx r12d, r9d, $16 + lea r8d, [r8 + r13*1] + xor edi, r10d + db $C5, $FD, $FE, $75, $00 // vpaddd ymm6, ymm0, yword [rbp + $0] + db $C4, $43, $7B, $F0, $F1, $0D // rorx r14d, r9d, $D + db $C4, $43, $7B, $F0, $E9, $02 // rorx r13d, r9d, $2 + lea eax, [rax + r8*1] + and r15d, edi + xor r14d, r12d + xor r15d, r10d + xor r14d, r13d + lea r8d, [r8 + r15*1] + mov r12d, ebx + db $C5, $FD, $7F, $34, $24 // vmovdqa yword [rsp], ymm6 + db $C4, $E3, $6D, $0F, $E1, $04 // vpalignr ymm4, ymm2, ymm1, $4 + add edx, dword [rsp + $A0] + and r12d, eax + db $C4, $63, $7B, $F0, $E8, $19 // rorx r13d, eax, $19 + db $C4, $E3, $7D, $0F, $FB, $04 // vpalignr ymm7, ymm0, ymm3, $4 + db $C4, $63, $7B, $F0, $F8, $0B // rorx r15d, eax, $B + lea r8d, [r8 + r14*1] + lea edx, [rdx + r12*1] + db $C5, $CD, $72, $D4, $07 // vpsrld ymm6, ymm4, $7 + db $C4, $62, $78, $F2, $E1 // andn r12d, eax, ecx + xor r13d, r15d + db $C4, $63, $7B, $F0, $F0, $06 // rorx r14d, eax, $6 + db $C5, $F5, $FE, $CF // vpaddd ymm1, ymm1, ymm7 + lea edx, [rdx + r12*1] + xor r13d, r14d + mov r15d, r8d + db $C5, $C5, $72, $D4, $03 // vpsrld ymm7, ymm4, $3 + db $C4, $43, $7B, $F0, $E0, $16 // rorx r12d, r8d, $16 + lea edx, [rdx + r13*1] + xor r15d, r9d + db $C5, $D5, $72, $F4, $0E // vpslld ymm5, ymm4, $E + db $C4, $43, $7B, $F0, $F0, $0D // rorx r14d, r8d, $D + db $C4, $43, $7B, $F0, $E8, $02 // rorx r13d, r8d, $2 + lea r11d, [r11 + rdx*1] + db $C5, $C5, $EF, $E6 // vpxor ymm4, ymm7, ymm6 + and edi, r15d + xor r14d, r12d + xor edi, r9d + db $C5, $FD, $70, $F8, $FA // vpshufd ymm7, ymm0, $FA + xor r14d, r13d + lea edx, [rdx + rdi*1] + mov r12d, eax + db $C5, $CD, $72, $D6, $0B // vpsrld ymm6, ymm6, $B + add ecx, dword [rsp + $A4] + and r12d, r11d + db $C4, $43, $7B, $F0, $EB, $19 // rorx r13d, r11d, $19 + db $C5, $DD, $EF, $E5 // vpxor ymm4, ymm4, ymm5 + db $C4, $C3, $7B, $F0, $FB, $0B // rorx edi, r11d, $B + lea edx, [rdx + r14*1] + lea ecx, [rcx + r12*1] + db $C5, $D5, $72, $F5, $0B // vpslld ymm5, ymm5, $B + db $C4, $62, $20, $F2, $E3 // andn r12d, r11d, ebx + xor r13d, edi + db $C4, $43, $7B, $F0, $F3, $06 // rorx r14d, r11d, $6 + db $C5, $DD, $EF, $E6 // vpxor ymm4, ymm4, ymm6 + lea ecx, [rcx + r12*1] + xor r13d, r14d + mov edi, edx + db $C5, $CD, $72, $D7, $0A // vpsrld ymm6, ymm7, $A + db $C4, $63, $7B, $F0, $E2, $16 // rorx r12d, edx, $16 + lea ecx, [rcx + r13*1] + xor edi, r8d + db $C5, $DD, $EF, $E5 // vpxor ymm4, ymm4, ymm5 + db $C4, $63, $7B, $F0, $F2, $0D // rorx r14d, edx, $D + db $C4, $63, $7B, $F0, $EA, $02 // rorx r13d, edx, $2 + lea r10d, [r10 + rcx*1] + db $C5, $C5, $73, $D7, $11 // vpsrlq ymm7, ymm7, $11 + and r15d, edi + xor r14d, r12d + xor r15d, r8d + db $C5, $F5, $FE, $CC // vpaddd ymm1, ymm1, ymm4 + xor r14d, r13d + lea ecx, [rcx + r15*1] + mov r12d, r11d + db $C5, $CD, $EF, $F7 // vpxor ymm6, ymm6, ymm7 + add ebx, dword [rsp + $A8] + and r12d, r10d + db $C4, $43, $7B, $F0, $EA, $19 // rorx r13d, r10d, $19 + db $C5, $C5, $73, $D7, $02 // vpsrlq ymm7, ymm7, $2 + db $C4, $43, $7B, $F0, $FA, $0B // rorx r15d, r10d, $B + lea ecx, [rcx + r14*1] + lea ebx, [rbx + r12*1] + db $C5, $CD, $EF, $F7 // vpxor ymm6, ymm6, ymm7 + db $C4, $62, $28, $F2, $E0 // andn r12d, r10d, eax + xor r13d, r15d + db $C4, $43, $7B, $F0, $F2, $06 // rorx r14d, r10d, $6 + db $C4, $C2, $4D, $00, $F0 // vpshufb ymm6, ymm6, ymm8 + lea ebx, [rbx + r12*1] + xor r13d, r14d + mov r15d, ecx + db $C5, $F5, $FE, $CE // vpaddd ymm1, ymm1, ymm6 + db $C4, $63, $7B, $F0, $E1, $16 // rorx r12d, ecx, $16 + lea ebx, [rbx + r13*1] + xor r15d, edx + db $C5, $FD, $70, $F9, $50 // vpshufd ymm7, ymm1, $50 + db $C4, $63, $7B, $F0, $F1, $0D // rorx r14d, ecx, $D + db $C4, $63, $7B, $F0, $E9, $02 // rorx r13d, ecx, $2 + lea r9d, [r9 + rbx*1] + db $C5, $CD, $72, $D7, $0A // vpsrld ymm6, ymm7, $A + and edi, r15d + xor r14d, r12d + xor edi, edx + db $C5, $C5, $73, $D7, $11 // vpsrlq ymm7, ymm7, $11 + xor r14d, r13d + lea ebx, [rbx + rdi*1] + mov r12d, r10d + db $C5, $CD, $EF, $F7 // vpxor ymm6, ymm6, ymm7 + add eax, dword [rsp + $AC] + and r12d, r9d + db $C4, $43, $7B, $F0, $E9, $19 // rorx r13d, r9d, $19 + db $C5, $C5, $73, $D7, $02 // vpsrlq ymm7, ymm7, $2 + db $C4, $C3, $7B, $F0, $F9, $0B // rorx edi, r9d, $B + lea ebx, [rbx + r14*1] + lea eax, [rax + r12*1] + db $C5, $CD, $EF, $F7 // vpxor ymm6, ymm6, ymm7 + db $C4, $42, $30, $F2, $E3 // andn r12d, r9d, r11d + xor r13d, edi + db $C4, $43, $7B, $F0, $F1, $06 // rorx r14d, r9d, $6 + db $C4, $C2, $4D, $00, $F1 // vpshufb ymm6, ymm6, ymm9 + lea eax, [rax + r12*1] + xor r13d, r14d + mov edi, ebx + db $C5, $F5, $FE, $CE // vpaddd ymm1, ymm1, ymm6 + db $C4, $63, $7B, $F0, $E3, $16 // rorx r12d, ebx, $16 + lea eax, [rax + r13*1] + xor edi, ecx + db $C5, $F5, $FE, $75, $20 // vpaddd ymm6, ymm1, yword [rbp + $20] + db $C4, $63, $7B, $F0, $F3, $0D // rorx r14d, ebx, $D + db $C4, $63, $7B, $F0, $EB, $02 // rorx r13d, ebx, $2 + lea r8d, [r8 + rax*1] + and r15d, edi + xor r14d, r12d + xor r15d, ecx + xor r14d, r13d + lea eax, [rax + r15*1] + mov r12d, r9d + db $C5, $FD, $7F, $74, $24, $20 // vmovdqa yword [rsp + $20], ymm6 + lea rsp, [rsp - $40] + db $C4, $E3, $65, $0F, $E2, $04 // vpalignr ymm4, ymm3, ymm2, $4 + add r11d, dword [rsp + $80] + and r12d, r8d + db $C4, $43, $7B, $F0, $E8, $19 // rorx r13d, r8d, $19 + db $C4, $E3, $75, $0F, $F8, $04 // vpalignr ymm7, ymm1, ymm0, $4 + db $C4, $43, $7B, $F0, $F8, $0B // rorx r15d, r8d, $B + lea eax, [rax + r14*1] + lea r11d, [r11 + r12*1] + db $C5, $CD, $72, $D4, $07 // vpsrld ymm6, ymm4, $7 + db $C4, $42, $38, $F2, $E2 // andn r12d, r8d, r10d + xor r13d, r15d + db $C4, $43, $7B, $F0, $F0, $06 // rorx r14d, r8d, $6 + db $C5, $ED, $FE, $D7 // vpaddd ymm2, ymm2, ymm7 + lea r11d, [r11 + r12*1] + xor r13d, r14d + mov r15d, eax + db $C5, $C5, $72, $D4, $03 // vpsrld ymm7, ymm4, $3 + db $C4, $63, $7B, $F0, $E0, $16 // rorx r12d, eax, $16 + lea r11d, [r11 + r13*1] + xor r15d, ebx + db $C5, $D5, $72, $F4, $0E // vpslld ymm5, ymm4, $E + db $C4, $63, $7B, $F0, $F0, $0D // rorx r14d, eax, $D + db $C4, $63, $7B, $F0, $E8, $02 // rorx r13d, eax, $2 + lea edx, [rdx + r11*1] + db $C5, $C5, $EF, $E6 // vpxor ymm4, ymm7, ymm6 + and edi, r15d + xor r14d, r12d + xor edi, ebx + db $C5, $FD, $70, $F9, $FA // vpshufd ymm7, ymm1, $FA + xor r14d, r13d + lea r11d, [r11 + rdi*1] + mov r12d, r8d + db $C5, $CD, $72, $D6, $0B // vpsrld ymm6, ymm6, $B + add r10d, dword [rsp + $84] + and r12d, edx + db $C4, $63, $7B, $F0, $EA, $19 // rorx r13d, edx, $19 + db $C5, $DD, $EF, $E5 // vpxor ymm4, ymm4, ymm5 + db $C4, $E3, $7B, $F0, $FA, $0B // rorx edi, edx, $B + lea r11d, [r11 + r14*1] + lea r10d, [r10 + r12*1] + db $C5, $D5, $72, $F5, $0B // vpslld ymm5, ymm5, $B + db $C4, $42, $68, $F2, $E1 // andn r12d, edx, r9d + xor r13d, edi + db $C4, $63, $7B, $F0, $F2, $06 // rorx r14d, edx, $6 + db $C5, $DD, $EF, $E6 // vpxor ymm4, ymm4, ymm6 + lea r10d, [r10 + r12*1] + xor r13d, r14d + mov edi, r11d + db $C5, $CD, $72, $D7, $0A // vpsrld ymm6, ymm7, $A + db $C4, $43, $7B, $F0, $E3, $16 // rorx r12d, r11d, $16 + lea r10d, [r10 + r13*1] + xor edi, eax + db $C5, $DD, $EF, $E5 // vpxor ymm4, ymm4, ymm5 + db $C4, $43, $7B, $F0, $F3, $0D // rorx r14d, r11d, $D + db $C4, $43, $7B, $F0, $EB, $02 // rorx r13d, r11d, $2 + lea ecx, [rcx + r10*1] + db $C5, $C5, $73, $D7, $11 // vpsrlq ymm7, ymm7, $11 + and r15d, edi + xor r14d, r12d + xor r15d, eax + db $C5, $ED, $FE, $D4 // vpaddd ymm2, ymm2, ymm4 + xor r14d, r13d + lea r10d, [r10 + r15*1] + mov r12d, edx + db $C5, $CD, $EF, $F7 // vpxor ymm6, ymm6, ymm7 + add r9d, dword [rsp + $88] + and r12d, ecx + db $C4, $63, $7B, $F0, $E9, $19 // rorx r13d, ecx, $19 + db $C5, $C5, $73, $D7, $02 // vpsrlq ymm7, ymm7, $2 + db $C4, $63, $7B, $F0, $F9, $0B // rorx r15d, ecx, $B + lea r10d, [r10 + r14*1] + lea r9d, [r9 + r12*1] + db $C5, $CD, $EF, $F7 // vpxor ymm6, ymm6, ymm7 + db $C4, $42, $70, $F2, $E0 // andn r12d, ecx, r8d + xor r13d, r15d + db $C4, $63, $7B, $F0, $F1, $06 // rorx r14d, ecx, $6 + db $C4, $C2, $4D, $00, $F0 // vpshufb ymm6, ymm6, ymm8 + lea r9d, [r9 + r12*1] + xor r13d, r14d + mov r15d, r10d + db $C5, $ED, $FE, $D6 // vpaddd ymm2, ymm2, ymm6 + db $C4, $43, $7B, $F0, $E2, $16 // rorx r12d, r10d, $16 + lea r9d, [r9 + r13*1] + xor r15d, r11d + db $C5, $FD, $70, $FA, $50 // vpshufd ymm7, ymm2, $50 + db $C4, $43, $7B, $F0, $F2, $0D // rorx r14d, r10d, $D + db $C4, $43, $7B, $F0, $EA, $02 // rorx r13d, r10d, $2 + lea ebx, [rbx + r9*1] + db $C5, $CD, $72, $D7, $0A // vpsrld ymm6, ymm7, $A + and edi, r15d + xor r14d, r12d + xor edi, r11d + db $C5, $C5, $73, $D7, $11 // vpsrlq ymm7, ymm7, $11 + xor r14d, r13d + lea r9d, [r9 + rdi*1] + mov r12d, ecx + db $C5, $CD, $EF, $F7 // vpxor ymm6, ymm6, ymm7 + add r8d, dword [rsp + $8C] + and r12d, ebx + db $C4, $63, $7B, $F0, $EB, $19 // rorx r13d, ebx, $19 + db $C5, $C5, $73, $D7, $02 // vpsrlq ymm7, ymm7, $2 + db $C4, $E3, $7B, $F0, $FB, $0B // rorx edi, ebx, $B + lea r9d, [r9 + r14*1] + lea r8d, [r8 + r12*1] + db $C5, $CD, $EF, $F7 // vpxor ymm6, ymm6, ymm7 + db $C4, $62, $60, $F2, $E2 // andn r12d, ebx, edx + xor r13d, edi + db $C4, $63, $7B, $F0, $F3, $06 // rorx r14d, ebx, $6 + db $C4, $C2, $4D, $00, $F1 // vpshufb ymm6, ymm6, ymm9 + lea r8d, [r8 + r12*1] + xor r13d, r14d + mov edi, r9d + db $C5, $ED, $FE, $D6 // vpaddd ymm2, ymm2, ymm6 + db $C4, $43, $7B, $F0, $E1, $16 // rorx r12d, r9d, $16 + lea r8d, [r8 + r13*1] + xor edi, r10d + db $C5, $ED, $FE, $75, $40 // vpaddd ymm6, ymm2, yword [rbp + $40] + db $C4, $43, $7B, $F0, $F1, $0D // rorx r14d, r9d, $D + db $C4, $43, $7B, $F0, $E9, $02 // rorx r13d, r9d, $2 + lea eax, [rax + r8*1] + and r15d, edi + xor r14d, r12d + xor r15d, r10d + xor r14d, r13d + lea r8d, [r8 + r15*1] + mov r12d, ebx + db $C5, $FD, $7F, $34, $24 // vmovdqa yword [rsp], ymm6 + db $C4, $E3, $7D, $0F, $E3, $04 // vpalignr ymm4, ymm0, ymm3, $4 + add edx, dword [rsp + $A0] + and r12d, eax + db $C4, $63, $7B, $F0, $E8, $19 // rorx r13d, eax, $19 + db $C4, $E3, $6D, $0F, $F9, $04 // vpalignr ymm7, ymm2, ymm1, $4 + db $C4, $63, $7B, $F0, $F8, $0B // rorx r15d, eax, $B + lea r8d, [r8 + r14*1] + lea edx, [rdx + r12*1] + db $C5, $CD, $72, $D4, $07 // vpsrld ymm6, ymm4, $7 + db $C4, $62, $78, $F2, $E1 // andn r12d, eax, ecx + xor r13d, r15d + db $C4, $63, $7B, $F0, $F0, $06 // rorx r14d, eax, $6 + db $C5, $E5, $FE, $DF // vpaddd ymm3, ymm3, ymm7 + lea edx, [rdx + r12*1] + xor r13d, r14d + mov r15d, r8d + db $C5, $C5, $72, $D4, $03 // vpsrld ymm7, ymm4, $3 + db $C4, $43, $7B, $F0, $E0, $16 // rorx r12d, r8d, $16 + lea edx, [rdx + r13*1] + xor r15d, r9d + db $C5, $D5, $72, $F4, $0E // vpslld ymm5, ymm4, $E + db $C4, $43, $7B, $F0, $F0, $0D // rorx r14d, r8d, $D + db $C4, $43, $7B, $F0, $E8, $02 // rorx r13d, r8d, $2 + lea r11d, [r11 + rdx*1] + db $C5, $C5, $EF, $E6 // vpxor ymm4, ymm7, ymm6 + and edi, r15d + xor r14d, r12d + xor edi, r9d + db $C5, $FD, $70, $FA, $FA // vpshufd ymm7, ymm2, $FA + xor r14d, r13d + lea edx, [rdx + rdi*1] + mov r12d, eax + db $C5, $CD, $72, $D6, $0B // vpsrld ymm6, ymm6, $B + add ecx, dword [rsp + $A4] + and r12d, r11d + db $C4, $43, $7B, $F0, $EB, $19 // rorx r13d, r11d, $19 + db $C5, $DD, $EF, $E5 // vpxor ymm4, ymm4, ymm5 + db $C4, $C3, $7B, $F0, $FB, $0B // rorx edi, r11d, $B + lea edx, [rdx + r14*1] + lea ecx, [rcx + r12*1] + db $C5, $D5, $72, $F5, $0B // vpslld ymm5, ymm5, $B + db $C4, $62, $20, $F2, $E3 // andn r12d, r11d, ebx + xor r13d, edi + db $C4, $43, $7B, $F0, $F3, $06 // rorx r14d, r11d, $6 + db $C5, $DD, $EF, $E6 // vpxor ymm4, ymm4, ymm6 + lea ecx, [rcx + r12*1] + xor r13d, r14d + mov edi, edx + db $C5, $CD, $72, $D7, $0A // vpsrld ymm6, ymm7, $A + db $C4, $63, $7B, $F0, $E2, $16 // rorx r12d, edx, $16 + lea ecx, [rcx + r13*1] + xor edi, r8d + db $C5, $DD, $EF, $E5 // vpxor ymm4, ymm4, ymm5 + db $C4, $63, $7B, $F0, $F2, $0D // rorx r14d, edx, $D + db $C4, $63, $7B, $F0, $EA, $02 // rorx r13d, edx, $2 + lea r10d, [r10 + rcx*1] + db $C5, $C5, $73, $D7, $11 // vpsrlq ymm7, ymm7, $11 + and r15d, edi + xor r14d, r12d + xor r15d, r8d + db $C5, $E5, $FE, $DC // vpaddd ymm3, ymm3, ymm4 + xor r14d, r13d + lea ecx, [rcx + r15*1] + mov r12d, r11d + db $C5, $CD, $EF, $F7 // vpxor ymm6, ymm6, ymm7 + add ebx, dword [rsp + $A8] + and r12d, r10d + db $C4, $43, $7B, $F0, $EA, $19 // rorx r13d, r10d, $19 + db $C5, $C5, $73, $D7, $02 // vpsrlq ymm7, ymm7, $2 + db $C4, $43, $7B, $F0, $FA, $0B // rorx r15d, r10d, $B + lea ecx, [rcx + r14*1] + lea ebx, [rbx + r12*1] + db $C5, $CD, $EF, $F7 // vpxor ymm6, ymm6, ymm7 + db $C4, $62, $28, $F2, $E0 // andn r12d, r10d, eax + xor r13d, r15d + db $C4, $43, $7B, $F0, $F2, $06 // rorx r14d, r10d, $6 + db $C4, $C2, $4D, $00, $F0 // vpshufb ymm6, ymm6, ymm8 + lea ebx, [rbx + r12*1] + xor r13d, r14d + mov r15d, ecx + db $C5, $E5, $FE, $DE // vpaddd ymm3, ymm3, ymm6 + db $C4, $63, $7B, $F0, $E1, $16 // rorx r12d, ecx, $16 + lea ebx, [rbx + r13*1] + xor r15d, edx + db $C5, $FD, $70, $FB, $50 // vpshufd ymm7, ymm3, $50 + db $C4, $63, $7B, $F0, $F1, $0D // rorx r14d, ecx, $D + db $C4, $63, $7B, $F0, $E9, $02 // rorx r13d, ecx, $2 + lea r9d, [r9 + rbx*1] + db $C5, $CD, $72, $D7, $0A // vpsrld ymm6, ymm7, $A + and edi, r15d + xor r14d, r12d + xor edi, edx + db $C5, $C5, $73, $D7, $11 // vpsrlq ymm7, ymm7, $11 + xor r14d, r13d + lea ebx, [rbx + rdi*1] + mov r12d, r10d + db $C5, $CD, $EF, $F7 // vpxor ymm6, ymm6, ymm7 + add eax, dword [rsp + $AC] + and r12d, r9d + db $C4, $43, $7B, $F0, $E9, $19 // rorx r13d, r9d, $19 + db $C5, $C5, $73, $D7, $02 // vpsrlq ymm7, ymm7, $2 + db $C4, $C3, $7B, $F0, $F9, $0B // rorx edi, r9d, $B + lea ebx, [rbx + r14*1] + lea eax, [rax + r12*1] + db $C5, $CD, $EF, $F7 // vpxor ymm6, ymm6, ymm7 + db $C4, $42, $30, $F2, $E3 // andn r12d, r9d, r11d + xor r13d, edi + db $C4, $43, $7B, $F0, $F1, $06 // rorx r14d, r9d, $6 + db $C4, $C2, $4D, $00, $F1 // vpshufb ymm6, ymm6, ymm9 + lea eax, [rax + r12*1] + xor r13d, r14d + mov edi, ebx + db $C5, $E5, $FE, $DE // vpaddd ymm3, ymm3, ymm6 + db $C4, $63, $7B, $F0, $E3, $16 // rorx r12d, ebx, $16 + lea eax, [rax + r13*1] + xor edi, ecx + db $C5, $E5, $FE, $75, $60 // vpaddd ymm6, ymm3, yword [rbp + $60] + db $C4, $63, $7B, $F0, $F3, $0D // rorx r14d, ebx, $D + db $C4, $63, $7B, $F0, $EB, $02 // rorx r13d, ebx, $2 + lea r8d, [r8 + rax*1] + and r15d, edi + xor r14d, r12d + xor r15d, ecx + xor r14d, r13d + lea eax, [rax + r15*1] + mov r12d, r9d + db $C5, $FD, $7F, $74, $24, $20 // vmovdqa yword [rsp + $20], ymm6 + lea rbp, [rbp + $80] + cmp byte [rbp + $3], $0 + jne @sched_loop + add r11d, dword [rsp + $40] + and r12d, r8d + db $C4, $43, $7B, $F0, $E8, $19 // rorx r13d, r8d, $19 + db $C4, $43, $7B, $F0, $F8, $0B // rorx r15d, r8d, $B + lea eax, [rax + r14*1] + lea r11d, [r11 + r12*1] + db $C4, $42, $38, $F2, $E2 // andn r12d, r8d, r10d + xor r13d, r15d + db $C4, $43, $7B, $F0, $F0, $06 // rorx r14d, r8d, $6 + lea r11d, [r11 + r12*1] + xor r13d, r14d + mov r15d, eax + db $C4, $63, $7B, $F0, $E0, $16 // rorx r12d, eax, $16 + lea r11d, [r11 + r13*1] + xor r15d, ebx + db $C4, $63, $7B, $F0, $F0, $0D // rorx r14d, eax, $D + db $C4, $63, $7B, $F0, $E8, $02 // rorx r13d, eax, $2 + lea edx, [rdx + r11*1] + and edi, r15d + xor r14d, r12d + xor edi, ebx + xor r14d, r13d + lea r11d, [r11 + rdi*1] + mov r12d, r8d + add r10d, dword [rsp + $44] + and r12d, edx + db $C4, $63, $7B, $F0, $EA, $19 // rorx r13d, edx, $19 + db $C4, $E3, $7B, $F0, $FA, $0B // rorx edi, edx, $B + lea r11d, [r11 + r14*1] + lea r10d, [r10 + r12*1] + db $C4, $42, $68, $F2, $E1 // andn r12d, edx, r9d + xor r13d, edi + db $C4, $63, $7B, $F0, $F2, $06 // rorx r14d, edx, $6 + lea r10d, [r10 + r12*1] + xor r13d, r14d + mov edi, r11d + db $C4, $43, $7B, $F0, $E3, $16 // rorx r12d, r11d, $16 + lea r10d, [r10 + r13*1] + xor edi, eax + db $C4, $43, $7B, $F0, $F3, $0D // rorx r14d, r11d, $D + db $C4, $43, $7B, $F0, $EB, $02 // rorx r13d, r11d, $2 + lea ecx, [rcx + r10*1] + and r15d, edi + xor r14d, r12d + xor r15d, eax + xor r14d, r13d + lea r10d, [r10 + r15*1] + mov r12d, edx + add r9d, dword [rsp + $48] + and r12d, ecx + db $C4, $63, $7B, $F0, $E9, $19 // rorx r13d, ecx, $19 + db $C4, $63, $7B, $F0, $F9, $0B // rorx r15d, ecx, $B + lea r10d, [r10 + r14*1] + lea r9d, [r9 + r12*1] + db $C4, $42, $70, $F2, $E0 // andn r12d, ecx, r8d + xor r13d, r15d + db $C4, $63, $7B, $F0, $F1, $06 // rorx r14d, ecx, $6 + lea r9d, [r9 + r12*1] + xor r13d, r14d + mov r15d, r10d + db $C4, $43, $7B, $F0, $E2, $16 // rorx r12d, r10d, $16 + lea r9d, [r9 + r13*1] + xor r15d, r11d + db $C4, $43, $7B, $F0, $F2, $0D // rorx r14d, r10d, $D + db $C4, $43, $7B, $F0, $EA, $02 // rorx r13d, r10d, $2 + lea ebx, [rbx + r9*1] + and edi, r15d + xor r14d, r12d + xor edi, r11d + xor r14d, r13d + lea r9d, [r9 + rdi*1] + mov r12d, ecx + add r8d, dword [rsp + $4C] + and r12d, ebx + db $C4, $63, $7B, $F0, $EB, $19 // rorx r13d, ebx, $19 + db $C4, $E3, $7B, $F0, $FB, $0B // rorx edi, ebx, $B + lea r9d, [r9 + r14*1] + lea r8d, [r8 + r12*1] + db $C4, $62, $60, $F2, $E2 // andn r12d, ebx, edx + xor r13d, edi + db $C4, $63, $7B, $F0, $F3, $06 // rorx r14d, ebx, $6 + lea r8d, [r8 + r12*1] + xor r13d, r14d + mov edi, r9d + db $C4, $43, $7B, $F0, $E1, $16 // rorx r12d, r9d, $16 + lea r8d, [r8 + r13*1] + xor edi, r10d + db $C4, $43, $7B, $F0, $F1, $0D // rorx r14d, r9d, $D + db $C4, $43, $7B, $F0, $E9, $02 // rorx r13d, r9d, $2 + lea eax, [rax + r8*1] + and r15d, edi + xor r14d, r12d + xor r15d, r10d + xor r14d, r13d + lea r8d, [r8 + r15*1] + mov r12d, ebx + add edx, dword [rsp + $60] + and r12d, eax + db $C4, $63, $7B, $F0, $E8, $19 // rorx r13d, eax, $19 + db $C4, $63, $7B, $F0, $F8, $0B // rorx r15d, eax, $B + lea r8d, [r8 + r14*1] + lea edx, [rdx + r12*1] + db $C4, $62, $78, $F2, $E1 // andn r12d, eax, ecx + xor r13d, r15d + db $C4, $63, $7B, $F0, $F0, $06 // rorx r14d, eax, $6 + lea edx, [rdx + r12*1] + xor r13d, r14d + mov r15d, r8d + db $C4, $43, $7B, $F0, $E0, $16 // rorx r12d, r8d, $16 + lea edx, [rdx + r13*1] + xor r15d, r9d + db $C4, $43, $7B, $F0, $F0, $0D // rorx r14d, r8d, $D + db $C4, $43, $7B, $F0, $E8, $02 // rorx r13d, r8d, $2 + lea r11d, [r11 + rdx*1] + and edi, r15d + xor r14d, r12d + xor edi, r9d + xor r14d, r13d + lea edx, [rdx + rdi*1] + mov r12d, eax + add ecx, dword [rsp + $64] + and r12d, r11d + db $C4, $43, $7B, $F0, $EB, $19 // rorx r13d, r11d, $19 + db $C4, $C3, $7B, $F0, $FB, $0B // rorx edi, r11d, $B + lea edx, [rdx + r14*1] + lea ecx, [rcx + r12*1] + db $C4, $62, $20, $F2, $E3 // andn r12d, r11d, ebx + xor r13d, edi + db $C4, $43, $7B, $F0, $F3, $06 // rorx r14d, r11d, $6 + lea ecx, [rcx + r12*1] + xor r13d, r14d + mov edi, edx + db $C4, $63, $7B, $F0, $E2, $16 // rorx r12d, edx, $16 + lea ecx, [rcx + r13*1] + xor edi, r8d + db $C4, $63, $7B, $F0, $F2, $0D // rorx r14d, edx, $D + db $C4, $63, $7B, $F0, $EA, $02 // rorx r13d, edx, $2 + lea r10d, [r10 + rcx*1] + and r15d, edi + xor r14d, r12d + xor r15d, r8d + xor r14d, r13d + lea ecx, [rcx + r15*1] + mov r12d, r11d + add ebx, dword [rsp + $68] + and r12d, r10d + db $C4, $43, $7B, $F0, $EA, $19 // rorx r13d, r10d, $19 + db $C4, $43, $7B, $F0, $FA, $0B // rorx r15d, r10d, $B + lea ecx, [rcx + r14*1] + lea ebx, [rbx + r12*1] + db $C4, $62, $28, $F2, $E0 // andn r12d, r10d, eax + xor r13d, r15d + db $C4, $43, $7B, $F0, $F2, $06 // rorx r14d, r10d, $6 + lea ebx, [rbx + r12*1] + xor r13d, r14d + mov r15d, ecx + db $C4, $63, $7B, $F0, $E1, $16 // rorx r12d, ecx, $16 + lea ebx, [rbx + r13*1] + xor r15d, edx + db $C4, $63, $7B, $F0, $F1, $0D // rorx r14d, ecx, $D + db $C4, $63, $7B, $F0, $E9, $02 // rorx r13d, ecx, $2 + lea r9d, [r9 + rbx*1] + and edi, r15d + xor r14d, r12d + xor edi, edx + xor r14d, r13d + lea ebx, [rbx + rdi*1] + mov r12d, r10d + add eax, dword [rsp + $6C] + and r12d, r9d + db $C4, $43, $7B, $F0, $E9, $19 // rorx r13d, r9d, $19 + db $C4, $C3, $7B, $F0, $F9, $0B // rorx edi, r9d, $B + lea ebx, [rbx + r14*1] + lea eax, [rax + r12*1] + db $C4, $42, $30, $F2, $E3 // andn r12d, r9d, r11d + xor r13d, edi + db $C4, $43, $7B, $F0, $F1, $06 // rorx r14d, r9d, $6 + lea eax, [rax + r12*1] + xor r13d, r14d + mov edi, ebx + db $C4, $63, $7B, $F0, $E3, $16 // rorx r12d, ebx, $16 + lea eax, [rax + r13*1] + xor edi, ecx + db $C4, $63, $7B, $F0, $F3, $0D // rorx r14d, ebx, $D + db $C4, $63, $7B, $F0, $EB, $02 // rorx r13d, ebx, $2 + lea r8d, [r8 + rax*1] + and r15d, edi + xor r14d, r12d + xor r15d, ecx + xor r14d, r13d + lea eax, [rax + r15*1] + mov r12d, r9d + add r11d, dword [rsp] + and r12d, r8d + db $C4, $43, $7B, $F0, $E8, $19 // rorx r13d, r8d, $19 + db $C4, $43, $7B, $F0, $F8, $0B // rorx r15d, r8d, $B + lea eax, [rax + r14*1] + lea r11d, [r11 + r12*1] + db $C4, $42, $38, $F2, $E2 // andn r12d, r8d, r10d + xor r13d, r15d + db $C4, $43, $7B, $F0, $F0, $06 // rorx r14d, r8d, $6 + lea r11d, [r11 + r12*1] + xor r13d, r14d + mov r15d, eax + db $C4, $63, $7B, $F0, $E0, $16 // rorx r12d, eax, $16 + lea r11d, [r11 + r13*1] + xor r15d, ebx + db $C4, $63, $7B, $F0, $F0, $0D // rorx r14d, eax, $D + db $C4, $63, $7B, $F0, $E8, $02 // rorx r13d, eax, $2 + lea edx, [rdx + r11*1] + and edi, r15d + xor r14d, r12d + xor edi, ebx + xor r14d, r13d + lea r11d, [r11 + rdi*1] + mov r12d, r8d + add r10d, dword [rsp + $4] + and r12d, edx + db $C4, $63, $7B, $F0, $EA, $19 // rorx r13d, edx, $19 + db $C4, $E3, $7B, $F0, $FA, $0B // rorx edi, edx, $B + lea r11d, [r11 + r14*1] + lea r10d, [r10 + r12*1] + db $C4, $42, $68, $F2, $E1 // andn r12d, edx, r9d + xor r13d, edi + db $C4, $63, $7B, $F0, $F2, $06 // rorx r14d, edx, $6 + lea r10d, [r10 + r12*1] + xor r13d, r14d + mov edi, r11d + db $C4, $43, $7B, $F0, $E3, $16 // rorx r12d, r11d, $16 + lea r10d, [r10 + r13*1] + xor edi, eax + db $C4, $43, $7B, $F0, $F3, $0D // rorx r14d, r11d, $D + db $C4, $43, $7B, $F0, $EB, $02 // rorx r13d, r11d, $2 + lea ecx, [rcx + r10*1] + and r15d, edi + xor r14d, r12d + xor r15d, eax + xor r14d, r13d + lea r10d, [r10 + r15*1] + mov r12d, edx + add r9d, dword [rsp + $8] + and r12d, ecx + db $C4, $63, $7B, $F0, $E9, $19 // rorx r13d, ecx, $19 + db $C4, $63, $7B, $F0, $F9, $0B // rorx r15d, ecx, $B + lea r10d, [r10 + r14*1] + lea r9d, [r9 + r12*1] + db $C4, $42, $70, $F2, $E0 // andn r12d, ecx, r8d + xor r13d, r15d + db $C4, $63, $7B, $F0, $F1, $06 // rorx r14d, ecx, $6 + lea r9d, [r9 + r12*1] + xor r13d, r14d + mov r15d, r10d + db $C4, $43, $7B, $F0, $E2, $16 // rorx r12d, r10d, $16 + lea r9d, [r9 + r13*1] + xor r15d, r11d + db $C4, $43, $7B, $F0, $F2, $0D // rorx r14d, r10d, $D + db $C4, $43, $7B, $F0, $EA, $02 // rorx r13d, r10d, $2 + lea ebx, [rbx + r9*1] + and edi, r15d + xor r14d, r12d + xor edi, r11d + xor r14d, r13d + lea r9d, [r9 + rdi*1] + mov r12d, ecx + add r8d, dword [rsp + $C] + and r12d, ebx + db $C4, $63, $7B, $F0, $EB, $19 // rorx r13d, ebx, $19 + db $C4, $E3, $7B, $F0, $FB, $0B // rorx edi, ebx, $B + lea r9d, [r9 + r14*1] + lea r8d, [r8 + r12*1] + db $C4, $62, $60, $F2, $E2 // andn r12d, ebx, edx + xor r13d, edi + db $C4, $63, $7B, $F0, $F3, $06 // rorx r14d, ebx, $6 + lea r8d, [r8 + r12*1] + xor r13d, r14d + mov edi, r9d + db $C4, $43, $7B, $F0, $E1, $16 // rorx r12d, r9d, $16 + lea r8d, [r8 + r13*1] + xor edi, r10d + db $C4, $43, $7B, $F0, $F1, $0D // rorx r14d, r9d, $D + db $C4, $43, $7B, $F0, $E9, $02 // rorx r13d, r9d, $2 + lea eax, [rax + r8*1] + and r15d, edi + xor r14d, r12d + xor r15d, r10d + xor r14d, r13d + lea r8d, [r8 + r15*1] + mov r12d, ebx + add edx, dword [rsp + $20] + and r12d, eax + db $C4, $63, $7B, $F0, $E8, $19 // rorx r13d, eax, $19 + db $C4, $63, $7B, $F0, $F8, $0B // rorx r15d, eax, $B + lea r8d, [r8 + r14*1] + lea edx, [rdx + r12*1] + db $C4, $62, $78, $F2, $E1 // andn r12d, eax, ecx + xor r13d, r15d + db $C4, $63, $7B, $F0, $F0, $06 // rorx r14d, eax, $6 + lea edx, [rdx + r12*1] + xor r13d, r14d + mov r15d, r8d + db $C4, $43, $7B, $F0, $E0, $16 // rorx r12d, r8d, $16 + lea edx, [rdx + r13*1] + xor r15d, r9d + db $C4, $43, $7B, $F0, $F0, $0D // rorx r14d, r8d, $D + db $C4, $43, $7B, $F0, $E8, $02 // rorx r13d, r8d, $2 + lea r11d, [r11 + rdx*1] + and edi, r15d + xor r14d, r12d + xor edi, r9d + xor r14d, r13d + lea edx, [rdx + rdi*1] + mov r12d, eax + add ecx, dword [rsp + $24] + and r12d, r11d + db $C4, $43, $7B, $F0, $EB, $19 // rorx r13d, r11d, $19 + db $C4, $C3, $7B, $F0, $FB, $0B // rorx edi, r11d, $B + lea edx, [rdx + r14*1] + lea ecx, [rcx + r12*1] + db $C4, $62, $20, $F2, $E3 // andn r12d, r11d, ebx + xor r13d, edi + db $C4, $43, $7B, $F0, $F3, $06 // rorx r14d, r11d, $6 + lea ecx, [rcx + r12*1] + xor r13d, r14d + mov edi, edx + db $C4, $63, $7B, $F0, $E2, $16 // rorx r12d, edx, $16 + lea ecx, [rcx + r13*1] + xor edi, r8d + db $C4, $63, $7B, $F0, $F2, $0D // rorx r14d, edx, $D + db $C4, $63, $7B, $F0, $EA, $02 // rorx r13d, edx, $2 + lea r10d, [r10 + rcx*1] + and r15d, edi + xor r14d, r12d + xor r15d, r8d + xor r14d, r13d + lea ecx, [rcx + r15*1] + mov r12d, r11d + add ebx, dword [rsp + $28] + and r12d, r10d + db $C4, $43, $7B, $F0, $EA, $19 // rorx r13d, r10d, $19 + db $C4, $43, $7B, $F0, $FA, $0B // rorx r15d, r10d, $B + lea ecx, [rcx + r14*1] + lea ebx, [rbx + r12*1] + db $C4, $62, $28, $F2, $E0 // andn r12d, r10d, eax + xor r13d, r15d + db $C4, $43, $7B, $F0, $F2, $06 // rorx r14d, r10d, $6 + lea ebx, [rbx + r12*1] + xor r13d, r14d + mov r15d, ecx + db $C4, $63, $7B, $F0, $E1, $16 // rorx r12d, ecx, $16 + lea ebx, [rbx + r13*1] + xor r15d, edx + db $C4, $63, $7B, $F0, $F1, $0D // rorx r14d, ecx, $D + db $C4, $63, $7B, $F0, $E9, $02 // rorx r13d, ecx, $2 + lea r9d, [r9 + rbx*1] + and edi, r15d + xor r14d, r12d + xor edi, edx + xor r14d, r13d + lea ebx, [rbx + rdi*1] + mov r12d, r10d + add eax, dword [rsp + $2C] + and r12d, r9d + db $C4, $43, $7B, $F0, $E9, $19 // rorx r13d, r9d, $19 + db $C4, $C3, $7B, $F0, $F9, $0B // rorx edi, r9d, $B + lea ebx, [rbx + r14*1] + lea eax, [rax + r12*1] + db $C4, $42, $30, $F2, $E3 // andn r12d, r9d, r11d + xor r13d, edi + db $C4, $43, $7B, $F0, $F1, $06 // rorx r14d, r9d, $6 + lea eax, [rax + r12*1] + xor r13d, r14d + mov edi, ebx + db $C4, $63, $7B, $F0, $E3, $16 // rorx r12d, ebx, $16 + lea eax, [rax + r13*1] + xor edi, ecx + db $C4, $63, $7B, $F0, $F3, $0D // rorx r14d, ebx, $D + db $C4, $63, $7B, $F0, $EB, $02 // rorx r13d, ebx, $2 + lea r8d, [r8 + rax*1] + and r15d, edi + xor r14d, r12d + xor r15d, ecx + xor r14d, r13d + lea eax, [rax + r15*1] + mov r12d, r9d + mov rdi, qword [rsp + $200] + add eax, r14d + lea rbp, [rsp + $1C0] + add eax, dword [rdi] + add ebx, dword [rdi + $4] + add ecx, dword [rdi + $8] + add edx, dword [rdi + $C] + add r8d, dword [rdi + $10] + add r9d, dword [rdi + $14] + add r10d, dword [rdi + $18] + add r11d, dword [rdi + $1C] + mov dword [rdi], eax + mov dword [rdi + $4], ebx + mov dword [rdi + $8], ecx + mov dword [rdi + $C], edx + mov dword [rdi + $10], r8d + mov dword [rdi + $14], r9d + mov dword [rdi + $18], r10d + mov dword [rdi + $1C], r11d + cmp rsi, qword [rbp + $50] + je @done + xor r14d, r14d + mov edi, ebx + xor edi, ecx + mov r12d, r9d + jmp @tail_loop - mov rbx, [rsp + $00] - mov rbp, [rsp + $08] - mov r12, [rsp + $20] - mov r13, [rsp + $28] - mov r14, [rsp + $30] - mov r15, [rsp + $38] - mov rdi, [rsp + $10] - mov rsi, [rsp + $18] - add rsp, 344 +@tail_loop: + add r11d, dword [rbp + $10] + and r12d, r8d + db $C4, $43, $7B, $F0, $E8, $19 // rorx r13d, r8d, $19 + db $C4, $43, $7B, $F0, $F8, $0B // rorx r15d, r8d, $B + lea eax, [rax + r14*1] + lea r11d, [r11 + r12*1] + db $C4, $42, $38, $F2, $E2 // andn r12d, r8d, r10d + xor r13d, r15d + db $C4, $43, $7B, $F0, $F0, $06 // rorx r14d, r8d, $6 + lea r11d, [r11 + r12*1] + xor r13d, r14d + mov r15d, eax + db $C4, $63, $7B, $F0, $E0, $16 // rorx r12d, eax, $16 + lea r11d, [r11 + r13*1] + xor r15d, ebx + db $C4, $63, $7B, $F0, $F0, $0D // rorx r14d, eax, $D + db $C4, $63, $7B, $F0, $E8, $02 // rorx r13d, eax, $2 + lea edx, [rdx + r11*1] + and edi, r15d + xor r14d, r12d + xor edi, ebx + xor r14d, r13d + lea r11d, [r11 + rdi*1] + mov r12d, r8d + add r10d, dword [rbp + $14] + and r12d, edx + db $C4, $63, $7B, $F0, $EA, $19 // rorx r13d, edx, $19 + db $C4, $E3, $7B, $F0, $FA, $0B // rorx edi, edx, $B + lea r11d, [r11 + r14*1] + lea r10d, [r10 + r12*1] + db $C4, $42, $68, $F2, $E1 // andn r12d, edx, r9d + xor r13d, edi + db $C4, $63, $7B, $F0, $F2, $06 // rorx r14d, edx, $6 + lea r10d, [r10 + r12*1] + xor r13d, r14d + mov edi, r11d + db $C4, $43, $7B, $F0, $E3, $16 // rorx r12d, r11d, $16 + lea r10d, [r10 + r13*1] + xor edi, eax + db $C4, $43, $7B, $F0, $F3, $0D // rorx r14d, r11d, $D + db $C4, $43, $7B, $F0, $EB, $02 // rorx r13d, r11d, $2 + lea ecx, [rcx + r10*1] + and r15d, edi + xor r14d, r12d + xor r15d, eax + xor r14d, r13d + lea r10d, [r10 + r15*1] + mov r12d, edx + add r9d, dword [rbp + $18] + and r12d, ecx + db $C4, $63, $7B, $F0, $E9, $19 // rorx r13d, ecx, $19 + db $C4, $63, $7B, $F0, $F9, $0B // rorx r15d, ecx, $B + lea r10d, [r10 + r14*1] + lea r9d, [r9 + r12*1] + db $C4, $42, $70, $F2, $E0 // andn r12d, ecx, r8d + xor r13d, r15d + db $C4, $63, $7B, $F0, $F1, $06 // rorx r14d, ecx, $6 + lea r9d, [r9 + r12*1] + xor r13d, r14d + mov r15d, r10d + db $C4, $43, $7B, $F0, $E2, $16 // rorx r12d, r10d, $16 + lea r9d, [r9 + r13*1] + xor r15d, r11d + db $C4, $43, $7B, $F0, $F2, $0D // rorx r14d, r10d, $D + db $C4, $43, $7B, $F0, $EA, $02 // rorx r13d, r10d, $2 + lea ebx, [rbx + r9*1] + and edi, r15d + xor r14d, r12d + xor edi, r11d + xor r14d, r13d + lea r9d, [r9 + rdi*1] + mov r12d, ecx + add r8d, dword [rbp + $1C] + and r12d, ebx + db $C4, $63, $7B, $F0, $EB, $19 // rorx r13d, ebx, $19 + db $C4, $E3, $7B, $F0, $FB, $0B // rorx edi, ebx, $B + lea r9d, [r9 + r14*1] + lea r8d, [r8 + r12*1] + db $C4, $62, $60, $F2, $E2 // andn r12d, ebx, edx + xor r13d, edi + db $C4, $63, $7B, $F0, $F3, $06 // rorx r14d, ebx, $6 + lea r8d, [r8 + r12*1] + xor r13d, r14d + mov edi, r9d + db $C4, $43, $7B, $F0, $E1, $16 // rorx r12d, r9d, $16 + lea r8d, [r8 + r13*1] + xor edi, r10d + db $C4, $43, $7B, $F0, $F1, $0D // rorx r14d, r9d, $D + db $C4, $43, $7B, $F0, $E9, $02 // rorx r13d, r9d, $2 + lea eax, [rax + r8*1] + and r15d, edi + xor r14d, r12d + xor r15d, r10d + xor r14d, r13d + lea r8d, [r8 + r15*1] + mov r12d, ebx + add edx, dword [rbp + $30] + and r12d, eax + db $C4, $63, $7B, $F0, $E8, $19 // rorx r13d, eax, $19 + db $C4, $63, $7B, $F0, $F8, $0B // rorx r15d, eax, $B + lea r8d, [r8 + r14*1] + lea edx, [rdx + r12*1] + db $C4, $62, $78, $F2, $E1 // andn r12d, eax, ecx + xor r13d, r15d + db $C4, $63, $7B, $F0, $F0, $06 // rorx r14d, eax, $6 + lea edx, [rdx + r12*1] + xor r13d, r14d + mov r15d, r8d + db $C4, $43, $7B, $F0, $E0, $16 // rorx r12d, r8d, $16 + lea edx, [rdx + r13*1] + xor r15d, r9d + db $C4, $43, $7B, $F0, $F0, $0D // rorx r14d, r8d, $D + db $C4, $43, $7B, $F0, $E8, $02 // rorx r13d, r8d, $2 + lea r11d, [r11 + rdx*1] + and edi, r15d + xor r14d, r12d + xor edi, r9d + xor r14d, r13d + lea edx, [rdx + rdi*1] + mov r12d, eax + add ecx, dword [rbp + $34] + and r12d, r11d + db $C4, $43, $7B, $F0, $EB, $19 // rorx r13d, r11d, $19 + db $C4, $C3, $7B, $F0, $FB, $0B // rorx edi, r11d, $B + lea edx, [rdx + r14*1] + lea ecx, [rcx + r12*1] + db $C4, $62, $20, $F2, $E3 // andn r12d, r11d, ebx + xor r13d, edi + db $C4, $43, $7B, $F0, $F3, $06 // rorx r14d, r11d, $6 + lea ecx, [rcx + r12*1] + xor r13d, r14d + mov edi, edx + db $C4, $63, $7B, $F0, $E2, $16 // rorx r12d, edx, $16 + lea ecx, [rcx + r13*1] + xor edi, r8d + db $C4, $63, $7B, $F0, $F2, $0D // rorx r14d, edx, $D + db $C4, $63, $7B, $F0, $EA, $02 // rorx r13d, edx, $2 + lea r10d, [r10 + rcx*1] + and r15d, edi + xor r14d, r12d + xor r15d, r8d + xor r14d, r13d + lea ecx, [rcx + r15*1] + mov r12d, r11d + add ebx, dword [rbp + $38] + and r12d, r10d + db $C4, $43, $7B, $F0, $EA, $19 // rorx r13d, r10d, $19 + db $C4, $43, $7B, $F0, $FA, $0B // rorx r15d, r10d, $B + lea ecx, [rcx + r14*1] + lea ebx, [rbx + r12*1] + db $C4, $62, $28, $F2, $E0 // andn r12d, r10d, eax + xor r13d, r15d + db $C4, $43, $7B, $F0, $F2, $06 // rorx r14d, r10d, $6 + lea ebx, [rbx + r12*1] + xor r13d, r14d + mov r15d, ecx + db $C4, $63, $7B, $F0, $E1, $16 // rorx r12d, ecx, $16 + lea ebx, [rbx + r13*1] + xor r15d, edx + db $C4, $63, $7B, $F0, $F1, $0D // rorx r14d, ecx, $D + db $C4, $63, $7B, $F0, $E9, $02 // rorx r13d, ecx, $2 + lea r9d, [r9 + rbx*1] + and edi, r15d + xor r14d, r12d + xor edi, edx + xor r14d, r13d + lea ebx, [rbx + rdi*1] + mov r12d, r10d + add eax, dword [rbp + $3C] + and r12d, r9d + db $C4, $43, $7B, $F0, $E9, $19 // rorx r13d, r9d, $19 + db $C4, $C3, $7B, $F0, $F9, $0B // rorx edi, r9d, $B + lea ebx, [rbx + r14*1] + lea eax, [rax + r12*1] + db $C4, $42, $30, $F2, $E3 // andn r12d, r9d, r11d + xor r13d, edi + db $C4, $43, $7B, $F0, $F1, $06 // rorx r14d, r9d, $6 + lea eax, [rax + r12*1] + xor r13d, r14d + mov edi, ebx + db $C4, $63, $7B, $F0, $E3, $16 // rorx r12d, ebx, $16 + lea eax, [rax + r13*1] + xor edi, ecx + db $C4, $63, $7B, $F0, $F3, $0D // rorx r14d, ebx, $D + db $C4, $63, $7B, $F0, $EB, $02 // rorx r13d, ebx, $2 + lea r8d, [r8 + rax*1] + and r15d, edi + xor r14d, r12d + xor r15d, ecx + xor r14d, r13d + lea eax, [rax + r15*1] + mov r12d, r9d + lea rbp, [rbp - $40] + cmp rbp, rsp + jae @tail_loop + mov rdi, qword [rsp + $200] + add eax, r14d + lea rsp, [rsp + $1C0] + add eax, dword [rdi] + add ebx, dword [rdi + $4] + add ecx, dword [rdi + $8] + add edx, dword [rdi + $C] + add r8d, dword [rdi + $10] + add r9d, dword [rdi + $14] + lea rsi, [rsi + $80] + add r10d, dword [rdi + $18] + mov r12, rsi + add r11d, dword [rdi + $1C] + cmp rsi, qword [rsp + $50] + mov dword [rdi], eax + cmove r12, rsp + mov dword [rdi + $4], ebx + mov dword [rdi + $8], ecx + mov dword [rdi + $C], edx + mov dword [rdi + $10], r8d + mov dword [rdi + $14], r9d + mov dword [rdi + $18], r10d + mov dword [rdi + $1C], r11d + jbe @block_loop + lea rbp, [rsp] - db $C5, $F8, $77 // vzeroupper +@done: + mov rsi, qword [rbp + $58] + db $C5, $F8, $77 // vzeroupper + mov r15, qword [rsi - $48] + mov r14, qword [rsi - $40] + mov r13, qword [rsi - $38] + mov r12, qword [rsi - $30] + mov rdi, qword [rsi - $28] + mov rbp, qword [rsi - $18] + mov rbx, qword [rsi - $10] + mov rax, qword [rsi - $20] + lea rsp, [rsi] + mov rsi, rax {$I ..\Include\Simd\Common\SimdNonVolatileRestore_x86_64.inc} diff --git a/HashLib/src/Include/Simd/SHA256/SHA256CompressSse2_i386.inc b/HashLib/src/Include/Simd/SHA256/SHA256CompressSse2_i386.inc index 3f67c22f..2dc895d7 100644 --- a/HashLib/src/Include/Simd/SHA256/SHA256CompressSse2_i386.inc +++ b/HashLib/src/Include/Simd/SHA256/SHA256CompressSse2_i386.inc @@ -1,513 +1,1276 @@ -// SHA-256 SSE2 implementation with SIMD message schedule. -// Based on SSSE3 implementation (see SHA256CompressSsse3_x86_64.inc). -// Same algorithm as SSSE3 version but replaces SSSE3-specific instructions: -// pshufb -> SSE2 byte-swap (pshuflw/pshufhw + psrlw/psllw/por) -// palignr -> SSE2 emulation (movdqa/psrldq/pslldq/por) -// IA-32: after SimdProc4Begin_i386 — ebx = state, esi = data, edi = numblocks, eax = K256 ptr -// (parallel to MS x64 ABI: rcx, rdx, r8d, r9). -// K256: 64 UInt32 round constants (256 bytes). SSE2 byte-swaps without a mask, so -// no BSWAP mask ptr is needed (4-param path). -// Uses xmm0–xmm7; xmm6–xmm7 saved/restored defensively (volatile on i386). -// -// Two-phase per block: -// Phase 1 (SIMD): Compute W+K[0..63] using SSE2 message schedule, store to stack -// Phase 2 (GPR): Run 64 compression rounds reading W+K from stack -// -// Stack layout (sub esp, 376): same roles as x64; W+K via movdqu (ESP may be off 16-byte alignment). -// Scratch dwords at [esp+$4C]..[esp+$54] in the round loop only. Sigma1 uses register rotates only. +// SHA-256 SSE2 SIMD-schedule implementation (IA-32), derived from OpenSSL's +// sha256-586 (CRYPTOGAMS) SSSE3 kernel. The message schedule runs in SSE2 +// (paddd/psrld/pslld/pxor/pshufd/psrldq/pslldq) interleaved with the GPR +// compression rounds; the 32-bit state lives in eax/ebx/ecx plus the local frame +// (IA-32 has too few GPRs to keep all eight in registers). OpenSSL's two SSSE3-only +// ops are emulated in SSE2: the pshufb dword byte-swap becomes psrlw/psllw/por + +// pshuflw/pshufhw, and palignr becomes psrldq/pslldq/por. +// Expects (after SimdProc4Begin_i386): ebx = state, esi = data, edi = numblocks, +// eax = doubled-K256 ptr (read at a 32-byte stride so the duplicated halves are +// skipped; see K256_Doubled). SimdProc4Begin pushes ebx/esi/edi; ebp is pushed +// here as the K256 walk pointer; state loads into eax/ebx/ecx and the frame. - sub esp, 376 + push ebp + mov ebp, eax + mov eax, edi + mov edi, esi + mov esi, ebx + mov ebx, esp + sub esp, $10 + and esp, $FFFFFFC0 + shl eax, $6 + add eax, edi + mov dword [esp], esi + mov dword [esp + $4], edi + mov dword [esp + $8], eax + mov dword [esp + $C], ebx + lea esp, [esp - $60] + mov eax, dword [esi] + mov ebx, dword [esi + $4] + mov ecx, dword [esi + $8] + mov edi, dword [esi + $C] + mov dword [esp + $4], ebx + xor ebx, ecx + mov dword [esp + $8], ecx + mov dword [esp + $C], edi + mov edx, dword [esi + $10] + mov edi, dword [esi + $14] + mov ecx, dword [esi + $18] + mov esi, dword [esi + $1C] + mov dword [esp + $14], edi + mov edi, dword [esp + $64] + mov dword [esp + $18], ecx + mov dword [esp + $1C], esi + jmp @block_loop - movdqu oword ptr [esp], xmm6 - movdqu oword ptr [esp + $10], xmm7 - mov [esp + $20], ebx - mov [esp + $24], esi - mov [esp + $28], edi - mov [esp + $2C], eax - mov [esp + $30], ebp - - test edi, edi - jz @sse2_256_done - -@sse2_256_block_loop: - - // ========== Phase 1: Message Schedule ========== - - mov ebx, [esp + $2C] - mov esi, [esp + $24] - lea ebp, [esp + $70] - - // SSE2 32-bit byte-swap for W[0..15] - movdqu xmm0, oword ptr [esi] - pshuflw xmm0, xmm0, $B1 - pshufhw xmm0, xmm0, $B1 +@block_loop: + movdqu xmm0, oword [edi] + movdqu xmm1, oword [edi + $10] + movdqu xmm2, oword [edi + $20] + movdqu xmm3, oword [edi + $30] + add edi, $40 movdqa xmm4, xmm0 - psrlw xmm0, 8 - psllw xmm4, 8 + psrlw xmm4, $8 + psllw xmm0, $8 por xmm0, xmm4 - - movdqu xmm1, oword ptr [esi + $10] - pshuflw xmm1, xmm1, $B1 - pshufhw xmm1, xmm1, $B1 + pshuflw xmm0, xmm0, $B1 + pshufhw xmm0, xmm0, $B1 + mov dword [esp + $64], edi movdqa xmm4, xmm1 - psrlw xmm1, 8 - psllw xmm4, 8 + psrlw xmm4, $8 + psllw xmm1, $8 por xmm1, xmm4 - - movdqu xmm2, oword ptr [esi + $20] + pshuflw xmm1, xmm1, $B1 + pshufhw xmm1, xmm1, $B1 + movdqu xmm4, oword [ebp + $0] + movdqa xmm5, xmm2 + psrlw xmm5, $8 + psllw xmm2, $8 + por xmm2, xmm5 pshuflw xmm2, xmm2, $B1 pshufhw xmm2, xmm2, $B1 - movdqa xmm4, xmm2 - psrlw xmm2, 8 - psllw xmm4, 8 - por xmm2, xmm4 - - movdqu xmm3, oword ptr [esi + $30] + movdqu xmm5, oword [ebp + $20] + paddd xmm4, xmm0 + movdqa xmm6, xmm3 + psrlw xmm6, $8 + psllw xmm3, $8 + por xmm3, xmm6 pshuflw xmm3, xmm3, $B1 pshufhw xmm3, xmm3, $B1 - movdqa xmm4, xmm3 - psrlw xmm3, 8 - psllw xmm4, 8 - por xmm3, xmm4 - - movdqa xmm4, xmm0 - movdqu xmm5, oword ptr [ebx] - paddd xmm4, xmm5 - movdqu oword ptr [ebp], xmm4 + movdqu xmm6, oword [ebp + $40] + paddd xmm5, xmm1 + movdqu xmm7, oword [ebp + $60] + movdqa oword [esp + $20], xmm4 + paddd xmm6, xmm2 + movdqa oword [esp + $30], xmm5 + paddd xmm7, xmm3 + movdqa oword [esp + $40], xmm6 + movdqa oword [esp + $50], xmm7 + jmp @sched_loop +@sched_loop: + add ebp, $80 + mov ecx, edx movdqa xmm4, xmm1 - movdqu xmm5, oword ptr [ebx + $10] - paddd xmm4, xmm5 - movdqu oword ptr [ebp + $10], xmm4 - - movdqa xmm4, xmm2 - movdqu xmm5, oword ptr [ebx + $20] - paddd xmm4, xmm5 - movdqu oword ptr [ebp + $20], xmm4 - - movdqa xmm4, xmm3 - movdqu xmm5, oword ptr [ebx + $30] - paddd xmm4, xmm5 - movdqu oword ptr [ebp + $30], xmm4 - - add ebx, $40 - add ebp, $40 - mov ecx, 12 - -@sse2_256_expand_loop: - - // sigma0(W[t-15..t-12]) - replaces palignr xmm4, xmm0, 4 - movdqa xmm4, xmm0 - psrldq xmm4, 4 - movdqa xmm7, xmm1 - pslldq xmm7, 12 - por xmm4, xmm7 - + ror edx, $E + mov esi, dword [esp + $14] + movdqa xmm7, xmm3 + xor edx, ecx + mov edi, dword [esp + $18] + movdqa xmm5, xmm0 + psrldq xmm5, $4 + pslldq xmm4, $C + por xmm4, xmm5 + xor esi, edi + ror edx, $5 + and esi, ecx + movdqa xmm5, xmm2 + psrldq xmm5, $4 + pslldq xmm7, $C + por xmm7, xmm5 + mov dword [esp + $10], ecx + xor edx, ecx + xor edi, esi movdqa xmm5, xmm4 + ror edx, $6 + mov ecx, eax movdqa xmm6, xmm4 - psrld xmm4, 3 - psrld xmm5, 7 - pslld xmm6, 14 - pxor xmm4, xmm5 - psrld xmm5, 11 + add edx, edi + mov edi, dword [esp + $4] + psrld xmm4, $3 + mov esi, eax + ror ecx, $9 + paddd xmm0, xmm7 + mov dword [esp], eax + xor ecx, eax + psrld xmm6, $7 + xor eax, edi + add edx, dword [esp + $1C] + ror ecx, $B + and ebx, eax + pshufd xmm7, xmm3, $FA + xor ecx, esi + add edx, dword [esp + $20] + pslld xmm5, $E + xor ebx, edi + ror ecx, $2 pxor xmm4, xmm6 - pslld xmm6, 11 + add ebx, edx + add edx, dword [esp + $C] + psrld xmm6, $B + add ebx, ecx + mov ecx, edx + ror edx, $E pxor xmm4, xmm5 + mov esi, dword [esp + $10] + xor edx, ecx + pslld xmm5, $B + mov edi, dword [esp + $14] + xor esi, edi + ror edx, $5 pxor xmm4, xmm6 - + and esi, ecx + mov dword [esp + $C], ecx + movdqa xmm6, xmm7 + xor edx, ecx + xor edi, esi + ror edx, $6 + pxor xmm4, xmm5 + mov ecx, ebx + add edx, edi + psrld xmm7, $A + mov edi, dword [esp] + mov esi, ebx + ror ecx, $9 paddd xmm0, xmm4 - - // W[t-7..t-4] - replaces palignr xmm4, xmm2, 4 + mov dword [esp + $1C], ebx + xor ecx, ebx + psrlq xmm6, $11 + xor ebx, edi + add edx, dword [esp + $18] + ror ecx, $B + pxor xmm7, xmm6 + and eax, ebx + xor ecx, esi + psrlq xmm6, $2 + add edx, dword [esp + $24] + xor eax, edi + ror ecx, $2 + pxor xmm7, xmm6 + add eax, edx + add edx, dword [esp + $8] + pshufd xmm7, xmm7, $80 + add eax, ecx + mov ecx, edx + ror edx, $E + mov esi, dword [esp + $C] + xor edx, ecx + mov edi, dword [esp + $10] + xor esi, edi + ror edx, $5 + and esi, ecx + psrldq xmm7, $8 + mov dword [esp + $8], ecx + xor edx, ecx + xor edi, esi + paddd xmm0, xmm7 + ror edx, $6 + mov ecx, eax + add edx, edi + mov edi, dword [esp + $1C] + mov esi, eax + ror ecx, $9 + mov dword [esp + $18], eax + pshufd xmm7, xmm0, $50 + xor ecx, eax + xor eax, edi + add edx, dword [esp + $14] + movdqa xmm6, xmm7 + ror ecx, $B + psrld xmm7, $A + and ebx, eax + psrlq xmm6, $11 + xor ecx, esi + add edx, dword [esp + $28] + xor ebx, edi + ror ecx, $2 + pxor xmm7, xmm6 + add ebx, edx + add edx, dword [esp + $4] + psrlq xmm6, $2 + add ebx, ecx + mov ecx, edx + ror edx, $E + pxor xmm7, xmm6 + mov esi, dword [esp + $8] + xor edx, ecx + mov edi, dword [esp + $C] + pshufd xmm7, xmm7, $8 + xor esi, edi + ror edx, $5 + movdqu xmm6, oword [ebp + $0] + and esi, ecx + mov dword [esp + $4], ecx + pslldq xmm7, $8 + xor edx, ecx + xor edi, esi + ror edx, $6 + mov ecx, ebx + add edx, edi + mov edi, dword [esp + $18] + mov esi, ebx + ror ecx, $9 + paddd xmm0, xmm7 + mov dword [esp + $14], ebx + xor ecx, ebx + xor ebx, edi + add edx, dword [esp + $10] + paddd xmm6, xmm0 + ror ecx, $B + and eax, ebx + xor ecx, esi + add edx, dword [esp + $2C] + xor eax, edi + ror ecx, $2 + add eax, edx + add edx, dword [esp] + add eax, ecx + movdqa oword [esp + $20], xmm6 + mov ecx, edx movdqa xmm4, xmm2 - psrldq xmm4, 4 - movdqa xmm7, xmm3 - pslldq xmm7, 12 - por xmm4, xmm7 - paddd xmm0, xmm4 - - // sigma1 phase 1: W[t-2..t-1] - movdqa xmm4, xmm3 - psrldq xmm4, 8 + ror edx, $E + mov esi, dword [esp + $4] + movdqa xmm7, xmm0 + xor edx, ecx + mov edi, dword [esp + $8] + movdqa xmm5, xmm1 + psrldq xmm5, $4 + pslldq xmm4, $C + por xmm4, xmm5 + xor esi, edi + ror edx, $5 + and esi, ecx + movdqa xmm5, xmm3 + psrldq xmm5, $4 + pslldq xmm7, $C + por xmm7, xmm5 + mov dword [esp], ecx + xor edx, ecx + xor edi, esi movdqa xmm5, xmm4 + ror edx, $6 + mov ecx, eax movdqa xmm6, xmm4 - psrld xmm4, 10 - psrld xmm5, 17 - pslld xmm6, 13 + add edx, edi + mov edi, dword [esp + $14] + psrld xmm4, $3 + mov esi, eax + ror ecx, $9 + paddd xmm1, xmm7 + mov dword [esp + $10], eax + xor ecx, eax + psrld xmm6, $7 + xor eax, edi + add edx, dword [esp + $C] + ror ecx, $B + and ebx, eax + pshufd xmm7, xmm0, $FA + xor ecx, esi + add edx, dword [esp + $30] + pslld xmm5, $E + xor ebx, edi + ror ecx, $2 + pxor xmm4, xmm6 + add ebx, edx + add edx, dword [esp + $1C] + psrld xmm6, $B + add ebx, ecx + mov ecx, edx + ror edx, $E pxor xmm4, xmm5 - psrld xmm5, 2 + mov esi, dword [esp] + xor edx, ecx + pslld xmm5, $B + mov edi, dword [esp + $4] + xor esi, edi + ror edx, $5 pxor xmm4, xmm6 - pslld xmm6, 2 + and esi, ecx + mov dword [esp + $1C], ecx + movdqa xmm6, xmm7 + xor edx, ecx + xor edi, esi + ror edx, $6 pxor xmm4, xmm5 + mov ecx, ebx + add edx, edi + psrld xmm7, $A + mov edi, dword [esp + $10] + mov esi, ebx + ror ecx, $9 + paddd xmm1, xmm4 + mov dword [esp + $C], ebx + xor ecx, ebx + psrlq xmm6, $11 + xor ebx, edi + add edx, dword [esp + $8] + ror ecx, $B + pxor xmm7, xmm6 + and eax, ebx + xor ecx, esi + psrlq xmm6, $2 + add edx, dword [esp + $34] + xor eax, edi + ror ecx, $2 + pxor xmm7, xmm6 + add eax, edx + add edx, dword [esp + $18] + pshufd xmm7, xmm7, $80 + add eax, ecx + mov ecx, edx + ror edx, $E + mov esi, dword [esp + $1C] + xor edx, ecx + mov edi, dword [esp] + xor esi, edi + ror edx, $5 + and esi, ecx + psrldq xmm7, $8 + mov dword [esp + $18], ecx + xor edx, ecx + xor edi, esi + paddd xmm1, xmm7 + ror edx, $6 + mov ecx, eax + add edx, edi + mov edi, dword [esp + $C] + mov esi, eax + ror ecx, $9 + mov dword [esp + $8], eax + pshufd xmm7, xmm1, $50 + xor ecx, eax + xor eax, edi + add edx, dword [esp + $4] + movdqa xmm6, xmm7 + ror ecx, $B + psrld xmm7, $A + and ebx, eax + psrlq xmm6, $11 + xor ecx, esi + add edx, dword [esp + $38] + xor ebx, edi + ror ecx, $2 + pxor xmm7, xmm6 + add ebx, edx + add edx, dword [esp + $14] + psrlq xmm6, $2 + add ebx, ecx + mov ecx, edx + ror edx, $E + pxor xmm7, xmm6 + mov esi, dword [esp + $18] + xor edx, ecx + mov edi, dword [esp + $1C] + pshufd xmm7, xmm7, $8 + xor esi, edi + ror edx, $5 + movdqu xmm6, oword [ebp + $20] + and esi, ecx + mov dword [esp + $14], ecx + pslldq xmm7, $8 + xor edx, ecx + xor edi, esi + ror edx, $6 + mov ecx, ebx + add edx, edi + mov edi, dword [esp + $8] + mov esi, ebx + ror ecx, $9 + paddd xmm1, xmm7 + mov dword [esp + $4], ebx + xor ecx, ebx + xor ebx, edi + add edx, dword [esp] + paddd xmm6, xmm1 + ror ecx, $B + and eax, ebx + xor ecx, esi + add edx, dword [esp + $3C] + xor eax, edi + ror ecx, $2 + add eax, edx + add edx, dword [esp + $10] + add eax, ecx + movdqa oword [esp + $30], xmm6 + mov ecx, edx + movdqa xmm4, xmm3 + ror edx, $E + mov esi, dword [esp + $14] + movdqa xmm7, xmm1 + xor edx, ecx + mov edi, dword [esp + $18] + movdqa xmm5, xmm2 + psrldq xmm5, $4 + pslldq xmm4, $C + por xmm4, xmm5 + xor esi, edi + ror edx, $5 + and esi, ecx + movdqa xmm5, xmm0 + psrldq xmm5, $4 + pslldq xmm7, $C + por xmm7, xmm5 + mov dword [esp + $10], ecx + xor edx, ecx + xor edi, esi + movdqa xmm5, xmm4 + ror edx, $6 + mov ecx, eax + movdqa xmm6, xmm4 + add edx, edi + mov edi, dword [esp + $4] + psrld xmm4, $3 + mov esi, eax + ror ecx, $9 + paddd xmm2, xmm7 + mov dword [esp], eax + xor ecx, eax + psrld xmm6, $7 + xor eax, edi + add edx, dword [esp + $1C] + ror ecx, $B + and ebx, eax + pshufd xmm7, xmm1, $FA + xor ecx, esi + add edx, dword [esp + $40] + pslld xmm5, $E + xor ebx, edi + ror ecx, $2 pxor xmm4, xmm6 - paddd xmm0, xmm4 - - // sigma1 phase 2: W[t..t+1] + add ebx, edx + add edx, dword [esp + $C] + psrld xmm6, $B + add ebx, ecx + mov ecx, edx + ror edx, $E + pxor xmm4, xmm5 + mov esi, dword [esp + $10] + xor edx, ecx + pslld xmm5, $B + mov edi, dword [esp + $14] + xor esi, edi + ror edx, $5 + pxor xmm4, xmm6 + and esi, ecx + mov dword [esp + $C], ecx + movdqa xmm6, xmm7 + xor edx, ecx + xor edi, esi + ror edx, $6 + pxor xmm4, xmm5 + mov ecx, ebx + add edx, edi + psrld xmm7, $A + mov edi, dword [esp] + mov esi, ebx + ror ecx, $9 + paddd xmm2, xmm4 + mov dword [esp + $1C], ebx + xor ecx, ebx + psrlq xmm6, $11 + xor ebx, edi + add edx, dword [esp + $18] + ror ecx, $B + pxor xmm7, xmm6 + and eax, ebx + xor ecx, esi + psrlq xmm6, $2 + add edx, dword [esp + $44] + xor eax, edi + ror ecx, $2 + pxor xmm7, xmm6 + add eax, edx + add edx, dword [esp + $8] + pshufd xmm7, xmm7, $80 + add eax, ecx + mov ecx, edx + ror edx, $E + mov esi, dword [esp + $C] + xor edx, ecx + mov edi, dword [esp + $10] + xor esi, edi + ror edx, $5 + and esi, ecx + psrldq xmm7, $8 + mov dword [esp + $8], ecx + xor edx, ecx + xor edi, esi + paddd xmm2, xmm7 + ror edx, $6 + mov ecx, eax + add edx, edi + mov edi, dword [esp + $1C] + mov esi, eax + ror ecx, $9 + mov dword [esp + $18], eax + pshufd xmm7, xmm2, $50 + xor ecx, eax + xor eax, edi + add edx, dword [esp + $14] + movdqa xmm6, xmm7 + ror ecx, $B + psrld xmm7, $A + and ebx, eax + psrlq xmm6, $11 + xor ecx, esi + add edx, dword [esp + $48] + xor ebx, edi + ror ecx, $2 + pxor xmm7, xmm6 + add ebx, edx + add edx, dword [esp + $4] + psrlq xmm6, $2 + add ebx, ecx + mov ecx, edx + ror edx, $E + pxor xmm7, xmm6 + mov esi, dword [esp + $8] + xor edx, ecx + mov edi, dword [esp + $C] + pshufd xmm7, xmm7, $8 + xor esi, edi + ror edx, $5 + movdqu xmm6, oword [ebp + $40] + and esi, ecx + mov dword [esp + $4], ecx + pslldq xmm7, $8 + xor edx, ecx + xor edi, esi + ror edx, $6 + mov ecx, ebx + add edx, edi + mov edi, dword [esp + $18] + mov esi, ebx + ror ecx, $9 + paddd xmm2, xmm7 + mov dword [esp + $14], ebx + xor ecx, ebx + xor ebx, edi + add edx, dword [esp + $10] + paddd xmm6, xmm2 + ror ecx, $B + and eax, ebx + xor ecx, esi + add edx, dword [esp + $4C] + xor eax, edi + ror ecx, $2 + add eax, edx + add edx, dword [esp] + add eax, ecx + movdqa oword [esp + $40], xmm6 + mov ecx, edx movdqa xmm4, xmm0 - pslldq xmm4, 8 + ror edx, $E + mov esi, dword [esp + $4] + movdqa xmm7, xmm2 + xor edx, ecx + mov edi, dword [esp + $8] + movdqa xmm5, xmm3 + psrldq xmm5, $4 + pslldq xmm4, $C + por xmm4, xmm5 + xor esi, edi + ror edx, $5 + and esi, ecx + movdqa xmm5, xmm1 + psrldq xmm5, $4 + pslldq xmm7, $C + por xmm7, xmm5 + mov dword [esp], ecx + xor edx, ecx + xor edi, esi movdqa xmm5, xmm4 + ror edx, $6 + mov ecx, eax movdqa xmm6, xmm4 - psrld xmm4, 10 - psrld xmm5, 17 - pslld xmm6, 13 - pxor xmm4, xmm5 - psrld xmm5, 2 + add edx, edi + mov edi, dword [esp + $14] + psrld xmm4, $3 + mov esi, eax + ror ecx, $9 + paddd xmm3, xmm7 + mov dword [esp + $10], eax + xor ecx, eax + psrld xmm6, $7 + xor eax, edi + add edx, dword [esp + $C] + ror ecx, $B + and ebx, eax + pshufd xmm7, xmm2, $FA + xor ecx, esi + add edx, dword [esp + $50] + pslld xmm5, $E + xor ebx, edi + ror ecx, $2 pxor xmm4, xmm6 - pslld xmm6, 2 + add ebx, edx + add edx, dword [esp + $1C] + psrld xmm6, $B + add ebx, ecx + mov ecx, edx + ror edx, $E pxor xmm4, xmm5 + mov esi, dword [esp] + xor edx, ecx + pslld xmm5, $B + mov edi, dword [esp + $4] + xor esi, edi + ror edx, $5 pxor xmm4, xmm6 - paddd xmm0, xmm4 - - movdqu xmm4, oword ptr [ebx] - paddd xmm4, xmm0 - movdqu oword ptr [ebp], xmm4 - - movdqa xmm4, xmm0 - movdqa xmm0, xmm1 - movdqa xmm1, xmm2 - movdqa xmm2, xmm3 - movdqa xmm3, xmm4 - - add ebx, $10 - add ebp, $10 - dec ecx - jnz @sse2_256_expand_loop - - // ========== Phase 2: 64 Compression Rounds ========== - - mov esi, [esp + $20] - mov eax, [esi] - mov ebx, [esi + $04] - mov ecx, [esi + $08] - mov edx, [esi + $0C] - mov edi, [esi + $10] - mov [esp + $34], edi - mov edi, [esi + $14] - mov [esp + $38], edi - mov edi, [esi + $18] - mov [esp + $3C], edi - mov edi, [esi + $1C] - mov [esp + $40], edi - - lea edi, [esp + $70 + $100] - mov [esp + $44], edi - lea ebp, [esp + $70] - -@sse2_256_round_loop: - - // Round 0: a=eax b=ebx c=ecx d=edx e=dword ptr [esp + $34] f=dword ptr [esp + $38] g=dword ptr [esp + $3C] h=dword ptr [esp + $40] - mov esi, dword ptr [esp + $34] - mov edi, dword ptr [esp + $34] - ror esi, 6 - ror edi, 11 - xor esi, edi - ror edi, 14 - xor esi, edi - mov edi, dword ptr [esp + $38] - xor edi, dword ptr [esp + $3C] - and edi, dword ptr [esp + $34] - xor edi, dword ptr [esp + $3C] - add esi, dword ptr [esp + $40] - add esi, edi - add esi, dword ptr [ebp] - add edx, esi - mov dword ptr [esp + $4C], eax - mov edi, dword ptr [esp + $4C] - ror edi, 2 - mov eax, dword ptr [esp + $4C] - ror eax, 13 - xor edi, eax - mov eax, dword ptr [esp + $4C] - ror eax, 22 - xor edi, eax - add esi, edi - mov eax, dword ptr [esp + $4C] - mov dword ptr [esp + $40], eax - and dword ptr [esp + $40], ebx - mov edi, eax - xor edi, ebx - and edi, ecx - xor dword ptr [esp + $40], edi - add dword ptr [esp + $40], esi - - // Round 1: a=dword ptr [esp + $40] b=eax c=ebx d=ecx e=edx f=dword ptr [esp + $34] g=dword ptr [esp + $38] h=dword ptr [esp + $3C] - mov esi, edx - mov edi, edx - ror esi, 6 - ror edi, 11 - xor esi, edi - ror edi, 14 - xor esi, edi - mov edi, dword ptr [esp + $34] - xor edi, dword ptr [esp + $38] - and edi, edx - xor edi, dword ptr [esp + $38] - add esi, dword ptr [esp + $3C] - add esi, edi - add esi, dword ptr [ebp + $04] - add ecx, esi - mov dword ptr [esp + $50], eax - mov edi, dword ptr [esp + $40] - mov dword ptr [esp + $3C], edi - mov dword ptr [esp + $4C], edi - mov edi, dword ptr [esp + $4C] - ror edi, 2 - mov eax, dword ptr [esp + $4C] - ror eax, 13 - xor edi, eax - mov eax, dword ptr [esp + $4C] - ror eax, 22 - xor edi, eax - add esi, edi - mov eax, dword ptr [esp + $50] - mov edi, dword ptr [esp + $40] - mov dword ptr [esp + $3C], edi - and dword ptr [esp + $3C], eax - xor edi, eax - and edi, ebx - xor dword ptr [esp + $3C], edi - add dword ptr [esp + $3C], esi - - // Round 2: a=dword ptr [esp + $3C] b=dword ptr [esp + $40] c=eax d=ebx e=ecx f=edx g=dword ptr [esp + $34] h=dword ptr [esp + $38] - mov esi, ecx - mov edi, ecx - ror esi, 6 - ror edi, 11 - xor esi, edi - ror edi, 14 - xor esi, edi - mov edi, edx - xor edi, dword ptr [esp + $34] - and edi, ecx - xor edi, dword ptr [esp + $34] - add esi, dword ptr [esp + $38] - add esi, edi - add esi, dword ptr [ebp + $08] - add ebx, esi - mov dword ptr [esp + $50], ebx - mov dword ptr [esp + $54], eax - mov edi, dword ptr [esp + $3C] - mov dword ptr [esp + $38], edi - mov dword ptr [esp + $4C], edi - mov edi, dword ptr [esp + $4C] - ror edi, 2 - mov eax, dword ptr [esp + $4C] - ror eax, 13 - xor edi, eax - mov eax, dword ptr [esp + $4C] - ror eax, 22 - xor edi, eax - add esi, edi - mov eax, dword ptr [esp + $54] - mov ebx, dword ptr [esp + $50] - mov edi, dword ptr [esp + $3C] - and edi, dword ptr [esp + $40] - mov dword ptr [esp + $38], edi - mov edi, dword ptr [esp + $3C] - xor edi, dword ptr [esp + $40] - and edi, eax - xor dword ptr [esp + $38], edi - add dword ptr [esp + $38], esi - - // Round 3: a=dword ptr [esp + $38] b=dword ptr [esp + $3C] c=dword ptr [esp + $40] d=eax e=ebx f=ecx g=edx h=dword ptr [esp + $34] - mov esi, ebx - mov edi, ebx - ror esi, 6 - ror edi, 11 - xor esi, edi - ror edi, 14 - xor esi, edi - mov edi, ecx - xor edi, edx - and edi, ebx - xor edi, edx - add esi, dword ptr [esp + $34] - add esi, edi - add esi, dword ptr [ebp + $0C] - add eax, esi - mov dword ptr [esp + $50], eax - mov dword ptr [esp + $54], ebx - mov edi, dword ptr [esp + $38] - mov dword ptr [esp + $34], edi - mov dword ptr [esp + $4C], edi - mov edi, dword ptr [esp + $4C] - ror edi, 2 - mov eax, dword ptr [esp + $4C] - ror eax, 13 - xor edi, eax - mov eax, dword ptr [esp + $4C] - ror eax, 22 - xor edi, eax - add esi, edi - mov eax, dword ptr [esp + $50] - mov ebx, dword ptr [esp + $54] - mov edi, dword ptr [esp + $38] - and edi, dword ptr [esp + $3C] - mov dword ptr [esp + $34], edi - mov edi, dword ptr [esp + $38] - xor edi, dword ptr [esp + $3C] - and edi, dword ptr [esp + $40] - xor dword ptr [esp + $34], edi - add dword ptr [esp + $34], esi - - // Round 4: a=dword ptr [esp + $34] b=dword ptr [esp + $38] c=dword ptr [esp + $3C] d=dword ptr [esp + $40] e=eax f=ebx g=ecx h=edx - mov esi, eax - mov edi, eax - ror esi, 6 - ror edi, 11 - xor esi, edi - ror edi, 14 - xor esi, edi - mov edi, ebx - xor edi, ecx - and edi, eax - xor edi, ecx - add esi, edx - add esi, edi - add esi, dword ptr [ebp + $10] - add dword ptr [esp + $40], esi - mov edi, dword ptr [esp + $34] - mov edx, dword ptr [esp + $34] - ror edi, 2 - ror edx, 13 - xor edi, edx - ror edx, 9 - xor edi, edx - add esi, edi - mov edx, dword ptr [esp + $34] - and edx, dword ptr [esp + $38] - mov edi, dword ptr [esp + $34] - xor edi, dword ptr [esp + $38] - and edi, dword ptr [esp + $3C] - xor edx, edi - add edx, esi - - // Round 5: a=edx b=dword ptr [esp + $34] c=dword ptr [esp + $38] d=dword ptr [esp + $3C] e=dword ptr [esp + $40] f=eax g=ebx h=ecx - mov esi, dword ptr [esp + $40] - mov edi, dword ptr [esp + $40] - ror esi, 6 - ror edi, 11 - xor esi, edi - ror edi, 14 - xor esi, edi - mov edi, eax - xor edi, ebx - and edi, dword ptr [esp + $40] - xor edi, ebx - add esi, ecx - add esi, edi - add esi, dword ptr [ebp + $14] - add dword ptr [esp + $3C], esi - mov edi, edx - mov ecx, edx - ror edi, 2 - ror ecx, 13 - xor edi, ecx - ror ecx, 9 - xor edi, ecx - add esi, edi - mov ecx, edx - and ecx, dword ptr [esp + $34] - mov edi, edx - xor edi, dword ptr [esp + $34] - and edi, dword ptr [esp + $38] - xor ecx, edi - add ecx, esi - - // Round 6: a=ecx b=edx c=dword ptr [esp + $34] d=dword ptr [esp + $38] e=dword ptr [esp + $3C] f=dword ptr [esp + $40] g=eax h=ebx - mov esi, dword ptr [esp + $3C] - mov edi, dword ptr [esp + $3C] - ror esi, 6 - ror edi, 11 - xor esi, edi - ror edi, 14 - xor esi, edi - mov edi, dword ptr [esp + $40] - xor edi, eax - and edi, dword ptr [esp + $3C] - xor edi, eax - add esi, ebx - add esi, edi - add esi, dword ptr [ebp + $18] - add dword ptr [esp + $38], esi - mov edi, ecx - mov ebx, ecx - ror edi, 2 - ror ebx, 13 - xor edi, ebx - ror ebx, 9 - xor edi, ebx - add esi, edi - mov ebx, ecx - and ebx, edx - mov edi, ecx - xor edi, edx - and edi, dword ptr [esp + $34] - xor ebx, edi - add ebx, esi - - // Round 7: a=ebx b=ecx c=edx d=dword ptr [esp + $34] e=dword ptr [esp + $38] f=dword ptr [esp + $3C] g=dword ptr [esp + $40] h=eax - mov esi, dword ptr [esp + $38] - mov edi, dword ptr [esp + $38] - ror esi, 6 - ror edi, 11 - xor esi, edi - ror edi, 14 - xor esi, edi - mov edi, dword ptr [esp + $3C] - xor edi, dword ptr [esp + $40] - and edi, dword ptr [esp + $38] - xor edi, dword ptr [esp + $40] - add esi, eax - add esi, edi - add esi, dword ptr [ebp + $1C] - add dword ptr [esp + $34], esi - mov edi, ebx - mov eax, ebx - ror edi, 2 - ror eax, 13 - xor edi, eax - ror eax, 9 - xor edi, eax - add esi, edi - mov eax, ebx - and eax, ecx - mov edi, ebx - xor edi, ecx - and edi, edx - xor eax, edi - add eax, esi - - add ebp, $20 - cmp ebp, [esp + $44] - jb @sse2_256_round_loop - - // Add round results to state - mov esi, [esp + $20] - add dword ptr [esi], eax - add dword ptr [esi + $04], ebx - add dword ptr [esi + $08], ecx - add dword ptr [esi + $0C], edx - mov eax, dword ptr [esp + $34] - add dword ptr [esi + $10], eax - mov eax, dword ptr [esp + $38] - add dword ptr [esi + $14], eax - mov eax, dword ptr [esp + $3C] - add dword ptr [esi + $18], eax - mov eax, dword ptr [esp + $40] - add dword ptr [esi + $1C], eax - - mov esi, [esp + $24] - add esi, $40 - mov [esp + $24], esi - dec dword ptr [esp + $28] - jnz @sse2_256_block_loop - -@sse2_256_done: - - mov ebp, [esp + $30] - movdqu xmm6, oword ptr [esp] - movdqu xmm7, oword ptr [esp + $10] - add esp, 376 - pop edi - pop esi - pop ebx + and esi, ecx + mov dword [esp + $1C], ecx + movdqa xmm6, xmm7 + xor edx, ecx + xor edi, esi + ror edx, $6 + pxor xmm4, xmm5 + mov ecx, ebx + add edx, edi + psrld xmm7, $A + mov edi, dword [esp + $10] + mov esi, ebx + ror ecx, $9 + paddd xmm3, xmm4 + mov dword [esp + $C], ebx + xor ecx, ebx + psrlq xmm6, $11 + xor ebx, edi + add edx, dword [esp + $8] + ror ecx, $B + pxor xmm7, xmm6 + and eax, ebx + xor ecx, esi + psrlq xmm6, $2 + add edx, dword [esp + $54] + xor eax, edi + ror ecx, $2 + pxor xmm7, xmm6 + add eax, edx + add edx, dword [esp + $18] + pshufd xmm7, xmm7, $80 + add eax, ecx + mov ecx, edx + ror edx, $E + mov esi, dword [esp + $1C] + xor edx, ecx + mov edi, dword [esp] + xor esi, edi + ror edx, $5 + and esi, ecx + psrldq xmm7, $8 + mov dword [esp + $18], ecx + xor edx, ecx + xor edi, esi + paddd xmm3, xmm7 + ror edx, $6 + mov ecx, eax + add edx, edi + mov edi, dword [esp + $C] + mov esi, eax + ror ecx, $9 + mov dword [esp + $8], eax + pshufd xmm7, xmm3, $50 + xor ecx, eax + xor eax, edi + add edx, dword [esp + $4] + movdqa xmm6, xmm7 + ror ecx, $B + psrld xmm7, $A + and ebx, eax + psrlq xmm6, $11 + xor ecx, esi + add edx, dword [esp + $58] + xor ebx, edi + ror ecx, $2 + pxor xmm7, xmm6 + add ebx, edx + add edx, dword [esp + $14] + psrlq xmm6, $2 + add ebx, ecx + mov ecx, edx + ror edx, $E + pxor xmm7, xmm6 + mov esi, dword [esp + $18] + xor edx, ecx + mov edi, dword [esp + $1C] + pshufd xmm7, xmm7, $8 + xor esi, edi + ror edx, $5 + movdqu xmm6, oword [ebp + $60] + and esi, ecx + mov dword [esp + $14], ecx + pslldq xmm7, $8 + xor edx, ecx + xor edi, esi + ror edx, $6 + mov ecx, ebx + add edx, edi + mov edi, dword [esp + $8] + mov esi, ebx + ror ecx, $9 + paddd xmm3, xmm7 + mov dword [esp + $4], ebx + xor ecx, ebx + xor ebx, edi + add edx, dword [esp] + paddd xmm6, xmm3 + ror ecx, $B + and eax, ebx + xor ecx, esi + add edx, dword [esp + $5C] + xor eax, edi + ror ecx, $2 + add eax, edx + add edx, dword [esp + $10] + add eax, ecx + movdqa oword [esp + $50], xmm6 + cmp dword [ebp + $80], $10203 + jne @sched_loop + mov ecx, edx + ror edx, $E + mov esi, dword [esp + $14] + xor edx, ecx + mov edi, dword [esp + $18] + xor esi, edi + ror edx, $5 + and esi, ecx + mov dword [esp + $10], ecx + xor edx, ecx + xor edi, esi + ror edx, $6 + mov ecx, eax + add edx, edi + mov edi, dword [esp + $4] + mov esi, eax + ror ecx, $9 + mov dword [esp], eax + xor ecx, eax + xor eax, edi + add edx, dword [esp + $1C] + ror ecx, $B + and ebx, eax + xor ecx, esi + add edx, dword [esp + $20] + xor ebx, edi + ror ecx, $2 + add ebx, edx + add edx, dword [esp + $C] + add ebx, ecx + mov ecx, edx + ror edx, $E + mov esi, dword [esp + $10] + xor edx, ecx + mov edi, dword [esp + $14] + xor esi, edi + ror edx, $5 + and esi, ecx + mov dword [esp + $C], ecx + xor edx, ecx + xor edi, esi + ror edx, $6 + mov ecx, ebx + add edx, edi + mov edi, dword [esp] + mov esi, ebx + ror ecx, $9 + mov dword [esp + $1C], ebx + xor ecx, ebx + xor ebx, edi + add edx, dword [esp + $18] + ror ecx, $B + and eax, ebx + xor ecx, esi + add edx, dword [esp + $24] + xor eax, edi + ror ecx, $2 + add eax, edx + add edx, dword [esp + $8] + add eax, ecx + mov ecx, edx + ror edx, $E + mov esi, dword [esp + $C] + xor edx, ecx + mov edi, dword [esp + $10] + xor esi, edi + ror edx, $5 + and esi, ecx + mov dword [esp + $8], ecx + xor edx, ecx + xor edi, esi + ror edx, $6 + mov ecx, eax + add edx, edi + mov edi, dword [esp + $1C] + mov esi, eax + ror ecx, $9 + mov dword [esp + $18], eax + xor ecx, eax + xor eax, edi + add edx, dword [esp + $14] + ror ecx, $B + and ebx, eax + xor ecx, esi + add edx, dword [esp + $28] + xor ebx, edi + ror ecx, $2 + add ebx, edx + add edx, dword [esp + $4] + add ebx, ecx + mov ecx, edx + ror edx, $E + mov esi, dword [esp + $8] + xor edx, ecx + mov edi, dword [esp + $C] + xor esi, edi + ror edx, $5 + and esi, ecx + mov dword [esp + $4], ecx + xor edx, ecx + xor edi, esi + ror edx, $6 + mov ecx, ebx + add edx, edi + mov edi, dword [esp + $18] + mov esi, ebx + ror ecx, $9 + mov dword [esp + $14], ebx + xor ecx, ebx + xor ebx, edi + add edx, dword [esp + $10] + ror ecx, $B + and eax, ebx + xor ecx, esi + add edx, dword [esp + $2C] + xor eax, edi + ror ecx, $2 + add eax, edx + add edx, dword [esp] + add eax, ecx + mov ecx, edx + ror edx, $E + mov esi, dword [esp + $4] + xor edx, ecx + mov edi, dword [esp + $8] + xor esi, edi + ror edx, $5 + and esi, ecx + mov dword [esp], ecx + xor edx, ecx + xor edi, esi + ror edx, $6 + mov ecx, eax + add edx, edi + mov edi, dword [esp + $14] + mov esi, eax + ror ecx, $9 + mov dword [esp + $10], eax + xor ecx, eax + xor eax, edi + add edx, dword [esp + $C] + ror ecx, $B + and ebx, eax + xor ecx, esi + add edx, dword [esp + $30] + xor ebx, edi + ror ecx, $2 + add ebx, edx + add edx, dword [esp + $1C] + add ebx, ecx + mov ecx, edx + ror edx, $E + mov esi, dword [esp] + xor edx, ecx + mov edi, dword [esp + $4] + xor esi, edi + ror edx, $5 + and esi, ecx + mov dword [esp + $1C], ecx + xor edx, ecx + xor edi, esi + ror edx, $6 + mov ecx, ebx + add edx, edi + mov edi, dword [esp + $10] + mov esi, ebx + ror ecx, $9 + mov dword [esp + $C], ebx + xor ecx, ebx + xor ebx, edi + add edx, dword [esp + $8] + ror ecx, $B + and eax, ebx + xor ecx, esi + add edx, dword [esp + $34] + xor eax, edi + ror ecx, $2 + add eax, edx + add edx, dword [esp + $18] + add eax, ecx + mov ecx, edx + ror edx, $E + mov esi, dword [esp + $1C] + xor edx, ecx + mov edi, dword [esp] + xor esi, edi + ror edx, $5 + and esi, ecx + mov dword [esp + $18], ecx + xor edx, ecx + xor edi, esi + ror edx, $6 + mov ecx, eax + add edx, edi + mov edi, dword [esp + $C] + mov esi, eax + ror ecx, $9 + mov dword [esp + $8], eax + xor ecx, eax + xor eax, edi + add edx, dword [esp + $4] + ror ecx, $B + and ebx, eax + xor ecx, esi + add edx, dword [esp + $38] + xor ebx, edi + ror ecx, $2 + add ebx, edx + add edx, dword [esp + $14] + add ebx, ecx + mov ecx, edx + ror edx, $E + mov esi, dword [esp + $18] + xor edx, ecx + mov edi, dword [esp + $1C] + xor esi, edi + ror edx, $5 + and esi, ecx + mov dword [esp + $14], ecx + xor edx, ecx + xor edi, esi + ror edx, $6 + mov ecx, ebx + add edx, edi + mov edi, dword [esp + $8] + mov esi, ebx + ror ecx, $9 + mov dword [esp + $4], ebx + xor ecx, ebx + xor ebx, edi + add edx, dword [esp] + ror ecx, $B + and eax, ebx + xor ecx, esi + add edx, dword [esp + $3C] + xor eax, edi + ror ecx, $2 + add eax, edx + add edx, dword [esp + $10] + add eax, ecx + mov ecx, edx + ror edx, $E + mov esi, dword [esp + $14] + xor edx, ecx + mov edi, dword [esp + $18] + xor esi, edi + ror edx, $5 + and esi, ecx + mov dword [esp + $10], ecx + xor edx, ecx + xor edi, esi + ror edx, $6 + mov ecx, eax + add edx, edi + mov edi, dword [esp + $4] + mov esi, eax + ror ecx, $9 + mov dword [esp], eax + xor ecx, eax + xor eax, edi + add edx, dword [esp + $1C] + ror ecx, $B + and ebx, eax + xor ecx, esi + add edx, dword [esp + $40] + xor ebx, edi + ror ecx, $2 + add ebx, edx + add edx, dword [esp + $C] + add ebx, ecx + mov ecx, edx + ror edx, $E + mov esi, dword [esp + $10] + xor edx, ecx + mov edi, dword [esp + $14] + xor esi, edi + ror edx, $5 + and esi, ecx + mov dword [esp + $C], ecx + xor edx, ecx + xor edi, esi + ror edx, $6 + mov ecx, ebx + add edx, edi + mov edi, dword [esp] + mov esi, ebx + ror ecx, $9 + mov dword [esp + $1C], ebx + xor ecx, ebx + xor ebx, edi + add edx, dword [esp + $18] + ror ecx, $B + and eax, ebx + xor ecx, esi + add edx, dword [esp + $44] + xor eax, edi + ror ecx, $2 + add eax, edx + add edx, dword [esp + $8] + add eax, ecx + mov ecx, edx + ror edx, $E + mov esi, dword [esp + $C] + xor edx, ecx + mov edi, dword [esp + $10] + xor esi, edi + ror edx, $5 + and esi, ecx + mov dword [esp + $8], ecx + xor edx, ecx + xor edi, esi + ror edx, $6 + mov ecx, eax + add edx, edi + mov edi, dword [esp + $1C] + mov esi, eax + ror ecx, $9 + mov dword [esp + $18], eax + xor ecx, eax + xor eax, edi + add edx, dword [esp + $14] + ror ecx, $B + and ebx, eax + xor ecx, esi + add edx, dword [esp + $48] + xor ebx, edi + ror ecx, $2 + add ebx, edx + add edx, dword [esp + $4] + add ebx, ecx + mov ecx, edx + ror edx, $E + mov esi, dword [esp + $8] + xor edx, ecx + mov edi, dword [esp + $C] + xor esi, edi + ror edx, $5 + and esi, ecx + mov dword [esp + $4], ecx + xor edx, ecx + xor edi, esi + ror edx, $6 + mov ecx, ebx + add edx, edi + mov edi, dword [esp + $18] + mov esi, ebx + ror ecx, $9 + mov dword [esp + $14], ebx + xor ecx, ebx + xor ebx, edi + add edx, dword [esp + $10] + ror ecx, $B + and eax, ebx + xor ecx, esi + add edx, dword [esp + $4C] + xor eax, edi + ror ecx, $2 + add eax, edx + add edx, dword [esp] + add eax, ecx + mov ecx, edx + ror edx, $E + mov esi, dword [esp + $4] + xor edx, ecx + mov edi, dword [esp + $8] + xor esi, edi + ror edx, $5 + and esi, ecx + mov dword [esp], ecx + xor edx, ecx + xor edi, esi + ror edx, $6 + mov ecx, eax + add edx, edi + mov edi, dword [esp + $14] + mov esi, eax + ror ecx, $9 + mov dword [esp + $10], eax + xor ecx, eax + xor eax, edi + add edx, dword [esp + $C] + ror ecx, $B + and ebx, eax + xor ecx, esi + add edx, dword [esp + $50] + xor ebx, edi + ror ecx, $2 + add ebx, edx + add edx, dword [esp + $1C] + add ebx, ecx + mov ecx, edx + ror edx, $E + mov esi, dword [esp] + xor edx, ecx + mov edi, dword [esp + $4] + xor esi, edi + ror edx, $5 + and esi, ecx + mov dword [esp + $1C], ecx + xor edx, ecx + xor edi, esi + ror edx, $6 + mov ecx, ebx + add edx, edi + mov edi, dword [esp + $10] + mov esi, ebx + ror ecx, $9 + mov dword [esp + $C], ebx + xor ecx, ebx + xor ebx, edi + add edx, dword [esp + $8] + ror ecx, $B + and eax, ebx + xor ecx, esi + add edx, dword [esp + $54] + xor eax, edi + ror ecx, $2 + add eax, edx + add edx, dword [esp + $18] + add eax, ecx + mov ecx, edx + ror edx, $E + mov esi, dword [esp + $1C] + xor edx, ecx + mov edi, dword [esp] + xor esi, edi + ror edx, $5 + and esi, ecx + mov dword [esp + $18], ecx + xor edx, ecx + xor edi, esi + ror edx, $6 + mov ecx, eax + add edx, edi + mov edi, dword [esp + $C] + mov esi, eax + ror ecx, $9 + mov dword [esp + $8], eax + xor ecx, eax + xor eax, edi + add edx, dword [esp + $4] + ror ecx, $B + and ebx, eax + xor ecx, esi + add edx, dword [esp + $58] + xor ebx, edi + ror ecx, $2 + add ebx, edx + add edx, dword [esp + $14] + add ebx, ecx + mov ecx, edx + ror edx, $E + mov esi, dword [esp + $18] + xor edx, ecx + mov edi, dword [esp + $1C] + xor esi, edi + ror edx, $5 + and esi, ecx + mov dword [esp + $14], ecx + xor edx, ecx + xor edi, esi + ror edx, $6 + mov ecx, ebx + add edx, edi + mov edi, dword [esp + $8] + mov esi, ebx + ror ecx, $9 + mov dword [esp + $4], ebx + xor ecx, ebx + xor ebx, edi + add edx, dword [esp] + ror ecx, $B + and eax, ebx + xor ecx, esi + add edx, dword [esp + $5C] + xor eax, edi + ror ecx, $2 + add eax, edx + add edx, dword [esp + $10] + add eax, ecx + mov esi, dword [esp + $60] + xor ebx, edi + mov ecx, dword [esp + $C] + add eax, dword [esi] + add ebx, dword [esi + $4] + add edi, dword [esi + $8] + add ecx, dword [esi + $C] + mov dword [esi], eax + mov dword [esi + $4], ebx + mov dword [esi + $8], edi + mov dword [esi + $C], ecx + mov dword [esp + $4], ebx + xor ebx, edi + mov dword [esp + $8], edi + mov dword [esp + $C], ecx + mov edi, dword [esp + $14] + mov ecx, dword [esp + $18] + add edx, dword [esi + $10] + add edi, dword [esi + $14] + add ecx, dword [esi + $18] + mov dword [esi + $10], edx + mov dword [esi + $14], edi + mov dword [esp + $14], edi + mov edi, dword [esp + $1C] + mov dword [esi + $18], ecx + add edi, dword [esi + $1C] + mov dword [esp + $18], ecx + mov dword [esi + $1C], edi + mov dword [esp + $1C], edi + mov edi, dword [esp + $64] + sub ebp, $180 + cmp edi, dword [esp + $68] + jb @block_loop + mov esp, dword [esp + $6C] + pop ebp + pop edi + pop esi + pop ebx diff --git a/HashLib/src/Include/Simd/SHA256/SHA256CompressSse2_x86_64.inc b/HashLib/src/Include/Simd/SHA256/SHA256CompressSse2_x86_64.inc index 15a7b136..ba96210a 100644 --- a/HashLib/src/Include/Simd/SHA256/SHA256CompressSse2_x86_64.inc +++ b/HashLib/src/Include/Simd/SHA256/SHA256CompressSse2_x86_64.inc @@ -1,486 +1,1153 @@ -// SHA-256 SSE2 implementation with SIMD message schedule. -// Based on SSSE3 implementation (see SHA256CompressSsse3_x86_64.inc). -// Same algorithm as SSSE3 version but replaces SSSE3-specific instructions: -// pshufb -> SSE2 byte-swap (pshuflw/pshufhw + psrlw/psllw/por) -// palignr -> SSE2 emulation (movdqa/psrldq/pslldq/por) -// Expects MS x64 ABI: rcx = state ptr, rdx = data ptr, r8d = numblocks, r9 = K256 ptr. -// K256: 64 UInt32 round constants (256 bytes). SSE2 byte-swaps without a mask, so -// no BSWAP mask ptr is needed (4-param path). -// Uses xmm0-xmm7, all GPR. -// -// Two-phase per block: -// Phase 1 (SIMD): Compute W+K[0..63] using SSE2 message schedule, store to stack -// Phase 2 (GPR): Run 64 compression rounds reading W+K from stack +// SHA-256 SSE2 SIMD-schedule implementation, derived from OpenSSL's SHA-256 +// SSSE3 kernel in sha512-x86_64.pl (CRYPTOGAMS). The message schedule runs in +// SSE2 (paddd/psrld/pslld/pxor/pshufd) interleaved with the GPR compression +// rounds, so the vector and integer units run in parallel - the design that +// beats the older two-phase kernel. OpenSSL's two SSSE3-only ops are emulated in +// SSE2: the pshufb dword byte-swap becomes psrlw/psllw/por + pshuflw/pshufhw, +// and palignr becomes psrldq/pslldq/por (xmm8 is a free scratch). +// Expects MS x64 ABI (after SimdProc4Begin): rcx = state ptr, rdx = data ptr, +// r8d = numblocks, r9 = doubled-K256 ptr (read at a 32-byte stride so the +// duplicated halves are skipped; see K256_Doubled). No byte-swap mask table is +// needed - the swap is computed, not shuffled. // // MS x64 non-volatile saves: xmm6-xmm15 via the shared SimdNonVolatileSave/Restore // include (no-op on SysV); rbx, rbp, rdi, rsi, r12-r15 in the local frame. -// -// Stack layout (sub rsp, 344): GPR saves at [rsp+$00..$47], W+K schedule at [rsp+$50..] {$I ..\Include\Simd\Common\SimdNonVolatileSave_x86_64.inc} - sub rsp, 344 - - mov [rsp + $10], rdi - mov [rsp + $18], rsi - mov [rsp + $00], rbx - mov [rsp + $08], rbp - mov [rsp + $20], r12 - mov [rsp + $28], r13 - mov [rsp + $30], r14 - mov [rsp + $38], r15 - - mov r12, rcx - mov r13, rdx - mov r14d, r8d - mov [rsp + $40], r9 - - test r14d, r14d - jz @sse2_256_done + mov rax, rsp + push r9 + push rbx + push rbp + push rsi + push rdi + push r12 + push r13 + push r14 + push r15 + mov rdi, rcx + mov rsi, rdx + mov edx, r8d + shl rdx, $4 + sub rsp, $A0 + lea rdx, [rsi + rdx*4] + and rsp, $FFFFFFFFFFFFFFC0 + mov qword [rsp + $40], rdi + mov qword [rsp + $48], rsi + mov qword [rsp + $50], rdx + mov qword [rsp + $58], rax -@sse2_256_block_loop: +@prologue: + mov eax, dword [rdi] + mov ebx, dword [rdi + $4] + mov ecx, dword [rdi + $8] + mov edx, dword [rdi + $C] + mov r8d, dword [rdi + $10] + mov r9d, dword [rdi + $14] + mov r10d, dword [rdi + $18] + mov r11d, dword [rdi + $1C] + jmp @block_loop - // ========== Phase 1: Message Schedule ========== - - mov rax, [rsp + $40] - - // SSE2 32-bit byte-swap for W[0..15] - movdqu xmm0, oword [r13] +@block_loop: + movdqu xmm0, oword [rsi] + movdqu xmm1, oword [rsi + $10] + movdqu xmm2, oword [rsi + $20] + movdqa xmm8, xmm0 + psrlw xmm8, $8 + psllw xmm0, $8 + por xmm0, xmm8 pshuflw xmm0, xmm0, $B1 pshufhw xmm0, xmm0, $B1 - movdqa xmm4, xmm0 - psrlw xmm0, 8 - psllw xmm4, 8 - por xmm0, xmm4 - - movdqu xmm1, oword [r13 + $10] + movdqu xmm3, oword [rsi + $30] + mov rbp, qword [rsp + $58] + mov rbp, qword [rbp - $8] + movdqa xmm8, xmm1 + psrlw xmm8, $8 + psllw xmm1, $8 + por xmm1, xmm8 pshuflw xmm1, xmm1, $B1 pshufhw xmm1, xmm1, $B1 - movdqa xmm4, xmm1 - psrlw xmm1, 8 - psllw xmm4, 8 - por xmm1, xmm4 - - movdqu xmm2, oword [r13 + $20] + movdqu xmm4, oword [rbp + $0] + movdqu xmm5, oword [rbp + $20] + movdqa xmm8, xmm2 + psrlw xmm8, $8 + psllw xmm2, $8 + por xmm2, xmm8 pshuflw xmm2, xmm2, $B1 pshufhw xmm2, xmm2, $B1 - movdqa xmm4, xmm2 - psrlw xmm2, 8 - psllw xmm4, 8 - por xmm2, xmm4 - - movdqu xmm3, oword [r13 + $30] + paddd xmm4, xmm0 + movdqu xmm6, oword [rbp + $40] + movdqa xmm8, xmm3 + psrlw xmm8, $8 + psllw xmm3, $8 + por xmm3, xmm8 pshuflw xmm3, xmm3, $B1 pshufhw xmm3, xmm3, $B1 - movdqa xmm4, xmm3 - psrlw xmm3, 8 - psllw xmm4, 8 - por xmm3, xmm4 - - lea rbp, [rsp + $50] - - movdqa xmm4, xmm0 - movdqu xmm5, oword [rax] - paddd xmm4, xmm5 - movdqa oword [rbp], xmm4 + movdqu xmm7, oword [rbp + $60] + paddd xmm5, xmm1 + paddd xmm6, xmm2 + paddd xmm7, xmm3 + movdqa oword [rsp], xmm4 + mov r14d, eax + movdqa oword [rsp + $10], xmm5 + mov edi, ebx + movdqa oword [rsp + $20], xmm6 + xor edi, ecx + movdqa oword [rsp + $30], xmm7 + mov r13d, r8d + jmp @sched_loop +@sched_loop: + sub rbp, $FFFFFFFFFFFFFF80 + ror r13d, $E movdqa xmm4, xmm1 - movdqu xmm5, oword [rax + $10] - paddd xmm4, xmm5 - movdqa oword [rbp + $10], xmm4 - - movdqa xmm4, xmm2 - movdqu xmm5, oword [rax + $20] - paddd xmm4, xmm5 - movdqa oword [rbp + $20], xmm4 - - movdqa xmm4, xmm3 - movdqu xmm5, oword [rax + $30] - paddd xmm4, xmm5 - movdqa oword [rbp + $30], xmm4 - - add rax, $40 - add rbp, $40 - mov ecx, 12 - -@sse2_256_expand_loop: - - // sigma0(W[t-15..t-12]) - replaces palignr xmm4, xmm0, 4 - movdqa xmm4, xmm0 - psrldq xmm4, 4 - movdqa xmm7, xmm1 - pslldq xmm7, 12 - por xmm4, xmm7 - + mov eax, r14d + mov r12d, r9d + movdqa xmm7, xmm3 + ror r14d, $9 + xor r13d, r8d + xor r12d, r10d + ror r13d, $5 + xor r14d, eax + movdqa xmm8, xmm0 + psrldq xmm8, $4 + pslldq xmm4, $C + por xmm4, xmm8 + and r12d, r8d + xor r13d, r8d + movdqa xmm8, xmm2 + psrldq xmm8, $4 + pslldq xmm7, $C + por xmm7, xmm8 + add r11d, dword [rsp] + mov r15d, eax + xor r12d, r10d + ror r14d, $B movdqa xmm5, xmm4 + xor r15d, ebx + add r11d, r12d movdqa xmm6, xmm4 - psrld xmm4, 3 - psrld xmm5, 7 - pslld xmm6, 14 - pxor xmm4, xmm5 - psrld xmm5, 11 + ror r13d, $6 + and edi, r15d + psrld xmm4, $3 + xor r14d, eax + add r11d, r13d + xor edi, ebx + paddd xmm0, xmm7 + ror r14d, $2 + add edx, r11d + psrld xmm6, $7 + add r11d, edi + mov r13d, edx + pshufd xmm7, xmm3, $FA + add r14d, r11d + ror r13d, $E + pslld xmm5, $E + mov r11d, r14d + mov r12d, r8d pxor xmm4, xmm6 - pslld xmm6, 11 + ror r14d, $9 + xor r13d, edx + xor r12d, r9d + ror r13d, $5 + psrld xmm6, $B + xor r14d, r11d pxor xmm4, xmm5 + and r12d, edx + xor r13d, edx + pslld xmm5, $B + add r10d, dword [rsp + $4] + mov edi, r11d pxor xmm4, xmm6 - + xor r12d, r9d + ror r14d, $B + movdqa xmm6, xmm7 + xor edi, eax + add r10d, r12d + pxor xmm4, xmm5 + ror r13d, $6 + and r15d, edi + xor r14d, r11d + psrld xmm7, $A + add r10d, r13d + xor r15d, eax paddd xmm0, xmm4 - - // W[t-7..t-4] - replaces palignr xmm4, xmm2, 4 + ror r14d, $2 + add ecx, r10d + psrlq xmm6, $11 + add r10d, r15d + mov r13d, ecx + add r14d, r10d + pxor xmm7, xmm6 + ror r13d, $E + mov r10d, r14d + mov r12d, edx + ror r14d, $9 + psrlq xmm6, $2 + xor r13d, ecx + xor r12d, r8d + pxor xmm7, xmm6 + ror r13d, $5 + xor r14d, r10d + and r12d, ecx + pshufd xmm7, xmm7, $80 + xor r13d, ecx + add r9d, dword [rsp + $8] + mov r15d, r10d + psrldq xmm7, $8 + xor r12d, r8d + ror r14d, $B + xor r15d, r11d + add r9d, r12d + ror r13d, $6 + paddd xmm0, xmm7 + and edi, r15d + xor r14d, r10d + add r9d, r13d + pshufd xmm7, xmm0, $50 + xor edi, r11d + ror r14d, $2 + add ebx, r9d + movdqa xmm6, xmm7 + add r9d, edi + mov r13d, ebx + psrld xmm7, $A + add r14d, r9d + ror r13d, $E + psrlq xmm6, $11 + mov r9d, r14d + mov r12d, ecx + pxor xmm7, xmm6 + ror r14d, $9 + xor r13d, ebx + xor r12d, edx + ror r13d, $5 + xor r14d, r9d + psrlq xmm6, $2 + and r12d, ebx + xor r13d, ebx + add r8d, dword [rsp + $C] + pxor xmm7, xmm6 + mov edi, r9d + xor r12d, edx + ror r14d, $B + pshufd xmm7, xmm7, $8 + xor edi, r10d + add r8d, r12d + movdqu xmm6, oword [rbp + $0] + ror r13d, $6 + and r15d, edi + pslldq xmm7, $8 + xor r14d, r9d + add r8d, r13d + xor r15d, r10d + paddd xmm0, xmm7 + ror r14d, $2 + add eax, r8d + add r8d, r15d + paddd xmm6, xmm0 + mov r13d, eax + add r14d, r8d + movdqa oword [rsp], xmm6 + ror r13d, $E movdqa xmm4, xmm2 - psrldq xmm4, 4 - movdqa xmm7, xmm3 - pslldq xmm7, 12 - por xmm4, xmm7 - paddd xmm0, xmm4 - - // sigma1 phase 1: W[t-2..t-1] - movdqa xmm4, xmm3 - psrldq xmm4, 8 + mov r8d, r14d + mov r12d, ebx + movdqa xmm7, xmm0 + ror r14d, $9 + xor r13d, eax + xor r12d, ecx + ror r13d, $5 + xor r14d, r8d + movdqa xmm8, xmm1 + psrldq xmm8, $4 + pslldq xmm4, $C + por xmm4, xmm8 + and r12d, eax + xor r13d, eax + movdqa xmm8, xmm3 + psrldq xmm8, $4 + pslldq xmm7, $C + por xmm7, xmm8 + add edx, dword [rsp + $10] + mov r15d, r8d + xor r12d, ecx + ror r14d, $B movdqa xmm5, xmm4 + xor r15d, r9d + add edx, r12d movdqa xmm6, xmm4 - psrld xmm4, 10 - psrld xmm5, 17 - pslld xmm6, 13 + ror r13d, $6 + and edi, r15d + psrld xmm4, $3 + xor r14d, r8d + add edx, r13d + xor edi, r9d + paddd xmm1, xmm7 + ror r14d, $2 + add r11d, edx + psrld xmm6, $7 + add edx, edi + mov r13d, r11d + pshufd xmm7, xmm0, $FA + add r14d, edx + ror r13d, $E + pslld xmm5, $E + mov edx, r14d + mov r12d, eax + pxor xmm4, xmm6 + ror r14d, $9 + xor r13d, r11d + xor r12d, ebx + ror r13d, $5 + psrld xmm6, $B + xor r14d, edx pxor xmm4, xmm5 - psrld xmm5, 2 + and r12d, r11d + xor r13d, r11d + pslld xmm5, $B + add ecx, dword [rsp + $14] + mov edi, edx pxor xmm4, xmm6 - pslld xmm6, 2 + xor r12d, ebx + ror r14d, $B + movdqa xmm6, xmm7 + xor edi, r8d + add ecx, r12d pxor xmm4, xmm5 + ror r13d, $6 + and r15d, edi + xor r14d, edx + psrld xmm7, $A + add ecx, r13d + xor r15d, r8d + paddd xmm1, xmm4 + ror r14d, $2 + add r10d, ecx + psrlq xmm6, $11 + add ecx, r15d + mov r13d, r10d + add r14d, ecx + pxor xmm7, xmm6 + ror r13d, $E + mov ecx, r14d + mov r12d, r11d + ror r14d, $9 + psrlq xmm6, $2 + xor r13d, r10d + xor r12d, eax + pxor xmm7, xmm6 + ror r13d, $5 + xor r14d, ecx + and r12d, r10d + pshufd xmm7, xmm7, $80 + xor r13d, r10d + add ebx, dword [rsp + $18] + mov r15d, ecx + psrldq xmm7, $8 + xor r12d, eax + ror r14d, $B + xor r15d, edx + add ebx, r12d + ror r13d, $6 + paddd xmm1, xmm7 + and edi, r15d + xor r14d, ecx + add ebx, r13d + pshufd xmm7, xmm1, $50 + xor edi, edx + ror r14d, $2 + add r9d, ebx + movdqa xmm6, xmm7 + add ebx, edi + mov r13d, r9d + psrld xmm7, $A + add r14d, ebx + ror r13d, $E + psrlq xmm6, $11 + mov ebx, r14d + mov r12d, r10d + pxor xmm7, xmm6 + ror r14d, $9 + xor r13d, r9d + xor r12d, r11d + ror r13d, $5 + xor r14d, ebx + psrlq xmm6, $2 + and r12d, r9d + xor r13d, r9d + add eax, dword [rsp + $1C] + pxor xmm7, xmm6 + mov edi, ebx + xor r12d, r11d + ror r14d, $B + pshufd xmm7, xmm7, $8 + xor edi, ecx + add eax, r12d + movdqu xmm6, oword [rbp + $20] + ror r13d, $6 + and r15d, edi + pslldq xmm7, $8 + xor r14d, ebx + add eax, r13d + xor r15d, ecx + paddd xmm1, xmm7 + ror r14d, $2 + add r8d, eax + add eax, r15d + paddd xmm6, xmm1 + mov r13d, r8d + add r14d, eax + movdqa oword [rsp + $10], xmm6 + ror r13d, $E + movdqa xmm4, xmm3 + mov eax, r14d + mov r12d, r9d + movdqa xmm7, xmm1 + ror r14d, $9 + xor r13d, r8d + xor r12d, r10d + ror r13d, $5 + xor r14d, eax + movdqa xmm8, xmm2 + psrldq xmm8, $4 + pslldq xmm4, $C + por xmm4, xmm8 + and r12d, r8d + xor r13d, r8d + movdqa xmm8, xmm0 + psrldq xmm8, $4 + pslldq xmm7, $C + por xmm7, xmm8 + add r11d, dword [rsp + $20] + mov r15d, eax + xor r12d, r10d + ror r14d, $B + movdqa xmm5, xmm4 + xor r15d, ebx + add r11d, r12d + movdqa xmm6, xmm4 + ror r13d, $6 + and edi, r15d + psrld xmm4, $3 + xor r14d, eax + add r11d, r13d + xor edi, ebx + paddd xmm2, xmm7 + ror r14d, $2 + add edx, r11d + psrld xmm6, $7 + add r11d, edi + mov r13d, edx + pshufd xmm7, xmm1, $FA + add r14d, r11d + ror r13d, $E + pslld xmm5, $E + mov r11d, r14d + mov r12d, r8d pxor xmm4, xmm6 - paddd xmm0, xmm4 - - // sigma1 phase 2: W[t..t+1] + ror r14d, $9 + xor r13d, edx + xor r12d, r9d + ror r13d, $5 + psrld xmm6, $B + xor r14d, r11d + pxor xmm4, xmm5 + and r12d, edx + xor r13d, edx + pslld xmm5, $B + add r10d, dword [rsp + $24] + mov edi, r11d + pxor xmm4, xmm6 + xor r12d, r9d + ror r14d, $B + movdqa xmm6, xmm7 + xor edi, eax + add r10d, r12d + pxor xmm4, xmm5 + ror r13d, $6 + and r15d, edi + xor r14d, r11d + psrld xmm7, $A + add r10d, r13d + xor r15d, eax + paddd xmm2, xmm4 + ror r14d, $2 + add ecx, r10d + psrlq xmm6, $11 + add r10d, r15d + mov r13d, ecx + add r14d, r10d + pxor xmm7, xmm6 + ror r13d, $E + mov r10d, r14d + mov r12d, edx + ror r14d, $9 + psrlq xmm6, $2 + xor r13d, ecx + xor r12d, r8d + pxor xmm7, xmm6 + ror r13d, $5 + xor r14d, r10d + and r12d, ecx + pshufd xmm7, xmm7, $80 + xor r13d, ecx + add r9d, dword [rsp + $28] + mov r15d, r10d + psrldq xmm7, $8 + xor r12d, r8d + ror r14d, $B + xor r15d, r11d + add r9d, r12d + ror r13d, $6 + paddd xmm2, xmm7 + and edi, r15d + xor r14d, r10d + add r9d, r13d + pshufd xmm7, xmm2, $50 + xor edi, r11d + ror r14d, $2 + add ebx, r9d + movdqa xmm6, xmm7 + add r9d, edi + mov r13d, ebx + psrld xmm7, $A + add r14d, r9d + ror r13d, $E + psrlq xmm6, $11 + mov r9d, r14d + mov r12d, ecx + pxor xmm7, xmm6 + ror r14d, $9 + xor r13d, ebx + xor r12d, edx + ror r13d, $5 + xor r14d, r9d + psrlq xmm6, $2 + and r12d, ebx + xor r13d, ebx + add r8d, dword [rsp + $2C] + pxor xmm7, xmm6 + mov edi, r9d + xor r12d, edx + ror r14d, $B + pshufd xmm7, xmm7, $8 + xor edi, r10d + add r8d, r12d + movdqu xmm6, oword [rbp + $40] + ror r13d, $6 + and r15d, edi + pslldq xmm7, $8 + xor r14d, r9d + add r8d, r13d + xor r15d, r10d + paddd xmm2, xmm7 + ror r14d, $2 + add eax, r8d + add r8d, r15d + paddd xmm6, xmm2 + mov r13d, eax + add r14d, r8d + movdqa oword [rsp + $20], xmm6 + ror r13d, $E movdqa xmm4, xmm0 - pslldq xmm4, 8 + mov r8d, r14d + mov r12d, ebx + movdqa xmm7, xmm2 + ror r14d, $9 + xor r13d, eax + xor r12d, ecx + ror r13d, $5 + xor r14d, r8d + movdqa xmm8, xmm3 + psrldq xmm8, $4 + pslldq xmm4, $C + por xmm4, xmm8 + and r12d, eax + xor r13d, eax + movdqa xmm8, xmm1 + psrldq xmm8, $4 + pslldq xmm7, $C + por xmm7, xmm8 + add edx, dword [rsp + $30] + mov r15d, r8d + xor r12d, ecx + ror r14d, $B movdqa xmm5, xmm4 + xor r15d, r9d + add edx, r12d movdqa xmm6, xmm4 - psrld xmm4, 10 - psrld xmm5, 17 - pslld xmm6, 13 - pxor xmm4, xmm5 - psrld xmm5, 2 + ror r13d, $6 + and edi, r15d + psrld xmm4, $3 + xor r14d, r8d + add edx, r13d + xor edi, r9d + paddd xmm3, xmm7 + ror r14d, $2 + add r11d, edx + psrld xmm6, $7 + add edx, edi + mov r13d, r11d + pshufd xmm7, xmm2, $FA + add r14d, edx + ror r13d, $E + pslld xmm5, $E + mov edx, r14d + mov r12d, eax pxor xmm4, xmm6 - pslld xmm6, 2 + ror r14d, $9 + xor r13d, r11d + xor r12d, ebx + ror r13d, $5 + psrld xmm6, $B + xor r14d, edx pxor xmm4, xmm5 + and r12d, r11d + xor r13d, r11d + pslld xmm5, $B + add ecx, dword [rsp + $34] + mov edi, edx pxor xmm4, xmm6 - paddd xmm0, xmm4 - - movdqu xmm4, oword [rax] - paddd xmm4, xmm0 - movdqa oword [rbp], xmm4 - - movdqa xmm4, xmm0 - movdqa xmm0, xmm1 - movdqa xmm1, xmm2 - movdqa xmm2, xmm3 - movdqa xmm3, xmm4 - - add rax, $10 - add rbp, $10 - dec ecx - jnz @sse2_256_expand_loop - - // ========== Phase 2: 64 Compression Rounds ========== - - mov eax, [r12] - mov ebx, [r12 + $04] - mov ecx, [r12 + $08] - mov edx, [r12 + $0C] - mov r8d, [r12 + $10] - mov r9d, [r12 + $14] - mov r10d, [r12 + $18] - mov r11d, [r12 + $1C] - - lea rbp, [rsp + $50] - lea r15, [rsp + $50 + $100] - -@sse2_256_round_loop: - - // Round 0: a=eax b=ebx c=ecx d=edx e=r8d f=r9d g=r10d h=r11d - mov esi, r8d - mov edi, r8d - ror esi, 6 - ror edi, 11 - xor esi, edi - ror edi, 14 - xor esi, edi - mov edi, r9d - xor edi, r10d - and edi, r8d - xor edi, r10d - add esi, r11d - add esi, edi - add esi, [rbp] - add edx, esi - mov edi, eax - mov r11d, eax - ror edi, 2 - ror r11d, 13 - xor edi, r11d - ror r11d, 9 - xor edi, r11d - add esi, edi - mov r11d, eax - and r11d, ebx - mov edi, eax - xor edi, ebx - and edi, ecx - xor r11d, edi - add r11d, esi - - // Round 1: a=r11d b=eax c=ebx d=ecx e=edx f=r8d g=r9d h=r10d - mov esi, edx - mov edi, edx - ror esi, 6 - ror edi, 11 - xor esi, edi - ror edi, 14 - xor esi, edi - mov edi, r8d - xor edi, r9d - and edi, edx - xor edi, r9d - add esi, r10d - add esi, edi - add esi, [rbp + $04] - add ecx, esi - mov edi, r11d - mov r10d, r11d - ror edi, 2 - ror r10d, 13 - xor edi, r10d - ror r10d, 9 - xor edi, r10d - add esi, edi - mov r10d, r11d - and r10d, eax - mov edi, r11d - xor edi, eax - and edi, ebx - xor r10d, edi - add r10d, esi - - // Round 2: a=r10d b=r11d c=eax d=ebx e=ecx f=edx g=r8d h=r9d - mov esi, ecx - mov edi, ecx - ror esi, 6 - ror edi, 11 - xor esi, edi - ror edi, 14 - xor esi, edi - mov edi, edx - xor edi, r8d - and edi, ecx - xor edi, r8d - add esi, r9d - add esi, edi - add esi, [rbp + $08] - add ebx, esi - mov edi, r10d - mov r9d, r10d - ror edi, 2 - ror r9d, 13 - xor edi, r9d - ror r9d, 9 - xor edi, r9d - add esi, edi - mov r9d, r10d - and r9d, r11d - mov edi, r10d - xor edi, r11d - and edi, eax - xor r9d, edi - add r9d, esi - - // Round 3: a=r9d b=r10d c=r11d d=eax e=ebx f=ecx g=edx h=r8d - mov esi, ebx - mov edi, ebx - ror esi, 6 - ror edi, 11 - xor esi, edi - ror edi, 14 - xor esi, edi - mov edi, ecx - xor edi, edx - and edi, ebx - xor edi, edx - add esi, r8d - add esi, edi - add esi, [rbp + $0C] - add eax, esi - mov edi, r9d - mov r8d, r9d - ror edi, 2 - ror r8d, 13 - xor edi, r8d - ror r8d, 9 - xor edi, r8d - add esi, edi - mov r8d, r9d - and r8d, r10d - mov edi, r9d - xor edi, r10d - and edi, r11d - xor r8d, edi - add r8d, esi - - // Round 4: a=r8d b=r9d c=r10d d=r11d e=eax f=ebx g=ecx h=edx - mov esi, eax - mov edi, eax - ror esi, 6 - ror edi, 11 - xor esi, edi - ror edi, 14 - xor esi, edi - mov edi, ebx - xor edi, ecx - and edi, eax - xor edi, ecx - add esi, edx - add esi, edi - add esi, [rbp + $10] - add r11d, esi - mov edi, r8d - mov edx, r8d - ror edi, 2 - ror edx, 13 - xor edi, edx - ror edx, 9 - xor edi, edx - add esi, edi - mov edx, r8d - and edx, r9d - mov edi, r8d - xor edi, r9d - and edi, r10d - xor edx, edi - add edx, esi - - // Round 5: a=edx b=r8d c=r9d d=r10d e=r11d f=eax g=ebx h=ecx - mov esi, r11d - mov edi, r11d - ror esi, 6 - ror edi, 11 - xor esi, edi - ror edi, 14 - xor esi, edi - mov edi, eax - xor edi, ebx - and edi, r11d - xor edi, ebx - add esi, ecx - add esi, edi - add esi, [rbp + $14] - add r10d, esi - mov edi, edx - mov ecx, edx - ror edi, 2 - ror ecx, 13 - xor edi, ecx - ror ecx, 9 - xor edi, ecx - add esi, edi - mov ecx, edx - and ecx, r8d - mov edi, edx - xor edi, r8d - and edi, r9d - xor ecx, edi - add ecx, esi - - // Round 6: a=ecx b=edx c=r8d d=r9d e=r10d f=r11d g=eax h=ebx - mov esi, r10d - mov edi, r10d - ror esi, 6 - ror edi, 11 - xor esi, edi - ror edi, 14 - xor esi, edi - mov edi, r11d - xor edi, eax - and edi, r10d - xor edi, eax - add esi, ebx - add esi, edi - add esi, [rbp + $18] - add r9d, esi - mov edi, ecx - mov ebx, ecx - ror edi, 2 - ror ebx, 13 - xor edi, ebx - ror ebx, 9 - xor edi, ebx - add esi, edi - mov ebx, ecx - and ebx, edx - mov edi, ecx - xor edi, edx - and edi, r8d - xor ebx, edi - add ebx, esi - - // Round 7: a=ebx b=ecx c=edx d=r8d e=r9d f=r10d g=r11d h=eax - mov esi, r9d - mov edi, r9d - ror esi, 6 - ror edi, 11 - xor esi, edi - ror edi, 14 - xor esi, edi - mov edi, r10d - xor edi, r11d - and edi, r9d - xor edi, r11d - add esi, eax - add esi, edi - add esi, [rbp + $1C] - add r8d, esi - mov edi, ebx - mov eax, ebx - ror edi, 2 - ror eax, 13 - xor edi, eax - ror eax, 9 - xor edi, eax - add esi, edi - mov eax, ebx - and eax, ecx - mov edi, ebx - xor edi, ecx - and edi, edx - xor eax, edi - add eax, esi - - add rbp, $20 - cmp rbp, r15 - jb @sse2_256_round_loop - - // Add round results to state - add [r12], eax - add [r12 + $04], ebx - add [r12 + $08], ecx - add [r12 + $0C], edx - add [r12 + $10], r8d - add [r12 + $14], r9d - add [r12 + $18], r10d - add [r12 + $1C], r11d - - add r13, $40 - dec r14d - jnz @sse2_256_block_loop - -@sse2_256_done: - - mov rbx, [rsp + $00] - mov rbp, [rsp + $08] - mov r12, [rsp + $20] - mov r13, [rsp + $28] - mov r14, [rsp + $30] - mov r15, [rsp + $38] - mov rdi, [rsp + $10] - mov rsi, [rsp + $18] - add rsp, 344 + xor r12d, ebx + ror r14d, $B + movdqa xmm6, xmm7 + xor edi, r8d + add ecx, r12d + pxor xmm4, xmm5 + ror r13d, $6 + and r15d, edi + xor r14d, edx + psrld xmm7, $A + add ecx, r13d + xor r15d, r8d + paddd xmm3, xmm4 + ror r14d, $2 + add r10d, ecx + psrlq xmm6, $11 + add ecx, r15d + mov r13d, r10d + add r14d, ecx + pxor xmm7, xmm6 + ror r13d, $E + mov ecx, r14d + mov r12d, r11d + ror r14d, $9 + psrlq xmm6, $2 + xor r13d, r10d + xor r12d, eax + pxor xmm7, xmm6 + ror r13d, $5 + xor r14d, ecx + and r12d, r10d + pshufd xmm7, xmm7, $80 + xor r13d, r10d + add ebx, dword [rsp + $38] + mov r15d, ecx + psrldq xmm7, $8 + xor r12d, eax + ror r14d, $B + xor r15d, edx + add ebx, r12d + ror r13d, $6 + paddd xmm3, xmm7 + and edi, r15d + xor r14d, ecx + add ebx, r13d + pshufd xmm7, xmm3, $50 + xor edi, edx + ror r14d, $2 + add r9d, ebx + movdqa xmm6, xmm7 + add ebx, edi + mov r13d, r9d + psrld xmm7, $A + add r14d, ebx + ror r13d, $E + psrlq xmm6, $11 + mov ebx, r14d + mov r12d, r10d + pxor xmm7, xmm6 + ror r14d, $9 + xor r13d, r9d + xor r12d, r11d + ror r13d, $5 + xor r14d, ebx + psrlq xmm6, $2 + and r12d, r9d + xor r13d, r9d + add eax, dword [rsp + $3C] + pxor xmm7, xmm6 + mov edi, ebx + xor r12d, r11d + ror r14d, $B + pshufd xmm7, xmm7, $8 + xor edi, ecx + add eax, r12d + movdqu xmm6, oword [rbp + $60] + ror r13d, $6 + and r15d, edi + pslldq xmm7, $8 + xor r14d, ebx + add eax, r13d + xor r15d, ecx + paddd xmm3, xmm7 + ror r14d, $2 + add r8d, eax + add eax, r15d + paddd xmm6, xmm3 + mov r13d, r8d + add r14d, eax + movdqa oword [rsp + $30], xmm6 + cmp byte [rbp + $83], $0 + jne @sched_loop + ror r13d, $E + mov eax, r14d + mov r12d, r9d + ror r14d, $9 + xor r13d, r8d + xor r12d, r10d + ror r13d, $5 + xor r14d, eax + and r12d, r8d + xor r13d, r8d + add r11d, dword [rsp] + mov r15d, eax + xor r12d, r10d + ror r14d, $B + xor r15d, ebx + add r11d, r12d + ror r13d, $6 + and edi, r15d + xor r14d, eax + add r11d, r13d + xor edi, ebx + ror r14d, $2 + add edx, r11d + add r11d, edi + mov r13d, edx + add r14d, r11d + ror r13d, $E + mov r11d, r14d + mov r12d, r8d + ror r14d, $9 + xor r13d, edx + xor r12d, r9d + ror r13d, $5 + xor r14d, r11d + and r12d, edx + xor r13d, edx + add r10d, dword [rsp + $4] + mov edi, r11d + xor r12d, r9d + ror r14d, $B + xor edi, eax + add r10d, r12d + ror r13d, $6 + and r15d, edi + xor r14d, r11d + add r10d, r13d + xor r15d, eax + ror r14d, $2 + add ecx, r10d + add r10d, r15d + mov r13d, ecx + add r14d, r10d + ror r13d, $E + mov r10d, r14d + mov r12d, edx + ror r14d, $9 + xor r13d, ecx + xor r12d, r8d + ror r13d, $5 + xor r14d, r10d + and r12d, ecx + xor r13d, ecx + add r9d, dword [rsp + $8] + mov r15d, r10d + xor r12d, r8d + ror r14d, $B + xor r15d, r11d + add r9d, r12d + ror r13d, $6 + and edi, r15d + xor r14d, r10d + add r9d, r13d + xor edi, r11d + ror r14d, $2 + add ebx, r9d + add r9d, edi + mov r13d, ebx + add r14d, r9d + ror r13d, $E + mov r9d, r14d + mov r12d, ecx + ror r14d, $9 + xor r13d, ebx + xor r12d, edx + ror r13d, $5 + xor r14d, r9d + and r12d, ebx + xor r13d, ebx + add r8d, dword [rsp + $C] + mov edi, r9d + xor r12d, edx + ror r14d, $B + xor edi, r10d + add r8d, r12d + ror r13d, $6 + and r15d, edi + xor r14d, r9d + add r8d, r13d + xor r15d, r10d + ror r14d, $2 + add eax, r8d + add r8d, r15d + mov r13d, eax + add r14d, r8d + ror r13d, $E + mov r8d, r14d + mov r12d, ebx + ror r14d, $9 + xor r13d, eax + xor r12d, ecx + ror r13d, $5 + xor r14d, r8d + and r12d, eax + xor r13d, eax + add edx, dword [rsp + $10] + mov r15d, r8d + xor r12d, ecx + ror r14d, $B + xor r15d, r9d + add edx, r12d + ror r13d, $6 + and edi, r15d + xor r14d, r8d + add edx, r13d + xor edi, r9d + ror r14d, $2 + add r11d, edx + add edx, edi + mov r13d, r11d + add r14d, edx + ror r13d, $E + mov edx, r14d + mov r12d, eax + ror r14d, $9 + xor r13d, r11d + xor r12d, ebx + ror r13d, $5 + xor r14d, edx + and r12d, r11d + xor r13d, r11d + add ecx, dword [rsp + $14] + mov edi, edx + xor r12d, ebx + ror r14d, $B + xor edi, r8d + add ecx, r12d + ror r13d, $6 + and r15d, edi + xor r14d, edx + add ecx, r13d + xor r15d, r8d + ror r14d, $2 + add r10d, ecx + add ecx, r15d + mov r13d, r10d + add r14d, ecx + ror r13d, $E + mov ecx, r14d + mov r12d, r11d + ror r14d, $9 + xor r13d, r10d + xor r12d, eax + ror r13d, $5 + xor r14d, ecx + and r12d, r10d + xor r13d, r10d + add ebx, dword [rsp + $18] + mov r15d, ecx + xor r12d, eax + ror r14d, $B + xor r15d, edx + add ebx, r12d + ror r13d, $6 + and edi, r15d + xor r14d, ecx + add ebx, r13d + xor edi, edx + ror r14d, $2 + add r9d, ebx + add ebx, edi + mov r13d, r9d + add r14d, ebx + ror r13d, $E + mov ebx, r14d + mov r12d, r10d + ror r14d, $9 + xor r13d, r9d + xor r12d, r11d + ror r13d, $5 + xor r14d, ebx + and r12d, r9d + xor r13d, r9d + add eax, dword [rsp + $1C] + mov edi, ebx + xor r12d, r11d + ror r14d, $B + xor edi, ecx + add eax, r12d + ror r13d, $6 + and r15d, edi + xor r14d, ebx + add eax, r13d + xor r15d, ecx + ror r14d, $2 + add r8d, eax + add eax, r15d + mov r13d, r8d + add r14d, eax + ror r13d, $E + mov eax, r14d + mov r12d, r9d + ror r14d, $9 + xor r13d, r8d + xor r12d, r10d + ror r13d, $5 + xor r14d, eax + and r12d, r8d + xor r13d, r8d + add r11d, dword [rsp + $20] + mov r15d, eax + xor r12d, r10d + ror r14d, $B + xor r15d, ebx + add r11d, r12d + ror r13d, $6 + and edi, r15d + xor r14d, eax + add r11d, r13d + xor edi, ebx + ror r14d, $2 + add edx, r11d + add r11d, edi + mov r13d, edx + add r14d, r11d + ror r13d, $E + mov r11d, r14d + mov r12d, r8d + ror r14d, $9 + xor r13d, edx + xor r12d, r9d + ror r13d, $5 + xor r14d, r11d + and r12d, edx + xor r13d, edx + add r10d, dword [rsp + $24] + mov edi, r11d + xor r12d, r9d + ror r14d, $B + xor edi, eax + add r10d, r12d + ror r13d, $6 + and r15d, edi + xor r14d, r11d + add r10d, r13d + xor r15d, eax + ror r14d, $2 + add ecx, r10d + add r10d, r15d + mov r13d, ecx + add r14d, r10d + ror r13d, $E + mov r10d, r14d + mov r12d, edx + ror r14d, $9 + xor r13d, ecx + xor r12d, r8d + ror r13d, $5 + xor r14d, r10d + and r12d, ecx + xor r13d, ecx + add r9d, dword [rsp + $28] + mov r15d, r10d + xor r12d, r8d + ror r14d, $B + xor r15d, r11d + add r9d, r12d + ror r13d, $6 + and edi, r15d + xor r14d, r10d + add r9d, r13d + xor edi, r11d + ror r14d, $2 + add ebx, r9d + add r9d, edi + mov r13d, ebx + add r14d, r9d + ror r13d, $E + mov r9d, r14d + mov r12d, ecx + ror r14d, $9 + xor r13d, ebx + xor r12d, edx + ror r13d, $5 + xor r14d, r9d + and r12d, ebx + xor r13d, ebx + add r8d, dword [rsp + $2C] + mov edi, r9d + xor r12d, edx + ror r14d, $B + xor edi, r10d + add r8d, r12d + ror r13d, $6 + and r15d, edi + xor r14d, r9d + add r8d, r13d + xor r15d, r10d + ror r14d, $2 + add eax, r8d + add r8d, r15d + mov r13d, eax + add r14d, r8d + ror r13d, $E + mov r8d, r14d + mov r12d, ebx + ror r14d, $9 + xor r13d, eax + xor r12d, ecx + ror r13d, $5 + xor r14d, r8d + and r12d, eax + xor r13d, eax + add edx, dword [rsp + $30] + mov r15d, r8d + xor r12d, ecx + ror r14d, $B + xor r15d, r9d + add edx, r12d + ror r13d, $6 + and edi, r15d + xor r14d, r8d + add edx, r13d + xor edi, r9d + ror r14d, $2 + add r11d, edx + add edx, edi + mov r13d, r11d + add r14d, edx + ror r13d, $E + mov edx, r14d + mov r12d, eax + ror r14d, $9 + xor r13d, r11d + xor r12d, ebx + ror r13d, $5 + xor r14d, edx + and r12d, r11d + xor r13d, r11d + add ecx, dword [rsp + $34] + mov edi, edx + xor r12d, ebx + ror r14d, $B + xor edi, r8d + add ecx, r12d + ror r13d, $6 + and r15d, edi + xor r14d, edx + add ecx, r13d + xor r15d, r8d + ror r14d, $2 + add r10d, ecx + add ecx, r15d + mov r13d, r10d + add r14d, ecx + ror r13d, $E + mov ecx, r14d + mov r12d, r11d + ror r14d, $9 + xor r13d, r10d + xor r12d, eax + ror r13d, $5 + xor r14d, ecx + and r12d, r10d + xor r13d, r10d + add ebx, dword [rsp + $38] + mov r15d, ecx + xor r12d, eax + ror r14d, $B + xor r15d, edx + add ebx, r12d + ror r13d, $6 + and edi, r15d + xor r14d, ecx + add ebx, r13d + xor edi, edx + ror r14d, $2 + add r9d, ebx + add ebx, edi + mov r13d, r9d + add r14d, ebx + ror r13d, $E + mov ebx, r14d + mov r12d, r10d + ror r14d, $9 + xor r13d, r9d + xor r12d, r11d + ror r13d, $5 + xor r14d, ebx + and r12d, r9d + xor r13d, r9d + add eax, dword [rsp + $3C] + mov edi, ebx + xor r12d, r11d + ror r14d, $B + xor edi, ecx + add eax, r12d + ror r13d, $6 + and r15d, edi + xor r14d, ebx + add eax, r13d + xor r15d, ecx + ror r14d, $2 + add r8d, eax + add eax, r15d + mov r13d, r8d + add r14d, eax + mov rdi, qword [rsp + $40] + mov eax, r14d + add eax, dword [rdi] + lea rsi, [rsi + $40] + add ebx, dword [rdi + $4] + add ecx, dword [rdi + $8] + add edx, dword [rdi + $C] + add r8d, dword [rdi + $10] + add r9d, dword [rdi + $14] + add r10d, dword [rdi + $18] + add r11d, dword [rdi + $1C] + cmp rsi, qword [rsp + $50] + mov dword [rdi], eax + mov dword [rdi + $4], ebx + mov dword [rdi + $8], ecx + mov dword [rdi + $C], edx + mov dword [rdi + $10], r8d + mov dword [rdi + $14], r9d + mov dword [rdi + $18], r10d + mov dword [rdi + $1C], r11d + jb @block_loop + mov rsi, qword [rsp + $58] + mov r15, qword [rsi - $48] + mov r14, qword [rsi - $40] + mov r13, qword [rsi - $38] + mov r12, qword [rsi - $30] + mov rdi, qword [rsi - $28] + mov rbp, qword [rsi - $18] + mov rbx, qword [rsi - $10] + mov rax, qword [rsi - $20] + lea rsp, [rsi] + mov rsi, rax {$I ..\Include\Simd\Common\SimdNonVolatileRestore_x86_64.inc} diff --git a/HashLib/src/Include/Simd/SHA256/SHA256CompressSsse3_i386.inc b/HashLib/src/Include/Simd/SHA256/SHA256CompressSsse3_i386.inc deleted file mode 100644 index 01d0b3a4..00000000 --- a/HashLib/src/Include/Simd/SHA256/SHA256CompressSsse3_i386.inc +++ /dev/null @@ -1,477 +0,0 @@ -// SHA-256 SSSE3 implementation with SIMD message schedule (IA-32). -// After SimdProc5Begin_i386 — ebx = state, esi = data, edi = numblocks, -// eax = K256 ptr (64 UInt32 round constants), ecx = BSWAP32 mask ptr (16 bytes). -// Phase 1 matches SHA256CompressSsse3_x86_64.inc (pshufb, palignr); Phase 2 same GPR rounds as SSE2 i386. -// maskptr is saved to [esp+$48] in the prologue and reloaded (into eax) each block. -// Uses xmm0–xmm7; xmm6–xmm7 saved/restored defensively (volatile on i386). -// -// Two-phase per block: -// Phase 1 (SIMD): Compute W+K[0..63] using SSSE3 message schedule, store to stack -// Phase 2 (GPR): Run 64 compression rounds reading W+K from stack -// -// Stack layout (sub esp, 376): same roles as x64; W+K via movdqu (ESP may be off 16-byte alignment). -// Scratch dwords at [esp+$4C]..[esp+$54] in the round loop only. Sigma1 uses register rotates only. - - sub esp, 376 - - movdqu oword ptr [esp], xmm6 - movdqu oword ptr [esp + $10], xmm7 - mov [esp + $20], ebx - mov [esp + $24], esi - mov [esp + $28], edi - mov [esp + $2C], eax - mov [esp + $30], ebp - mov [esp + $48], ecx - - test edi, edi - jz @ssse3_256_done - -@ssse3_256_block_loop: - - // ========== Phase 1: Message Schedule ========== - - mov ebx, [esp + $2C] - mov esi, [esp + $24] - lea ebp, [esp + $70] - - mov eax, [esp + $48] - movdqu xmm7, oword ptr [eax] - movdqu xmm0, oword ptr [esi] - pshufb xmm0, xmm7 - movdqu xmm1, oword ptr [esi + $10] - pshufb xmm1, xmm7 - movdqu xmm2, oword ptr [esi + $20] - pshufb xmm2, xmm7 - movdqu xmm3, oword ptr [esi + $30] - pshufb xmm3, xmm7 - - movdqa xmm4, xmm0 - movdqu xmm5, oword ptr [ebx] - paddd xmm4, xmm5 - movdqu oword ptr [ebp], xmm4 - - movdqa xmm4, xmm1 - movdqu xmm5, oword ptr [ebx + $10] - paddd xmm4, xmm5 - movdqu oword ptr [ebp + $10], xmm4 - - movdqa xmm4, xmm2 - movdqu xmm5, oword ptr [ebx + $20] - paddd xmm4, xmm5 - movdqu oword ptr [ebp + $20], xmm4 - - movdqa xmm4, xmm3 - movdqu xmm5, oword ptr [ebx + $30] - paddd xmm4, xmm5 - movdqu oword ptr [ebp + $30], xmm4 - - add ebx, $40 - add ebp, $40 - mov ecx, 12 - -@ssse3_256_expand_loop: - - movdqa xmm4, xmm1 - palignr xmm4, xmm0, 4 - movdqa xmm5, xmm4 - movdqa xmm6, xmm4 - psrld xmm4, 3 - psrld xmm5, 7 - pslld xmm6, 14 - pxor xmm4, xmm5 - psrld xmm5, 11 - pxor xmm4, xmm6 - pslld xmm6, 11 - pxor xmm4, xmm5 - pxor xmm4, xmm6 - - paddd xmm0, xmm4 - - movdqa xmm4, xmm3 - palignr xmm4, xmm2, 4 - paddd xmm0, xmm4 - - movdqa xmm4, xmm3 - psrldq xmm4, 8 - movdqa xmm5, xmm4 - movdqa xmm6, xmm4 - psrld xmm4, 10 - psrld xmm5, 17 - pslld xmm6, 13 - pxor xmm4, xmm5 - psrld xmm5, 2 - pxor xmm4, xmm6 - pslld xmm6, 2 - pxor xmm4, xmm5 - pxor xmm4, xmm6 - paddd xmm0, xmm4 - - movdqa xmm4, xmm0 - pslldq xmm4, 8 - movdqa xmm5, xmm4 - movdqa xmm6, xmm4 - psrld xmm4, 10 - psrld xmm5, 17 - pslld xmm6, 13 - pxor xmm4, xmm5 - psrld xmm5, 2 - pxor xmm4, xmm6 - pslld xmm6, 2 - pxor xmm4, xmm5 - pxor xmm4, xmm6 - paddd xmm0, xmm4 - - movdqu xmm4, oword ptr [ebx] - paddd xmm4, xmm0 - movdqu oword ptr [ebp], xmm4 - - movdqa xmm4, xmm0 - movdqa xmm0, xmm1 - movdqa xmm1, xmm2 - movdqa xmm2, xmm3 - movdqa xmm3, xmm4 - - add ebx, $10 - add ebp, $10 - dec ecx - jnz @ssse3_256_expand_loop - - // ========== Phase 2: 64 Compression Rounds ========== - - mov esi, [esp + $20] - mov eax, [esi] - mov ebx, [esi + $04] - mov ecx, [esi + $08] - mov edx, [esi + $0C] - mov edi, [esi + $10] - mov [esp + $34], edi - mov edi, [esi + $14] - mov [esp + $38], edi - mov edi, [esi + $18] - mov [esp + $3C], edi - mov edi, [esi + $1C] - mov [esp + $40], edi - - lea edi, [esp + $70 + $100] - mov [esp + $44], edi - lea ebp, [esp + $70] - -@ssse3_256_round_loop: - - // Round 0: a=eax b=ebx c=ecx d=edx e=dword ptr [esp + $34] f=dword ptr [esp + $38] g=dword ptr [esp + $3C] h=dword ptr [esp + $40] - mov esi, dword ptr [esp + $34] - mov edi, dword ptr [esp + $34] - ror esi, 6 - ror edi, 11 - xor esi, edi - ror edi, 14 - xor esi, edi - mov edi, dword ptr [esp + $38] - xor edi, dword ptr [esp + $3C] - and edi, dword ptr [esp + $34] - xor edi, dword ptr [esp + $3C] - add esi, dword ptr [esp + $40] - add esi, edi - add esi, dword ptr [ebp] - add edx, esi - mov dword ptr [esp + $4C], eax - mov edi, dword ptr [esp + $4C] - ror edi, 2 - mov eax, dword ptr [esp + $4C] - ror eax, 13 - xor edi, eax - mov eax, dword ptr [esp + $4C] - ror eax, 22 - xor edi, eax - add esi, edi - mov eax, dword ptr [esp + $4C] - mov dword ptr [esp + $40], eax - and dword ptr [esp + $40], ebx - mov edi, eax - xor edi, ebx - and edi, ecx - xor dword ptr [esp + $40], edi - add dword ptr [esp + $40], esi - - // Round 1: a=dword ptr [esp + $40] b=eax c=ebx d=ecx e=edx f=dword ptr [esp + $34] g=dword ptr [esp + $38] h=dword ptr [esp + $3C] - mov esi, edx - mov edi, edx - ror esi, 6 - ror edi, 11 - xor esi, edi - ror edi, 14 - xor esi, edi - mov edi, dword ptr [esp + $34] - xor edi, dword ptr [esp + $38] - and edi, edx - xor edi, dword ptr [esp + $38] - add esi, dword ptr [esp + $3C] - add esi, edi - add esi, dword ptr [ebp + $04] - add ecx, esi - mov dword ptr [esp + $50], eax - mov edi, dword ptr [esp + $40] - mov dword ptr [esp + $3C], edi - mov dword ptr [esp + $4C], edi - mov edi, dword ptr [esp + $4C] - ror edi, 2 - mov eax, dword ptr [esp + $4C] - ror eax, 13 - xor edi, eax - mov eax, dword ptr [esp + $4C] - ror eax, 22 - xor edi, eax - add esi, edi - mov eax, dword ptr [esp + $50] - mov edi, dword ptr [esp + $40] - mov dword ptr [esp + $3C], edi - and dword ptr [esp + $3C], eax - xor edi, eax - and edi, ebx - xor dword ptr [esp + $3C], edi - add dword ptr [esp + $3C], esi - - // Round 2: a=dword ptr [esp + $3C] b=dword ptr [esp + $40] c=eax d=ebx e=ecx f=edx g=dword ptr [esp + $34] h=dword ptr [esp + $38] - mov esi, ecx - mov edi, ecx - ror esi, 6 - ror edi, 11 - xor esi, edi - ror edi, 14 - xor esi, edi - mov edi, edx - xor edi, dword ptr [esp + $34] - and edi, ecx - xor edi, dword ptr [esp + $34] - add esi, dword ptr [esp + $38] - add esi, edi - add esi, dword ptr [ebp + $08] - add ebx, esi - mov dword ptr [esp + $50], ebx - mov dword ptr [esp + $54], eax - mov edi, dword ptr [esp + $3C] - mov dword ptr [esp + $38], edi - mov dword ptr [esp + $4C], edi - mov edi, dword ptr [esp + $4C] - ror edi, 2 - mov eax, dword ptr [esp + $4C] - ror eax, 13 - xor edi, eax - mov eax, dword ptr [esp + $4C] - ror eax, 22 - xor edi, eax - add esi, edi - mov eax, dword ptr [esp + $54] - mov ebx, dword ptr [esp + $50] - mov edi, dword ptr [esp + $3C] - and edi, dword ptr [esp + $40] - mov dword ptr [esp + $38], edi - mov edi, dword ptr [esp + $3C] - xor edi, dword ptr [esp + $40] - and edi, eax - xor dword ptr [esp + $38], edi - add dword ptr [esp + $38], esi - - // Round 3: a=dword ptr [esp + $38] b=dword ptr [esp + $3C] c=dword ptr [esp + $40] d=eax e=ebx f=ecx g=edx h=dword ptr [esp + $34] - mov esi, ebx - mov edi, ebx - ror esi, 6 - ror edi, 11 - xor esi, edi - ror edi, 14 - xor esi, edi - mov edi, ecx - xor edi, edx - and edi, ebx - xor edi, edx - add esi, dword ptr [esp + $34] - add esi, edi - add esi, dword ptr [ebp + $0C] - add eax, esi - mov dword ptr [esp + $50], eax - mov dword ptr [esp + $54], ebx - mov edi, dword ptr [esp + $38] - mov dword ptr [esp + $34], edi - mov dword ptr [esp + $4C], edi - mov edi, dword ptr [esp + $4C] - ror edi, 2 - mov eax, dword ptr [esp + $4C] - ror eax, 13 - xor edi, eax - mov eax, dword ptr [esp + $4C] - ror eax, 22 - xor edi, eax - add esi, edi - mov eax, dword ptr [esp + $50] - mov ebx, dword ptr [esp + $54] - mov edi, dword ptr [esp + $38] - and edi, dword ptr [esp + $3C] - mov dword ptr [esp + $34], edi - mov edi, dword ptr [esp + $38] - xor edi, dword ptr [esp + $3C] - and edi, dword ptr [esp + $40] - xor dword ptr [esp + $34], edi - add dword ptr [esp + $34], esi - - // Round 4: a=dword ptr [esp + $34] b=dword ptr [esp + $38] c=dword ptr [esp + $3C] d=dword ptr [esp + $40] e=eax f=ebx g=ecx h=edx - mov esi, eax - mov edi, eax - ror esi, 6 - ror edi, 11 - xor esi, edi - ror edi, 14 - xor esi, edi - mov edi, ebx - xor edi, ecx - and edi, eax - xor edi, ecx - add esi, edx - add esi, edi - add esi, dword ptr [ebp + $10] - add dword ptr [esp + $40], esi - mov edi, dword ptr [esp + $34] - mov edx, dword ptr [esp + $34] - ror edi, 2 - ror edx, 13 - xor edi, edx - ror edx, 9 - xor edi, edx - add esi, edi - mov edx, dword ptr [esp + $34] - and edx, dword ptr [esp + $38] - mov edi, dword ptr [esp + $34] - xor edi, dword ptr [esp + $38] - and edi, dword ptr [esp + $3C] - xor edx, edi - add edx, esi - - // Round 5: a=edx b=dword ptr [esp + $34] c=dword ptr [esp + $38] d=dword ptr [esp + $3C] e=dword ptr [esp + $40] f=eax g=ebx h=ecx - mov esi, dword ptr [esp + $40] - mov edi, dword ptr [esp + $40] - ror esi, 6 - ror edi, 11 - xor esi, edi - ror edi, 14 - xor esi, edi - mov edi, eax - xor edi, ebx - and edi, dword ptr [esp + $40] - xor edi, ebx - add esi, ecx - add esi, edi - add esi, dword ptr [ebp + $14] - add dword ptr [esp + $3C], esi - mov edi, edx - mov ecx, edx - ror edi, 2 - ror ecx, 13 - xor edi, ecx - ror ecx, 9 - xor edi, ecx - add esi, edi - mov ecx, edx - and ecx, dword ptr [esp + $34] - mov edi, edx - xor edi, dword ptr [esp + $34] - and edi, dword ptr [esp + $38] - xor ecx, edi - add ecx, esi - - // Round 6: a=ecx b=edx c=dword ptr [esp + $34] d=dword ptr [esp + $38] e=dword ptr [esp + $3C] f=dword ptr [esp + $40] g=eax h=ebx - mov esi, dword ptr [esp + $3C] - mov edi, dword ptr [esp + $3C] - ror esi, 6 - ror edi, 11 - xor esi, edi - ror edi, 14 - xor esi, edi - mov edi, dword ptr [esp + $40] - xor edi, eax - and edi, dword ptr [esp + $3C] - xor edi, eax - add esi, ebx - add esi, edi - add esi, dword ptr [ebp + $18] - add dword ptr [esp + $38], esi - mov edi, ecx - mov ebx, ecx - ror edi, 2 - ror ebx, 13 - xor edi, ebx - ror ebx, 9 - xor edi, ebx - add esi, edi - mov ebx, ecx - and ebx, edx - mov edi, ecx - xor edi, edx - and edi, dword ptr [esp + $34] - xor ebx, edi - add ebx, esi - - // Round 7: a=ebx b=ecx c=edx d=dword ptr [esp + $34] e=dword ptr [esp + $38] f=dword ptr [esp + $3C] g=dword ptr [esp + $40] h=eax - mov esi, dword ptr [esp + $38] - mov edi, dword ptr [esp + $38] - ror esi, 6 - ror edi, 11 - xor esi, edi - ror edi, 14 - xor esi, edi - mov edi, dword ptr [esp + $3C] - xor edi, dword ptr [esp + $40] - and edi, dword ptr [esp + $38] - xor edi, dword ptr [esp + $40] - add esi, eax - add esi, edi - add esi, dword ptr [ebp + $1C] - add dword ptr [esp + $34], esi - mov edi, ebx - mov eax, ebx - ror edi, 2 - ror eax, 13 - xor edi, eax - ror eax, 9 - xor edi, eax - add esi, edi - mov eax, ebx - and eax, ecx - mov edi, ebx - xor edi, ecx - and edi, edx - xor eax, edi - add eax, esi - - add ebp, $20 - cmp ebp, [esp + $44] - jb @ssse3_256_round_loop - - // Add round results to state - mov esi, [esp + $20] - add dword ptr [esi], eax - add dword ptr [esi + $04], ebx - add dword ptr [esi + $08], ecx - add dword ptr [esi + $0C], edx - mov eax, dword ptr [esp + $34] - add dword ptr [esi + $10], eax - mov eax, dword ptr [esp + $38] - add dword ptr [esi + $14], eax - mov eax, dword ptr [esp + $3C] - add dword ptr [esi + $18], eax - mov eax, dword ptr [esp + $40] - add dword ptr [esi + $1C], eax - - mov esi, [esp + $24] - add esi, $40 - mov [esp + $24], esi - dec dword ptr [esp + $28] - jnz @ssse3_256_block_loop - -@ssse3_256_done: - - mov ebp, [esp + $30] - movdqu xmm6, oword ptr [esp] - movdqu xmm7, oword ptr [esp + $10] - add esp, 376 - pop edi - pop esi - pop ebx diff --git a/HashLib/src/Include/Simd/SHA256/SHA256CompressSsse3_x86_64.inc b/HashLib/src/Include/Simd/SHA256/SHA256CompressSsse3_x86_64.inc deleted file mode 100644 index 81d22a1a..00000000 --- a/HashLib/src/Include/Simd/SHA256/SHA256CompressSsse3_x86_64.inc +++ /dev/null @@ -1,467 +0,0 @@ -// SHA-256 SSSE3 implementation with SIMD message schedule. -// Expects MS x64 ABI: rcx = state ptr, rdx = data ptr, r8d = numblocks, -// r9 = K256 ptr (64 UInt32 round constants), r10 = BSWAP32 mask ptr (16 bytes). -// Uses xmm0-xmm7, all GPR. -// -// Two-phase per block: -// Phase 1 (SIMD): Compute W+K[0..63] using SSSE3 message schedule, store to stack -// Phase 2 (GPR): Run 64 compression rounds reading W+K from stack -// -// MS x64 non-volatile saves: xmm6-xmm15 via the shared SimdNonVolatileSave/Restore -// include (no-op on SysV); rbx, rbp, rdi, rsi, r12-r15 in the local frame. -// -// Stack layout (sub rsp, 344): -// [rsp + 0.. 7]: rbx save -// [rsp + 8.. 15]: rbp save -// [rsp + 16.. 23]: rdi save -// [rsp + 24.. 31]: rsi save -// [rsp + 32.. 39]: r12 save -// [rsp + 40.. 47]: r13 save -// [rsp + 48.. 55]: r14 save -// [rsp + 56.. 63]: r15 save -// [rsp + 64.. 71]: K256 ptr save -// [rsp + 72.. 79]: BSWAP mask ptr save -// [rsp + 80..335]: W+K buffer (256 bytes) - - {$I ..\Include\Simd\Common\SimdNonVolatileSave_x86_64.inc} - - sub rsp, 344 - - mov [rsp + $10], rdi - mov [rsp + $18], rsi - mov [rsp + $00], rbx - mov [rsp + $08], rbp - mov [rsp + $20], r12 - mov [rsp + $28], r13 - mov [rsp + $30], r14 - mov [rsp + $38], r15 - - mov r12, rcx - mov r13, rdx - mov r14d, r8d - mov [rsp + $40], r9 - mov [rsp + $48], r10 - - test r14d, r14d - jz @ssse3_done - -@ssse3_block_loop: - - // ========== Phase 1: Message Schedule ========== - - mov rax, [rsp + $48] - movdqu xmm7, oword [rax] - mov rax, [rsp + $40] - - movdqu xmm0, oword [r13] - pshufb xmm0, xmm7 - movdqu xmm1, oword [r13 + $10] - pshufb xmm1, xmm7 - movdqu xmm2, oword [r13 + $20] - pshufb xmm2, xmm7 - movdqu xmm3, oword [r13 + $30] - pshufb xmm3, xmm7 - - lea rbp, [rsp + $50] - - movdqa xmm4, xmm0 - movdqu xmm5, oword [rax] - paddd xmm4, xmm5 - movdqa oword [rbp], xmm4 - - movdqa xmm4, xmm1 - movdqu xmm5, oword [rax + $10] - paddd xmm4, xmm5 - movdqa oword [rbp + $10], xmm4 - - movdqa xmm4, xmm2 - movdqu xmm5, oword [rax + $20] - paddd xmm4, xmm5 - movdqa oword [rbp + $20], xmm4 - - movdqa xmm4, xmm3 - movdqu xmm5, oword [rax + $30] - paddd xmm4, xmm5 - movdqa oword [rbp + $30], xmm4 - - add rax, $40 - add rbp, $40 - mov ecx, 12 - -@ssse3_expand_loop: - - // sigma0(W[t-15..t-12]) - movdqa xmm4, xmm1 - palignr xmm4, xmm0, 4 - movdqa xmm5, xmm4 - movdqa xmm6, xmm4 - psrld xmm4, 3 - psrld xmm5, 7 - pslld xmm6, 14 - pxor xmm4, xmm5 - psrld xmm5, 11 - pxor xmm4, xmm6 - pslld xmm6, 11 - pxor xmm4, xmm5 - pxor xmm4, xmm6 - - paddd xmm0, xmm4 - - // W[t-7..t-4] - movdqa xmm4, xmm3 - palignr xmm4, xmm2, 4 - paddd xmm0, xmm4 - - // sigma1 phase 1: W[t-2..t-1] - movdqa xmm4, xmm3 - psrldq xmm4, 8 - movdqa xmm5, xmm4 - movdqa xmm6, xmm4 - psrld xmm4, 10 - psrld xmm5, 17 - pslld xmm6, 13 - pxor xmm4, xmm5 - psrld xmm5, 2 - pxor xmm4, xmm6 - pslld xmm6, 2 - pxor xmm4, xmm5 - pxor xmm4, xmm6 - paddd xmm0, xmm4 - - // sigma1 phase 2: W[t..t+1] - movdqa xmm4, xmm0 - pslldq xmm4, 8 - movdqa xmm5, xmm4 - movdqa xmm6, xmm4 - psrld xmm4, 10 - psrld xmm5, 17 - pslld xmm6, 13 - pxor xmm4, xmm5 - psrld xmm5, 2 - pxor xmm4, xmm6 - pslld xmm6, 2 - pxor xmm4, xmm5 - pxor xmm4, xmm6 - paddd xmm0, xmm4 - - movdqu xmm4, oword [rax] - paddd xmm4, xmm0 - movdqa oword [rbp], xmm4 - - // Rotate message window: old X0 replaced, shift X1->X0, X2->X1, X3->X2, new->X3 - movdqa xmm4, xmm0 - movdqa xmm0, xmm1 - movdqa xmm1, xmm2 - movdqa xmm2, xmm3 - movdqa xmm3, xmm4 - - add rax, $10 - add rbp, $10 - dec ecx - jnz @ssse3_expand_loop - - // ========== Phase 2: 64 Compression Rounds ========== - - mov eax, [r12] - mov ebx, [r12 + $04] - mov ecx, [r12 + $08] - mov edx, [r12 + $0C] - mov r8d, [r12 + $10] - mov r9d, [r12 + $14] - mov r10d, [r12 + $18] - mov r11d, [r12 + $1C] - - lea rbp, [rsp + $50] - lea r15, [rsp + $50 + $100] - -@ssse3_round_loop: - - // Round 0: a=eax b=ebx c=ecx d=edx e=r8d f=r9d g=r10d h=r11d - mov esi, r8d - mov edi, r8d - ror esi, 6 - ror edi, 11 - xor esi, edi - ror edi, 14 - xor esi, edi - mov edi, r9d - xor edi, r10d - and edi, r8d - xor edi, r10d - add esi, r11d - add esi, edi - add esi, [rbp] - add edx, esi - mov edi, eax - mov r11d, eax - ror edi, 2 - ror r11d, 13 - xor edi, r11d - ror r11d, 9 - xor edi, r11d - add esi, edi - mov r11d, eax - and r11d, ebx - mov edi, eax - xor edi, ebx - and edi, ecx - xor r11d, edi - add r11d, esi - - // Round 1: a=r11d b=eax c=ebx d=ecx e=edx f=r8d g=r9d h=r10d - mov esi, edx - mov edi, edx - ror esi, 6 - ror edi, 11 - xor esi, edi - ror edi, 14 - xor esi, edi - mov edi, r8d - xor edi, r9d - and edi, edx - xor edi, r9d - add esi, r10d - add esi, edi - add esi, [rbp + $04] - add ecx, esi - mov edi, r11d - mov r10d, r11d - ror edi, 2 - ror r10d, 13 - xor edi, r10d - ror r10d, 9 - xor edi, r10d - add esi, edi - mov r10d, r11d - and r10d, eax - mov edi, r11d - xor edi, eax - and edi, ebx - xor r10d, edi - add r10d, esi - - // Round 2: a=r10d b=r11d c=eax d=ebx e=ecx f=edx g=r8d h=r9d - mov esi, ecx - mov edi, ecx - ror esi, 6 - ror edi, 11 - xor esi, edi - ror edi, 14 - xor esi, edi - mov edi, edx - xor edi, r8d - and edi, ecx - xor edi, r8d - add esi, r9d - add esi, edi - add esi, [rbp + $08] - add ebx, esi - mov edi, r10d - mov r9d, r10d - ror edi, 2 - ror r9d, 13 - xor edi, r9d - ror r9d, 9 - xor edi, r9d - add esi, edi - mov r9d, r10d - and r9d, r11d - mov edi, r10d - xor edi, r11d - and edi, eax - xor r9d, edi - add r9d, esi - - // Round 3: a=r9d b=r10d c=r11d d=eax e=ebx f=ecx g=edx h=r8d - mov esi, ebx - mov edi, ebx - ror esi, 6 - ror edi, 11 - xor esi, edi - ror edi, 14 - xor esi, edi - mov edi, ecx - xor edi, edx - and edi, ebx - xor edi, edx - add esi, r8d - add esi, edi - add esi, [rbp + $0C] - add eax, esi - mov edi, r9d - mov r8d, r9d - ror edi, 2 - ror r8d, 13 - xor edi, r8d - ror r8d, 9 - xor edi, r8d - add esi, edi - mov r8d, r9d - and r8d, r10d - mov edi, r9d - xor edi, r10d - and edi, r11d - xor r8d, edi - add r8d, esi - - // Round 4: a=r8d b=r9d c=r10d d=r11d e=eax f=ebx g=ecx h=edx - mov esi, eax - mov edi, eax - ror esi, 6 - ror edi, 11 - xor esi, edi - ror edi, 14 - xor esi, edi - mov edi, ebx - xor edi, ecx - and edi, eax - xor edi, ecx - add esi, edx - add esi, edi - add esi, [rbp + $10] - add r11d, esi - mov edi, r8d - mov edx, r8d - ror edi, 2 - ror edx, 13 - xor edi, edx - ror edx, 9 - xor edi, edx - add esi, edi - mov edx, r8d - and edx, r9d - mov edi, r8d - xor edi, r9d - and edi, r10d - xor edx, edi - add edx, esi - - // Round 5: a=edx b=r8d c=r9d d=r10d e=r11d f=eax g=ebx h=ecx - mov esi, r11d - mov edi, r11d - ror esi, 6 - ror edi, 11 - xor esi, edi - ror edi, 14 - xor esi, edi - mov edi, eax - xor edi, ebx - and edi, r11d - xor edi, ebx - add esi, ecx - add esi, edi - add esi, [rbp + $14] - add r10d, esi - mov edi, edx - mov ecx, edx - ror edi, 2 - ror ecx, 13 - xor edi, ecx - ror ecx, 9 - xor edi, ecx - add esi, edi - mov ecx, edx - and ecx, r8d - mov edi, edx - xor edi, r8d - and edi, r9d - xor ecx, edi - add ecx, esi - - // Round 6: a=ecx b=edx c=r8d d=r9d e=r10d f=r11d g=eax h=ebx - mov esi, r10d - mov edi, r10d - ror esi, 6 - ror edi, 11 - xor esi, edi - ror edi, 14 - xor esi, edi - mov edi, r11d - xor edi, eax - and edi, r10d - xor edi, eax - add esi, ebx - add esi, edi - add esi, [rbp + $18] - add r9d, esi - mov edi, ecx - mov ebx, ecx - ror edi, 2 - ror ebx, 13 - xor edi, ebx - ror ebx, 9 - xor edi, ebx - add esi, edi - mov ebx, ecx - and ebx, edx - mov edi, ecx - xor edi, edx - and edi, r8d - xor ebx, edi - add ebx, esi - - // Round 7: a=ebx b=ecx c=edx d=r8d e=r9d f=r10d g=r11d h=eax - mov esi, r9d - mov edi, r9d - ror esi, 6 - ror edi, 11 - xor esi, edi - ror edi, 14 - xor esi, edi - mov edi, r10d - xor edi, r11d - and edi, r9d - xor edi, r11d - add esi, eax - add esi, edi - add esi, [rbp + $1C] - add r8d, esi - mov edi, ebx - mov eax, ebx - ror edi, 2 - ror eax, 13 - xor edi, eax - ror eax, 9 - xor edi, eax - add esi, edi - mov eax, ebx - and eax, ecx - mov edi, ebx - xor edi, ecx - and edi, edx - xor eax, edi - add eax, esi - - // After round 7: a=eax b=ebx c=ecx d=edx e=r8d f=r9d g=r10d h=r11d - - add rbp, $20 - cmp rbp, r15 - jb @ssse3_round_loop - - // Add round results to state - add [r12], eax - add [r12 + $04], ebx - add [r12 + $08], ecx - add [r12 + $0C], edx - add [r12 + $10], r8d - add [r12 + $14], r9d - add [r12 + $18], r10d - add [r12 + $1C], r11d - - add r13, $40 - dec r14d - jnz @ssse3_block_loop - -@ssse3_done: - - mov rbx, [rsp + $00] - mov rbp, [rsp + $08] - mov r12, [rsp + $20] - mov r13, [rsp + $28] - mov r14, [rsp + $30] - mov r15, [rsp + $38] - mov rdi, [rsp + $10] - mov rsi, [rsp + $18] - add rsp, 344 - - {$I ..\Include\Simd\Common\SimdNonVolatileRestore_x86_64.inc} diff --git a/HashLib/src/Include/Simd/SHA512/SHA512CompressSse2_x86_64.inc b/HashLib/src/Include/Simd/SHA512/SHA512CompressSse2_x86_64.inc index 19c8b034..62a46c15 100644 --- a/HashLib/src/Include/Simd/SHA512/SHA512CompressSse2_x86_64.inc +++ b/HashLib/src/Include/Simd/SHA512/SHA512CompressSse2_x86_64.inc @@ -91,7 +91,8 @@ psllw xmm12, $8 por xmm5, xmm12 movdqa xmm8, xmm0 - paddq xmm8, oword [rbp - $80] + movdqu xmm13, oword [rbp - $80] + paddq xmm8, xmm13 pshuflw xmm6, xmm6, $1B pshufhw xmm6, xmm6, $1B movdqa xmm12, xmm6 @@ -99,7 +100,8 @@ psllw xmm12, $8 por xmm6, xmm12 movdqa xmm9, xmm1 - paddq xmm9, oword [rbp - $60] + movdqu xmm13, oword [rbp - $60] + paddq xmm9, xmm13 pshuflw xmm7, xmm7, $1B pshufhw xmm7, xmm7, $1B movdqa xmm12, xmm7 @@ -107,21 +109,27 @@ psllw xmm12, $8 por xmm7, xmm12 movdqa xmm10, xmm2 - paddq xmm10, oword [rbp - $40] + movdqu xmm13, oword [rbp - $40] + paddq xmm10, xmm13 movdqa xmm11, xmm3 - paddq xmm11, oword [rbp - $20] + movdqu xmm13, oword [rbp - $20] + paddq xmm11, xmm13 movdqa oword [rsp], xmm8 movdqa xmm8, xmm4 - paddq xmm8, oword [rbp + $0] + movdqu xmm13, oword [rbp + $0] + paddq xmm8, xmm13 movdqa oword [rsp + $10], xmm9 movdqa xmm9, xmm5 - paddq xmm9, oword [rbp + $20] + movdqu xmm13, oword [rbp + $20] + paddq xmm9, xmm13 movdqa oword [rsp + $20], xmm10 movdqa xmm10, xmm6 - paddq xmm10, oword [rbp + $40] + movdqu xmm13, oword [rbp + $40] + paddq xmm10, xmm13 movdqa oword [rsp + $30], xmm11 movdqa xmm11, xmm7 - paddq xmm11, oword [rbp + $60] + movdqu xmm13, oword [rbp + $60] + paddq xmm11, xmm13 movdqa oword [rsp + $40], xmm8 mov r14, rax movdqa oword [rsp + $50], xmm9 @@ -213,7 +221,8 @@ xor r14, r11 add r10, r13 movdqa xmm10, xmm0 - paddq xmm10, oword [rbp - $80] + movdqu xmm13, oword [rbp - $80] + paddq xmm10, xmm13 xor r15, rax shrd r14, r14, $1C add rcx, r10 @@ -300,7 +309,8 @@ xor r14, r9 add r8, r13 movdqa xmm10, xmm1 - paddq xmm10, oword [rbp - $60] + movdqu xmm13, oword [rbp - $60] + paddq xmm10, xmm13 xor r15, r10 shrd r14, r14, $1C add rax, r8 @@ -387,7 +397,8 @@ xor r14, rdx add rcx, r13 movdqa xmm10, xmm2 - paddq xmm10, oword [rbp - $40] + movdqu xmm13, oword [rbp - $40] + paddq xmm10, xmm13 xor r15, r8 shrd r14, r14, $1C add r10, rcx @@ -474,7 +485,8 @@ xor r14, rbx add rax, r13 movdqa xmm10, xmm3 - paddq xmm10, oword [rbp - $20] + movdqu xmm13, oword [rbp - $20] + paddq xmm10, xmm13 xor r15, rcx shrd r14, r14, $1C add r8, rax @@ -561,7 +573,8 @@ xor r14, r11 add r10, r13 movdqa xmm10, xmm4 - paddq xmm10, oword [rbp + $0] + movdqu xmm13, oword [rbp + $0] + paddq xmm10, xmm13 xor r15, rax shrd r14, r14, $1C add rcx, r10 @@ -648,7 +661,8 @@ xor r14, r9 add r8, r13 movdqa xmm10, xmm5 - paddq xmm10, oword [rbp + $20] + movdqu xmm13, oword [rbp + $20] + paddq xmm10, xmm13 xor r15, r10 shrd r14, r14, $1C add rax, r8 @@ -735,7 +749,8 @@ xor r14, rdx add rcx, r13 movdqa xmm10, xmm6 - paddq xmm10, oword [rbp + $40] + movdqu xmm13, oword [rbp + $40] + paddq xmm10, xmm13 xor r15, r8 shrd r14, r14, $1C add r10, rcx @@ -822,7 +837,8 @@ xor r14, rbx add rax, r13 movdqa xmm10, xmm7 - paddq xmm10, oword [rbp + $60] + movdqu xmm13, oword [rbp + $60] + paddq xmm10, xmm13 xor r15, rcx shrd r14, r14, $1C add r8, rax From 740be3dd743820a319deaadc76ceec6da2197c26 Mon Sep 17 00:00:00 2001 From: Ugochukwu Mmaduekwe Date: Tue, 7 Jul 2026 06:04:32 +0100 Subject: [PATCH 4/6] Optimize SHA-1 x86 SIMD kernels (AVX2 2-block + SIMD-schedule SSE2) eplace the two-phase SHA-1 kernels with OpenSSL/CRYPTOGAMS interleaved SIMD-schedule designs, mirroring the SHA-256/SHA-512 work. x86_64: - AVX2: port the two-block path from sha1-x86_64.pl (two message blocks scheduled together in 256-bit lanes; the 80 rounds interleaved with the schedule). AVX2/BMI (rorx/andn/shlx) ops are db-encoded for assembler compatibility. - SSE2: port OpenSSL's SSSE3 kernel with its one SSSE3-only op emulated in SSE2 (pshufb byte-swap -> psrlw/psllw/por + pshuflw/pshufhw). Remove the SSSE3 tier. i386: - SSE2: port sha1-586's SSSE3 kernel with the same emulation, K strides doubled so it shares K_SHA1_Doubled. Remove the SSSE3 tier. Add K_SHA1_Doubled: each round constant replicated across a 128-bit lane and stored twice, so one table feeds both the 256-bit AVX2 read and the 128-bit SSE2 reads at a 32-byte stride; the AVX2 byte-swap/reverse masks are appended. --- HashLib/src/Crypto/HlpSHA1Dispatch.pas | 78 +- .../Simd/SHA1/SHA1CompressAvx2_x86_64.inc | 2118 +++++++++++++---- .../Simd/SHA1/SHA1CompressSse2_i386.inc | 1698 +++++++++---- .../Simd/SHA1/SHA1CompressSse2_x86_64.inc | 1670 +++++++++---- .../Simd/SHA1/SHA1CompressSsse3_i386.inc | 450 ---- .../Simd/SHA1/SHA1CompressSsse3_x86_64.inc | 465 ---- .../Simd/SHA256/SHA256CompressSse2_x86_64.inc | 8 +- 7 files changed, 4180 insertions(+), 2307 deletions(-) delete mode 100644 HashLib/src/Include/Simd/SHA1/SHA1CompressSsse3_i386.inc delete mode 100644 HashLib/src/Include/Simd/SHA1/SHA1CompressSsse3_x86_64.inc diff --git a/HashLib/src/Crypto/HlpSHA1Dispatch.pas b/HashLib/src/Crypto/HlpSHA1Dispatch.pas index 8951650e..1d332efe 100644 --- a/HashLib/src/Crypto/HlpSHA1Dispatch.pas +++ b/HashLib/src/Crypto/HlpSHA1Dispatch.pas @@ -27,6 +27,28 @@ interface BSWAP32_MASK: array [0 .. 3] of UInt32 = ( $00010203, $04050607, $08090A0B, $0C0D0E0F ); + + // Doubled SHA-1 round constants plus the AVX2 byte-swap masks, shared by the + // AVX2 and SSE2 SIMD-schedule SHA-1 kernels. Each round constant fills a 128-bit + // lane (its four dwords) and is stored twice so one table feeds both the 256-bit + // AVX2 read and the 128-bit SSE2 reads (both read at a 32-byte stride, skipping + // the duplicate halves). Only the AVX2 kernel uses the appended masks: the + // byte-swap mask (BSWAP32 pattern, twice) then a whole-vector reverse mask; the + // SSE2 kernel computes its byte-swap and needs no mask. Read unaligned, so no + // special alignment is required. + K_SHA1_Doubled: array [0 .. 43] of UInt32 = ( + $5A827999, $5A827999, $5A827999, $5A827999, + $5A827999, $5A827999, $5A827999, $5A827999, + $6ED9EBA1, $6ED9EBA1, $6ED9EBA1, $6ED9EBA1, + $6ED9EBA1, $6ED9EBA1, $6ED9EBA1, $6ED9EBA1, + $8F1BBCDC, $8F1BBCDC, $8F1BBCDC, $8F1BBCDC, + $8F1BBCDC, $8F1BBCDC, $8F1BBCDC, $8F1BBCDC, + $CA62C1D6, $CA62C1D6, $CA62C1D6, $CA62C1D6, + $CA62C1D6, $CA62C1D6, $CA62C1D6, $CA62C1D6, + $00010203, $04050607, $08090A0B, $0C0D0E0F, + $00010203, $04050607, $08090A0B, $0C0D0E0F, + $0C0D0E0F, $08090A0B, $04050607, $00010203 + ); {$ENDIF HASHLIB_X86_SIMD} implementation @@ -112,27 +134,22 @@ procedure SHA1_Compress_Scalar(AState, AData: Pointer; ANumBlocks: UInt32); // ============================================================================= // SIMD implementations // -// i386: SSE2, SSSE3 -// x86_64: ShaNi, AVX2, SSSE3, SSE2 +// i386: SSE2 +// x86_64: ShaNi, AVX2, SSE2 // aarch64: SHA1 Crypto Extensions // ============================================================================= {$IFDEF HASHLIB_I386_ASM} -procedure SHA1_Compress_Sse2(AState, AData: Pointer; ANumBlocks: UInt32); - {$I ..\Include\Simd\Common\SimdProc3Begin_i386.inc} +procedure SHA1_Compress_Sse2(AState, AData: Pointer; ANumBlocks: UInt32; + AConstants: Pointer); + {$I ..\Include\Simd\Common\SimdProc4Begin_i386.inc} {$I ..\Include\Simd\SHA1\SHA1CompressSse2_i386.inc} end; -procedure SHA1_Compress_Ssse3(AState, AData: Pointer; ANumBlocks: UInt32; - AConstants, AMask: Pointer); - {$I ..\Include\Simd\Common\SimdProc5Begin_i386.inc} - {$I ..\Include\Simd\SHA1\SHA1CompressSsse3_i386.inc} -end; - -procedure SHA1_Compress_Ssse3_Wrap(AState, AData: Pointer; ANumBlocks: UInt32); +procedure SHA1_Compress_Sse2_Wrap(AState, AData: Pointer; ANumBlocks: UInt32); begin - SHA1_Compress_Ssse3(AState, AData, ANumBlocks, @K_SHA1, @BSWAP32_MASK); + SHA1_Compress_Sse2(AState, AData, ANumBlocks, @K_SHA1_Doubled); end; {$ENDIF HASHLIB_I386_ASM} @@ -150,31 +167,26 @@ procedure SHA1_Compress_ShaNi_Wrap(AState, AData: Pointer; ANumBlocks: UInt32); SHA1_Compress_ShaNi(AState, AData, ANumBlocks, @K_SHA1, @BSWAP32_MASK); end; -procedure SHA1_Compress_Sse2(AState, AData: Pointer; ANumBlocks: UInt32); - {$I ..\Include\Simd\Common\SimdProc3Begin_x86_64.inc} +procedure SHA1_Compress_Sse2(AState, AData: Pointer; ANumBlocks: UInt32; + AConstants: Pointer); + {$I ..\Include\Simd\Common\SimdProc4Begin_x86_64.inc} {$I ..\Include\Simd\SHA1\SHA1CompressSse2_x86_64.inc} end; -procedure SHA1_Compress_Ssse3(AState, AData: Pointer; ANumBlocks: UInt32; - AConstants, AMask: Pointer); - {$I ..\Include\Simd\Common\SimdProc5Begin_x86_64.inc} - {$I ..\Include\Simd\SHA1\SHA1CompressSsse3_x86_64.inc} -end; - -procedure SHA1_Compress_Ssse3_Wrap(AState, AData: Pointer; ANumBlocks: UInt32); +procedure SHA1_Compress_Sse2_Wrap(AState, AData: Pointer; ANumBlocks: UInt32); begin - SHA1_Compress_Ssse3(AState, AData, ANumBlocks, @K_SHA1, @BSWAP32_MASK); + SHA1_Compress_Sse2(AState, AData, ANumBlocks, @K_SHA1_Doubled); end; procedure SHA1_Compress_Avx2(AState, AData: Pointer; ANumBlocks: UInt32; - AConstants, AMask: Pointer); - {$I ..\Include\Simd\Common\SimdProc5Begin_x86_64.inc} + AConstants: Pointer); + {$I ..\Include\Simd\Common\SimdProc4Begin_x86_64.inc} {$I ..\Include\Simd\SHA1\SHA1CompressAvx2_x86_64.inc} end; procedure SHA1_Compress_Avx2_Wrap(AState, AData: Pointer; ANumBlocks: UInt32); begin - SHA1_Compress_Avx2(AState, AData, ANumBlocks, @K_SHA1, @BSWAP32_MASK); + SHA1_Compress_Avx2(AState, AData, ANumBlocks, @K_SHA1_Doubled); end; {$ENDIF HASHLIB_X86_64_ASM} @@ -202,14 +214,10 @@ procedure InitDispatch(); begin SHA1_Compress := @SHA1_Compress_Scalar; {$IFDEF HASHLIB_I386_ASM} - case TCpuFeatures.X86.SelectSlot([TX86SimdLevel.SSSE3, TX86SimdLevel.SSE2]) of - TX86SimdLevel.SSSE3: - begin - SHA1_Compress := @SHA1_Compress_Ssse3_Wrap; - end; + case TCpuFeatures.X86.SelectSlot([TX86SimdLevel.SSE2]) of TX86SimdLevel.SSE2: begin - SHA1_Compress := @SHA1_Compress_Sse2; + SHA1_Compress := @SHA1_Compress_Sse2_Wrap; end; end; {$ENDIF} @@ -219,18 +227,14 @@ procedure InitDispatch(); SHA1_Compress := @SHA1_Compress_ShaNi_Wrap; Exit; end; - case TCpuFeatures.X86.SelectSlot([TX86SimdLevel.AVX2, TX86SimdLevel.SSSE3, TX86SimdLevel.SSE2]) of + case TCpuFeatures.X86.SelectSlot([TX86SimdLevel.AVX2, TX86SimdLevel.SSE2]) of TX86SimdLevel.AVX2: begin SHA1_Compress := @SHA1_Compress_Avx2_Wrap; end; - TX86SimdLevel.SSSE3: - begin - SHA1_Compress := @SHA1_Compress_Ssse3_Wrap; - end; TX86SimdLevel.SSE2: begin - SHA1_Compress := @SHA1_Compress_Sse2; + SHA1_Compress := @SHA1_Compress_Sse2_Wrap; end; end; {$ENDIF} diff --git a/HashLib/src/Include/Simd/SHA1/SHA1CompressAvx2_x86_64.inc b/HashLib/src/Include/Simd/SHA1/SHA1CompressAvx2_x86_64.inc index 9595bf58..e31dab39 100644 --- a/HashLib/src/Include/Simd/SHA1/SHA1CompressAvx2_x86_64.inc +++ b/HashLib/src/Include/Simd/SHA1/SHA1CompressAvx2_x86_64.inc @@ -1,448 +1,1682 @@ -// SHA-1 AVX2 (VEX-128) implementation with SIMD message schedule. -// Inspired by OpenSSL sha1-x86_64.pl by Andy Polyakov (CRYPTOGAMS). -// Same algorithm as SSSE3 but using VEX-encoded instructions for the byte-swap phase, -// avoiding SSE/AVX transition penalties on Sandy Bridge/Ivy Bridge. -// AVX/AVX2 instructions are db-encoded for broad assembler compatibility. -// Expects MS x64 ABI: rcx = state ptr, rdx = data ptr, r8d = numblocks, -// r9 = K_SHA1 ptr (K_00_19 at 0, K_20_39 at 16, K_40_59 at 32, K_60_79 at 48), -// r10 = BSWAP32 mask ptr (16 bytes). +// SHA-1 AVX2 two-block implementation (VEX-256), ported from OpenSSL's +// sha1-x86_64.pl (CRYPTOGAMS). Two message blocks are scheduled together in +// 256-bit lanes and the 80 rounds are interleaved with the SIMD schedule, so the +// vector and integer units run in parallel. AVX2 and BMI (rorx/andn/shlx) +// instructions are db-encoded for broad assembler compatibility (every AVX2 CPU +// also provides BMI). +// Expects MS x64 ABI (after SimdProc4Begin): rcx = state ptr, rdx = data ptr, +// r8d = numblocks, r9 = K_SHA1_Doubled ptr (the four SHA-1 round constants each +// replicated across 256 bits, then the byte-swap mask and a reverse mask; see +// K_SHA1_Doubled). The masks are read unaligned, so the const needs no alignment. // -// Two phases per block: -// Phase 1 (SIMD): VEX byte-swap W[0..15] via vpshufb, then expand W[16..79] -// using SIMD message schedule (ROL1 for W[16..31], ROL2 for W[32..79]). -// Phase 2 (GPR): 80 compression rounds (identical to SSSE3) -// -// Stack layout (sub rsp, 440): same as SSSE3 version +// MS x64 non-volatile saves: xmm6-xmm15 via the shared SimdNonVolatileSave/Restore +// include (no-op on SysV); rbx, rbp, rdi, rsi, r12-r14 in the local frame; r11 +// holds the caller rsp across the kernel for the unwind. {$I ..\Include\Simd\Common\SimdNonVolatileSave_x86_64.inc} - sub rsp, 408 - - mov [rsp + $10], rdi - mov [rsp + $18], rsi - mov [rsp + $00], rbx - mov [rsp + $08], rbp - mov [rsp + $20], r12 - mov [rsp + $28], r13 - mov [rsp + $30], r14 - mov [rsp + $38], r15 - - mov r12, rcx - mov r13, rdx - mov r14d, r8d - mov [rsp + $40], r9 - mov [rsp + $48], r10 - - test r14d, r14d - jz @avx2_sha1_done - -@avx2_sha1_block_loop: - - // ========== Phase 1: SIMD message schedule ========== - - mov rax, [rsp + $48] - db $C5, $FA, $6F, $38 // vmovdqu xmm7, oword [rax] - mov rax, [rsp + $40] - - lea r15, [rsp + $50] - - db $C4, $C1, $7A, $6F, $45, $00 // vmovdqu xmm0, oword [r13] - db $C4, $E2, $79, $00, $C7 // vpshufb xmm0, xmm0, xmm7 - db $C4, $C1, $79, $7F, $07 // vmovdqa oword [r15], xmm0 - - db $C4, $C1, $7A, $6F, $4D, $10 // vmovdqu xmm1, oword [r13 + $10] - db $C4, $E2, $71, $00, $CF // vpshufb xmm1, xmm1, xmm7 - db $C4, $C1, $79, $7F, $4F, $10 // vmovdqa oword [r15 + $10], xmm1 - - db $C4, $C1, $7A, $6F, $55, $20 // vmovdqu xmm2, oword [r13 + $20] - db $C4, $E2, $69, $00, $D7 // vpshufb xmm2, xmm2, xmm7 - db $C4, $C1, $79, $7F, $57, $20 // vmovdqa oword [r15 + $20], xmm2 - - db $C4, $C1, $7A, $6F, $5D, $30 // vmovdqu xmm3, oword [r13 + $30] - db $C4, $E2, $61, $00, $DF // vpshufb xmm3, xmm3, xmm7 - db $C4, $C1, $79, $7F, $5F, $30 // vmovdqa oword [r15 + $30], xmm3 - - // --- W[16..31]: ROL1 formula with cross-lane fix --- - - lea rbp, [r15 + $40] - lea r10, [r15 + $80] - -@avx2_sha1_expand_16_31: - movdqa xmm0, oword [rbp - $40] - movdqa xmm1, oword [rbp - $30] - movdqa xmm2, oword [rbp - $20] - movdqa xmm3, oword [rbp - $10] - - pshufd xmm4, xmm0, $EE - punpcklqdq xmm4, xmm1 - - movdqa xmm5, xmm3 - psrldq xmm5, 4 - - pxor xmm4, xmm0 - pxor xmm5, xmm2 - pxor xmm4, xmm5 - - movdqa xmm6, xmm4 - movdqa xmm5, xmm4 - pslldq xmm6, 12 - paddd xmm4, xmm4 - psrld xmm5, 31 - por xmm4, xmm5 - - movdqa xmm5, xmm6 - psrld xmm6, 30 - pslld xmm5, 2 - pxor xmm4, xmm6 - pxor xmm4, xmm5 - - movdqa oword [rbp], xmm4 - add rbp, $10 - cmp rbp, r10 - jb @avx2_sha1_expand_16_31 - - // --- W[32..79]: ROL2 expanded recurrence --- - - lea r10, [r15 + $140] - -@avx2_sha1_expand_32_79: - movdqa xmm0, oword [rbp - $80] - movdqa xmm1, oword [rbp - $40] - movdqa xmm2, oword [rbp - $20] - movdqa xmm3, oword [rbp - $10] - movdqa xmm4, oword [rbp - $70] - - pxor xmm0, xmm1 - - pshufd xmm5, xmm2, $EE - punpcklqdq xmm5, xmm3 - - pxor xmm0, xmm4 - pxor xmm0, xmm5 - - movdqa xmm5, xmm0 - pslld xmm0, 2 - psrld xmm5, 30 - por xmm0, xmm5 - - movdqa oword [rbp], xmm0 - add rbp, $10 - cmp rbp, r10 - jb @avx2_sha1_expand_32_79 - - // ========== Phase 2: 80 Compression Rounds ========== - - mov eax, [r12] - mov ebx, [r12 + $04] - mov ecx, [r12 + $08] - mov edx, [r12 + $0C] - mov r8d, [r12 + $10] - - lea rbp, [rsp + $50] - - // ---------- Rounds 0-19: Ch, K = $5A827999 ---------- - - mov r9d, 4 - -@avx2_sha1_ch_loop: - - mov esi, ecx - xor esi, edx - and esi, ebx - xor esi, edx - mov edi, eax - rol edi, 5 - add r8d, [rbp] - add r8d, edi - add r8d, esi - add r8d, $5A827999 - rol ebx, 30 - - mov esi, ebx - xor esi, ecx - and esi, eax - xor esi, ecx - mov edi, r8d - rol edi, 5 - add edx, [rbp + $04] - add edx, edi - add edx, esi - add edx, $5A827999 - rol eax, 30 - - mov esi, eax - xor esi, ebx - and esi, r8d - xor esi, ebx - mov edi, edx - rol edi, 5 - add ecx, [rbp + $08] - add ecx, edi - add ecx, esi - add ecx, $5A827999 - rol r8d, 30 - - mov esi, r8d - xor esi, eax - and esi, edx - xor esi, eax - mov edi, ecx - rol edi, 5 - add ebx, [rbp + $0C] - add ebx, edi - add ebx, esi - add ebx, $5A827999 - rol edx, 30 - - mov esi, edx - xor esi, r8d - and esi, ecx - xor esi, r8d - mov edi, ebx - rol edi, 5 - add eax, [rbp + $10] - add eax, edi - add eax, esi - add eax, $5A827999 - rol ecx, 30 - - add rbp, $14 - dec r9d - jnz @avx2_sha1_ch_loop - - // ---------- Rounds 20-39: Parity, K = $6ED9EBA1 ---------- - - mov r9d, 4 - -@avx2_sha1_par1_loop: - - mov esi, ebx - xor esi, ecx - xor esi, edx - mov edi, eax - rol edi, 5 - add r8d, [rbp] - add r8d, edi - add r8d, esi - add r8d, $6ED9EBA1 - rol ebx, 30 - - mov esi, eax - xor esi, ebx - xor esi, ecx - mov edi, r8d - rol edi, 5 - add edx, [rbp + $04] - add edx, edi - add edx, esi - add edx, $6ED9EBA1 - rol eax, 30 - - mov esi, r8d - xor esi, eax - xor esi, ebx - mov edi, edx - rol edi, 5 - add ecx, [rbp + $08] - add ecx, edi - add ecx, esi - add ecx, $6ED9EBA1 - rol r8d, 30 - - mov esi, edx - xor esi, r8d - xor esi, eax - mov edi, ecx - rol edi, 5 - add ebx, [rbp + $0C] - add ebx, edi - add ebx, esi - add ebx, $6ED9EBA1 - rol edx, 30 - - mov esi, ecx - xor esi, edx - xor esi, r8d - mov edi, ebx - rol edi, 5 - add eax, [rbp + $10] - add eax, edi - add eax, esi - add eax, $6ED9EBA1 - rol ecx, 30 - - add rbp, $14 - dec r9d - jnz @avx2_sha1_par1_loop - - // ---------- Rounds 40-59: Maj, K = $8F1BBCDC ---------- - - mov r9d, 4 - -@avx2_sha1_maj_loop: - - mov esi, ebx - or esi, ecx - and esi, edx - mov edi, ebx - and edi, ecx - or esi, edi - mov edi, eax - rol edi, 5 - add r8d, [rbp] - add r8d, edi - add r8d, esi - add r8d, $8F1BBCDC - rol ebx, 30 - - mov esi, eax - or esi, ebx - and esi, ecx - mov edi, eax - and edi, ebx - or esi, edi - mov edi, r8d - rol edi, 5 - add edx, [rbp + $04] - add edx, edi - add edx, esi - add edx, $8F1BBCDC - rol eax, 30 - - mov esi, r8d - or esi, eax - and esi, ebx - mov edi, r8d - and edi, eax - or esi, edi - mov edi, edx - rol edi, 5 - add ecx, [rbp + $08] - add ecx, edi - add ecx, esi - add ecx, $8F1BBCDC - rol r8d, 30 - - mov esi, edx - or esi, r8d - and esi, eax - mov edi, edx - and edi, r8d - or esi, edi - mov edi, ecx - rol edi, 5 - add ebx, [rbp + $0C] - add ebx, edi - add ebx, esi - add ebx, $8F1BBCDC - rol edx, 30 - - mov esi, ecx - or esi, edx - and esi, r8d - mov edi, ecx - and edi, edx - or esi, edi - mov edi, ebx - rol edi, 5 - add eax, [rbp + $10] - add eax, edi - add eax, esi - add eax, $8F1BBCDC - rol ecx, 30 - - add rbp, $14 - dec r9d - jnz @avx2_sha1_maj_loop - - // ---------- Rounds 60-79: Parity, K = $CA62C1D6 ---------- - - mov r9d, 4 - -@avx2_sha1_par2_loop: - - mov esi, ebx - xor esi, ecx - xor esi, edx - mov edi, eax - rol edi, 5 - add r8d, [rbp] - add r8d, edi - add r8d, esi - add r8d, $CA62C1D6 - rol ebx, 30 - - mov esi, eax - xor esi, ebx - xor esi, ecx - mov edi, r8d - rol edi, 5 - add edx, [rbp + $04] - add edx, edi - add edx, esi - add edx, $CA62C1D6 - rol eax, 30 - - mov esi, r8d - xor esi, eax - xor esi, ebx - mov edi, edx - rol edi, 5 - add ecx, [rbp + $08] - add ecx, edi - add ecx, esi - add ecx, $CA62C1D6 - rol r8d, 30 - - mov esi, edx - xor esi, r8d - xor esi, eax - mov edi, ecx - rol edi, 5 - add ebx, [rbp + $0C] - add ebx, edi - add ebx, esi - add ebx, $CA62C1D6 - rol edx, 30 - - mov esi, ecx - xor esi, edx - xor esi, r8d - mov edi, ebx - rol edi, 5 - add eax, [rbp + $10] - add eax, edi - add eax, esi - add eax, $CA62C1D6 - rol ecx, 30 - - add rbp, $14 - dec r9d - jnz @avx2_sha1_par2_loop - - // Add round results to state - add [r12], eax - add [r12 + $04], ebx - add [r12 + $08], ecx - add [r12 + $0C], edx - add [r12 + $10], r8d - - add r13, $40 - dec r14d - jnz @avx2_sha1_block_loop - -@avx2_sha1_done: - - mov rbx, [rsp + $00] - mov rbp, [rsp + $08] - mov r12, [rsp + $20] - mov r13, [rsp + $28] - mov r14, [rsp + $30] - mov r15, [rsp + $38] - mov rdi, [rsp + $10] - mov rsi, [rsp + $18] - add rsp, 408 - - db $C5, $F8, $77 // vzeroupper + mov r11, rsp + push r9 + push rbx + push rbp + push r12 + push r13 + push r14 + push rdi + push rsi + mov rdi, rcx + mov rsi, rdx + mov rdx, r8 + db $C5, $F8, $77 // vzeroupper + mov r8, rdi + mov r9, rsi + mov r10, rdx + lea rsp, [rsp - $280] + shl r10, $6 + lea r13, [r9 + $40] + and rsp, $FFFFFFFFFFFFFF80 + add r10, r9 + mov r14, qword [r11 - $8] + add r14, $40 + mov eax, dword [r8] + cmp r13, r10 + cmovae r13, r9 + mov ebp, dword [r8 + $4] + mov ecx, dword [r8 + $8] + mov edx, dword [r8 + $C] + mov esi, dword [r8 + $10] + db $C4, $C1, $7E, $6F, $76, $40 // vmovdqu ymm6, yword [r14 + $40] + db $C4, $C1, $7A, $6F, $01 // vmovdqu xmm0, oword [r9] + db $C4, $C1, $7A, $6F, $49, $10 // vmovdqu xmm1, oword [r9 + $10] + db $C4, $C1, $7A, $6F, $51, $20 // vmovdqu xmm2, oword [r9 + $20] + db $C4, $C1, $7A, $6F, $59, $30 // vmovdqu xmm3, oword [r9 + $30] + lea r9, [r9 + $40] + db $C4, $C3, $7D, $38, $45, $00, $01 // vinserti128 ymm0, ymm0, oword [r13 + $0], $1 + db $C4, $C3, $75, $38, $4D, $10, $01 // vinserti128 ymm1, ymm1, oword [r13 + $10], $1 + db $C4, $E2, $7D, $00, $C6 // vpshufb ymm0, ymm0, ymm6 + db $C4, $C3, $6D, $38, $55, $20, $01 // vinserti128 ymm2, ymm2, oword [r13 + $20], $1 + db $C4, $E2, $75, $00, $CE // vpshufb ymm1, ymm1, ymm6 + db $C4, $C3, $65, $38, $5D, $30, $01 // vinserti128 ymm3, ymm3, oword [r13 + $30], $1 + db $C4, $E2, $6D, $00, $D6 // vpshufb ymm2, ymm2, ymm6 + db $C4, $41, $7E, $6F, $5E, $C0 // vmovdqu ymm11, yword [r14 - $40] + db $C4, $E2, $65, $00, $DE // vpshufb ymm3, ymm3, ymm6 + db $C4, $C1, $7D, $FE, $E3 // vpaddd ymm4, ymm0, ymm11 + db $C4, $C1, $75, $FE, $EB // vpaddd ymm5, ymm1, ymm11 + db $C5, $FE, $7F, $24, $24 // vmovdqu yword [rsp], ymm4 + db $C4, $C1, $6D, $FE, $F3 // vpaddd ymm6, ymm2, ymm11 + db $C5, $FE, $7F, $6C, $24, $20 // vmovdqu yword [rsp + $20], ymm5 + db $C4, $C1, $65, $FE, $FB // vpaddd ymm7, ymm3, ymm11 + db $C5, $FE, $7F, $74, $24, $40 // vmovdqu yword [rsp + $40], ymm6 + db $C5, $FE, $7F, $7C, $24, $60 // vmovdqu yword [rsp + $60], ymm7 + db $C4, $E3, $75, $0F, $E0, $08 // vpalignr ymm4, ymm1, ymm0, $8 + db $C5, $BD, $73, $DB, $04 // vpsrldq ymm8, ymm3, $4 + db $C5, $DD, $EF, $E0 // vpxor ymm4, ymm4, ymm0 + db $C5, $3D, $EF, $C2 // vpxor ymm8, ymm8, ymm2 + db $C4, $C1, $5D, $EF, $E0 // vpxor ymm4, ymm4, ymm8 + db $C5, $BD, $72, $D4, $1F // vpsrld ymm8, ymm4, $1F + db $C5, $AD, $73, $FC, $0C // vpslldq ymm10, ymm4, $C + db $C5, $DD, $FE, $E4 // vpaddd ymm4, ymm4, ymm4 + db $C4, $C1, $35, $72, $D2, $1E // vpsrld ymm9, ymm10, $1E + db $C4, $C1, $5D, $EB, $E0 // vpor ymm4, ymm4, ymm8 + db $C4, $C1, $2D, $72, $F2, $02 // vpslld ymm10, ymm10, $2 + db $C4, $C1, $5D, $EF, $E1 // vpxor ymm4, ymm4, ymm9 + db $C4, $C1, $5D, $EF, $E2 // vpxor ymm4, ymm4, ymm10 + db $C4, $41, $5D, $FE, $CB // vpaddd ymm9, ymm4, ymm11 + db $C5, $7E, $7F, $8C, $24, $80, $00, $00, $00 // vmovdqu yword [rsp + $80], ymm9 + db $C4, $E3, $6D, $0F, $E9, $08 // vpalignr ymm5, ymm2, ymm1, $8 + db $C5, $BD, $73, $DC, $04 // vpsrldq ymm8, ymm4, $4 + db $C5, $D5, $EF, $E9 // vpxor ymm5, ymm5, ymm1 + db $C5, $3D, $EF, $C3 // vpxor ymm8, ymm8, ymm3 + db $C4, $C1, $55, $EF, $E8 // vpxor ymm5, ymm5, ymm8 + db $C5, $BD, $72, $D5, $1F // vpsrld ymm8, ymm5, $1F + db $C4, $41, $7E, $6F, $5E, $E0 // vmovdqu ymm11, yword [r14 - $20] + db $C5, $AD, $73, $FD, $0C // vpslldq ymm10, ymm5, $C + db $C5, $D5, $FE, $ED // vpaddd ymm5, ymm5, ymm5 + db $C4, $C1, $35, $72, $D2, $1E // vpsrld ymm9, ymm10, $1E + db $C4, $C1, $55, $EB, $E8 // vpor ymm5, ymm5, ymm8 + db $C4, $C1, $2D, $72, $F2, $02 // vpslld ymm10, ymm10, $2 + db $C4, $C1, $55, $EF, $E9 // vpxor ymm5, ymm5, ymm9 + db $C4, $C1, $55, $EF, $EA // vpxor ymm5, ymm5, ymm10 + db $C4, $41, $55, $FE, $CB // vpaddd ymm9, ymm5, ymm11 + db $C5, $7E, $7F, $8C, $24, $A0, $00, $00, $00 // vmovdqu yword [rsp + $A0], ymm9 + db $C4, $E3, $65, $0F, $F2, $08 // vpalignr ymm6, ymm3, ymm2, $8 + db $C5, $BD, $73, $DD, $04 // vpsrldq ymm8, ymm5, $4 + db $C5, $CD, $EF, $F2 // vpxor ymm6, ymm6, ymm2 + db $C5, $3D, $EF, $C4 // vpxor ymm8, ymm8, ymm4 + db $C4, $C1, $4D, $EF, $F0 // vpxor ymm6, ymm6, ymm8 + db $C5, $BD, $72, $D6, $1F // vpsrld ymm8, ymm6, $1F + db $C5, $AD, $73, $FE, $0C // vpslldq ymm10, ymm6, $C + db $C5, $CD, $FE, $F6 // vpaddd ymm6, ymm6, ymm6 + db $C4, $C1, $35, $72, $D2, $1E // vpsrld ymm9, ymm10, $1E + db $C4, $C1, $4D, $EB, $F0 // vpor ymm6, ymm6, ymm8 + db $C4, $C1, $2D, $72, $F2, $02 // vpslld ymm10, ymm10, $2 + db $C4, $C1, $4D, $EF, $F1 // vpxor ymm6, ymm6, ymm9 + db $C4, $C1, $4D, $EF, $F2 // vpxor ymm6, ymm6, ymm10 + db $C4, $41, $4D, $FE, $CB // vpaddd ymm9, ymm6, ymm11 + db $C5, $7E, $7F, $8C, $24, $C0, $00, $00, $00 // vmovdqu yword [rsp + $C0], ymm9 + db $C4, $E3, $5D, $0F, $FB, $08 // vpalignr ymm7, ymm4, ymm3, $8 + db $C5, $BD, $73, $DE, $04 // vpsrldq ymm8, ymm6, $4 + db $C5, $C5, $EF, $FB // vpxor ymm7, ymm7, ymm3 + db $C5, $3D, $EF, $C5 // vpxor ymm8, ymm8, ymm5 + db $C4, $C1, $45, $EF, $F8 // vpxor ymm7, ymm7, ymm8 + db $C5, $BD, $72, $D7, $1F // vpsrld ymm8, ymm7, $1F + db $C5, $AD, $73, $FF, $0C // vpslldq ymm10, ymm7, $C + db $C5, $C5, $FE, $FF // vpaddd ymm7, ymm7, ymm7 + db $C4, $C1, $35, $72, $D2, $1E // vpsrld ymm9, ymm10, $1E + db $C4, $C1, $45, $EB, $F8 // vpor ymm7, ymm7, ymm8 + db $C4, $C1, $2D, $72, $F2, $02 // vpslld ymm10, ymm10, $2 + db $C4, $C1, $45, $EF, $F9 // vpxor ymm7, ymm7, ymm9 + db $C4, $C1, $45, $EF, $FA // vpxor ymm7, ymm7, ymm10 + db $C4, $41, $45, $FE, $CB // vpaddd ymm9, ymm7, ymm11 + db $C5, $7E, $7F, $8C, $24, $E0, $00, $00, $00 // vmovdqu yword [rsp + $E0], ymm9 + lea r13, [rsp + $80] + jmp @block_loop + +@block_loop: + db $C4, $E3, $7B, $F0, $DD, $02 // rorx ebx, ebp, $2 + db $C4, $E2, $50, $F2, $FA // andn edi, ebp, edx + and ebp, ecx + xor ebp, edi + jmp @align32_1 + +@align32_1: + db $C4, $63, $45, $0F, $C6, $08 // vpalignr ymm8, ymm7, ymm6, $8 + db $C5, $FD, $EF, $C4 // vpxor ymm0, ymm0, ymm4 + add esi, dword [r13 - $80] + db $C4, $E2, $78, $F2, $F9 // andn edi, eax, ecx + db $C5, $FD, $EF, $C1 // vpxor ymm0, ymm0, ymm1 + add esi, ebp + db $C4, $63, $7B, $F0, $E0, $1B // rorx r12d, eax, $1B + db $C4, $E3, $7B, $F0, $E8, $02 // rorx ebp, eax, $2 + db $C4, $C1, $7D, $EF, $C0 // vpxor ymm0, ymm0, ymm8 + and eax, ebx + add esi, r12d + xor eax, edi + db $C5, $BD, $72, $D0, $1E // vpsrld ymm8, ymm0, $1E + db $C5, $FD, $72, $F0, $02 // vpslld ymm0, ymm0, $2 + add edx, dword [r13 - $7C] + db $C4, $E2, $48, $F2, $FB // andn edi, esi, ebx + add edx, eax + db $C4, $63, $7B, $F0, $E6, $1B // rorx r12d, esi, $1B + db $C4, $E3, $7B, $F0, $C6, $02 // rorx eax, esi, $2 + and esi, ebp + db $C4, $C1, $7D, $EB, $C0 // vpor ymm0, ymm0, ymm8 + add edx, r12d + xor esi, edi + add ecx, dword [r13 - $78] + db $C4, $E2, $68, $F2, $FD // andn edi, edx, ebp + db $C4, $41, $7D, $FE, $CB // vpaddd ymm9, ymm0, ymm11 + add ecx, esi + db $C4, $63, $7B, $F0, $E2, $1B // rorx r12d, edx, $1B + db $C4, $E3, $7B, $F0, $F2, $02 // rorx esi, edx, $2 + and edx, eax + db $C5, $7E, $7F, $8C, $24, $00, $01, $00, $00 // vmovdqu yword [rsp + $100], ymm9 + add ecx, r12d + xor edx, edi + add ebx, dword [r13 - $74] + db $C4, $E2, $70, $F2, $F8 // andn edi, ecx, eax + add ebx, edx + db $C4, $63, $7B, $F0, $E1, $1B // rorx r12d, ecx, $1B + db $C4, $E3, $7B, $F0, $D1, $02 // rorx edx, ecx, $2 + and ecx, esi + add ebx, r12d + xor ecx, edi + add ebp, dword [r13 - $60] + db $C4, $E2, $60, $F2, $FE // andn edi, ebx, esi + add ebp, ecx + db $C4, $63, $7B, $F0, $E3, $1B // rorx r12d, ebx, $1B + db $C4, $E3, $7B, $F0, $CB, $02 // rorx ecx, ebx, $2 + and ebx, edx + add ebp, r12d + xor ebx, edi + db $C4, $63, $7D, $0F, $C7, $08 // vpalignr ymm8, ymm0, ymm7, $8 + db $C5, $F5, $EF, $CD // vpxor ymm1, ymm1, ymm5 + add eax, dword [r13 - $5C] + db $C4, $E2, $50, $F2, $FA // andn edi, ebp, edx + db $C5, $F5, $EF, $CA // vpxor ymm1, ymm1, ymm2 + add eax, ebx + db $C4, $63, $7B, $F0, $E5, $1B // rorx r12d, ebp, $1B + db $C4, $E3, $7B, $F0, $DD, $02 // rorx ebx, ebp, $2 + db $C4, $C1, $75, $EF, $C8 // vpxor ymm1, ymm1, ymm8 + and ebp, ecx + add eax, r12d + xor ebp, edi + db $C5, $BD, $72, $D1, $1E // vpsrld ymm8, ymm1, $1E + db $C5, $F5, $72, $F1, $02 // vpslld ymm1, ymm1, $2 + add esi, dword [r13 - $58] + db $C4, $E2, $78, $F2, $F9 // andn edi, eax, ecx + add esi, ebp + db $C4, $63, $7B, $F0, $E0, $1B // rorx r12d, eax, $1B + db $C4, $E3, $7B, $F0, $E8, $02 // rorx ebp, eax, $2 + and eax, ebx + db $C4, $C1, $75, $EB, $C8 // vpor ymm1, ymm1, ymm8 + add esi, r12d + xor eax, edi + add edx, dword [r13 - $54] + db $C4, $E2, $48, $F2, $FB // andn edi, esi, ebx + db $C4, $41, $75, $FE, $CB // vpaddd ymm9, ymm1, ymm11 + add edx, eax + db $C4, $63, $7B, $F0, $E6, $1B // rorx r12d, esi, $1B + db $C4, $E3, $7B, $F0, $C6, $02 // rorx eax, esi, $2 + and esi, ebp + db $C5, $7E, $7F, $8C, $24, $20, $01, $00, $00 // vmovdqu yword [rsp + $120], ymm9 + add edx, r12d + xor esi, edi + add ecx, dword [r13 - $40] + db $C4, $E2, $68, $F2, $FD // andn edi, edx, ebp + add ecx, esi + db $C4, $63, $7B, $F0, $E2, $1B // rorx r12d, edx, $1B + db $C4, $E3, $7B, $F0, $F2, $02 // rorx esi, edx, $2 + and edx, eax + add ecx, r12d + xor edx, edi + add ebx, dword [r13 - $3C] + db $C4, $E2, $70, $F2, $F8 // andn edi, ecx, eax + add ebx, edx + db $C4, $63, $7B, $F0, $E1, $1B // rorx r12d, ecx, $1B + db $C4, $E3, $7B, $F0, $D1, $02 // rorx edx, ecx, $2 + and ecx, esi + add ebx, r12d + xor ecx, edi + db $C4, $63, $75, $0F, $C0, $08 // vpalignr ymm8, ymm1, ymm0, $8 + db $C5, $ED, $EF, $D6 // vpxor ymm2, ymm2, ymm6 + add ebp, dword [r13 - $38] + db $C4, $E2, $60, $F2, $FE // andn edi, ebx, esi + db $C5, $ED, $EF, $D3 // vpxor ymm2, ymm2, ymm3 + db $C4, $41, $7E, $6F, $1E // vmovdqu ymm11, yword [r14] + add ebp, ecx + db $C4, $63, $7B, $F0, $E3, $1B // rorx r12d, ebx, $1B + db $C4, $E3, $7B, $F0, $CB, $02 // rorx ecx, ebx, $2 + db $C4, $C1, $6D, $EF, $D0 // vpxor ymm2, ymm2, ymm8 + and ebx, edx + add ebp, r12d + xor ebx, edi + db $C5, $BD, $72, $D2, $1E // vpsrld ymm8, ymm2, $1E + db $C5, $ED, $72, $F2, $02 // vpslld ymm2, ymm2, $2 + add eax, dword [r13 - $34] + db $C4, $E2, $50, $F2, $FA // andn edi, ebp, edx + add eax, ebx + db $C4, $63, $7B, $F0, $E5, $1B // rorx r12d, ebp, $1B + db $C4, $E3, $7B, $F0, $DD, $02 // rorx ebx, ebp, $2 + and ebp, ecx + db $C4, $C1, $6D, $EB, $D0 // vpor ymm2, ymm2, ymm8 + add eax, r12d + xor ebp, edi + add esi, dword [r13 - $20] + db $C4, $E2, $78, $F2, $F9 // andn edi, eax, ecx + db $C4, $41, $6D, $FE, $CB // vpaddd ymm9, ymm2, ymm11 + add esi, ebp + db $C4, $63, $7B, $F0, $E0, $1B // rorx r12d, eax, $1B + db $C4, $E3, $7B, $F0, $E8, $02 // rorx ebp, eax, $2 + and eax, ebx + db $C5, $7E, $7F, $8C, $24, $40, $01, $00, $00 // vmovdqu yword [rsp + $140], ymm9 + add esi, r12d + xor eax, edi + add edx, dword [r13 - $1C] + db $C4, $E2, $48, $F2, $FB // andn edi, esi, ebx + add edx, eax + db $C4, $63, $7B, $F0, $E6, $1B // rorx r12d, esi, $1B + db $C4, $E3, $7B, $F0, $C6, $02 // rorx eax, esi, $2 + and esi, ebp + add edx, r12d + xor esi, edi + add ecx, dword [r13 - $18] + db $C4, $E2, $68, $F2, $FD // andn edi, edx, ebp + add ecx, esi + db $C4, $63, $7B, $F0, $E2, $1B // rorx r12d, edx, $1B + db $C4, $E3, $7B, $F0, $F2, $02 // rorx esi, edx, $2 + and edx, eax + add ecx, r12d + xor edx, edi + db $C4, $63, $6D, $0F, $C1, $08 // vpalignr ymm8, ymm2, ymm1, $8 + db $C5, $E5, $EF, $DF // vpxor ymm3, ymm3, ymm7 + add ebx, dword [r13 - $14] + db $C4, $E2, $70, $F2, $F8 // andn edi, ecx, eax + db $C5, $E5, $EF, $DC // vpxor ymm3, ymm3, ymm4 + add ebx, edx + db $C4, $63, $7B, $F0, $E1, $1B // rorx r12d, ecx, $1B + db $C4, $E3, $7B, $F0, $D1, $02 // rorx edx, ecx, $2 + db $C4, $C1, $65, $EF, $D8 // vpxor ymm3, ymm3, ymm8 + and ecx, esi + add ebx, r12d + xor ecx, edi + db $C5, $BD, $72, $D3, $1E // vpsrld ymm8, ymm3, $1E + db $C5, $E5, $72, $F3, $02 // vpslld ymm3, ymm3, $2 + add ebp, dword [r13 + $0] + db $C4, $E2, $60, $F2, $FE // andn edi, ebx, esi + add ebp, ecx + db $C4, $63, $7B, $F0, $E3, $1B // rorx r12d, ebx, $1B + db $C4, $E3, $7B, $F0, $CB, $02 // rorx ecx, ebx, $2 + and ebx, edx + db $C4, $C1, $65, $EB, $D8 // vpor ymm3, ymm3, ymm8 + add ebp, r12d + xor ebx, edi + add eax, dword [r13 + $4] + db $C4, $E2, $50, $F2, $FA // andn edi, ebp, edx + db $C4, $41, $65, $FE, $CB // vpaddd ymm9, ymm3, ymm11 + add eax, ebx + db $C4, $63, $7B, $F0, $E5, $1B // rorx r12d, ebp, $1B + db $C4, $E3, $7B, $F0, $DD, $02 // rorx ebx, ebp, $2 + and ebp, ecx + db $C5, $7E, $7F, $8C, $24, $60, $01, $00, $00 // vmovdqu yword [rsp + $160], ymm9 + add eax, r12d + xor ebp, edi + add esi, dword [r13 + $8] + db $C4, $E2, $78, $F2, $F9 // andn edi, eax, ecx + add esi, ebp + db $C4, $63, $7B, $F0, $E0, $1B // rorx r12d, eax, $1B + db $C4, $E3, $7B, $F0, $E8, $02 // rorx ebp, eax, $2 + and eax, ebx + add esi, r12d + xor eax, edi + add edx, dword [r13 + $C] + lea edx, [rdx + rax*1] + db $C4, $63, $7B, $F0, $E6, $1B // rorx r12d, esi, $1B + db $C4, $E3, $7B, $F0, $C6, $02 // rorx eax, esi, $2 + xor esi, ebp + add edx, r12d + xor esi, ebx + db $C4, $63, $65, $0F, $C2, $08 // vpalignr ymm8, ymm3, ymm2, $8 + db $C5, $DD, $EF, $E0 // vpxor ymm4, ymm4, ymm0 + add ecx, dword [r13 + $20] + lea ecx, [rcx + rsi*1] + db $C5, $DD, $EF, $E5 // vpxor ymm4, ymm4, ymm5 + db $C4, $63, $7B, $F0, $E2, $1B // rorx r12d, edx, $1B + db $C4, $E3, $7B, $F0, $F2, $02 // rorx esi, edx, $2 + xor edx, eax + db $C4, $C1, $5D, $EF, $E0 // vpxor ymm4, ymm4, ymm8 + add ecx, r12d + xor edx, ebp + add ebx, dword [r13 + $24] + db $C5, $BD, $72, $D4, $1E // vpsrld ymm8, ymm4, $1E + db $C5, $DD, $72, $F4, $02 // vpslld ymm4, ymm4, $2 + lea ebx, [rbx + rdx*1] + db $C4, $63, $7B, $F0, $E1, $1B // rorx r12d, ecx, $1B + db $C4, $E3, $7B, $F0, $D1, $02 // rorx edx, ecx, $2 + xor ecx, esi + add ebx, r12d + xor ecx, eax + db $C4, $C1, $5D, $EB, $E0 // vpor ymm4, ymm4, ymm8 + add ebp, dword [r13 + $28] + lea ebp, [rcx + rbp*1] + db $C4, $63, $7B, $F0, $E3, $1B // rorx r12d, ebx, $1B + db $C4, $E3, $7B, $F0, $CB, $02 // rorx ecx, ebx, $2 + db $C4, $41, $5D, $FE, $CB // vpaddd ymm9, ymm4, ymm11 + xor ebx, edx + add ebp, r12d + xor ebx, esi + add eax, dword [r13 + $2C] + db $C5, $7E, $7F, $8C, $24, $80, $01, $00, $00 // vmovdqu yword [rsp + $180], ymm9 + lea eax, [rax + rbx*1] + db $C4, $63, $7B, $F0, $E5, $1B // rorx r12d, ebp, $1B + db $C4, $E3, $7B, $F0, $DD, $02 // rorx ebx, ebp, $2 + xor ebp, ecx + add eax, r12d + xor ebp, edx + add esi, dword [r13 + $40] + lea esi, [rsi + rbp*1] + db $C4, $63, $7B, $F0, $E0, $1B // rorx r12d, eax, $1B + db $C4, $E3, $7B, $F0, $E8, $02 // rorx ebp, eax, $2 + xor eax, ebx + add esi, r12d + xor eax, ecx + db $C4, $63, $5D, $0F, $C3, $08 // vpalignr ymm8, ymm4, ymm3, $8 + db $C5, $D5, $EF, $E9 // vpxor ymm5, ymm5, ymm1 + add edx, dword [r13 + $44] + lea edx, [rdx + rax*1] + db $C5, $D5, $EF, $EE // vpxor ymm5, ymm5, ymm6 + db $C4, $63, $7B, $F0, $E6, $1B // rorx r12d, esi, $1B + db $C4, $E3, $7B, $F0, $C6, $02 // rorx eax, esi, $2 + xor esi, ebp + db $C4, $C1, $55, $EF, $E8 // vpxor ymm5, ymm5, ymm8 + add edx, r12d + xor esi, ebx + add ecx, dword [r13 + $48] + db $C5, $BD, $72, $D5, $1E // vpsrld ymm8, ymm5, $1E + db $C5, $D5, $72, $F5, $02 // vpslld ymm5, ymm5, $2 + lea ecx, [rcx + rsi*1] + db $C4, $63, $7B, $F0, $E2, $1B // rorx r12d, edx, $1B + db $C4, $E3, $7B, $F0, $F2, $02 // rorx esi, edx, $2 + xor edx, eax + add ecx, r12d + xor edx, ebp + db $C4, $C1, $55, $EB, $E8 // vpor ymm5, ymm5, ymm8 + add ebx, dword [r13 + $4C] + lea ebx, [rbx + rdx*1] + db $C4, $63, $7B, $F0, $E1, $1B // rorx r12d, ecx, $1B + db $C4, $E3, $7B, $F0, $D1, $02 // rorx edx, ecx, $2 + db $C4, $41, $55, $FE, $CB // vpaddd ymm9, ymm5, ymm11 + xor ecx, esi + add ebx, r12d + xor ecx, eax + add ebp, dword [r13 + $60] + db $C5, $7E, $7F, $8C, $24, $A0, $01, $00, $00 // vmovdqu yword [rsp + $1A0], ymm9 + lea ebp, [rcx + rbp*1] + db $C4, $63, $7B, $F0, $E3, $1B // rorx r12d, ebx, $1B + db $C4, $E3, $7B, $F0, $CB, $02 // rorx ecx, ebx, $2 + xor ebx, edx + add ebp, r12d + xor ebx, esi + add eax, dword [r13 + $64] + lea eax, [rax + rbx*1] + db $C4, $63, $7B, $F0, $E5, $1B // rorx r12d, ebp, $1B + db $C4, $E3, $7B, $F0, $DD, $02 // rorx ebx, ebp, $2 + xor ebp, ecx + add eax, r12d + xor ebp, edx + db $C4, $63, $55, $0F, $C4, $08 // vpalignr ymm8, ymm5, ymm4, $8 + db $C5, $CD, $EF, $F2 // vpxor ymm6, ymm6, ymm2 + add esi, dword [r13 + $68] + lea esi, [rsi + rbp*1] + db $C5, $CD, $EF, $F7 // vpxor ymm6, ymm6, ymm7 + db $C4, $63, $7B, $F0, $E0, $1B // rorx r12d, eax, $1B + db $C4, $E3, $7B, $F0, $E8, $02 // rorx ebp, eax, $2 + xor eax, ebx + db $C4, $C1, $4D, $EF, $F0 // vpxor ymm6, ymm6, ymm8 + add esi, r12d + xor eax, ecx + add edx, dword [r13 + $6C] + lea r13, [r13 + $100] + db $C5, $BD, $72, $D6, $1E // vpsrld ymm8, ymm6, $1E + db $C5, $CD, $72, $F6, $02 // vpslld ymm6, ymm6, $2 + lea edx, [rdx + rax*1] + db $C4, $63, $7B, $F0, $E6, $1B // rorx r12d, esi, $1B + db $C4, $E3, $7B, $F0, $C6, $02 // rorx eax, esi, $2 + xor esi, ebp + add edx, r12d + xor esi, ebx + db $C4, $C1, $4D, $EB, $F0 // vpor ymm6, ymm6, ymm8 + add ecx, dword [r13 - $80] + lea ecx, [rcx + rsi*1] + db $C4, $63, $7B, $F0, $E2, $1B // rorx r12d, edx, $1B + db $C4, $E3, $7B, $F0, $F2, $02 // rorx esi, edx, $2 + db $C4, $41, $4D, $FE, $CB // vpaddd ymm9, ymm6, ymm11 + xor edx, eax + add ecx, r12d + xor edx, ebp + add ebx, dword [r13 - $7C] + db $C5, $7E, $7F, $8C, $24, $C0, $01, $00, $00 // vmovdqu yword [rsp + $1C0], ymm9 + lea ebx, [rbx + rdx*1] + db $C4, $63, $7B, $F0, $E1, $1B // rorx r12d, ecx, $1B + db $C4, $E3, $7B, $F0, $D1, $02 // rorx edx, ecx, $2 + xor ecx, esi + add ebx, r12d + xor ecx, eax + add ebp, dword [r13 - $78] + lea ebp, [rcx + rbp*1] + db $C4, $63, $7B, $F0, $E3, $1B // rorx r12d, ebx, $1B + db $C4, $E3, $7B, $F0, $CB, $02 // rorx ecx, ebx, $2 + xor ebx, edx + add ebp, r12d + xor ebx, esi + db $C4, $63, $4D, $0F, $C5, $08 // vpalignr ymm8, ymm6, ymm5, $8 + db $C5, $C5, $EF, $FB // vpxor ymm7, ymm7, ymm3 + add eax, dword [r13 - $74] + lea eax, [rax + rbx*1] + db $C5, $C5, $EF, $F8 // vpxor ymm7, ymm7, ymm0 + db $C4, $41, $7E, $6F, $5E, $20 // vmovdqu ymm11, yword [r14 + $20] + db $C4, $63, $7B, $F0, $E5, $1B // rorx r12d, ebp, $1B + db $C4, $E3, $7B, $F0, $DD, $02 // rorx ebx, ebp, $2 + xor ebp, ecx + db $C4, $C1, $45, $EF, $F8 // vpxor ymm7, ymm7, ymm8 + add eax, r12d + xor ebp, edx + add esi, dword [r13 - $60] + db $C5, $BD, $72, $D7, $1E // vpsrld ymm8, ymm7, $1E + db $C5, $C5, $72, $F7, $02 // vpslld ymm7, ymm7, $2 + lea esi, [rsi + rbp*1] + db $C4, $63, $7B, $F0, $E0, $1B // rorx r12d, eax, $1B + db $C4, $E3, $7B, $F0, $E8, $02 // rorx ebp, eax, $2 + xor eax, ebx + add esi, r12d + xor eax, ecx + db $C4, $C1, $45, $EB, $F8 // vpor ymm7, ymm7, ymm8 + add edx, dword [r13 - $5C] + lea edx, [rdx + rax*1] + db $C4, $63, $7B, $F0, $E6, $1B // rorx r12d, esi, $1B + db $C4, $E3, $7B, $F0, $C6, $02 // rorx eax, esi, $2 + db $C4, $41, $45, $FE, $CB // vpaddd ymm9, ymm7, ymm11 + xor esi, ebp + add edx, r12d + xor esi, ebx + add ecx, dword [r13 - $58] + db $C5, $7E, $7F, $8C, $24, $E0, $01, $00, $00 // vmovdqu yword [rsp + $1E0], ymm9 + lea ecx, [rcx + rsi*1] + db $C4, $63, $7B, $F0, $E2, $1B // rorx r12d, edx, $1B + db $C4, $E3, $7B, $F0, $F2, $02 // rorx esi, edx, $2 + xor edx, eax + add ecx, r12d + xor edx, ebp + add ebx, dword [r13 - $54] + mov edi, esi + xor edi, eax + lea ebx, [rbx + rdx*1] + db $C4, $63, $7B, $F0, $E1, $1B // rorx r12d, ecx, $1B + db $C4, $E3, $7B, $F0, $D1, $02 // rorx edx, ecx, $2 + xor ecx, esi + add ebx, r12d + and ecx, edi + jmp @align32_2 + +@align32_2: + db $C4, $63, $45, $0F, $C6, $08 // vpalignr ymm8, ymm7, ymm6, $8 + db $C5, $FD, $EF, $C4 // vpxor ymm0, ymm0, ymm4 + add ebp, dword [r13 - $40] + xor ecx, esi + db $C5, $FD, $EF, $C1 // vpxor ymm0, ymm0, ymm1 + mov edi, edx + xor edi, esi + lea ebp, [rcx + rbp*1] + db $C4, $C1, $7D, $EF, $C0 // vpxor ymm0, ymm0, ymm8 + db $C4, $63, $7B, $F0, $E3, $1B // rorx r12d, ebx, $1B + db $C4, $E3, $7B, $F0, $CB, $02 // rorx ecx, ebx, $2 + xor ebx, edx + db $C5, $BD, $72, $D0, $1E // vpsrld ymm8, ymm0, $1E + db $C5, $FD, $72, $F0, $02 // vpslld ymm0, ymm0, $2 + add ebp, r12d + and ebx, edi + add eax, dword [r13 - $3C] + xor ebx, edx + mov edi, ecx + xor edi, edx + db $C4, $C1, $7D, $EB, $C0 // vpor ymm0, ymm0, ymm8 + lea eax, [rax + rbx*1] + db $C4, $63, $7B, $F0, $E5, $1B // rorx r12d, ebp, $1B + db $C4, $E3, $7B, $F0, $DD, $02 // rorx ebx, ebp, $2 + xor ebp, ecx + db $C4, $41, $7D, $FE, $CB // vpaddd ymm9, ymm0, ymm11 + add eax, r12d + and ebp, edi + add esi, dword [r13 - $38] + xor ebp, ecx + db $C5, $7E, $7F, $8C, $24, $00, $02, $00, $00 // vmovdqu yword [rsp + $200], ymm9 + mov edi, ebx + xor edi, ecx + lea esi, [rsi + rbp*1] + db $C4, $63, $7B, $F0, $E0, $1B // rorx r12d, eax, $1B + db $C4, $E3, $7B, $F0, $E8, $02 // rorx ebp, eax, $2 + xor eax, ebx + add esi, r12d + and eax, edi + add edx, dword [r13 - $34] + xor eax, ebx + mov edi, ebp + xor edi, ebx + lea edx, [rdx + rax*1] + db $C4, $63, $7B, $F0, $E6, $1B // rorx r12d, esi, $1B + db $C4, $E3, $7B, $F0, $C6, $02 // rorx eax, esi, $2 + xor esi, ebp + add edx, r12d + and esi, edi + add ecx, dword [r13 - $20] + xor esi, ebp + mov edi, eax + xor edi, ebp + lea ecx, [rcx + rsi*1] + db $C4, $63, $7B, $F0, $E2, $1B // rorx r12d, edx, $1B + db $C4, $E3, $7B, $F0, $F2, $02 // rorx esi, edx, $2 + xor edx, eax + add ecx, r12d + and edx, edi + db $C4, $63, $7D, $0F, $C7, $08 // vpalignr ymm8, ymm0, ymm7, $8 + db $C5, $F5, $EF, $CD // vpxor ymm1, ymm1, ymm5 + add ebx, dword [r13 - $1C] + xor edx, eax + db $C5, $F5, $EF, $CA // vpxor ymm1, ymm1, ymm2 + mov edi, esi + xor edi, eax + lea ebx, [rbx + rdx*1] + db $C4, $C1, $75, $EF, $C8 // vpxor ymm1, ymm1, ymm8 + db $C4, $63, $7B, $F0, $E1, $1B // rorx r12d, ecx, $1B + db $C4, $E3, $7B, $F0, $D1, $02 // rorx edx, ecx, $2 + xor ecx, esi + db $C5, $BD, $72, $D1, $1E // vpsrld ymm8, ymm1, $1E + db $C5, $F5, $72, $F1, $02 // vpslld ymm1, ymm1, $2 + add ebx, r12d + and ecx, edi + add ebp, dword [r13 - $18] + xor ecx, esi + mov edi, edx + xor edi, esi + db $C4, $C1, $75, $EB, $C8 // vpor ymm1, ymm1, ymm8 + lea ebp, [rcx + rbp*1] + db $C4, $63, $7B, $F0, $E3, $1B // rorx r12d, ebx, $1B + db $C4, $E3, $7B, $F0, $CB, $02 // rorx ecx, ebx, $2 + xor ebx, edx + db $C4, $41, $75, $FE, $CB // vpaddd ymm9, ymm1, ymm11 + add ebp, r12d + and ebx, edi + add eax, dword [r13 - $14] + xor ebx, edx + db $C5, $7E, $7F, $8C, $24, $20, $02, $00, $00 // vmovdqu yword [rsp + $220], ymm9 + mov edi, ecx + xor edi, edx + lea eax, [rax + rbx*1] + db $C4, $63, $7B, $F0, $E5, $1B // rorx r12d, ebp, $1B + db $C4, $E3, $7B, $F0, $DD, $02 // rorx ebx, ebp, $2 + xor ebp, ecx + add eax, r12d + and ebp, edi + add esi, dword [r13 + $0] + xor ebp, ecx + mov edi, ebx + xor edi, ecx + lea esi, [rsi + rbp*1] + db $C4, $63, $7B, $F0, $E0, $1B // rorx r12d, eax, $1B + db $C4, $E3, $7B, $F0, $E8, $02 // rorx ebp, eax, $2 + xor eax, ebx + add esi, r12d + and eax, edi + add edx, dword [r13 + $4] + xor eax, ebx + mov edi, ebp + xor edi, ebx + lea edx, [rdx + rax*1] + db $C4, $63, $7B, $F0, $E6, $1B // rorx r12d, esi, $1B + db $C4, $E3, $7B, $F0, $C6, $02 // rorx eax, esi, $2 + xor esi, ebp + add edx, r12d + and esi, edi + db $C4, $63, $75, $0F, $C0, $08 // vpalignr ymm8, ymm1, ymm0, $8 + db $C5, $ED, $EF, $D6 // vpxor ymm2, ymm2, ymm6 + add ecx, dword [r13 + $8] + xor esi, ebp + db $C5, $ED, $EF, $D3 // vpxor ymm2, ymm2, ymm3 + mov edi, eax + xor edi, ebp + lea ecx, [rcx + rsi*1] + db $C4, $C1, $6D, $EF, $D0 // vpxor ymm2, ymm2, ymm8 + db $C4, $63, $7B, $F0, $E2, $1B // rorx r12d, edx, $1B + db $C4, $E3, $7B, $F0, $F2, $02 // rorx esi, edx, $2 + xor edx, eax + db $C5, $BD, $72, $D2, $1E // vpsrld ymm8, ymm2, $1E + db $C5, $ED, $72, $F2, $02 // vpslld ymm2, ymm2, $2 + add ecx, r12d + and edx, edi + add ebx, dword [r13 + $C] + xor edx, eax + mov edi, esi + xor edi, eax + db $C4, $C1, $6D, $EB, $D0 // vpor ymm2, ymm2, ymm8 + lea ebx, [rbx + rdx*1] + db $C4, $63, $7B, $F0, $E1, $1B // rorx r12d, ecx, $1B + db $C4, $E3, $7B, $F0, $D1, $02 // rorx edx, ecx, $2 + xor ecx, esi + db $C4, $41, $6D, $FE, $CB // vpaddd ymm9, ymm2, ymm11 + add ebx, r12d + and ecx, edi + add ebp, dword [r13 + $20] + xor ecx, esi + db $C5, $7E, $7F, $8C, $24, $40, $02, $00, $00 // vmovdqu yword [rsp + $240], ymm9 + mov edi, edx + xor edi, esi + lea ebp, [rcx + rbp*1] + db $C4, $63, $7B, $F0, $E3, $1B // rorx r12d, ebx, $1B + db $C4, $E3, $7B, $F0, $CB, $02 // rorx ecx, ebx, $2 + xor ebx, edx + add ebp, r12d + and ebx, edi + add eax, dword [r13 + $24] + xor ebx, edx + mov edi, ecx + xor edi, edx + lea eax, [rax + rbx*1] + db $C4, $63, $7B, $F0, $E5, $1B // rorx r12d, ebp, $1B + db $C4, $E3, $7B, $F0, $DD, $02 // rorx ebx, ebp, $2 + xor ebp, ecx + add eax, r12d + and ebp, edi + add esi, dword [r13 + $28] + xor ebp, ecx + mov edi, ebx + xor edi, ecx + lea esi, [rsi + rbp*1] + db $C4, $63, $7B, $F0, $E0, $1B // rorx r12d, eax, $1B + db $C4, $E3, $7B, $F0, $E8, $02 // rorx ebp, eax, $2 + xor eax, ebx + add esi, r12d + and eax, edi + db $C4, $63, $6D, $0F, $C1, $08 // vpalignr ymm8, ymm2, ymm1, $8 + db $C5, $E5, $EF, $DF // vpxor ymm3, ymm3, ymm7 + add edx, dword [r13 + $2C] + xor eax, ebx + db $C5, $E5, $EF, $DC // vpxor ymm3, ymm3, ymm4 + mov edi, ebp + xor edi, ebx + lea edx, [rdx + rax*1] + db $C4, $C1, $65, $EF, $D8 // vpxor ymm3, ymm3, ymm8 + db $C4, $63, $7B, $F0, $E6, $1B // rorx r12d, esi, $1B + db $C4, $E3, $7B, $F0, $C6, $02 // rorx eax, esi, $2 + xor esi, ebp + db $C5, $BD, $72, $D3, $1E // vpsrld ymm8, ymm3, $1E + db $C5, $E5, $72, $F3, $02 // vpslld ymm3, ymm3, $2 + add edx, r12d + and esi, edi + add ecx, dword [r13 + $40] + xor esi, ebp + mov edi, eax + xor edi, ebp + db $C4, $C1, $65, $EB, $D8 // vpor ymm3, ymm3, ymm8 + lea ecx, [rcx + rsi*1] + db $C4, $63, $7B, $F0, $E2, $1B // rorx r12d, edx, $1B + db $C4, $E3, $7B, $F0, $F2, $02 // rorx esi, edx, $2 + xor edx, eax + db $C4, $41, $65, $FE, $CB // vpaddd ymm9, ymm3, ymm11 + add ecx, r12d + and edx, edi + add ebx, dword [r13 + $44] + xor edx, eax + db $C5, $7E, $7F, $8C, $24, $60, $02, $00, $00 // vmovdqu yword [rsp + $260], ymm9 + mov edi, esi + xor edi, eax + lea ebx, [rbx + rdx*1] + db $C4, $63, $7B, $F0, $E1, $1B // rorx r12d, ecx, $1B + db $C4, $E3, $7B, $F0, $D1, $02 // rorx edx, ecx, $2 + xor ecx, esi + add ebx, r12d + and ecx, edi + add ebp, dword [r13 + $48] + xor ecx, esi + mov edi, edx + xor edi, esi + lea ebp, [rcx + rbp*1] + db $C4, $63, $7B, $F0, $E3, $1B // rorx r12d, ebx, $1B + db $C4, $E3, $7B, $F0, $CB, $02 // rorx ecx, ebx, $2 + xor ebx, edx + add ebp, r12d + and ebx, edi + add eax, dword [r13 + $4C] + xor ebx, edx + lea eax, [rax + rbx*1] + db $C4, $63, $7B, $F0, $E5, $1B // rorx r12d, ebp, $1B + db $C4, $E3, $7B, $F0, $DD, $02 // rorx ebx, ebp, $2 + xor ebp, ecx + add eax, r12d + xor ebp, edx + add esi, dword [r13 + $60] + lea esi, [rsi + rbp*1] + db $C4, $63, $7B, $F0, $E0, $1B // rorx r12d, eax, $1B + db $C4, $E3, $7B, $F0, $E8, $02 // rorx ebp, eax, $2 + xor eax, ebx + add esi, r12d + xor eax, ecx + add edx, dword [r13 + $64] + lea edx, [rdx + rax*1] + db $C4, $63, $7B, $F0, $E6, $1B // rorx r12d, esi, $1B + db $C4, $E3, $7B, $F0, $C6, $02 // rorx eax, esi, $2 + xor esi, ebp + add edx, r12d + xor esi, ebx + add ecx, dword [r13 + $68] + lea ecx, [rcx + rsi*1] + db $C4, $63, $7B, $F0, $E2, $1B // rorx r12d, edx, $1B + db $C4, $E3, $7B, $F0, $F2, $02 // rorx esi, edx, $2 + xor edx, eax + add ecx, r12d + xor edx, ebp + add ebx, dword [r13 + $6C] + lea r13, [r13 + $100] + lea ebx, [rbx + rdx*1] + db $C4, $63, $7B, $F0, $E1, $1B // rorx r12d, ecx, $1B + db $C4, $E3, $7B, $F0, $D1, $02 // rorx edx, ecx, $2 + xor ecx, esi + add ebx, r12d + xor ecx, eax + add ebp, dword [r13 - $80] + lea ebp, [rcx + rbp*1] + db $C4, $63, $7B, $F0, $E3, $1B // rorx r12d, ebx, $1B + db $C4, $E3, $7B, $F0, $CB, $02 // rorx ecx, ebx, $2 + xor ebx, edx + add ebp, r12d + xor ebx, esi + add eax, dword [r13 - $7C] + lea eax, [rax + rbx*1] + db $C4, $63, $7B, $F0, $E5, $1B // rorx r12d, ebp, $1B + db $C4, $E3, $7B, $F0, $DD, $02 // rorx ebx, ebp, $2 + xor ebp, ecx + add eax, r12d + xor ebp, edx + add esi, dword [r13 - $78] + lea esi, [rsi + rbp*1] + db $C4, $63, $7B, $F0, $E0, $1B // rorx r12d, eax, $1B + db $C4, $E3, $7B, $F0, $E8, $02 // rorx ebp, eax, $2 + xor eax, ebx + add esi, r12d + xor eax, ecx + add edx, dword [r13 - $74] + lea edx, [rdx + rax*1] + db $C4, $63, $7B, $F0, $E6, $1B // rorx r12d, esi, $1B + db $C4, $E3, $7B, $F0, $C6, $02 // rorx eax, esi, $2 + xor esi, ebp + add edx, r12d + xor esi, ebx + add ecx, dword [r13 - $60] + lea ecx, [rcx + rsi*1] + db $C4, $63, $7B, $F0, $E2, $1B // rorx r12d, edx, $1B + db $C4, $E3, $7B, $F0, $F2, $02 // rorx esi, edx, $2 + xor edx, eax + add ecx, r12d + xor edx, ebp + add ebx, dword [r13 - $5C] + lea ebx, [rbx + rdx*1] + db $C4, $63, $7B, $F0, $E1, $1B // rorx r12d, ecx, $1B + db $C4, $E3, $7B, $F0, $D1, $02 // rorx edx, ecx, $2 + xor ecx, esi + add ebx, r12d + xor ecx, eax + add ebp, dword [r13 - $58] + lea ebp, [rcx + rbp*1] + db $C4, $63, $7B, $F0, $E3, $1B // rorx r12d, ebx, $1B + db $C4, $E3, $7B, $F0, $CB, $02 // rorx ecx, ebx, $2 + xor ebx, edx + add ebp, r12d + xor ebx, esi + add eax, dword [r13 - $54] + lea eax, [rax + rbx*1] + db $C4, $63, $7B, $F0, $E5, $1B // rorx r12d, ebp, $1B + db $C4, $E3, $7B, $F0, $DD, $02 // rorx ebx, ebp, $2 + xor ebp, ecx + add eax, r12d + xor ebp, edx + add esi, dword [r13 - $40] + lea esi, [rsi + rbp*1] + db $C4, $63, $7B, $F0, $E0, $1B // rorx r12d, eax, $1B + db $C4, $E3, $7B, $F0, $E8, $02 // rorx ebp, eax, $2 + xor eax, ebx + add esi, r12d + xor eax, ecx + add edx, dword [r13 - $3C] + lea edx, [rdx + rax*1] + db $C4, $63, $7B, $F0, $E6, $1B // rorx r12d, esi, $1B + db $C4, $E3, $7B, $F0, $C6, $02 // rorx eax, esi, $2 + xor esi, ebp + add edx, r12d + xor esi, ebx + add ecx, dword [r13 - $38] + lea ecx, [rcx + rsi*1] + db $C4, $63, $7B, $F0, $E2, $1B // rorx r12d, edx, $1B + db $C4, $E3, $7B, $F0, $F2, $02 // rorx esi, edx, $2 + xor edx, eax + add ecx, r12d + xor edx, ebp + add ebx, dword [r13 - $34] + lea ebx, [rbx + rdx*1] + db $C4, $63, $7B, $F0, $E1, $1B // rorx r12d, ecx, $1B + db $C4, $E3, $7B, $F0, $D1, $02 // rorx edx, ecx, $2 + xor ecx, esi + add ebx, r12d + xor ecx, eax + add ebp, dword [r13 - $20] + lea ebp, [rcx + rbp*1] + db $C4, $63, $7B, $F0, $E3, $1B // rorx r12d, ebx, $1B + db $C4, $E3, $7B, $F0, $CB, $02 // rorx ecx, ebx, $2 + xor ebx, edx + add ebp, r12d + xor ebx, esi + add eax, dword [r13 - $1C] + lea eax, [rax + rbx*1] + db $C4, $63, $7B, $F0, $E5, $1B // rorx r12d, ebp, $1B + db $C4, $E3, $7B, $F0, $DD, $02 // rorx ebx, ebp, $2 + xor ebp, ecx + add eax, r12d + xor ebp, edx + add esi, dword [r13 - $18] + lea esi, [rsi + rbp*1] + db $C4, $63, $7B, $F0, $E0, $1B // rorx r12d, eax, $1B + db $C4, $E3, $7B, $F0, $E8, $02 // rorx ebp, eax, $2 + xor eax, ebx + add esi, r12d + xor eax, ecx + add edx, dword [r13 - $14] + lea edx, [rdx + rax*1] + db $C4, $63, $7B, $F0, $E6, $1B // rorx r12d, esi, $1B + add edx, r12d + lea r13, [r9 + $80] + lea rdi, [r9 + $80] + cmp r13, r10 + cmovae r13, r9 + add edx, dword [r8] + add esi, dword [r8 + $4] + add ebp, dword [r8 + $8] + mov dword [r8], edx + add ebx, dword [r8 + $C] + mov dword [r8 + $4], esi + mov eax, edx + add ecx, dword [r8 + $10] + mov r12d, ebp + mov dword [r8 + $8], ebp + mov edx, ebx + mov dword [r8 + $C], ebx + mov ebp, esi + mov dword [r8 + $10], ecx + mov esi, ecx + mov ecx, r12d + cmp r9, r10 + je @done + db $C4, $C1, $7E, $6F, $76, $40 // vmovdqu ymm6, yword [r14 + $40] + cmp rdi, r10 + ja @tail + db $C5, $FA, $6F, $47, $C0 // vmovdqu xmm0, oword [rdi - $40] + db $C5, $FA, $6F, $4F, $D0 // vmovdqu xmm1, oword [rdi - $30] + db $C5, $FA, $6F, $57, $E0 // vmovdqu xmm2, oword [rdi - $20] + db $C5, $FA, $6F, $5F, $F0 // vmovdqu xmm3, oword [rdi - $10] + db $C4, $C3, $7D, $38, $45, $00, $01 // vinserti128 ymm0, ymm0, oword [r13 + $0], $1 + db $C4, $C3, $75, $38, $4D, $10, $01 // vinserti128 ymm1, ymm1, oword [r13 + $10], $1 + db $C4, $C3, $6D, $38, $55, $20, $01 // vinserti128 ymm2, ymm2, oword [r13 + $20], $1 + db $C4, $C3, $65, $38, $5D, $30, $01 // vinserti128 ymm3, ymm3, oword [r13 + $30], $1 + jmp @tail + +@tail: + lea r13, [rsp + $90] + db $C4, $E3, $7B, $F0, $DD, $02 // rorx ebx, ebp, $2 + db $C4, $E2, $50, $F2, $FA // andn edi, ebp, edx + and ebp, ecx + xor ebp, edi + sub r9, $FFFFFFFFFFFFFF80 + add esi, dword [r13 - $80] + db $C4, $E2, $78, $F2, $F9 // andn edi, eax, ecx + add esi, ebp + db $C4, $63, $7B, $F0, $E0, $1B // rorx r12d, eax, $1B + db $C4, $E3, $7B, $F0, $E8, $02 // rorx ebp, eax, $2 + and eax, ebx + add esi, r12d + xor eax, edi + add edx, dword [r13 - $7C] + db $C4, $E2, $48, $F2, $FB // andn edi, esi, ebx + add edx, eax + db $C4, $63, $7B, $F0, $E6, $1B // rorx r12d, esi, $1B + db $C4, $E3, $7B, $F0, $C6, $02 // rorx eax, esi, $2 + and esi, ebp + add edx, r12d + xor esi, edi + add ecx, dword [r13 - $78] + db $C4, $E2, $68, $F2, $FD // andn edi, edx, ebp + add ecx, esi + db $C4, $63, $7B, $F0, $E2, $1B // rorx r12d, edx, $1B + db $C4, $E3, $7B, $F0, $F2, $02 // rorx esi, edx, $2 + and edx, eax + add ecx, r12d + xor edx, edi + add ebx, dword [r13 - $74] + db $C4, $E2, $70, $F2, $F8 // andn edi, ecx, eax + add ebx, edx + db $C4, $63, $7B, $F0, $E1, $1B // rorx r12d, ecx, $1B + db $C4, $E3, $7B, $F0, $D1, $02 // rorx edx, ecx, $2 + and ecx, esi + add ebx, r12d + xor ecx, edi + add ebp, dword [r13 - $60] + db $C4, $E2, $60, $F2, $FE // andn edi, ebx, esi + add ebp, ecx + db $C4, $63, $7B, $F0, $E3, $1B // rorx r12d, ebx, $1B + db $C4, $E3, $7B, $F0, $CB, $02 // rorx ecx, ebx, $2 + and ebx, edx + add ebp, r12d + xor ebx, edi + add eax, dword [r13 - $5C] + db $C4, $E2, $50, $F2, $FA // andn edi, ebp, edx + add eax, ebx + db $C4, $63, $7B, $F0, $E5, $1B // rorx r12d, ebp, $1B + db $C4, $E3, $7B, $F0, $DD, $02 // rorx ebx, ebp, $2 + and ebp, ecx + add eax, r12d + xor ebp, edi + add esi, dword [r13 - $58] + db $C4, $E2, $78, $F2, $F9 // andn edi, eax, ecx + add esi, ebp + db $C4, $63, $7B, $F0, $E0, $1B // rorx r12d, eax, $1B + db $C4, $E3, $7B, $F0, $E8, $02 // rorx ebp, eax, $2 + and eax, ebx + add esi, r12d + xor eax, edi + add edx, dword [r13 - $54] + db $C4, $E2, $48, $F2, $FB // andn edi, esi, ebx + add edx, eax + db $C4, $63, $7B, $F0, $E6, $1B // rorx r12d, esi, $1B + db $C4, $E3, $7B, $F0, $C6, $02 // rorx eax, esi, $2 + and esi, ebp + add edx, r12d + xor esi, edi + add ecx, dword [r13 - $40] + db $C4, $E2, $68, $F2, $FD // andn edi, edx, ebp + add ecx, esi + db $C4, $63, $7B, $F0, $E2, $1B // rorx r12d, edx, $1B + db $C4, $E3, $7B, $F0, $F2, $02 // rorx esi, edx, $2 + and edx, eax + add ecx, r12d + xor edx, edi + add ebx, dword [r13 - $3C] + db $C4, $E2, $70, $F2, $F8 // andn edi, ecx, eax + add ebx, edx + db $C4, $63, $7B, $F0, $E1, $1B // rorx r12d, ecx, $1B + db $C4, $E3, $7B, $F0, $D1, $02 // rorx edx, ecx, $2 + and ecx, esi + add ebx, r12d + xor ecx, edi + add ebp, dword [r13 - $38] + db $C4, $E2, $60, $F2, $FE // andn edi, ebx, esi + add ebp, ecx + db $C4, $63, $7B, $F0, $E3, $1B // rorx r12d, ebx, $1B + db $C4, $E3, $7B, $F0, $CB, $02 // rorx ecx, ebx, $2 + and ebx, edx + add ebp, r12d + xor ebx, edi + add eax, dword [r13 - $34] + db $C4, $E2, $50, $F2, $FA // andn edi, ebp, edx + add eax, ebx + db $C4, $63, $7B, $F0, $E5, $1B // rorx r12d, ebp, $1B + db $C4, $E3, $7B, $F0, $DD, $02 // rorx ebx, ebp, $2 + and ebp, ecx + add eax, r12d + xor ebp, edi + add esi, dword [r13 - $20] + db $C4, $E2, $78, $F2, $F9 // andn edi, eax, ecx + add esi, ebp + db $C4, $63, $7B, $F0, $E0, $1B // rorx r12d, eax, $1B + db $C4, $E3, $7B, $F0, $E8, $02 // rorx ebp, eax, $2 + and eax, ebx + add esi, r12d + xor eax, edi + add edx, dword [r13 - $1C] + db $C4, $E2, $48, $F2, $FB // andn edi, esi, ebx + add edx, eax + db $C4, $63, $7B, $F0, $E6, $1B // rorx r12d, esi, $1B + db $C4, $E3, $7B, $F0, $C6, $02 // rorx eax, esi, $2 + and esi, ebp + add edx, r12d + xor esi, edi + add ecx, dword [r13 - $18] + db $C4, $E2, $68, $F2, $FD // andn edi, edx, ebp + add ecx, esi + db $C4, $63, $7B, $F0, $E2, $1B // rorx r12d, edx, $1B + db $C4, $E3, $7B, $F0, $F2, $02 // rorx esi, edx, $2 + and edx, eax + add ecx, r12d + xor edx, edi + add ebx, dword [r13 - $14] + db $C4, $E2, $70, $F2, $F8 // andn edi, ecx, eax + add ebx, edx + db $C4, $63, $7B, $F0, $E1, $1B // rorx r12d, ecx, $1B + db $C4, $E3, $7B, $F0, $D1, $02 // rorx edx, ecx, $2 + and ecx, esi + add ebx, r12d + xor ecx, edi + add ebp, dword [r13 + $0] + db $C4, $E2, $60, $F2, $FE // andn edi, ebx, esi + add ebp, ecx + db $C4, $63, $7B, $F0, $E3, $1B // rorx r12d, ebx, $1B + db $C4, $E3, $7B, $F0, $CB, $02 // rorx ecx, ebx, $2 + and ebx, edx + add ebp, r12d + xor ebx, edi + add eax, dword [r13 + $4] + db $C4, $E2, $50, $F2, $FA // andn edi, ebp, edx + add eax, ebx + db $C4, $63, $7B, $F0, $E5, $1B // rorx r12d, ebp, $1B + db $C4, $E3, $7B, $F0, $DD, $02 // rorx ebx, ebp, $2 + and ebp, ecx + add eax, r12d + xor ebp, edi + add esi, dword [r13 + $8] + db $C4, $E2, $78, $F2, $F9 // andn edi, eax, ecx + add esi, ebp + db $C4, $63, $7B, $F0, $E0, $1B // rorx r12d, eax, $1B + db $C4, $E3, $7B, $F0, $E8, $02 // rorx ebp, eax, $2 + and eax, ebx + add esi, r12d + xor eax, edi + add edx, dword [r13 + $C] + lea edx, [rdx + rax*1] + db $C4, $63, $7B, $F0, $E6, $1B // rorx r12d, esi, $1B + db $C4, $E3, $7B, $F0, $C6, $02 // rorx eax, esi, $2 + xor esi, ebp + add edx, r12d + xor esi, ebx + add ecx, dword [r13 + $20] + lea ecx, [rcx + rsi*1] + db $C4, $63, $7B, $F0, $E2, $1B // rorx r12d, edx, $1B + db $C4, $E3, $7B, $F0, $F2, $02 // rorx esi, edx, $2 + xor edx, eax + add ecx, r12d + xor edx, ebp + add ebx, dword [r13 + $24] + lea ebx, [rbx + rdx*1] + db $C4, $63, $7B, $F0, $E1, $1B // rorx r12d, ecx, $1B + db $C4, $E3, $7B, $F0, $D1, $02 // rorx edx, ecx, $2 + xor ecx, esi + add ebx, r12d + xor ecx, eax + add ebp, dword [r13 + $28] + lea ebp, [rcx + rbp*1] + db $C4, $63, $7B, $F0, $E3, $1B // rorx r12d, ebx, $1B + db $C4, $E3, $7B, $F0, $CB, $02 // rorx ecx, ebx, $2 + xor ebx, edx + add ebp, r12d + xor ebx, esi + add eax, dword [r13 + $2C] + lea eax, [rax + rbx*1] + db $C4, $63, $7B, $F0, $E5, $1B // rorx r12d, ebp, $1B + db $C4, $E3, $7B, $F0, $DD, $02 // rorx ebx, ebp, $2 + xor ebp, ecx + add eax, r12d + xor ebp, edx + add esi, dword [r13 + $40] + lea esi, [rsi + rbp*1] + db $C4, $63, $7B, $F0, $E0, $1B // rorx r12d, eax, $1B + db $C4, $E3, $7B, $F0, $E8, $02 // rorx ebp, eax, $2 + xor eax, ebx + add esi, r12d + xor eax, ecx + db $C4, $41, $7E, $6F, $5E, $C0 // vmovdqu ymm11, yword [r14 - $40] + db $C4, $E2, $7D, $00, $C6 // vpshufb ymm0, ymm0, ymm6 + add edx, dword [r13 + $44] + lea edx, [rdx + rax*1] + db $C4, $63, $7B, $F0, $E6, $1B // rorx r12d, esi, $1B + db $C4, $E3, $7B, $F0, $C6, $02 // rorx eax, esi, $2 + xor esi, ebp + add edx, r12d + xor esi, ebx + add ecx, dword [r13 + $48] + lea ecx, [rcx + rsi*1] + db $C4, $63, $7B, $F0, $E2, $1B // rorx r12d, edx, $1B + db $C4, $E3, $7B, $F0, $F2, $02 // rorx esi, edx, $2 + xor edx, eax + add ecx, r12d + xor edx, ebp + add ebx, dword [r13 + $4C] + lea ebx, [rbx + rdx*1] + db $C4, $63, $7B, $F0, $E1, $1B // rorx r12d, ecx, $1B + db $C4, $E3, $7B, $F0, $D1, $02 // rorx edx, ecx, $2 + xor ecx, esi + add ebx, r12d + xor ecx, eax + add ebp, dword [r13 + $60] + lea ebp, [rcx + rbp*1] + db $C4, $63, $7B, $F0, $E3, $1B // rorx r12d, ebx, $1B + db $C4, $E3, $7B, $F0, $CB, $02 // rorx ecx, ebx, $2 + xor ebx, edx + add ebp, r12d + xor ebx, esi + add eax, dword [r13 + $64] + lea eax, [rax + rbx*1] + db $C4, $63, $7B, $F0, $E5, $1B // rorx r12d, ebp, $1B + db $C4, $E3, $7B, $F0, $DD, $02 // rorx ebx, ebp, $2 + xor ebp, ecx + add eax, r12d + xor ebp, edx + db $C4, $E2, $75, $00, $CE // vpshufb ymm1, ymm1, ymm6 + db $C4, $41, $7D, $FE, $C3 // vpaddd ymm8, ymm0, ymm11 + add esi, dword [r13 + $68] + lea esi, [rsi + rbp*1] + db $C4, $63, $7B, $F0, $E0, $1B // rorx r12d, eax, $1B + db $C4, $E3, $7B, $F0, $E8, $02 // rorx ebp, eax, $2 + xor eax, ebx + add esi, r12d + xor eax, ecx + add edx, dword [r13 + $6C] + lea r13, [r13 + $100] + lea edx, [rdx + rax*1] + db $C4, $63, $7B, $F0, $E6, $1B // rorx r12d, esi, $1B + db $C4, $E3, $7B, $F0, $C6, $02 // rorx eax, esi, $2 + xor esi, ebp + add edx, r12d + xor esi, ebx + add ecx, dword [r13 - $80] + lea ecx, [rcx + rsi*1] + db $C4, $63, $7B, $F0, $E2, $1B // rorx r12d, edx, $1B + db $C4, $E3, $7B, $F0, $F2, $02 // rorx esi, edx, $2 + xor edx, eax + add ecx, r12d + xor edx, ebp + add ebx, dword [r13 - $7C] + lea ebx, [rbx + rdx*1] + db $C4, $63, $7B, $F0, $E1, $1B // rorx r12d, ecx, $1B + db $C4, $E3, $7B, $F0, $D1, $02 // rorx edx, ecx, $2 + xor ecx, esi + add ebx, r12d + xor ecx, eax + add ebp, dword [r13 - $78] + lea ebp, [rcx + rbp*1] + db $C4, $63, $7B, $F0, $E3, $1B // rorx r12d, ebx, $1B + db $C4, $E3, $7B, $F0, $CB, $02 // rorx ecx, ebx, $2 + xor ebx, edx + add ebp, r12d + xor ebx, esi + db $C5, $7E, $7F, $04, $24 // vmovdqu yword [rsp], ymm8 + db $C4, $E2, $6D, $00, $D6 // vpshufb ymm2, ymm2, ymm6 + db $C4, $41, $75, $FE, $CB // vpaddd ymm9, ymm1, ymm11 + add eax, dword [r13 - $74] + lea eax, [rax + rbx*1] + db $C4, $63, $7B, $F0, $E5, $1B // rorx r12d, ebp, $1B + db $C4, $E3, $7B, $F0, $DD, $02 // rorx ebx, ebp, $2 + xor ebp, ecx + add eax, r12d + xor ebp, edx + add esi, dword [r13 - $60] + lea esi, [rsi + rbp*1] + db $C4, $63, $7B, $F0, $E0, $1B // rorx r12d, eax, $1B + db $C4, $E3, $7B, $F0, $E8, $02 // rorx ebp, eax, $2 + xor eax, ebx + add esi, r12d + xor eax, ecx + add edx, dword [r13 - $5C] + lea edx, [rdx + rax*1] + db $C4, $63, $7B, $F0, $E6, $1B // rorx r12d, esi, $1B + db $C4, $E3, $7B, $F0, $C6, $02 // rorx eax, esi, $2 + xor esi, ebp + add edx, r12d + xor esi, ebx + add ecx, dword [r13 - $58] + lea ecx, [rcx + rsi*1] + db $C4, $63, $7B, $F0, $E2, $1B // rorx r12d, edx, $1B + db $C4, $E3, $7B, $F0, $F2, $02 // rorx esi, edx, $2 + xor edx, eax + add ecx, r12d + xor edx, ebp + add ebx, dword [r13 - $54] + mov edi, esi + xor edi, eax + lea ebx, [rbx + rdx*1] + db $C4, $63, $7B, $F0, $E1, $1B // rorx r12d, ecx, $1B + db $C4, $E3, $7B, $F0, $D1, $02 // rorx edx, ecx, $2 + xor ecx, esi + add ebx, r12d + and ecx, edi + db $C5, $7E, $7F, $4C, $24, $20 // vmovdqu yword [rsp + $20], ymm9 + db $C4, $E2, $65, $00, $DE // vpshufb ymm3, ymm3, ymm6 + db $C4, $C1, $6D, $FE, $F3 // vpaddd ymm6, ymm2, ymm11 + add ebp, dword [r13 - $40] + xor ecx, esi + mov edi, edx + xor edi, esi + lea ebp, [rcx + rbp*1] + db $C4, $63, $7B, $F0, $E3, $1B // rorx r12d, ebx, $1B + db $C4, $E3, $7B, $F0, $CB, $02 // rorx ecx, ebx, $2 + xor ebx, edx + add ebp, r12d + and ebx, edi + add eax, dword [r13 - $3C] + xor ebx, edx + mov edi, ecx + xor edi, edx + lea eax, [rax + rbx*1] + db $C4, $63, $7B, $F0, $E5, $1B // rorx r12d, ebp, $1B + db $C4, $E3, $7B, $F0, $DD, $02 // rorx ebx, ebp, $2 + xor ebp, ecx + add eax, r12d + and ebp, edi + add esi, dword [r13 - $38] + xor ebp, ecx + mov edi, ebx + xor edi, ecx + lea esi, [rsi + rbp*1] + db $C4, $63, $7B, $F0, $E0, $1B // rorx r12d, eax, $1B + db $C4, $E3, $7B, $F0, $E8, $02 // rorx ebp, eax, $2 + xor eax, ebx + add esi, r12d + and eax, edi + add edx, dword [r13 - $34] + xor eax, ebx + mov edi, ebp + xor edi, ebx + lea edx, [rdx + rax*1] + db $C4, $63, $7B, $F0, $E6, $1B // rorx r12d, esi, $1B + db $C4, $E3, $7B, $F0, $C6, $02 // rorx eax, esi, $2 + xor esi, ebp + add edx, r12d + and esi, edi + add ecx, dword [r13 - $20] + xor esi, ebp + mov edi, eax + xor edi, ebp + lea ecx, [rcx + rsi*1] + db $C4, $63, $7B, $F0, $E2, $1B // rorx r12d, edx, $1B + db $C4, $E3, $7B, $F0, $F2, $02 // rorx esi, edx, $2 + xor edx, eax + add ecx, r12d + and edx, edi + jmp @align32_3 + +@align32_3: + db $C5, $FE, $7F, $74, $24, $40 // vmovdqu yword [rsp + $40], ymm6 + db $C4, $C1, $65, $FE, $FB // vpaddd ymm7, ymm3, ymm11 + add ebx, dword [r13 - $1C] + xor edx, eax + mov edi, esi + xor edi, eax + lea ebx, [rbx + rdx*1] + db $C4, $63, $7B, $F0, $E1, $1B // rorx r12d, ecx, $1B + db $C4, $E3, $7B, $F0, $D1, $02 // rorx edx, ecx, $2 + xor ecx, esi + add ebx, r12d + and ecx, edi + add ebp, dword [r13 - $18] + xor ecx, esi + mov edi, edx + xor edi, esi + lea ebp, [rcx + rbp*1] + db $C4, $63, $7B, $F0, $E3, $1B // rorx r12d, ebx, $1B + db $C4, $E3, $7B, $F0, $CB, $02 // rorx ecx, ebx, $2 + xor ebx, edx + add ebp, r12d + and ebx, edi + add eax, dword [r13 - $14] + xor ebx, edx + mov edi, ecx + xor edi, edx + lea eax, [rax + rbx*1] + db $C4, $63, $7B, $F0, $E5, $1B // rorx r12d, ebp, $1B + db $C4, $E3, $7B, $F0, $DD, $02 // rorx ebx, ebp, $2 + xor ebp, ecx + add eax, r12d + and ebp, edi + add esi, dword [r13 + $0] + xor ebp, ecx + mov edi, ebx + xor edi, ecx + lea esi, [rsi + rbp*1] + db $C4, $63, $7B, $F0, $E0, $1B // rorx r12d, eax, $1B + db $C4, $E3, $7B, $F0, $E8, $02 // rorx ebp, eax, $2 + xor eax, ebx + add esi, r12d + and eax, edi + add edx, dword [r13 + $4] + xor eax, ebx + mov edi, ebp + xor edi, ebx + lea edx, [rdx + rax*1] + db $C4, $63, $7B, $F0, $E6, $1B // rorx r12d, esi, $1B + db $C4, $E3, $7B, $F0, $C6, $02 // rorx eax, esi, $2 + xor esi, ebp + add edx, r12d + and esi, edi + db $C5, $FE, $7F, $7C, $24, $60 // vmovdqu yword [rsp + $60], ymm7 + add ecx, dword [r13 + $8] + xor esi, ebp + mov edi, eax + xor edi, ebp + lea ecx, [rcx + rsi*1] + db $C4, $63, $7B, $F0, $E2, $1B // rorx r12d, edx, $1B + db $C4, $E3, $7B, $F0, $F2, $02 // rorx esi, edx, $2 + xor edx, eax + add ecx, r12d + and edx, edi + add ebx, dword [r13 + $C] + xor edx, eax + mov edi, esi + xor edi, eax + lea ebx, [rbx + rdx*1] + db $C4, $63, $7B, $F0, $E1, $1B // rorx r12d, ecx, $1B + db $C4, $E3, $7B, $F0, $D1, $02 // rorx edx, ecx, $2 + xor ecx, esi + add ebx, r12d + and ecx, edi + add ebp, dword [r13 + $20] + xor ecx, esi + mov edi, edx + xor edi, esi + lea ebp, [rcx + rbp*1] + db $C4, $63, $7B, $F0, $E3, $1B // rorx r12d, ebx, $1B + db $C4, $E3, $7B, $F0, $CB, $02 // rorx ecx, ebx, $2 + xor ebx, edx + add ebp, r12d + and ebx, edi + add eax, dword [r13 + $24] + xor ebx, edx + mov edi, ecx + xor edi, edx + lea eax, [rax + rbx*1] + db $C4, $63, $7B, $F0, $E5, $1B // rorx r12d, ebp, $1B + db $C4, $E3, $7B, $F0, $DD, $02 // rorx ebx, ebp, $2 + xor ebp, ecx + add eax, r12d + and ebp, edi + add esi, dword [r13 + $28] + xor ebp, ecx + mov edi, ebx + xor edi, ecx + lea esi, [rsi + rbp*1] + db $C4, $63, $7B, $F0, $E0, $1B // rorx r12d, eax, $1B + db $C4, $E3, $7B, $F0, $E8, $02 // rorx ebp, eax, $2 + xor eax, ebx + add esi, r12d + and eax, edi + db $C4, $E3, $75, $0F, $E0, $08 // vpalignr ymm4, ymm1, ymm0, $8 + add edx, dword [r13 + $2C] + xor eax, ebx + mov edi, ebp + xor edi, ebx + db $C5, $BD, $73, $DB, $04 // vpsrldq ymm8, ymm3, $4 + lea edx, [rdx + rax*1] + db $C4, $63, $7B, $F0, $E6, $1B // rorx r12d, esi, $1B + db $C4, $E3, $7B, $F0, $C6, $02 // rorx eax, esi, $2 + db $C5, $DD, $EF, $E0 // vpxor ymm4, ymm4, ymm0 + db $C5, $3D, $EF, $C2 // vpxor ymm8, ymm8, ymm2 + xor esi, ebp + add edx, r12d + db $C4, $C1, $5D, $EF, $E0 // vpxor ymm4, ymm4, ymm8 + and esi, edi + add ecx, dword [r13 + $40] + xor esi, ebp + mov edi, eax + db $C5, $BD, $72, $D4, $1F // vpsrld ymm8, ymm4, $1F + xor edi, ebp + lea ecx, [rcx + rsi*1] + db $C4, $63, $7B, $F0, $E2, $1B // rorx r12d, edx, $1B + db $C5, $AD, $73, $FC, $0C // vpslldq ymm10, ymm4, $C + db $C5, $DD, $FE, $E4 // vpaddd ymm4, ymm4, ymm4 + db $C4, $E3, $7B, $F0, $F2, $02 // rorx esi, edx, $2 + xor edx, eax + db $C4, $C1, $35, $72, $D2, $1E // vpsrld ymm9, ymm10, $1E + db $C4, $C1, $5D, $EB, $E0 // vpor ymm4, ymm4, ymm8 + add ecx, r12d + and edx, edi + db $C4, $C1, $2D, $72, $F2, $02 // vpslld ymm10, ymm10, $2 + db $C4, $C1, $5D, $EF, $E1 // vpxor ymm4, ymm4, ymm9 + add ebx, dword [r13 + $44] + xor edx, eax + db $C4, $C1, $5D, $EF, $E2 // vpxor ymm4, ymm4, ymm10 + mov edi, esi + xor edi, eax + lea ebx, [rbx + rdx*1] + db $C4, $41, $5D, $FE, $CB // vpaddd ymm9, ymm4, ymm11 + db $C4, $63, $7B, $F0, $E1, $1B // rorx r12d, ecx, $1B + db $C4, $E3, $7B, $F0, $D1, $02 // rorx edx, ecx, $2 + xor ecx, esi + db $C5, $7E, $7F, $8C, $24, $80, $00, $00, $00 // vmovdqu yword [rsp + $80], ymm9 + add ebx, r12d + and ecx, edi + add ebp, dword [r13 + $48] + xor ecx, esi + mov edi, edx + xor edi, esi + lea ebp, [rcx + rbp*1] + db $C4, $63, $7B, $F0, $E3, $1B // rorx r12d, ebx, $1B + db $C4, $E3, $7B, $F0, $CB, $02 // rorx ecx, ebx, $2 + xor ebx, edx + add ebp, r12d + and ebx, edi + add eax, dword [r13 + $4C] + xor ebx, edx + lea eax, [rax + rbx*1] + db $C4, $63, $7B, $F0, $E5, $1B // rorx r12d, ebp, $1B + db $C4, $E3, $7B, $F0, $DD, $02 // rorx ebx, ebp, $2 + xor ebp, ecx + add eax, r12d + xor ebp, edx + db $C4, $E3, $6D, $0F, $E9, $08 // vpalignr ymm5, ymm2, ymm1, $8 + add esi, dword [r13 + $60] + lea esi, [rsi + rbp*1] + db $C4, $63, $7B, $F0, $E0, $1B // rorx r12d, eax, $1B + db $C4, $E3, $7B, $F0, $E8, $02 // rorx ebp, eax, $2 + db $C5, $BD, $73, $DC, $04 // vpsrldq ymm8, ymm4, $4 + xor eax, ebx + add esi, r12d + xor eax, ecx + db $C5, $D5, $EF, $E9 // vpxor ymm5, ymm5, ymm1 + db $C5, $3D, $EF, $C3 // vpxor ymm8, ymm8, ymm3 + add edx, dword [r13 + $64] + lea edx, [rdx + rax*1] + db $C4, $C1, $55, $EF, $E8 // vpxor ymm5, ymm5, ymm8 + db $C4, $63, $7B, $F0, $E6, $1B // rorx r12d, esi, $1B + db $C4, $E3, $7B, $F0, $C6, $02 // rorx eax, esi, $2 + xor esi, ebp + add edx, r12d + db $C5, $BD, $72, $D5, $1F // vpsrld ymm8, ymm5, $1F + db $C4, $41, $7E, $6F, $5E, $E0 // vmovdqu ymm11, yword [r14 - $20] + xor esi, ebx + add ecx, dword [r13 + $68] + lea ecx, [rcx + rsi*1] + db $C5, $AD, $73, $FD, $0C // vpslldq ymm10, ymm5, $C + db $C5, $D5, $FE, $ED // vpaddd ymm5, ymm5, ymm5 + db $C4, $63, $7B, $F0, $E2, $1B // rorx r12d, edx, $1B + db $C4, $E3, $7B, $F0, $F2, $02 // rorx esi, edx, $2 + db $C4, $C1, $35, $72, $D2, $1E // vpsrld ymm9, ymm10, $1E + db $C4, $C1, $55, $EB, $E8 // vpor ymm5, ymm5, ymm8 + xor edx, eax + add ecx, r12d + db $C4, $C1, $2D, $72, $F2, $02 // vpslld ymm10, ymm10, $2 + db $C4, $C1, $55, $EF, $E9 // vpxor ymm5, ymm5, ymm9 + xor edx, ebp + add ebx, dword [r13 + $6C] + lea r13, [r13 + $100] + db $C4, $C1, $55, $EF, $EA // vpxor ymm5, ymm5, ymm10 + lea ebx, [rbx + rdx*1] + db $C4, $63, $7B, $F0, $E1, $1B // rorx r12d, ecx, $1B + db $C4, $E3, $7B, $F0, $D1, $02 // rorx edx, ecx, $2 + db $C4, $41, $55, $FE, $CB // vpaddd ymm9, ymm5, ymm11 + xor ecx, esi + add ebx, r12d + xor ecx, eax + db $C5, $7E, $7F, $8C, $24, $A0, $00, $00, $00 // vmovdqu yword [rsp + $A0], ymm9 + add ebp, dword [r13 - $80] + lea ebp, [rcx + rbp*1] + db $C4, $63, $7B, $F0, $E3, $1B // rorx r12d, ebx, $1B + db $C4, $E3, $7B, $F0, $CB, $02 // rorx ecx, ebx, $2 + xor ebx, edx + add ebp, r12d + xor ebx, esi + db $C4, $E3, $65, $0F, $F2, $08 // vpalignr ymm6, ymm3, ymm2, $8 + add eax, dword [r13 - $7C] + lea eax, [rax + rbx*1] + db $C4, $63, $7B, $F0, $E5, $1B // rorx r12d, ebp, $1B + db $C4, $E3, $7B, $F0, $DD, $02 // rorx ebx, ebp, $2 + db $C5, $BD, $73, $DD, $04 // vpsrldq ymm8, ymm5, $4 + xor ebp, ecx + add eax, r12d + xor ebp, edx + db $C5, $CD, $EF, $F2 // vpxor ymm6, ymm6, ymm2 + db $C5, $3D, $EF, $C4 // vpxor ymm8, ymm8, ymm4 + add esi, dword [r13 - $78] + lea esi, [rsi + rbp*1] + db $C4, $C1, $4D, $EF, $F0 // vpxor ymm6, ymm6, ymm8 + db $C4, $63, $7B, $F0, $E0, $1B // rorx r12d, eax, $1B + db $C4, $E3, $7B, $F0, $E8, $02 // rorx ebp, eax, $2 + xor eax, ebx + add esi, r12d + db $C5, $BD, $72, $D6, $1F // vpsrld ymm8, ymm6, $1F + xor eax, ecx + add edx, dword [r13 - $74] + lea edx, [rdx + rax*1] + db $C5, $AD, $73, $FE, $0C // vpslldq ymm10, ymm6, $C + db $C5, $CD, $FE, $F6 // vpaddd ymm6, ymm6, ymm6 + db $C4, $63, $7B, $F0, $E6, $1B // rorx r12d, esi, $1B + db $C4, $E3, $7B, $F0, $C6, $02 // rorx eax, esi, $2 + db $C4, $C1, $35, $72, $D2, $1E // vpsrld ymm9, ymm10, $1E + db $C4, $C1, $4D, $EB, $F0 // vpor ymm6, ymm6, ymm8 + xor esi, ebp + add edx, r12d + db $C4, $C1, $2D, $72, $F2, $02 // vpslld ymm10, ymm10, $2 + db $C4, $C1, $4D, $EF, $F1 // vpxor ymm6, ymm6, ymm9 + xor esi, ebx + add ecx, dword [r13 - $60] + db $C4, $C1, $4D, $EF, $F2 // vpxor ymm6, ymm6, ymm10 + lea ecx, [rcx + rsi*1] + db $C4, $63, $7B, $F0, $E2, $1B // rorx r12d, edx, $1B + db $C4, $E3, $7B, $F0, $F2, $02 // rorx esi, edx, $2 + db $C4, $41, $4D, $FE, $CB // vpaddd ymm9, ymm6, ymm11 + xor edx, eax + add ecx, r12d + xor edx, ebp + db $C5, $7E, $7F, $8C, $24, $C0, $00, $00, $00 // vmovdqu yword [rsp + $C0], ymm9 + add ebx, dword [r13 - $5C] + lea ebx, [rbx + rdx*1] + db $C4, $63, $7B, $F0, $E1, $1B // rorx r12d, ecx, $1B + db $C4, $E3, $7B, $F0, $D1, $02 // rorx edx, ecx, $2 + xor ecx, esi + add ebx, r12d + xor ecx, eax + db $C4, $E3, $5D, $0F, $FB, $08 // vpalignr ymm7, ymm4, ymm3, $8 + add ebp, dword [r13 - $58] + lea ebp, [rcx + rbp*1] + db $C4, $63, $7B, $F0, $E3, $1B // rorx r12d, ebx, $1B + db $C4, $E3, $7B, $F0, $CB, $02 // rorx ecx, ebx, $2 + db $C5, $BD, $73, $DE, $04 // vpsrldq ymm8, ymm6, $4 + xor ebx, edx + add ebp, r12d + xor ebx, esi + db $C5, $C5, $EF, $FB // vpxor ymm7, ymm7, ymm3 + db $C5, $3D, $EF, $C5 // vpxor ymm8, ymm8, ymm5 + add eax, dword [r13 - $54] + lea eax, [rax + rbx*1] + db $C4, $C1, $45, $EF, $F8 // vpxor ymm7, ymm7, ymm8 + db $C4, $63, $7B, $F0, $E5, $1B // rorx r12d, ebp, $1B + db $C4, $E3, $7B, $F0, $DD, $02 // rorx ebx, ebp, $2 + xor ebp, ecx + add eax, r12d + db $C5, $BD, $72, $D7, $1F // vpsrld ymm8, ymm7, $1F + xor ebp, edx + add esi, dword [r13 - $40] + lea esi, [rsi + rbp*1] + db $C5, $AD, $73, $FF, $0C // vpslldq ymm10, ymm7, $C + db $C5, $C5, $FE, $FF // vpaddd ymm7, ymm7, ymm7 + db $C4, $63, $7B, $F0, $E0, $1B // rorx r12d, eax, $1B + db $C4, $E3, $7B, $F0, $E8, $02 // rorx ebp, eax, $2 + db $C4, $C1, $35, $72, $D2, $1E // vpsrld ymm9, ymm10, $1E + db $C4, $C1, $45, $EB, $F8 // vpor ymm7, ymm7, ymm8 + xor eax, ebx + add esi, r12d + db $C4, $C1, $2D, $72, $F2, $02 // vpslld ymm10, ymm10, $2 + db $C4, $C1, $45, $EF, $F9 // vpxor ymm7, ymm7, ymm9 + xor eax, ecx + add edx, dword [r13 - $3C] + db $C4, $C1, $45, $EF, $FA // vpxor ymm7, ymm7, ymm10 + lea edx, [rdx + rax*1] + db $C4, $63, $7B, $F0, $E6, $1B // rorx r12d, esi, $1B + db $C4, $E3, $7B, $F0, $C6, $02 // rorx eax, esi, $2 + db $C4, $41, $45, $FE, $CB // vpaddd ymm9, ymm7, ymm11 + xor esi, ebp + add edx, r12d + xor esi, ebx + db $C5, $7E, $7F, $8C, $24, $E0, $00, $00, $00 // vmovdqu yword [rsp + $E0], ymm9 + add ecx, dword [r13 - $38] + lea ecx, [rcx + rsi*1] + db $C4, $63, $7B, $F0, $E2, $1B // rorx r12d, edx, $1B + db $C4, $E3, $7B, $F0, $F2, $02 // rorx esi, edx, $2 + xor edx, eax + add ecx, r12d + xor edx, ebp + add ebx, dword [r13 - $34] + lea ebx, [rbx + rdx*1] + db $C4, $63, $7B, $F0, $E1, $1B // rorx r12d, ecx, $1B + db $C4, $E3, $7B, $F0, $D1, $02 // rorx edx, ecx, $2 + xor ecx, esi + add ebx, r12d + xor ecx, eax + add ebp, dword [r13 - $20] + lea ebp, [rcx + rbp*1] + db $C4, $63, $7B, $F0, $E3, $1B // rorx r12d, ebx, $1B + db $C4, $E3, $7B, $F0, $CB, $02 // rorx ecx, ebx, $2 + xor ebx, edx + add ebp, r12d + xor ebx, esi + add eax, dword [r13 - $1C] + lea eax, [rax + rbx*1] + db $C4, $63, $7B, $F0, $E5, $1B // rorx r12d, ebp, $1B + db $C4, $E3, $7B, $F0, $DD, $02 // rorx ebx, ebp, $2 + xor ebp, ecx + add eax, r12d + xor ebp, edx + add esi, dword [r13 - $18] + lea esi, [rsi + rbp*1] + db $C4, $63, $7B, $F0, $E0, $1B // rorx r12d, eax, $1B + db $C4, $E3, $7B, $F0, $E8, $02 // rorx ebp, eax, $2 + xor eax, ebx + add esi, r12d + xor eax, ecx + add edx, dword [r13 - $14] + lea edx, [rdx + rax*1] + db $C4, $63, $7B, $F0, $E6, $1B // rorx r12d, esi, $1B + add edx, r12d + lea r13, [rsp + $80] + add edx, dword [r8] + add esi, dword [r8 + $4] + add ebp, dword [r8 + $8] + mov dword [r8], edx + add ebx, dword [r8 + $C] + mov dword [r8 + $4], esi + mov eax, edx + add ecx, dword [r8 + $10] + mov r12d, ebp + mov dword [r8 + $8], ebp + mov edx, ebx + mov dword [r8 + $C], ebx + mov ebp, esi + mov dword [r8 + $10], ecx + mov esi, ecx + mov ecx, r12d + cmp r9, r10 + jbe @block_loop + +@done: + db $C5, $F8, $77 // vzeroupper + mov rsi, qword [r11 - $40] + mov rdi, qword [r11 - $38] + mov r14, qword [r11 - $30] + mov r13, qword [r11 - $28] + mov r12, qword [r11 - $20] + mov rbp, qword [r11 - $18] + mov rbx, qword [r11 - $10] + lea rsp, [r11] {$I ..\Include\Simd\Common\SimdNonVolatileRestore_x86_64.inc} diff --git a/HashLib/src/Include/Simd/SHA1/SHA1CompressSse2_i386.inc b/HashLib/src/Include/Simd/SHA1/SHA1CompressSse2_i386.inc index e335d49c..8b1041f6 100644 --- a/HashLib/src/Include/Simd/SHA1/SHA1CompressSse2_i386.inc +++ b/HashLib/src/Include/Simd/SHA1/SHA1CompressSse2_i386.inc @@ -1,466 +1,1260 @@ -// SHA-1 SSE2 implementation with SIMD message schedule. -// Based on SSSE3 implementation (see SHA1CompressSsse3_x86_64.inc). -// Same algorithm as SSSE3 version but byte-swap uses SSE2 emulation -// (pshuflw/pshufhw + psrlw/psllw/por) instead of SSSE3 pshufb. -// IA-32: after SimdProc3Begin_i386 — ebx = state, esi = data, edi = numblocks -// (parallel to MS x64 ABI: rcx, rdx, r8d). Round constants are inlined as -// immediates and SSE2 byte-swaps without a mask (both x64 and i386 use 3 params). -// Uses xmm0–xmm6; xmm6 saved/restored defensively (volatile on i386). -// -// Two phases per block: -// Phase 1 (SIMD): SSE2 byte-swap W[0..15], then expand W[16..79] (same as SSSE3 schedule). -// Phase 2 (GPR): 80 compression rounds with 5-round unrolling -// -// Saved GPR / stack (sub esp, 424): [esp+$10] state, +$14 data, +$18 numblocks, +$1C E, +$20 loop ctr, -// +$38 saved ebp; W buffer at +$60. -// W-buffer uses movdqu (not movdqa): this frame does not keep ESP 16-byte aligned. - - sub esp, 424 - - movdqu oword ptr [esp], xmm6 - mov [esp + $10], ebx - mov [esp + $14], esi - mov [esp + $18], edi - mov [esp + $38], ebp - - test edi, edi - jz @sse2_sha1_done - -@sse2_sha1_block_loop: - - // ========== Phase 1: SIMD message schedule ========== - - mov esi, [esp + $14] - lea ebx, [esp + $60] - - // SSE2 32-bit byte-swap: pshuflw/pshufhw swap 16-bit words, then swap bytes within words - movdqu xmm0, oword ptr [esi] +// SHA-1 SSE2 SIMD-schedule implementation (IA-32), derived from OpenSSL's +// sha1-586 (CRYPTOGAMS) SSSE3 kernel. The message schedule runs in SSE2 +// (pxor/pshufd/psrldq/pslldq) interleaved with the GPR compression rounds. +// OpenSSL's only SSSE3-only op is the pshufb input byte-swap, emulated in SSE2 as +// psrlw/psllw/por + pshuflw/pshufhw (the freed byte-swap-mask register xmm6 is the +// scratch); the W-schedule uses no palignr. +// Expects (after SimdProc4Begin_i386): ebx = state, esi = data, edi = numblocks, +// eax = doubled-K_SHA1 ptr (read at a 32-byte stride so the duplicated halves +// are skipped; see K_SHA1_Doubled). SimdProc4Begin pushes ebx/esi/edi; ebp is +// pushed here as the K pointer, then reused as the data pointer and for the +// state writeback. + + push ebp + mov ebp, eax + + movdqu xmm7, oword [ebp + $0] + movdqu xmm0, oword [ebp + $20] + movdqu xmm1, oword [ebp + $40] + movdqu xmm2, oword [ebp + $60] + movdqu xmm6, oword [ebp + $80] + mov edx, edi + mov edi, ebx + mov ebp, esi + mov esi, esp + sub esp, $D0 + and esp, $FFFFFFC0 + movdqa oword [esp + $70], xmm0 + movdqa oword [esp + $80], xmm1 + movdqa oword [esp + $90], xmm2 + shl edx, $6 + movdqa oword [esp + $A0], xmm7 + add edx, ebp + movdqa oword [esp + $B0], xmm6 + add ebp, $40 + mov dword [esp + $C0], edi + mov dword [esp + $C4], ebp + mov dword [esp + $C8], edx + mov dword [esp + $CC], esi + mov eax, dword [edi] + mov ebx, dword [edi + $4] + mov ecx, dword [edi + $8] + mov edx, dword [edi + $C] + mov edi, dword [edi + $10] + mov esi, ebx + movdqu xmm0, oword [ebp - $40] + movdqu xmm1, oword [ebp - $30] + movdqu xmm2, oword [ebp - $20] + movdqu xmm3, oword [ebp - $10] + movdqa xmm6, xmm0 + psrlw xmm6, $8 + psllw xmm0, $8 + por xmm0, xmm6 pshuflw xmm0, xmm0, $B1 pshufhw xmm0, xmm0, $B1 - movdqa xmm4, xmm0 - psrlw xmm0, 8 - psllw xmm4, 8 - por xmm0, xmm4 - movdqu oword ptr [ebx], xmm0 - - movdqu xmm1, oword ptr [esi + $10] + movdqa xmm6, xmm1 + psrlw xmm6, $8 + psllw xmm1, $8 + por xmm1, xmm6 pshuflw xmm1, xmm1, $B1 pshufhw xmm1, xmm1, $B1 - movdqa xmm4, xmm1 - psrlw xmm1, 8 - psllw xmm4, 8 - por xmm1, xmm4 - movdqu oword ptr [ebx + $10], xmm1 - - movdqu xmm2, oword ptr [esi + $20] + movdqa xmm6, xmm2 + psrlw xmm6, $8 + psllw xmm2, $8 + por xmm2, xmm6 pshuflw xmm2, xmm2, $B1 pshufhw xmm2, xmm2, $B1 - movdqa xmm4, xmm2 - psrlw xmm2, 8 - psllw xmm4, 8 - por xmm2, xmm4 - movdqu oword ptr [ebx + $20], xmm2 - - movdqu xmm3, oword ptr [esi + $30] + movdqa oword [esp + $60], xmm7 + movdqa xmm6, xmm3 + psrlw xmm6, $8 + psllw xmm3, $8 + por xmm3, xmm6 pshuflw xmm3, xmm3, $B1 pshufhw xmm3, xmm3, $B1 - movdqa xmm4, xmm3 - psrlw xmm3, 8 - psllw xmm4, 8 - por xmm3, xmm4 - movdqu oword ptr [ebx + $30], xmm3 - - // --- W[16..31]: ROL1 formula with cross-lane fix --- - - lea edi, [ebx + $40] - lea ecx, [ebx + $80] - -@sse2_sha1_expand_16_31: - movdqu xmm0, oword ptr [edi - $40] - movdqu xmm1, oword ptr [edi - $30] - movdqu xmm2, oword ptr [edi - $20] - movdqu xmm3, oword ptr [edi - $10] + paddd xmm0, xmm7 + paddd xmm1, xmm7 + paddd xmm2, xmm7 + movdqa oword [esp], xmm0 + psubd xmm0, xmm7 + movdqa oword [esp + $10], xmm1 + psubd xmm1, xmm7 + movdqa oword [esp + $20], xmm2 + mov ebp, ecx + psubd xmm2, xmm7 + xor ebp, edx + pshufd xmm4, xmm0, $EE + and esi, ebp + jmp @block_loop +@block_loop: + ror ebx, $2 + xor esi, edx + mov ebp, eax + punpcklqdq xmm4, xmm1 + movdqa xmm6, xmm3 + add edi, dword [esp] + xor ebx, ecx + paddd xmm7, xmm3 + movdqa oword [esp + $40], xmm0 + rol eax, $5 + add edi, esi + psrldq xmm6, $4 + and ebp, ebx + xor ebx, ecx + pxor xmm4, xmm0 + add edi, eax + ror eax, $7 + pxor xmm6, xmm2 + xor ebp, ecx + mov esi, edi + add edx, dword [esp + $4] + pxor xmm4, xmm6 + xor eax, ebx + rol edi, $5 + movdqa oword [esp + $30], xmm7 + add edx, ebp + and esi, eax + movdqa xmm0, xmm4 + xor eax, ebx + add edx, edi + ror edi, $7 + movdqa xmm6, xmm4 + xor esi, ebx + pslldq xmm0, $C + paddd xmm4, xmm4 + mov ebp, edx + add ecx, dword [esp + $8] + psrld xmm6, $1F + xor edi, eax + rol edx, $5 + movdqa xmm7, xmm0 + add ecx, esi + and ebp, edi + xor edi, eax + psrld xmm0, $1E + add ecx, edx + ror edx, $7 + por xmm4, xmm6 + xor ebp, eax + mov esi, ecx + add ebx, dword [esp + $C] + pslld xmm7, $2 + xor edx, edi + rol ecx, $5 + pxor xmm4, xmm0 + movdqa xmm0, oword [esp + $60] + add ebx, ebp + and esi, edx + pxor xmm4, xmm7 + pshufd xmm5, xmm1, $EE + xor edx, edi + add ebx, ecx + ror ecx, $7 + xor esi, edi + mov ebp, ebx + punpcklqdq xmm5, xmm2 + movdqa xmm7, xmm4 + add eax, dword [esp + $10] + xor ecx, edx + paddd xmm0, xmm4 + movdqa oword [esp + $50], xmm1 + rol ebx, $5 + add eax, esi + psrldq xmm7, $4 + and ebp, ecx + xor ecx, edx + pxor xmm5, xmm1 + add eax, ebx + ror ebx, $7 + pxor xmm7, xmm3 + xor ebp, edx + mov esi, eax + add edi, dword [esp + $14] + pxor xmm5, xmm7 + xor ebx, ecx + rol eax, $5 + movdqa oword [esp], xmm0 + add edi, ebp + and esi, ebx + movdqa xmm1, xmm5 + xor ebx, ecx + add edi, eax + ror eax, $7 + movdqa xmm7, xmm5 + xor esi, ecx + pslldq xmm1, $C + paddd xmm5, xmm5 + mov ebp, edi + add edx, dword [esp + $18] + psrld xmm7, $1F + xor eax, ebx + rol edi, $5 + movdqa xmm0, xmm1 + add edx, esi + and ebp, eax + xor eax, ebx + psrld xmm1, $1E + add edx, edi + ror edi, $7 + por xmm5, xmm7 + xor ebp, ebx + mov esi, edx + add ecx, dword [esp + $1C] + pslld xmm0, $2 + xor edi, eax + rol edx, $5 + pxor xmm5, xmm1 + movdqa xmm1, oword [esp + $70] + add ecx, ebp + and esi, edi + pxor xmm5, xmm0 + pshufd xmm6, xmm2, $EE + xor edi, eax + add ecx, edx + ror edx, $7 + xor esi, eax + mov ebp, ecx + punpcklqdq xmm6, xmm3 + movdqa xmm0, xmm5 + add ebx, dword [esp + $20] + xor edx, edi + paddd xmm1, xmm5 + movdqa oword [esp + $60], xmm2 + rol ecx, $5 + add ebx, esi + psrldq xmm0, $4 + and ebp, edx + xor edx, edi + pxor xmm6, xmm2 + add ebx, ecx + ror ecx, $7 + pxor xmm0, xmm4 + xor ebp, edi + mov esi, ebx + add eax, dword [esp + $24] + pxor xmm6, xmm0 + xor ecx, edx + rol ebx, $5 + movdqa oword [esp + $10], xmm1 + add eax, ebp + and esi, ecx + movdqa xmm2, xmm6 + xor ecx, edx + add eax, ebx + ror ebx, $7 + movdqa xmm0, xmm6 + xor esi, edx + pslldq xmm2, $C + paddd xmm6, xmm6 + mov ebp, eax + add edi, dword [esp + $28] + psrld xmm0, $1F + xor ebx, ecx + rol eax, $5 + movdqa xmm1, xmm2 + add edi, esi + and ebp, ebx + xor ebx, ecx + psrld xmm2, $1E + add edi, eax + ror eax, $7 + por xmm6, xmm0 + xor ebp, ecx + movdqa xmm0, oword [esp + $40] + mov esi, edi + add edx, dword [esp + $2C] + pslld xmm1, $2 + xor eax, ebx + rol edi, $5 + pxor xmm6, xmm2 + movdqa xmm2, oword [esp + $70] + add edx, ebp + and esi, eax + pxor xmm6, xmm1 + pshufd xmm7, xmm3, $EE + xor eax, ebx + add edx, edi + ror edi, $7 + xor esi, ebx + mov ebp, edx + punpcklqdq xmm7, xmm4 + movdqa xmm1, xmm6 + add ecx, dword [esp + $30] + xor edi, eax + paddd xmm2, xmm6 + movdqa oword [esp + $40], xmm3 + rol edx, $5 + add ecx, esi + psrldq xmm1, $4 + and ebp, edi + xor edi, eax + pxor xmm7, xmm3 + add ecx, edx + ror edx, $7 + pxor xmm1, xmm5 + xor ebp, eax + mov esi, ecx + add ebx, dword [esp + $34] + pxor xmm7, xmm1 + xor edx, edi + rol ecx, $5 + movdqa oword [esp + $20], xmm2 + add ebx, ebp + and esi, edx + movdqa xmm3, xmm7 + xor edx, edi + add ebx, ecx + ror ecx, $7 + movdqa xmm1, xmm7 + xor esi, edi + pslldq xmm3, $C + paddd xmm7, xmm7 + mov ebp, ebx + add eax, dword [esp + $38] + psrld xmm1, $1F + xor ecx, edx + rol ebx, $5 + movdqa xmm2, xmm3 + add eax, esi + and ebp, ecx + xor ecx, edx + psrld xmm3, $1E + add eax, ebx + ror ebx, $7 + por xmm7, xmm1 + xor ebp, edx + movdqa xmm1, oword [esp + $50] + mov esi, eax + add edi, dword [esp + $3C] + pslld xmm2, $2 + xor ebx, ecx + rol eax, $5 + pxor xmm7, xmm3 + movdqa xmm3, oword [esp + $70] + add edi, ebp + and esi, ebx + pxor xmm7, xmm2 + pshufd xmm2, xmm6, $EE + xor ebx, ecx + add edi, eax + ror eax, $7 + pxor xmm0, xmm4 + punpcklqdq xmm2, xmm7 + xor esi, ecx + mov ebp, edi + add edx, dword [esp] + pxor xmm0, xmm1 + movdqa oword [esp + $50], xmm4 + xor eax, ebx + rol edi, $5 + movdqa xmm4, xmm3 + add edx, esi + paddd xmm3, xmm7 + and ebp, eax + pxor xmm0, xmm2 + xor eax, ebx + add edx, edi + ror edi, $7 + xor ebp, ebx + movdqa xmm2, xmm0 + movdqa oword [esp + $30], xmm3 + mov esi, edx + add ecx, dword [esp + $4] + xor edi, eax + rol edx, $5 + pslld xmm0, $2 + add ecx, ebp + and esi, edi + psrld xmm2, $1E + xor edi, eax + add ecx, edx + ror edx, $7 + xor esi, eax + mov ebp, ecx + add ebx, dword [esp + $8] + xor edx, edi + rol ecx, $5 + por xmm0, xmm2 + add ebx, esi + and ebp, edx + movdqa xmm2, oword [esp + $60] + xor edx, edi + add ebx, ecx + add eax, dword [esp + $C] + xor ebp, edi + mov esi, ebx + pshufd xmm3, xmm7, $EE + rol ebx, $5 + add eax, ebp + xor esi, edx + ror ecx, $7 + add eax, ebx + add edi, dword [esp + $10] + pxor xmm1, xmm5 + punpcklqdq xmm3, xmm0 + xor esi, ecx + mov ebp, eax + rol eax, $5 + pxor xmm1, xmm2 + movdqa oword [esp + $60], xmm5 + add edi, esi + xor ebp, ecx + movdqa xmm5, xmm4 + ror ebx, $7 + paddd xmm4, xmm0 + add edi, eax + pxor xmm1, xmm3 + add edx, dword [esp + $14] + xor ebp, ebx + mov esi, edi + rol edi, $5 + movdqa xmm3, xmm1 + movdqa oword [esp], xmm4 + add edx, ebp + xor esi, ebx + ror eax, $7 + add edx, edi + pslld xmm1, $2 + add ecx, dword [esp + $18] + xor esi, eax + psrld xmm3, $1E + mov ebp, edx + rol edx, $5 + add ecx, esi + xor ebp, eax + ror edi, $7 + add ecx, edx + por xmm1, xmm3 + add ebx, dword [esp + $1C] + xor ebp, edi + movdqa xmm3, oword [esp + $40] + mov esi, ecx + rol ecx, $5 + add ebx, ebp + xor esi, edi + ror edx, $7 pshufd xmm4, xmm0, $EE + add ebx, ecx + add eax, dword [esp + $20] + pxor xmm2, xmm6 punpcklqdq xmm4, xmm1 - + xor esi, edx + mov ebp, ebx + rol ebx, $5 + pxor xmm2, xmm3 + movdqa oword [esp + $40], xmm6 + add eax, esi + xor ebp, edx + movdqa xmm6, oword [esp + $80] + ror ecx, $7 + paddd xmm5, xmm1 + add eax, ebx + pxor xmm2, xmm4 + add edi, dword [esp + $24] + xor ebp, ecx + mov esi, eax + rol eax, $5 + movdqa xmm4, xmm2 + movdqa oword [esp + $10], xmm5 + add edi, ebp + xor esi, ecx + ror ebx, $7 + add edi, eax + pslld xmm2, $2 + add edx, dword [esp + $28] + xor esi, ebx + psrld xmm4, $1E + mov ebp, edi + rol edi, $5 + add edx, esi + xor ebp, ebx + ror eax, $7 + add edx, edi + por xmm2, xmm4 + add ecx, dword [esp + $2C] + xor ebp, eax + movdqa xmm4, oword [esp + $50] + mov esi, edx + rol edx, $5 + add ecx, ebp + xor esi, eax + ror edi, $7 + pshufd xmm5, xmm1, $EE + add ecx, edx + add ebx, dword [esp + $30] + pxor xmm3, xmm7 + punpcklqdq xmm5, xmm2 + xor esi, edi + mov ebp, ecx + rol ecx, $5 + pxor xmm3, xmm4 + movdqa oword [esp + $50], xmm7 + add ebx, esi + xor ebp, edi + movdqa xmm7, xmm6 + ror edx, $7 + paddd xmm6, xmm2 + add ebx, ecx + pxor xmm3, xmm5 + add eax, dword [esp + $34] + xor ebp, edx + mov esi, ebx + rol ebx, $5 movdqa xmm5, xmm3 - psrldq xmm5, 4 - - pxor xmm4, xmm0 - pxor xmm5, xmm2 - pxor xmm4, xmm5 - + movdqa oword [esp + $20], xmm6 + add eax, ebp + xor esi, edx + ror ecx, $7 + add eax, ebx + pslld xmm3, $2 + add edi, dword [esp + $38] + xor esi, ecx + psrld xmm5, $1E + mov ebp, eax + rol eax, $5 + add edi, esi + xor ebp, ecx + ror ebx, $7 + add edi, eax + por xmm3, xmm5 + add edx, dword [esp + $3C] + xor ebp, ebx + movdqa xmm5, oword [esp + $60] + mov esi, edi + rol edi, $5 + add edx, ebp + xor esi, ebx + ror eax, $7 + pshufd xmm6, xmm2, $EE + add edx, edi + add ecx, dword [esp] + pxor xmm4, xmm0 + punpcklqdq xmm6, xmm3 + xor esi, eax + mov ebp, edx + rol edx, $5 + pxor xmm4, xmm5 + movdqa oword [esp + $60], xmm0 + add ecx, esi + xor ebp, eax + movdqa xmm0, xmm7 + ror edi, $7 + paddd xmm7, xmm3 + add ecx, edx + pxor xmm4, xmm6 + add ebx, dword [esp + $4] + xor ebp, edi + mov esi, ecx + rol ecx, $5 movdqa xmm6, xmm4 + movdqa oword [esp + $30], xmm7 + add ebx, ebp + xor esi, edi + ror edx, $7 + add ebx, ecx + pslld xmm4, $2 + add eax, dword [esp + $8] + xor esi, edx + psrld xmm6, $1E + mov ebp, ebx + rol ebx, $5 + add eax, esi + xor ebp, edx + ror ecx, $7 + add eax, ebx + por xmm4, xmm6 + add edi, dword [esp + $C] + xor ebp, ecx + movdqa xmm6, oword [esp + $40] + mov esi, eax + rol eax, $5 + add edi, ebp + xor esi, ecx + ror ebx, $7 + pshufd xmm7, xmm3, $EE + add edi, eax + add edx, dword [esp + $10] + pxor xmm5, xmm1 + punpcklqdq xmm7, xmm4 + xor esi, ebx + mov ebp, edi + rol edi, $5 + pxor xmm5, xmm6 + movdqa oword [esp + $40], xmm1 + add edx, esi + xor ebp, ebx + movdqa xmm1, xmm0 + ror eax, $7 + paddd xmm0, xmm4 + add edx, edi + pxor xmm5, xmm7 + add ecx, dword [esp + $14] + xor ebp, eax + mov esi, edx + rol edx, $5 + movdqa xmm7, xmm5 + movdqa oword [esp], xmm0 + add ecx, ebp + xor esi, eax + ror edi, $7 + add ecx, edx + pslld xmm5, $2 + add ebx, dword [esp + $18] + xor esi, edi + psrld xmm7, $1E + mov ebp, ecx + rol ecx, $5 + add ebx, esi + xor ebp, edi + ror edx, $7 + add ebx, ecx + por xmm5, xmm7 + add eax, dword [esp + $1C] + movdqa xmm7, oword [esp + $50] + ror ecx, $7 + mov esi, ebx + xor ebp, edx + rol ebx, $5 + pshufd xmm0, xmm4, $EE + add eax, ebp + xor esi, ecx + xor ecx, edx + add eax, ebx + add edi, dword [esp + $20] + pxor xmm6, xmm2 + punpcklqdq xmm0, xmm5 + and esi, ecx + xor ecx, edx + ror ebx, $7 + pxor xmm6, xmm7 + movdqa oword [esp + $50], xmm2 + mov ebp, eax + xor esi, ecx + rol eax, $5 + movdqa xmm2, xmm1 + add edi, esi + paddd xmm1, xmm5 + xor ebp, ebx + pxor xmm6, xmm0 + xor ebx, ecx + add edi, eax + add edx, dword [esp + $24] + and ebp, ebx + movdqa xmm0, xmm6 + movdqa oword [esp + $10], xmm1 + xor ebx, ecx + ror eax, $7 + mov esi, edi + xor ebp, ebx + rol edi, $5 + pslld xmm6, $2 + add edx, ebp + xor esi, eax + psrld xmm0, $1E + xor eax, ebx + add edx, edi + add ecx, dword [esp + $28] + and esi, eax + xor eax, ebx + ror edi, $7 + por xmm6, xmm0 + mov ebp, edx + xor esi, eax + movdqa xmm0, oword [esp + $60] + rol edx, $5 + add ecx, esi + xor ebp, edi + xor edi, eax + add ecx, edx + pshufd xmm1, xmm5, $EE + add ebx, dword [esp + $2C] + and ebp, edi + xor edi, eax + ror edx, $7 + mov esi, ecx + xor ebp, edi + rol ecx, $5 + add ebx, ebp + xor esi, edx + xor edx, edi + add ebx, ecx + add eax, dword [esp + $30] + pxor xmm7, xmm3 + punpcklqdq xmm1, xmm6 + and esi, edx + xor edx, edi + ror ecx, $7 + pxor xmm7, xmm0 + movdqa oword [esp + $60], xmm3 + mov ebp, ebx + xor esi, edx + rol ebx, $5 + movdqa xmm3, oword [esp + $90] + add eax, esi + paddd xmm2, xmm6 + xor ebp, ecx + pxor xmm7, xmm1 + xor ecx, edx + add eax, ebx + add edi, dword [esp + $34] + and ebp, ecx + movdqa xmm1, xmm7 + movdqa oword [esp + $20], xmm2 + xor ecx, edx + ror ebx, $7 + mov esi, eax + xor ebp, ecx + rol eax, $5 + pslld xmm7, $2 + add edi, ebp + xor esi, ebx + psrld xmm1, $1E + xor ebx, ecx + add edi, eax + add edx, dword [esp + $38] + and esi, ebx + xor ebx, ecx + ror eax, $7 + por xmm7, xmm1 + mov ebp, edi + xor esi, ebx + movdqa xmm1, oword [esp + $40] + rol edi, $5 + add edx, esi + xor ebp, eax + xor eax, ebx + add edx, edi + pshufd xmm2, xmm6, $EE + add ecx, dword [esp + $3C] + and ebp, eax + xor eax, ebx + ror edi, $7 + mov esi, edx + xor ebp, eax + rol edx, $5 + add ecx, ebp + xor esi, edi + xor edi, eax + add ecx, edx + add ebx, dword [esp] + pxor xmm0, xmm4 + punpcklqdq xmm2, xmm7 + and esi, edi + xor edi, eax + ror edx, $7 + pxor xmm0, xmm1 + movdqa oword [esp + $40], xmm4 + mov ebp, ecx + xor esi, edi + rol ecx, $5 + movdqa xmm4, xmm3 + add ebx, esi + paddd xmm3, xmm7 + xor ebp, edx + pxor xmm0, xmm2 + xor edx, edi + add ebx, ecx + add eax, dword [esp + $4] + and ebp, edx + movdqa xmm2, xmm0 + movdqa oword [esp + $30], xmm3 + xor edx, edi + ror ecx, $7 + mov esi, ebx + xor ebp, edx + rol ebx, $5 + pslld xmm0, $2 + add eax, ebp + xor esi, ecx + psrld xmm2, $1E + xor ecx, edx + add eax, ebx + add edi, dword [esp + $8] + and esi, ecx + xor ecx, edx + ror ebx, $7 + por xmm0, xmm2 + mov ebp, eax + xor esi, ecx + movdqa xmm2, oword [esp + $50] + rol eax, $5 + add edi, esi + xor ebp, ebx + xor ebx, ecx + add edi, eax + pshufd xmm3, xmm7, $EE + add edx, dword [esp + $C] + and ebp, ebx + xor ebx, ecx + ror eax, $7 + mov esi, edi + xor ebp, ebx + rol edi, $5 + add edx, ebp + xor esi, eax + xor eax, ebx + add edx, edi + add ecx, dword [esp + $10] + pxor xmm1, xmm5 + punpcklqdq xmm3, xmm0 + and esi, eax + xor eax, ebx + ror edi, $7 + pxor xmm1, xmm2 + movdqa oword [esp + $50], xmm5 + mov ebp, edx + xor esi, eax + rol edx, $5 movdqa xmm5, xmm4 - pslldq xmm6, 12 - paddd xmm4, xmm4 - psrld xmm5, 31 - por xmm4, xmm5 - - movdqa xmm5, xmm6 - psrld xmm6, 30 - pslld xmm5, 2 - pxor xmm4, xmm6 - pxor xmm4, xmm5 - - movdqu oword ptr [edi], xmm4 - add edi, $10 - cmp edi, ecx - jb @sse2_sha1_expand_16_31 - - // --- W[32..79]: ROL2 expanded recurrence --- - - lea ecx, [ebx + $140] - -@sse2_sha1_expand_32_79: - movdqu xmm0, oword ptr [edi - $80] - movdqu xmm1, oword ptr [edi - $40] - movdqu xmm2, oword ptr [edi - $20] - movdqu xmm3, oword ptr [edi - $10] - movdqu xmm4, oword ptr [edi - $70] - - pxor xmm0, xmm1 - - pshufd xmm5, xmm2, $EE - punpcklqdq xmm5, xmm3 - - pxor xmm0, xmm4 - pxor xmm0, xmm5 - - movdqa xmm5, xmm0 - pslld xmm0, 2 - psrld xmm5, 30 - por xmm0, xmm5 - - movdqu oword ptr [edi], xmm0 - add edi, $10 - cmp edi, ecx - jb @sse2_sha1_expand_32_79 - - // ========== Phase 2: 80 Compression Rounds ========== - - mov esi, [esp + $10] - mov eax, [esi] - mov ebx, [esi + $04] - mov ecx, [esi + $08] - mov edx, [esi + $0C] - mov edi, [esi + $10] - mov [esp + $1C], edi - - lea ebp, [esp + $60] - - // ---------- Rounds 0-19: Ch, K = $5A827999 ---------- - - mov dword ptr [esp + $20], 4 - -@sse2_sha1_ch_loop: - - mov esi, ecx - xor esi, edx - and esi, ebx - xor esi, edx - mov edi, dword ptr [ebp] - add dword ptr [esp + $1C], edi - mov edi, eax - rol edi, 5 - add dword ptr [esp + $1C], edi - add dword ptr [esp + $1C], esi - add dword ptr [esp + $1C], $5A827999 - rol ebx, 30 - - mov esi, ebx - xor esi, ecx - and esi, eax - xor esi, ecx - mov edi, dword ptr [esp + $1C] - rol edi, 5 - add edx, dword ptr [ebp + $04] - add edx, edi - add edx, esi - add edx, $5A827999 - rol eax, 30 - - mov esi, eax - xor esi, ebx - and esi, dword ptr [esp + $1C] - xor esi, ebx - mov edi, edx - rol edi, 5 - add ecx, dword ptr [ebp + $08] - add ecx, edi - add ecx, esi - add ecx, $5A827999 - mov edi, dword ptr [esp + $1C] - rol edi, 30 - mov dword ptr [esp + $1C], edi - mov esi, edi - xor esi, eax - and esi, edx - xor esi, eax - mov edi, ecx - rol edi, 5 - add ebx, dword ptr [ebp + $0C] - add ebx, edi - add ebx, esi - add ebx, $5A827999 - rol edx, 30 - - mov esi, edx - xor esi, dword ptr [esp + $1C] - and esi, ecx - xor esi, dword ptr [esp + $1C] - mov edi, ebx - rol edi, 5 - add eax, dword ptr [ebp + $10] - add eax, edi - add eax, esi - add eax, $5A827999 - rol ecx, 30 - - add ebp, $14 - dec dword ptr [esp + $20] - jnz @sse2_sha1_ch_loop - - // ---------- Rounds 20-39: Parity, K = $6ED9EBA1 ---------- - - mov dword ptr [esp + $20], 4 - -@sse2_sha1_par1_loop: - - mov esi, ebx - xor esi, ecx - xor esi, edx - mov edi, dword ptr [ebp] - add dword ptr [esp + $1C], edi - mov edi, eax - rol edi, 5 - add dword ptr [esp + $1C], edi - add dword ptr [esp + $1C], esi - add dword ptr [esp + $1C], $6ED9EBA1 - rol ebx, 30 - - mov esi, eax - xor esi, ebx - xor esi, ecx - mov edi, dword ptr [esp + $1C] - rol edi, 5 - add edx, dword ptr [ebp + $04] - add edx, edi - add edx, esi - add edx, $6ED9EBA1 - rol eax, 30 - - mov esi, dword ptr [esp + $1C] - xor esi, eax - xor esi, ebx - mov edi, edx - rol edi, 5 - add ecx, dword ptr [ebp + $08] - add ecx, edi - add ecx, esi - add ecx, $6ED9EBA1 - mov edi, dword ptr [esp + $1C] - rol edi, 30 - mov dword ptr [esp + $1C], edi - - mov esi, edx - xor esi, dword ptr [esp + $1C] - xor esi, eax - mov edi, ecx - rol edi, 5 - add ebx, dword ptr [ebp + $0C] - add ebx, edi - add ebx, esi - add ebx, $6ED9EBA1 - rol edx, 30 - - mov esi, ecx - xor esi, edx - xor esi, dword ptr [esp + $1C] - mov edi, ebx - rol edi, 5 - add eax, dword ptr [ebp + $10] - add eax, edi - add eax, esi - add eax, $6ED9EBA1 - rol ecx, 30 - - add ebp, $14 - dec dword ptr [esp + $20] - jnz @sse2_sha1_par1_loop - - // ---------- Rounds 40-59: Maj, K = $8F1BBCDC ---------- - - mov dword ptr [esp + $20], 4 - -@sse2_sha1_maj_loop: - - mov esi, ebx - or esi, ecx - and esi, edx - mov edi, ebx - and edi, ecx - or esi, edi - mov edi, dword ptr [ebp] - add dword ptr [esp + $1C], edi - mov edi, eax - rol edi, 5 - add dword ptr [esp + $1C], edi - add dword ptr [esp + $1C], esi - add dword ptr [esp + $1C], $8F1BBCDC - rol ebx, 30 - - mov esi, eax - or esi, ebx - and esi, ecx - mov edi, eax - and edi, ebx - or esi, edi - mov edi, dword ptr [esp + $1C] - rol edi, 5 - add edx, dword ptr [ebp + $04] - add edx, edi - add edx, esi - add edx, $8F1BBCDC - rol eax, 30 - - mov esi, dword ptr [esp + $1C] - or esi, eax - and esi, ebx - mov edi, dword ptr [esp + $1C] - and edi, eax - or esi, edi - mov edi, edx - rol edi, 5 - add ecx, dword ptr [ebp + $08] - add ecx, edi - add ecx, esi - add ecx, $8F1BBCDC - mov edi, dword ptr [esp + $1C] - rol edi, 30 - mov dword ptr [esp + $1C], edi - - mov esi, edx - or esi, dword ptr [esp + $1C] - and esi, eax - mov edi, edx - and edi, dword ptr [esp + $1C] - or esi, edi - mov edi, ecx - rol edi, 5 - add ebx, dword ptr [ebp + $0C] - add ebx, edi - add ebx, esi - add ebx, $8F1BBCDC - rol edx, 30 - - mov esi, ecx - or esi, edx - and esi, dword ptr [esp + $1C] - mov edi, ecx - and edi, edx - or esi, edi - mov edi, ebx - rol edi, 5 - add eax, dword ptr [ebp + $10] - add eax, edi - add eax, esi - add eax, $8F1BBCDC - rol ecx, 30 - - add ebp, $14 - dec dword ptr [esp + $20] - jnz @sse2_sha1_maj_loop - - // ---------- Rounds 60-79: Parity, K = $CA62C1D6 ---------- - - mov dword ptr [esp + $20], 4 - -@sse2_sha1_par2_loop: - - mov esi, ebx - xor esi, ecx - xor esi, edx - mov edi, dword ptr [ebp] - add dword ptr [esp + $1C], edi - mov edi, eax - rol edi, 5 - add dword ptr [esp + $1C], edi - add dword ptr [esp + $1C], esi - add dword ptr [esp + $1C], $CA62C1D6 - rol ebx, 30 - - mov esi, eax - xor esi, ebx - xor esi, ecx - mov edi, dword ptr [esp + $1C] - rol edi, 5 - add edx, dword ptr [ebp + $04] - add edx, edi - add edx, esi - add edx, $CA62C1D6 - rol eax, 30 - - mov esi, dword ptr [esp + $1C] - xor esi, eax - xor esi, ebx - mov edi, edx - rol edi, 5 - add ecx, dword ptr [ebp + $08] - add ecx, edi - add ecx, esi - add ecx, $CA62C1D6 - mov edi, dword ptr [esp + $1C] - rol edi, 30 - mov dword ptr [esp + $1C], edi - - mov esi, edx - xor esi, dword ptr [esp + $1C] - xor esi, eax - mov edi, ecx - rol edi, 5 - add ebx, dword ptr [ebp + $0C] - add ebx, edi - add ebx, esi - add ebx, $CA62C1D6 - rol edx, 30 - - mov esi, ecx - xor esi, edx - xor esi, dword ptr [esp + $1C] - mov edi, ebx - rol edi, 5 - add eax, dword ptr [ebp + $10] - add eax, edi - add eax, esi - add eax, $CA62C1D6 - rol ecx, 30 - - add ebp, $14 - dec dword ptr [esp + $20] - jnz @sse2_sha1_par2_loop - - // Add round results to state - mov esi, [esp + $10] - add dword ptr [esi], eax - add dword ptr [esi + $04], ebx - add dword ptr [esi + $08], ecx - add dword ptr [esi + $0C], edx - mov eax, dword ptr [esp + $1C] - add dword ptr [esi + $10], eax - - mov esi, [esp + $14] - add esi, $40 - mov [esp + $14], esi - dec dword ptr [esp + $18] - jnz @sse2_sha1_block_loop - -@sse2_sha1_done: - - mov ebp, [esp + $38] - movdqu xmm6, oword ptr [esp] - add esp, 424 - pop edi - pop esi - pop ebx + add ecx, esi + paddd xmm4, xmm0 + xor ebp, edi + pxor xmm1, xmm3 + xor edi, eax + add ecx, edx + add ebx, dword [esp + $14] + and ebp, edi + movdqa xmm3, xmm1 + movdqa oword [esp], xmm4 + xor edi, eax + ror edx, $7 + mov esi, ecx + xor ebp, edi + rol ecx, $5 + pslld xmm1, $2 + add ebx, ebp + xor esi, edx + psrld xmm3, $1E + xor edx, edi + add ebx, ecx + add eax, dword [esp + $18] + and esi, edx + xor edx, edi + ror ecx, $7 + por xmm1, xmm3 + mov ebp, ebx + xor esi, edx + movdqa xmm3, oword [esp + $60] + rol ebx, $5 + add eax, esi + xor ebp, ecx + xor ecx, edx + add eax, ebx + pshufd xmm4, xmm0, $EE + add edi, dword [esp + $1C] + and ebp, ecx + xor ecx, edx + ror ebx, $7 + mov esi, eax + xor ebp, ecx + rol eax, $5 + add edi, ebp + xor esi, ebx + xor ebx, ecx + add edi, eax + add edx, dword [esp + $20] + pxor xmm2, xmm6 + punpcklqdq xmm4, xmm1 + and esi, ebx + xor ebx, ecx + ror eax, $7 + pxor xmm2, xmm3 + movdqa oword [esp + $60], xmm6 + mov ebp, edi + xor esi, ebx + rol edi, $5 + movdqa xmm6, xmm5 + add edx, esi + paddd xmm5, xmm1 + xor ebp, eax + pxor xmm2, xmm4 + xor eax, ebx + add edx, edi + add ecx, dword [esp + $24] + and ebp, eax + movdqa xmm4, xmm2 + movdqa oword [esp + $10], xmm5 + xor eax, ebx + ror edi, $7 + mov esi, edx + xor ebp, eax + rol edx, $5 + pslld xmm2, $2 + add ecx, ebp + xor esi, edi + psrld xmm4, $1E + xor edi, eax + add ecx, edx + add ebx, dword [esp + $28] + and esi, edi + xor edi, eax + ror edx, $7 + por xmm2, xmm4 + mov ebp, ecx + xor esi, edi + movdqa xmm4, oword [esp + $40] + rol ecx, $5 + add ebx, esi + xor ebp, edx + xor edx, edi + add ebx, ecx + pshufd xmm5, xmm1, $EE + add eax, dword [esp + $2C] + and ebp, edx + xor edx, edi + ror ecx, $7 + mov esi, ebx + xor ebp, edx + rol ebx, $5 + add eax, ebp + xor esi, edx + add eax, ebx + add edi, dword [esp + $30] + pxor xmm3, xmm7 + punpcklqdq xmm5, xmm2 + xor esi, ecx + mov ebp, eax + rol eax, $5 + pxor xmm3, xmm4 + movdqa oword [esp + $40], xmm7 + add edi, esi + xor ebp, ecx + movdqa xmm7, xmm6 + ror ebx, $7 + paddd xmm6, xmm2 + add edi, eax + pxor xmm3, xmm5 + add edx, dword [esp + $34] + xor ebp, ebx + mov esi, edi + rol edi, $5 + movdqa xmm5, xmm3 + movdqa oword [esp + $20], xmm6 + add edx, ebp + xor esi, ebx + ror eax, $7 + add edx, edi + pslld xmm3, $2 + add ecx, dword [esp + $38] + xor esi, eax + psrld xmm5, $1E + mov ebp, edx + rol edx, $5 + add ecx, esi + xor ebp, eax + ror edi, $7 + add ecx, edx + por xmm3, xmm5 + add ebx, dword [esp + $3C] + xor ebp, edi + mov esi, ecx + rol ecx, $5 + add ebx, ebp + xor esi, edi + ror edx, $7 + add ebx, ecx + add eax, dword [esp] + xor esi, edx + mov ebp, ebx + rol ebx, $5 + add eax, esi + xor ebp, edx + ror ecx, $7 + paddd xmm7, xmm3 + add eax, ebx + add edi, dword [esp + $4] + xor ebp, ecx + mov esi, eax + movdqa oword [esp + $30], xmm7 + rol eax, $5 + add edi, ebp + xor esi, ecx + ror ebx, $7 + add edi, eax + add edx, dword [esp + $8] + xor esi, ebx + mov ebp, edi + rol edi, $5 + add edx, esi + xor ebp, ebx + ror eax, $7 + add edx, edi + add ecx, dword [esp + $C] + xor ebp, eax + mov esi, edx + rol edx, $5 + add ecx, ebp + xor esi, eax + ror edi, $7 + add ecx, edx + mov ebp, dword [esp + $C4] + cmp ebp, dword [esp + $C8] + je @done + movdqa xmm7, oword [esp + $A0] + movdqa xmm6, oword [esp + $B0] + movdqu xmm0, oword [ebp + $0] + movdqu xmm1, oword [ebp + $10] + movdqu xmm2, oword [ebp + $20] + movdqu xmm3, oword [ebp + $30] + add ebp, $40 + movdqa xmm6, xmm0 + psrlw xmm6, $8 + psllw xmm0, $8 + por xmm0, xmm6 + pshuflw xmm0, xmm0, $B1 + pshufhw xmm0, xmm0, $B1 + mov dword [esp + $C4], ebp + movdqa oword [esp + $60], xmm7 + add ebx, dword [esp + $10] + xor esi, edi + mov ebp, ecx + rol ecx, $5 + add ebx, esi + xor ebp, edi + ror edx, $7 + movdqa xmm6, xmm1 + psrlw xmm6, $8 + psllw xmm1, $8 + por xmm1, xmm6 + pshuflw xmm1, xmm1, $B1 + pshufhw xmm1, xmm1, $B1 + add ebx, ecx + add eax, dword [esp + $14] + xor ebp, edx + mov esi, ebx + paddd xmm0, xmm7 + rol ebx, $5 + add eax, ebp + xor esi, edx + ror ecx, $7 + movdqa oword [esp], xmm0 + add eax, ebx + add edi, dword [esp + $18] + xor esi, ecx + mov ebp, eax + psubd xmm0, xmm7 + rol eax, $5 + add edi, esi + xor ebp, ecx + ror ebx, $7 + add edi, eax + add edx, dword [esp + $1C] + xor ebp, ebx + mov esi, edi + rol edi, $5 + add edx, ebp + xor esi, ebx + ror eax, $7 + add edx, edi + add ecx, dword [esp + $20] + xor esi, eax + mov ebp, edx + rol edx, $5 + add ecx, esi + xor ebp, eax + ror edi, $7 + movdqa xmm6, xmm2 + psrlw xmm6, $8 + psllw xmm2, $8 + por xmm2, xmm6 + pshuflw xmm2, xmm2, $B1 + pshufhw xmm2, xmm2, $B1 + add ecx, edx + add ebx, dword [esp + $24] + xor ebp, edi + mov esi, ecx + paddd xmm1, xmm7 + rol ecx, $5 + add ebx, ebp + xor esi, edi + ror edx, $7 + movdqa oword [esp + $10], xmm1 + add ebx, ecx + add eax, dword [esp + $28] + xor esi, edx + mov ebp, ebx + psubd xmm1, xmm7 + rol ebx, $5 + add eax, esi + xor ebp, edx + ror ecx, $7 + add eax, ebx + add edi, dword [esp + $2C] + xor ebp, ecx + mov esi, eax + rol eax, $5 + add edi, ebp + xor esi, ecx + ror ebx, $7 + add edi, eax + add edx, dword [esp + $30] + xor esi, ebx + mov ebp, edi + rol edi, $5 + add edx, esi + xor ebp, ebx + ror eax, $7 + movdqa xmm6, xmm3 + psrlw xmm6, $8 + psllw xmm3, $8 + por xmm3, xmm6 + pshuflw xmm3, xmm3, $B1 + pshufhw xmm3, xmm3, $B1 + add edx, edi + add ecx, dword [esp + $34] + xor ebp, eax + mov esi, edx + paddd xmm2, xmm7 + rol edx, $5 + add ecx, ebp + xor esi, eax + ror edi, $7 + movdqa oword [esp + $20], xmm2 + add ecx, edx + add ebx, dword [esp + $38] + xor esi, edi + mov ebp, ecx + psubd xmm2, xmm7 + rol ecx, $5 + add ebx, esi + xor ebp, edi + ror edx, $7 + add ebx, ecx + add eax, dword [esp + $3C] + xor ebp, edx + mov esi, ebx + rol ebx, $5 + add eax, ebp + ror ecx, $7 + add eax, ebx + mov ebp, dword [esp + $C0] + add eax, dword [ebp + $0] + add esi, dword [ebp + $4] + add ecx, dword [ebp + $8] + mov dword [ebp + $0], eax + add edx, dword [ebp + $C] + mov dword [ebp + $4], esi + add edi, dword [ebp + $10] + mov dword [ebp + $8], ecx + mov ebx, ecx + mov dword [ebp + $C], edx + xor ebx, edx + mov dword [ebp + $10], edi + mov ebp, esi + pshufd xmm4, xmm0, $EE + and esi, ebx + mov ebx, ebp + jmp @block_loop + +@done: + add ebx, dword [esp + $10] + xor esi, edi + mov ebp, ecx + rol ecx, $5 + add ebx, esi + xor ebp, edi + ror edx, $7 + add ebx, ecx + add eax, dword [esp + $14] + xor ebp, edx + mov esi, ebx + rol ebx, $5 + add eax, ebp + xor esi, edx + ror ecx, $7 + add eax, ebx + add edi, dword [esp + $18] + xor esi, ecx + mov ebp, eax + rol eax, $5 + add edi, esi + xor ebp, ecx + ror ebx, $7 + add edi, eax + add edx, dword [esp + $1C] + xor ebp, ebx + mov esi, edi + rol edi, $5 + add edx, ebp + xor esi, ebx + ror eax, $7 + add edx, edi + add ecx, dword [esp + $20] + xor esi, eax + mov ebp, edx + rol edx, $5 + add ecx, esi + xor ebp, eax + ror edi, $7 + add ecx, edx + add ebx, dword [esp + $24] + xor ebp, edi + mov esi, ecx + rol ecx, $5 + add ebx, ebp + xor esi, edi + ror edx, $7 + add ebx, ecx + add eax, dword [esp + $28] + xor esi, edx + mov ebp, ebx + rol ebx, $5 + add eax, esi + xor ebp, edx + ror ecx, $7 + add eax, ebx + add edi, dword [esp + $2C] + xor ebp, ecx + mov esi, eax + rol eax, $5 + add edi, ebp + xor esi, ecx + ror ebx, $7 + add edi, eax + add edx, dword [esp + $30] + xor esi, ebx + mov ebp, edi + rol edi, $5 + add edx, esi + xor ebp, ebx + ror eax, $7 + add edx, edi + add ecx, dword [esp + $34] + xor ebp, eax + mov esi, edx + rol edx, $5 + add ecx, ebp + xor esi, eax + ror edi, $7 + add ecx, edx + add ebx, dword [esp + $38] + xor esi, edi + mov ebp, ecx + rol ecx, $5 + add ebx, esi + xor ebp, edi + ror edx, $7 + add ebx, ecx + add eax, dword [esp + $3C] + xor ebp, edx + mov esi, ebx + rol ebx, $5 + add eax, ebp + ror ecx, $7 + add eax, ebx + mov ebp, dword [esp + $C0] + add eax, dword [ebp + $0] + mov esp, dword [esp + $CC] + add esi, dword [ebp + $4] + add ecx, dword [ebp + $8] + mov dword [ebp + $0], eax + add edx, dword [ebp + $C] + mov dword [ebp + $4], esi + add edi, dword [ebp + $10] + mov dword [ebp + $8], ecx + mov dword [ebp + $C], edx + mov dword [ebp + $10], edi + pop ebp + pop edi + pop esi + pop ebx diff --git a/HashLib/src/Include/Simd/SHA1/SHA1CompressSse2_x86_64.inc b/HashLib/src/Include/Simd/SHA1/SHA1CompressSse2_x86_64.inc index f2dbe582..18a4ebc0 100644 --- a/HashLib/src/Include/Simd/SHA1/SHA1CompressSse2_x86_64.inc +++ b/HashLib/src/Include/Simd/SHA1/SHA1CompressSse2_x86_64.inc @@ -1,475 +1,1231 @@ -// SHA-1 SSE2 implementation with SIMD message schedule. -// Based on SSSE3 implementation (see SHA1CompressSsse3_x86_64.inc). -// Same algorithm as SSSE3 version but byte-swap uses SSE2 emulation -// (pshuflw/pshufhw + psrlw/psllw/por) instead of SSSE3 pshufb. -// Expects MS x64 ABI: rcx = state ptr, rdx = data ptr, r8d = numblocks (3-param path). -// Round constants are inlined as immediates and SSE2 byte-swaps without a mask, so -// neither a K_SHA1 ptr nor a BSWAP mask ptr is passed. -// Uses xmm0-xmm6, all GPR. +// SHA-1 SSE2 SIMD-schedule implementation, derived from OpenSSL's SHA-1 SSSE3 +// kernel in sha1-x86_64.pl (CRYPTOGAMS). The message schedule runs in SSE2 +// (pxor/pshufd/psrldq/pslldq) interleaved with the GPR compression rounds, so the +// vector and integer units run in parallel. OpenSSL's only SSSE3-only op here is +// the pshufb input byte-swap, which is emulated in SSE2 (psrlw/psllw/por + +// pshuflw/pshufhw; xmm12 is a free scratch); the W-schedule uses no palignr. The +// appended masks go unused - the byte-swap is computed, not shuffled. +// Expects MS x64 ABI (after SimdProc4Begin): rcx = state ptr, rdx = data ptr, +// r8d = numblocks, r9 = doubled-K_SHA1 ptr (read 128-bit at a 32-byte stride, +// r14 = K + 64, so the duplicated halves are skipped; see K_SHA1_Doubled). // -// Two phases per block: -// Phase 1 (SIMD): SSE2 byte-swap W[0..15], then expand W[16..79] -// using vectorized message schedule (same as SSSE3). -// Phase 2 (GPR): 80 compression rounds with 5-round unrolling -// -// MS x64 non-volatile saves: xmm6, rbx, rbp, rdi, rsi, r12-r15. -// -// Stack layout (sub rsp, 424): -// [rsp + 0.. 15]: xmm6 save -// [rsp + 16.. 23]: rbx save -// [rsp + 24.. 31]: rbp save -// [rsp + 32.. 39]: rdi save -// [rsp + 40.. 47]: rsi save -// [rsp + 48.. 55]: r12 save -// [rsp + 56.. 63]: r13 save -// [rsp + 64.. 71]: r14 save -// [rsp + 72.. 79]: r15 save -// [rsp + 80.. 87]: padding -// [rsp + 88.. 95]: padding -// [rsp + 96..415]: W buffer (320 bytes = 80 x 4, 16-byte aligned) +// MS x64 non-volatile saves: xmm6-xmm15 via the shared SimdNonVolatileSave/Restore +// include (no-op on SysV); rbx, rbp, rdi, rsi, r12-r14 in the local frame; r11 +// holds the caller rsp across the kernel for the unwind. {$I ..\Include\Simd\Common\SimdNonVolatileSave_x86_64.inc} - sub rsp, 408 - - mov [rsp + $10], rdi - mov [rsp + $18], rsi - mov [rsp + $00], rbx - mov [rsp + $08], rbp - mov [rsp + $20], r12 - mov [rsp + $28], r13 - mov [rsp + $30], r14 - mov [rsp + $38], r15 - - mov r12, rcx - mov r13, rdx - mov r14d, r8d - - test r14d, r14d - jz @sse2_sha1_done - -@sse2_sha1_block_loop: - - // ========== Phase 1: SIMD message schedule ========== - - lea r15, [rsp + $50] - - // SSE2 32-bit byte-swap: pshuflw/pshufhw swap 16-bit words, then swap bytes within words - movdqu xmm0, oword [r13] + mov r11, rsp + push r9 + push rbx + push rbp + push r12 + push r13 + push r14 + push rdi + push rsi + mov rdi, rcx + mov rsi, rdx + mov rdx, r8 + lea rsp, [rsp - $A0] + and rsp, $FFFFFFFFFFFFFFC0 + mov r8, rdi + mov r9, rsi + mov r10, rdx + shl r10, $6 + add r10, r9 + mov r14, qword [r11 - $8] + add r14, $40 + mov eax, dword [r8] + mov ebx, dword [r8 + $4] + mov ecx, dword [r8 + $8] + mov edx, dword [r8 + $C] + mov esi, ebx + mov ebp, dword [r8 + $10] + mov edi, ecx + xor edi, edx + and esi, edi + movdqu xmm6, oword [r14 + $40] + movdqu xmm9, oword [r14 - $40] + movdqu xmm0, oword [r9] + movdqu xmm1, oword [r9 + $10] + movdqu xmm2, oword [r9 + $20] + movdqu xmm3, oword [r9 + $30] + movdqa xmm12, xmm0 + psrlw xmm12, $8 + psllw xmm0, $8 + por xmm0, xmm12 pshuflw xmm0, xmm0, $B1 pshufhw xmm0, xmm0, $B1 - movdqa xmm4, xmm0 - psrlw xmm0, 8 - psllw xmm4, 8 - por xmm0, xmm4 - movdqa oword [r15], xmm0 - - movdqu xmm1, oword [r13 + $10] + movdqa xmm12, xmm1 + psrlw xmm12, $8 + psllw xmm1, $8 + por xmm1, xmm12 pshuflw xmm1, xmm1, $B1 pshufhw xmm1, xmm1, $B1 - movdqa xmm4, xmm1 - psrlw xmm1, 8 - psllw xmm4, 8 - por xmm1, xmm4 - movdqa oword [r15 + $10], xmm1 - - movdqu xmm2, oword [r13 + $20] + movdqa xmm12, xmm2 + psrlw xmm12, $8 + psllw xmm2, $8 + por xmm2, xmm12 pshuflw xmm2, xmm2, $B1 pshufhw xmm2, xmm2, $B1 - movdqa xmm4, xmm2 - psrlw xmm2, 8 - psllw xmm4, 8 - por xmm2, xmm4 - movdqa oword [r15 + $20], xmm2 - - movdqu xmm3, oword [r13 + $30] + add r9, $40 + paddd xmm0, xmm9 + movdqa xmm12, xmm3 + psrlw xmm12, $8 + psllw xmm3, $8 + por xmm3, xmm12 pshuflw xmm3, xmm3, $B1 pshufhw xmm3, xmm3, $B1 - movdqa xmm4, xmm3 - psrlw xmm3, 8 - psllw xmm4, 8 - por xmm3, xmm4 - movdqa oword [r15 + $30], xmm3 - - // --- W[16..31]: ROL1 formula with cross-lane fix --- - - lea rbp, [r15 + $40] - lea r10, [r15 + $80] - -@sse2_sha1_expand_16_31: - movdqa xmm0, oword [rbp - $40] - movdqa xmm1, oword [rbp - $30] - movdqa xmm2, oword [rbp - $20] - movdqa xmm3, oword [rbp - $10] - + paddd xmm1, xmm9 + paddd xmm2, xmm9 + movdqa oword [rsp], xmm0 + psubd xmm0, xmm9 + movdqa oword [rsp + $10], xmm1 + psubd xmm1, xmm9 + movdqa oword [rsp + $20], xmm2 + psubd xmm2, xmm9 + jmp @block_loop + +@block_loop: + ror ebx, $2 pshufd xmm4, xmm0, $EE + xor esi, edx + movdqa xmm8, xmm3 + paddd xmm9, xmm3 + mov edi, eax + add ebp, dword [rsp] punpcklqdq xmm4, xmm1 - - movdqa xmm5, xmm3 - psrldq xmm5, 4 - - pxor xmm4, xmm0 - pxor xmm5, xmm2 - pxor xmm4, xmm5 - - movdqa xmm6, xmm4 - movdqa xmm5, xmm4 - pslldq xmm6, 12 + xor ebx, ecx + rol eax, $5 + add ebp, esi + psrldq xmm8, $4 + and edi, ebx + xor ebx, ecx + pxor xmm4, xmm0 + add ebp, eax + ror eax, $7 + pxor xmm8, xmm2 + xor edi, ecx + mov esi, ebp + add edx, dword [rsp + $4] + pxor xmm4, xmm8 + xor eax, ebx + rol ebp, $5 + movdqa oword [rsp + $30], xmm9 + add edx, edi + and esi, eax + movdqa xmm10, xmm4 + xor eax, ebx + add edx, ebp + ror ebp, $7 + movdqa xmm8, xmm4 + xor esi, ebx + pslldq xmm10, $C paddd xmm4, xmm4 - psrld xmm5, 31 - por xmm4, xmm5 - - movdqa xmm5, xmm6 - psrld xmm6, 30 - pslld xmm5, 2 - pxor xmm4, xmm6 + mov edi, edx + add ecx, dword [rsp + $8] + psrld xmm8, $1F + xor ebp, eax + rol edx, $5 + add ecx, esi + movdqa xmm9, xmm10 + and edi, ebp + xor ebp, eax + psrld xmm10, $1E + add ecx, edx + ror edx, $7 + por xmm4, xmm8 + xor edi, eax + mov esi, ecx + add ebx, dword [rsp + $C] + pslld xmm9, $2 + pxor xmm4, xmm10 + xor edx, ebp + movdqu xmm10, oword [r14 - $40] + rol ecx, $5 + add ebx, edi + and esi, edx + pxor xmm4, xmm9 + xor edx, ebp + add ebx, ecx + ror ecx, $7 + pshufd xmm5, xmm1, $EE + xor esi, ebp + movdqa xmm9, xmm4 + paddd xmm10, xmm4 + mov edi, ebx + add eax, dword [rsp + $10] + punpcklqdq xmm5, xmm2 + xor ecx, edx + rol ebx, $5 + add eax, esi + psrldq xmm9, $4 + and edi, ecx + xor ecx, edx + pxor xmm5, xmm1 + add eax, ebx + ror ebx, $7 + pxor xmm9, xmm3 + xor edi, edx + mov esi, eax + add ebp, dword [rsp + $14] + pxor xmm5, xmm9 + xor ebx, ecx + rol eax, $5 + movdqa oword [rsp], xmm10 + add ebp, edi + and esi, ebx + movdqa xmm8, xmm5 + xor ebx, ecx + add ebp, eax + ror eax, $7 + movdqa xmm9, xmm5 + xor esi, ecx + pslldq xmm8, $C + paddd xmm5, xmm5 + mov edi, ebp + add edx, dword [rsp + $18] + psrld xmm9, $1F + xor eax, ebx + rol ebp, $5 + add edx, esi + movdqa xmm10, xmm8 + and edi, eax + xor eax, ebx + psrld xmm8, $1E + add edx, ebp + ror ebp, $7 + por xmm5, xmm9 + xor edi, ebx + mov esi, edx + add ecx, dword [rsp + $1C] + pslld xmm10, $2 + pxor xmm5, xmm8 + xor ebp, eax + movdqu xmm8, oword [r14 - $20] + rol edx, $5 + add ecx, edi + and esi, ebp + pxor xmm5, xmm10 + xor ebp, eax + add ecx, edx + ror edx, $7 + pshufd xmm6, xmm2, $EE + xor esi, eax + movdqa xmm10, xmm5 + paddd xmm8, xmm5 + mov edi, ecx + add ebx, dword [rsp + $20] + punpcklqdq xmm6, xmm3 + xor edx, ebp + rol ecx, $5 + add ebx, esi + psrldq xmm10, $4 + and edi, edx + xor edx, ebp + pxor xmm6, xmm2 + add ebx, ecx + ror ecx, $7 + pxor xmm10, xmm4 + xor edi, ebp + mov esi, ebx + add eax, dword [rsp + $24] + pxor xmm6, xmm10 + xor ecx, edx + rol ebx, $5 + movdqa oword [rsp + $10], xmm8 + add eax, edi + and esi, ecx + movdqa xmm9, xmm6 + xor ecx, edx + add eax, ebx + ror ebx, $7 + movdqa xmm10, xmm6 + xor esi, edx + pslldq xmm9, $C + paddd xmm6, xmm6 + mov edi, eax + add ebp, dword [rsp + $28] + psrld xmm10, $1F + xor ebx, ecx + rol eax, $5 + add ebp, esi + movdqa xmm8, xmm9 + and edi, ebx + xor ebx, ecx + psrld xmm9, $1E + add ebp, eax + ror eax, $7 + por xmm6, xmm10 + xor edi, ecx + mov esi, ebp + add edx, dword [rsp + $2C] + pslld xmm8, $2 + pxor xmm6, xmm9 + xor eax, ebx + movdqu xmm9, oword [r14 - $20] + rol ebp, $5 + add edx, edi + and esi, eax + pxor xmm6, xmm8 + xor eax, ebx + add edx, ebp + ror ebp, $7 + pshufd xmm7, xmm3, $EE + xor esi, ebx + movdqa xmm8, xmm6 + paddd xmm9, xmm6 + mov edi, edx + add ecx, dword [rsp + $30] + punpcklqdq xmm7, xmm4 + xor ebp, eax + rol edx, $5 + add ecx, esi + psrldq xmm8, $4 + and edi, ebp + xor ebp, eax + pxor xmm7, xmm3 + add ecx, edx + ror edx, $7 + pxor xmm8, xmm5 + xor edi, eax + mov esi, ecx + add ebx, dword [rsp + $34] + pxor xmm7, xmm8 + xor edx, ebp + rol ecx, $5 + movdqa oword [rsp + $20], xmm9 + add ebx, edi + and esi, edx + movdqa xmm10, xmm7 + xor edx, ebp + add ebx, ecx + ror ecx, $7 + movdqa xmm8, xmm7 + xor esi, ebp + pslldq xmm10, $C + paddd xmm7, xmm7 + mov edi, ebx + add eax, dword [rsp + $38] + psrld xmm8, $1F + xor ecx, edx + rol ebx, $5 + add eax, esi + movdqa xmm9, xmm10 + and edi, ecx + xor ecx, edx + psrld xmm10, $1E + add eax, ebx + ror ebx, $7 + por xmm7, xmm8 + xor edi, edx + mov esi, eax + add ebp, dword [rsp + $3C] + pslld xmm9, $2 + pxor xmm7, xmm10 + xor ebx, ecx + movdqu xmm10, oword [r14 - $20] + rol eax, $5 + add ebp, edi + and esi, ebx + pxor xmm7, xmm9 + pshufd xmm9, xmm6, $EE + xor ebx, ecx + add ebp, eax + ror eax, $7 + pxor xmm0, xmm4 + xor esi, ecx + mov edi, ebp + add edx, dword [rsp] + punpcklqdq xmm9, xmm7 + xor eax, ebx + rol ebp, $5 + pxor xmm0, xmm1 + add edx, esi + and edi, eax + movdqa xmm8, xmm10 + xor eax, ebx + paddd xmm10, xmm7 + add edx, ebp + pxor xmm0, xmm9 + ror ebp, $7 + xor edi, ebx + mov esi, edx + add ecx, dword [rsp + $4] + movdqa xmm9, xmm0 + xor ebp, eax + rol edx, $5 + movdqa oword [rsp + $30], xmm10 + add ecx, edi + and esi, ebp + xor ebp, eax + pslld xmm0, $2 + add ecx, edx + ror edx, $7 + psrld xmm9, $1E + xor esi, eax + mov edi, ecx + add ebx, dword [rsp + $8] + por xmm0, xmm9 + xor edx, ebp + rol ecx, $5 + pshufd xmm10, xmm7, $EE + add ebx, esi + and edi, edx + xor edx, ebp + add ebx, ecx + add eax, dword [rsp + $C] + xor edi, ebp + mov esi, ebx + rol ebx, $5 + add eax, edi + xor esi, edx + ror ecx, $7 + add eax, ebx + pxor xmm1, xmm5 + add ebp, dword [rsp + $10] + xor esi, ecx + punpcklqdq xmm10, xmm0 + mov edi, eax + rol eax, $5 + pxor xmm1, xmm2 + add ebp, esi + xor edi, ecx + movdqa xmm9, xmm8 + ror ebx, $7 + paddd xmm8, xmm0 + add ebp, eax + pxor xmm1, xmm10 + add edx, dword [rsp + $14] + xor edi, ebx + mov esi, ebp + rol ebp, $5 + movdqa xmm10, xmm1 + add edx, edi + xor esi, ebx + movdqa oword [rsp], xmm8 + ror eax, $7 + add edx, ebp + add ecx, dword [rsp + $18] + pslld xmm1, $2 + xor esi, eax + mov edi, edx + psrld xmm10, $1E + rol edx, $5 + add ecx, esi + xor edi, eax + ror ebp, $7 + por xmm1, xmm10 + add ecx, edx + add ebx, dword [rsp + $1C] + pshufd xmm8, xmm0, $EE + xor edi, ebp + mov esi, ecx + rol ecx, $5 + add ebx, edi + xor esi, ebp + ror edx, $7 + add ebx, ecx + pxor xmm2, xmm6 + add eax, dword [rsp + $20] + xor esi, edx + punpcklqdq xmm8, xmm1 + mov edi, ebx + rol ebx, $5 + pxor xmm2, xmm3 + add eax, esi + xor edi, edx + movdqu xmm10, oword [r14] + ror ecx, $7 + paddd xmm9, xmm1 + add eax, ebx + pxor xmm2, xmm8 + add ebp, dword [rsp + $24] + xor edi, ecx + mov esi, eax + rol eax, $5 + movdqa xmm8, xmm2 + add ebp, edi + xor esi, ecx + movdqa oword [rsp + $10], xmm9 + ror ebx, $7 + add ebp, eax + add edx, dword [rsp + $28] + pslld xmm2, $2 + xor esi, ebx + mov edi, ebp + psrld xmm8, $1E + rol ebp, $5 + add edx, esi + xor edi, ebx + ror eax, $7 + por xmm2, xmm8 + add edx, ebp + add ecx, dword [rsp + $2C] + pshufd xmm9, xmm1, $EE + xor edi, eax + mov esi, edx + rol edx, $5 + add ecx, edi + xor esi, eax + ror ebp, $7 + add ecx, edx + pxor xmm3, xmm7 + add ebx, dword [rsp + $30] + xor esi, ebp + punpcklqdq xmm9, xmm2 + mov edi, ecx + rol ecx, $5 + pxor xmm3, xmm4 + add ebx, esi + xor edi, ebp + movdqa xmm8, xmm10 + ror edx, $7 + paddd xmm10, xmm2 + add ebx, ecx + pxor xmm3, xmm9 + add eax, dword [rsp + $34] + xor edi, edx + mov esi, ebx + rol ebx, $5 + movdqa xmm9, xmm3 + add eax, edi + xor esi, edx + movdqa oword [rsp + $20], xmm10 + ror ecx, $7 + add eax, ebx + add ebp, dword [rsp + $38] + pslld xmm3, $2 + xor esi, ecx + mov edi, eax + psrld xmm9, $1E + rol eax, $5 + add ebp, esi + xor edi, ecx + ror ebx, $7 + por xmm3, xmm9 + add ebp, eax + add edx, dword [rsp + $3C] + pshufd xmm10, xmm2, $EE + xor edi, ebx + mov esi, ebp + rol ebp, $5 + add edx, edi + xor esi, ebx + ror eax, $7 + add edx, ebp + pxor xmm4, xmm0 + add ecx, dword [rsp] + xor esi, eax + punpcklqdq xmm10, xmm3 + mov edi, edx + rol edx, $5 pxor xmm4, xmm5 - - movdqa oword [rbp], xmm4 - add rbp, $10 - cmp rbp, r10 - jb @sse2_sha1_expand_16_31 - - // --- W[32..79]: ROL2 expanded recurrence --- - - lea r10, [r15 + $140] - -@sse2_sha1_expand_32_79: - movdqa xmm0, oword [rbp - $80] - movdqa xmm1, oword [rbp - $40] - movdqa xmm2, oword [rbp - $20] - movdqa xmm3, oword [rbp - $10] - movdqa xmm4, oword [rbp - $70] - - pxor xmm0, xmm1 - - pshufd xmm5, xmm2, $EE - punpcklqdq xmm5, xmm3 - - pxor xmm0, xmm4 - pxor xmm0, xmm5 - - movdqa xmm5, xmm0 - pslld xmm0, 2 - psrld xmm5, 30 - por xmm0, xmm5 - - movdqa oword [rbp], xmm0 - add rbp, $10 - cmp rbp, r10 - jb @sse2_sha1_expand_32_79 - - // ========== Phase 2: 80 Compression Rounds ========== - - mov eax, [r12] - mov ebx, [r12 + $04] - mov ecx, [r12 + $08] - mov edx, [r12 + $0C] - mov r8d, [r12 + $10] - - lea rbp, [rsp + $50] - - // ---------- Rounds 0-19: Ch, K = $5A827999 ---------- - - mov r9d, 4 - -@sse2_sha1_ch_loop: - - mov esi, ecx - xor esi, edx - and esi, ebx - xor esi, edx - mov edi, eax - rol edi, 5 - add r8d, [rbp] - add r8d, edi - add r8d, esi - add r8d, $5A827999 - rol ebx, 30 - - mov esi, ebx - xor esi, ecx - and esi, eax - xor esi, ecx - mov edi, r8d - rol edi, 5 - add edx, [rbp + $04] - add edx, edi - add edx, esi - add edx, $5A827999 - rol eax, 30 - - mov esi, eax - xor esi, ebx - and esi, r8d - xor esi, ebx - mov edi, edx - rol edi, 5 - add ecx, [rbp + $08] - add ecx, edi - add ecx, esi - add ecx, $5A827999 - rol r8d, 30 - - mov esi, r8d - xor esi, eax - and esi, edx - xor esi, eax - mov edi, ecx - rol edi, 5 - add ebx, [rbp + $0C] - add ebx, edi - add ebx, esi - add ebx, $5A827999 - rol edx, 30 - - mov esi, edx - xor esi, r8d - and esi, ecx - xor esi, r8d - mov edi, ebx - rol edi, 5 - add eax, [rbp + $10] - add eax, edi - add eax, esi - add eax, $5A827999 - rol ecx, 30 - - add rbp, $14 - dec r9d - jnz @sse2_sha1_ch_loop - - // ---------- Rounds 20-39: Parity, K = $6ED9EBA1 ---------- - - mov r9d, 4 - -@sse2_sha1_par1_loop: - - mov esi, ebx - xor esi, ecx - xor esi, edx - mov edi, eax - rol edi, 5 - add r8d, [rbp] - add r8d, edi - add r8d, esi - add r8d, $6ED9EBA1 - rol ebx, 30 - - mov esi, eax - xor esi, ebx - xor esi, ecx - mov edi, r8d - rol edi, 5 - add edx, [rbp + $04] - add edx, edi - add edx, esi - add edx, $6ED9EBA1 - rol eax, 30 - - mov esi, r8d - xor esi, eax - xor esi, ebx - mov edi, edx - rol edi, 5 - add ecx, [rbp + $08] - add ecx, edi - add ecx, esi - add ecx, $6ED9EBA1 - rol r8d, 30 - - mov esi, edx - xor esi, r8d - xor esi, eax - mov edi, ecx - rol edi, 5 - add ebx, [rbp + $0C] - add ebx, edi - add ebx, esi - add ebx, $6ED9EBA1 - rol edx, 30 - - mov esi, ecx - xor esi, edx - xor esi, r8d - mov edi, ebx - rol edi, 5 - add eax, [rbp + $10] - add eax, edi - add eax, esi - add eax, $6ED9EBA1 - rol ecx, 30 - - add rbp, $14 - dec r9d - jnz @sse2_sha1_par1_loop - - // ---------- Rounds 40-59: Maj, K = $8F1BBCDC ---------- - - mov r9d, 4 - -@sse2_sha1_maj_loop: - - mov esi, ebx - or esi, ecx - and esi, edx - mov edi, ebx - and edi, ecx - or esi, edi - mov edi, eax - rol edi, 5 - add r8d, [rbp] - add r8d, edi - add r8d, esi - add r8d, $8F1BBCDC - rol ebx, 30 - - mov esi, eax - or esi, ebx - and esi, ecx - mov edi, eax - and edi, ebx - or esi, edi - mov edi, r8d - rol edi, 5 - add edx, [rbp + $04] - add edx, edi - add edx, esi - add edx, $8F1BBCDC - rol eax, 30 - - mov esi, r8d - or esi, eax - and esi, ebx - mov edi, r8d - and edi, eax - or esi, edi - mov edi, edx - rol edi, 5 - add ecx, [rbp + $08] - add ecx, edi - add ecx, esi - add ecx, $8F1BBCDC - rol r8d, 30 - - mov esi, edx - or esi, r8d - and esi, eax - mov edi, edx - and edi, r8d - or esi, edi - mov edi, ecx - rol edi, 5 - add ebx, [rbp + $0C] - add ebx, edi - add ebx, esi - add ebx, $8F1BBCDC - rol edx, 30 - - mov esi, ecx - or esi, edx - and esi, r8d - mov edi, ecx - and edi, edx - or esi, edi - mov edi, ebx - rol edi, 5 - add eax, [rbp + $10] - add eax, edi - add eax, esi - add eax, $8F1BBCDC - rol ecx, 30 - - add rbp, $14 - dec r9d - jnz @sse2_sha1_maj_loop - - // ---------- Rounds 60-79: Parity, K = $CA62C1D6 ---------- - - mov r9d, 4 - -@sse2_sha1_par2_loop: - - mov esi, ebx - xor esi, ecx - xor esi, edx - mov edi, eax - rol edi, 5 - add r8d, [rbp] - add r8d, edi - add r8d, esi - add r8d, $CA62C1D6 - rol ebx, 30 - - mov esi, eax - xor esi, ebx - xor esi, ecx - mov edi, r8d - rol edi, 5 - add edx, [rbp + $04] - add edx, edi - add edx, esi - add edx, $CA62C1D6 - rol eax, 30 - - mov esi, r8d - xor esi, eax - xor esi, ebx - mov edi, edx - rol edi, 5 - add ecx, [rbp + $08] - add ecx, edi - add ecx, esi - add ecx, $CA62C1D6 - rol r8d, 30 - - mov esi, edx - xor esi, r8d - xor esi, eax - mov edi, ecx - rol edi, 5 - add ebx, [rbp + $0C] - add ebx, edi - add ebx, esi - add ebx, $CA62C1D6 - rol edx, 30 - - mov esi, ecx - xor esi, edx - xor esi, r8d - mov edi, ebx - rol edi, 5 - add eax, [rbp + $10] - add eax, edi - add eax, esi - add eax, $CA62C1D6 - rol ecx, 30 - - add rbp, $14 - dec r9d - jnz @sse2_sha1_par2_loop - - // Add round results to state - add [r12], eax - add [r12 + $04], ebx - add [r12 + $08], ecx - add [r12 + $0C], edx - add [r12 + $10], r8d - - add r13, $40 - dec r14d - jnz @sse2_sha1_block_loop - -@sse2_sha1_done: - - mov rbx, [rsp + $00] - mov rbp, [rsp + $08] - mov r12, [rsp + $20] - mov r13, [rsp + $28] - mov r14, [rsp + $30] - mov r15, [rsp + $38] - mov rdi, [rsp + $10] - mov rsi, [rsp + $18] - add rsp, 408 + add ecx, esi + xor edi, eax + movdqa xmm9, xmm8 + ror ebp, $7 + paddd xmm8, xmm3 + add ecx, edx + pxor xmm4, xmm10 + add ebx, dword [rsp + $4] + xor edi, ebp + mov esi, ecx + rol ecx, $5 + movdqa xmm10, xmm4 + add ebx, edi + xor esi, ebp + movdqa oword [rsp + $30], xmm8 + ror edx, $7 + add ebx, ecx + add eax, dword [rsp + $8] + pslld xmm4, $2 + xor esi, edx + mov edi, ebx + psrld xmm10, $1E + rol ebx, $5 + add eax, esi + xor edi, edx + ror ecx, $7 + por xmm4, xmm10 + add eax, ebx + add ebp, dword [rsp + $C] + pshufd xmm8, xmm3, $EE + xor edi, ecx + mov esi, eax + rol eax, $5 + add ebp, edi + xor esi, ecx + ror ebx, $7 + add ebp, eax + pxor xmm5, xmm1 + add edx, dword [rsp + $10] + xor esi, ebx + punpcklqdq xmm8, xmm4 + mov edi, ebp + rol ebp, $5 + pxor xmm5, xmm6 + add edx, esi + xor edi, ebx + movdqa xmm10, xmm9 + ror eax, $7 + paddd xmm9, xmm4 + add edx, ebp + pxor xmm5, xmm8 + add ecx, dword [rsp + $14] + xor edi, eax + mov esi, edx + rol edx, $5 + movdqa xmm8, xmm5 + add ecx, edi + xor esi, eax + movdqa oword [rsp], xmm9 + ror ebp, $7 + add ecx, edx + add ebx, dword [rsp + $18] + pslld xmm5, $2 + xor esi, ebp + mov edi, ecx + psrld xmm8, $1E + rol ecx, $5 + add ebx, esi + xor edi, ebp + ror edx, $7 + por xmm5, xmm8 + add ebx, ecx + add eax, dword [rsp + $1C] + pshufd xmm9, xmm4, $EE + ror ecx, $7 + mov esi, ebx + xor edi, edx + rol ebx, $5 + add eax, edi + xor esi, ecx + xor ecx, edx + add eax, ebx + pxor xmm6, xmm2 + add ebp, dword [rsp + $20] + and esi, ecx + xor ecx, edx + ror ebx, $7 + punpcklqdq xmm9, xmm5 + mov edi, eax + xor esi, ecx + pxor xmm6, xmm7 + rol eax, $5 + add ebp, esi + movdqa xmm8, xmm10 + xor edi, ebx + paddd xmm10, xmm5 + xor ebx, ecx + pxor xmm6, xmm9 + add ebp, eax + add edx, dword [rsp + $24] + and edi, ebx + xor ebx, ecx + ror eax, $7 + movdqa xmm9, xmm6 + mov esi, ebp + xor edi, ebx + movdqa oword [rsp + $10], xmm10 + rol ebp, $5 + add edx, edi + xor esi, eax + pslld xmm6, $2 + xor eax, ebx + add edx, ebp + psrld xmm9, $1E + add ecx, dword [rsp + $28] + and esi, eax + xor eax, ebx + por xmm6, xmm9 + ror ebp, $7 + mov edi, edx + xor esi, eax + rol edx, $5 + pshufd xmm10, xmm5, $EE + add ecx, esi + xor edi, ebp + xor ebp, eax + add ecx, edx + add ebx, dword [rsp + $2C] + and edi, ebp + xor ebp, eax + ror edx, $7 + mov esi, ecx + xor edi, ebp + rol ecx, $5 + add ebx, edi + xor esi, edx + xor edx, ebp + add ebx, ecx + pxor xmm7, xmm3 + add eax, dword [rsp + $30] + and esi, edx + xor edx, ebp + ror ecx, $7 + punpcklqdq xmm10, xmm6 + mov edi, ebx + xor esi, edx + pxor xmm7, xmm0 + rol ebx, $5 + add eax, esi + movdqu xmm9, oword [r14 + $20] + xor edi, ecx + paddd xmm8, xmm6 + xor ecx, edx + pxor xmm7, xmm10 + add eax, ebx + add ebp, dword [rsp + $34] + and edi, ecx + xor ecx, edx + ror ebx, $7 + movdqa xmm10, xmm7 + mov esi, eax + xor edi, ecx + movdqa oword [rsp + $20], xmm8 + rol eax, $5 + add ebp, edi + xor esi, ebx + pslld xmm7, $2 + xor ebx, ecx + add ebp, eax + psrld xmm10, $1E + add edx, dword [rsp + $38] + and esi, ebx + xor ebx, ecx + por xmm7, xmm10 + ror eax, $7 + mov edi, ebp + xor esi, ebx + rol ebp, $5 + pshufd xmm8, xmm6, $EE + add edx, esi + xor edi, eax + xor eax, ebx + add edx, ebp + add ecx, dword [rsp + $3C] + and edi, eax + xor eax, ebx + ror ebp, $7 + mov esi, edx + xor edi, eax + rol edx, $5 + add ecx, edi + xor esi, ebp + xor ebp, eax + add ecx, edx + pxor xmm0, xmm4 + add ebx, dword [rsp] + and esi, ebp + xor ebp, eax + ror edx, $7 + punpcklqdq xmm8, xmm7 + mov edi, ecx + xor esi, ebp + pxor xmm0, xmm1 + rol ecx, $5 + add ebx, esi + movdqa xmm10, xmm9 + xor edi, edx + paddd xmm9, xmm7 + xor edx, ebp + pxor xmm0, xmm8 + add ebx, ecx + add eax, dword [rsp + $4] + and edi, edx + xor edx, ebp + ror ecx, $7 + movdqa xmm8, xmm0 + mov esi, ebx + xor edi, edx + movdqa oword [rsp + $30], xmm9 + rol ebx, $5 + add eax, edi + xor esi, ecx + pslld xmm0, $2 + xor ecx, edx + add eax, ebx + psrld xmm8, $1E + add ebp, dword [rsp + $8] + and esi, ecx + xor ecx, edx + por xmm0, xmm8 + ror ebx, $7 + mov edi, eax + xor esi, ecx + rol eax, $5 + pshufd xmm9, xmm7, $EE + add ebp, esi + xor edi, ebx + xor ebx, ecx + add ebp, eax + add edx, dword [rsp + $C] + and edi, ebx + xor ebx, ecx + ror eax, $7 + mov esi, ebp + xor edi, ebx + rol ebp, $5 + add edx, edi + xor esi, eax + xor eax, ebx + add edx, ebp + pxor xmm1, xmm5 + add ecx, dword [rsp + $10] + and esi, eax + xor eax, ebx + ror ebp, $7 + punpcklqdq xmm9, xmm0 + mov edi, edx + xor esi, eax + pxor xmm1, xmm2 + rol edx, $5 + add ecx, esi + movdqa xmm8, xmm10 + xor edi, ebp + paddd xmm10, xmm0 + xor ebp, eax + pxor xmm1, xmm9 + add ecx, edx + add ebx, dword [rsp + $14] + and edi, ebp + xor ebp, eax + ror edx, $7 + movdqa xmm9, xmm1 + mov esi, ecx + xor edi, ebp + movdqa oword [rsp], xmm10 + rol ecx, $5 + add ebx, edi + xor esi, edx + pslld xmm1, $2 + xor edx, ebp + add ebx, ecx + psrld xmm9, $1E + add eax, dword [rsp + $18] + and esi, edx + xor edx, ebp + por xmm1, xmm9 + ror ecx, $7 + mov edi, ebx + xor esi, edx + rol ebx, $5 + pshufd xmm10, xmm0, $EE + add eax, esi + xor edi, ecx + xor ecx, edx + add eax, ebx + add ebp, dword [rsp + $1C] + and edi, ecx + xor ecx, edx + ror ebx, $7 + mov esi, eax + xor edi, ecx + rol eax, $5 + add ebp, edi + xor esi, ebx + xor ebx, ecx + add ebp, eax + pxor xmm2, xmm6 + add edx, dword [rsp + $20] + and esi, ebx + xor ebx, ecx + ror eax, $7 + punpcklqdq xmm10, xmm1 + mov edi, ebp + xor esi, ebx + pxor xmm2, xmm3 + rol ebp, $5 + add edx, esi + movdqa xmm9, xmm8 + xor edi, eax + paddd xmm8, xmm1 + xor eax, ebx + pxor xmm2, xmm10 + add edx, ebp + add ecx, dword [rsp + $24] + and edi, eax + xor eax, ebx + ror ebp, $7 + movdqa xmm10, xmm2 + mov esi, edx + xor edi, eax + movdqa oword [rsp + $10], xmm8 + rol edx, $5 + add ecx, edi + xor esi, ebp + pslld xmm2, $2 + xor ebp, eax + add ecx, edx + psrld xmm10, $1E + add ebx, dword [rsp + $28] + and esi, ebp + xor ebp, eax + por xmm2, xmm10 + ror edx, $7 + mov edi, ecx + xor esi, ebp + rol ecx, $5 + pshufd xmm8, xmm1, $EE + add ebx, esi + xor edi, edx + xor edx, ebp + add ebx, ecx + add eax, dword [rsp + $2C] + and edi, edx + xor edx, ebp + ror ecx, $7 + mov esi, ebx + xor edi, edx + rol ebx, $5 + add eax, edi + xor esi, edx + add eax, ebx + pxor xmm3, xmm7 + add ebp, dword [rsp + $30] + xor esi, ecx + punpcklqdq xmm8, xmm2 + mov edi, eax + rol eax, $5 + pxor xmm3, xmm4 + add ebp, esi + xor edi, ecx + movdqa xmm10, xmm9 + ror ebx, $7 + paddd xmm9, xmm2 + add ebp, eax + pxor xmm3, xmm8 + add edx, dword [rsp + $34] + xor edi, ebx + mov esi, ebp + rol ebp, $5 + movdqa xmm8, xmm3 + add edx, edi + xor esi, ebx + movdqa oword [rsp + $20], xmm9 + ror eax, $7 + add edx, ebp + add ecx, dword [rsp + $38] + pslld xmm3, $2 + xor esi, eax + mov edi, edx + psrld xmm8, $1E + rol edx, $5 + add ecx, esi + xor edi, eax + ror ebp, $7 + por xmm3, xmm8 + add ecx, edx + add ebx, dword [rsp + $3C] + xor edi, ebp + mov esi, ecx + rol ecx, $5 + add ebx, edi + xor esi, ebp + ror edx, $7 + add ebx, ecx + add eax, dword [rsp] + xor esi, edx + mov edi, ebx + rol ebx, $5 + paddd xmm10, xmm3 + add eax, esi + xor edi, edx + movdqa oword [rsp + $30], xmm10 + ror ecx, $7 + add eax, ebx + add ebp, dword [rsp + $4] + xor edi, ecx + mov esi, eax + rol eax, $5 + add ebp, edi + xor esi, ecx + ror ebx, $7 + add ebp, eax + add edx, dword [rsp + $8] + xor esi, ebx + mov edi, ebp + rol ebp, $5 + add edx, esi + xor edi, ebx + ror eax, $7 + add edx, ebp + add ecx, dword [rsp + $C] + xor edi, eax + mov esi, edx + rol edx, $5 + add ecx, edi + xor esi, eax + ror ebp, $7 + add ecx, edx + cmp r9, r10 + je @done + movdqu xmm6, oword [r14 + $40] + movdqu xmm9, oword [r14 - $40] + movdqu xmm0, oword [r9] + movdqu xmm1, oword [r9 + $10] + movdqu xmm2, oword [r9 + $20] + movdqu xmm3, oword [r9 + $30] + movdqa xmm12, xmm0 + psrlw xmm12, $8 + psllw xmm0, $8 + por xmm0, xmm12 + pshuflw xmm0, xmm0, $B1 + pshufhw xmm0, xmm0, $B1 + add r9, $40 + add ebx, dword [rsp + $10] + xor esi, ebp + mov edi, ecx + movdqa xmm12, xmm1 + psrlw xmm12, $8 + psllw xmm1, $8 + por xmm1, xmm12 + pshuflw xmm1, xmm1, $B1 + pshufhw xmm1, xmm1, $B1 + rol ecx, $5 + add ebx, esi + xor edi, ebp + ror edx, $7 + paddd xmm0, xmm9 + add ebx, ecx + add eax, dword [rsp + $14] + xor edi, edx + mov esi, ebx + movdqa oword [rsp], xmm0 + rol ebx, $5 + add eax, edi + xor esi, edx + ror ecx, $7 + psubd xmm0, xmm9 + add eax, ebx + add ebp, dword [rsp + $18] + xor esi, ecx + mov edi, eax + rol eax, $5 + add ebp, esi + xor edi, ecx + ror ebx, $7 + add ebp, eax + add edx, dword [rsp + $1C] + xor edi, ebx + mov esi, ebp + rol ebp, $5 + add edx, edi + xor esi, ebx + ror eax, $7 + add edx, ebp + add ecx, dword [rsp + $20] + xor esi, eax + mov edi, edx + movdqa xmm12, xmm2 + psrlw xmm12, $8 + psllw xmm2, $8 + por xmm2, xmm12 + pshuflw xmm2, xmm2, $B1 + pshufhw xmm2, xmm2, $B1 + rol edx, $5 + add ecx, esi + xor edi, eax + ror ebp, $7 + paddd xmm1, xmm9 + add ecx, edx + add ebx, dword [rsp + $24] + xor edi, ebp + mov esi, ecx + movdqa oword [rsp + $10], xmm1 + rol ecx, $5 + add ebx, edi + xor esi, ebp + ror edx, $7 + psubd xmm1, xmm9 + add ebx, ecx + add eax, dword [rsp + $28] + xor esi, edx + mov edi, ebx + rol ebx, $5 + add eax, esi + xor edi, edx + ror ecx, $7 + add eax, ebx + add ebp, dword [rsp + $2C] + xor edi, ecx + mov esi, eax + rol eax, $5 + add ebp, edi + xor esi, ecx + ror ebx, $7 + add ebp, eax + add edx, dword [rsp + $30] + xor esi, ebx + mov edi, ebp + movdqa xmm12, xmm3 + psrlw xmm12, $8 + psllw xmm3, $8 + por xmm3, xmm12 + pshuflw xmm3, xmm3, $B1 + pshufhw xmm3, xmm3, $B1 + rol ebp, $5 + add edx, esi + xor edi, ebx + ror eax, $7 + paddd xmm2, xmm9 + add edx, ebp + add ecx, dword [rsp + $34] + xor edi, eax + mov esi, edx + movdqa oword [rsp + $20], xmm2 + rol edx, $5 + add ecx, edi + xor esi, eax + ror ebp, $7 + psubd xmm2, xmm9 + add ecx, edx + add ebx, dword [rsp + $38] + xor esi, ebp + mov edi, ecx + rol ecx, $5 + add ebx, esi + xor edi, ebp + ror edx, $7 + add ebx, ecx + add eax, dword [rsp + $3C] + xor edi, edx + mov esi, ebx + rol ebx, $5 + add eax, edi + ror ecx, $7 + add eax, ebx + add eax, dword [r8] + add esi, dword [r8 + $4] + add ecx, dword [r8 + $8] + add edx, dword [r8 + $C] + mov dword [r8], eax + add ebp, dword [r8 + $10] + mov dword [r8 + $4], esi + mov ebx, esi + mov dword [r8 + $8], ecx + mov edi, ecx + mov dword [r8 + $C], edx + xor edi, edx + mov dword [r8 + $10], ebp + and esi, edi + jmp @block_loop + +@done: + add ebx, dword [rsp + $10] + xor esi, ebp + mov edi, ecx + rol ecx, $5 + add ebx, esi + xor edi, ebp + ror edx, $7 + add ebx, ecx + add eax, dword [rsp + $14] + xor edi, edx + mov esi, ebx + rol ebx, $5 + add eax, edi + xor esi, edx + ror ecx, $7 + add eax, ebx + add ebp, dword [rsp + $18] + xor esi, ecx + mov edi, eax + rol eax, $5 + add ebp, esi + xor edi, ecx + ror ebx, $7 + add ebp, eax + add edx, dword [rsp + $1C] + xor edi, ebx + mov esi, ebp + rol ebp, $5 + add edx, edi + xor esi, ebx + ror eax, $7 + add edx, ebp + add ecx, dword [rsp + $20] + xor esi, eax + mov edi, edx + rol edx, $5 + add ecx, esi + xor edi, eax + ror ebp, $7 + add ecx, edx + add ebx, dword [rsp + $24] + xor edi, ebp + mov esi, ecx + rol ecx, $5 + add ebx, edi + xor esi, ebp + ror edx, $7 + add ebx, ecx + add eax, dword [rsp + $28] + xor esi, edx + mov edi, ebx + rol ebx, $5 + add eax, esi + xor edi, edx + ror ecx, $7 + add eax, ebx + add ebp, dword [rsp + $2C] + xor edi, ecx + mov esi, eax + rol eax, $5 + add ebp, edi + xor esi, ecx + ror ebx, $7 + add ebp, eax + add edx, dword [rsp + $30] + xor esi, ebx + mov edi, ebp + rol ebp, $5 + add edx, esi + xor edi, ebx + ror eax, $7 + add edx, ebp + add ecx, dword [rsp + $34] + xor edi, eax + mov esi, edx + rol edx, $5 + add ecx, edi + xor esi, eax + ror ebp, $7 + add ecx, edx + add ebx, dword [rsp + $38] + xor esi, ebp + mov edi, ecx + rol ecx, $5 + add ebx, esi + xor edi, ebp + ror edx, $7 + add ebx, ecx + add eax, dword [rsp + $3C] + xor edi, edx + mov esi, ebx + rol ebx, $5 + add eax, edi + ror ecx, $7 + add eax, ebx + add eax, dword [r8] + add esi, dword [r8 + $4] + add ecx, dword [r8 + $8] + mov dword [r8], eax + add edx, dword [r8 + $C] + mov dword [r8 + $4], esi + add ebp, dword [r8 + $10] + mov dword [r8 + $8], ecx + mov dword [r8 + $C], edx + mov dword [r8 + $10], ebp + mov rsi, qword [r11 - $40] + mov rdi, qword [r11 - $38] + mov r14, qword [r11 - $30] + mov r13, qword [r11 - $28] + mov r12, qword [r11 - $20] + mov rbp, qword [r11 - $18] + mov rbx, qword [r11 - $10] + lea rsp, [r11] {$I ..\Include\Simd\Common\SimdNonVolatileRestore_x86_64.inc} diff --git a/HashLib/src/Include/Simd/SHA1/SHA1CompressSsse3_i386.inc b/HashLib/src/Include/Simd/SHA1/SHA1CompressSsse3_i386.inc deleted file mode 100644 index 40c63dea..00000000 --- a/HashLib/src/Include/Simd/SHA1/SHA1CompressSsse3_i386.inc +++ /dev/null @@ -1,450 +0,0 @@ -// SHA-1 SSSE3 implementation with SIMD message schedule (IA-32). -// After SimdProc5Begin_i386 — ebx = state, esi = data, edi = numblocks, -// eax = K_SHA1 ptr (unused: Phase 2 uses immediate round constants), -// ecx = BSWAP32 mask ptr (16 bytes). maskptr saved to [esp+$3C], reloaded each block. -// Phase 1 matches SHA1CompressSsse3_x86_64.inc (pshufb + same expand); Phase 2 matches SSE2 i386 GPR rounds. -// Uses xmm0–xmm7 in Phase 1; xmm7 = BSWAP mask. -// xmm6–xmm7 saved/restored defensively (volatile on i386). -// -// Two phases per block: -// Phase 1 (SIMD): pshufb W[0..15], then expand W[16..79] (same as x64 SSSE3 schedule). -// Phase 2 (GPR): 80 compression rounds with 5-round unrolling -// -// Saved GPR / stack (sub esp, 424): [esp+$10] state, +$14 data, +$18 numblocks, +$34 K_SHA1, -// +$1C E, +$20 loop ctr, +$38 saved ebp; W buffer at +$60. xmm6 at [esp], xmm7 at [esp+$24]. -// W-buffer uses movdqu (not movdqa): this frame does not keep ESP 16-byte aligned. - - sub esp, 424 - - movdqu oword ptr [esp], xmm6 - movdqu oword ptr [esp + $24], xmm7 - mov [esp + $10], ebx - mov [esp + $14], esi - mov [esp + $18], edi - mov [esp + $34], eax - mov [esp + $38], ebp - mov [esp + $3C], ecx - - test edi, edi - jz @ssse3_sha1_done - -@ssse3_sha1_block_loop: - - // ========== Phase 1: SIMD message schedule ========== - - mov eax, [esp + $3C] - movdqu xmm7, oword ptr [eax] - mov esi, [esp + $14] - lea ebx, [esp + $60] - - movdqu xmm0, oword ptr [esi] - pshufb xmm0, xmm7 - movdqu oword ptr [ebx], xmm0 - - movdqu xmm1, oword ptr [esi + $10] - pshufb xmm1, xmm7 - movdqu oword ptr [ebx + $10], xmm1 - - movdqu xmm2, oword ptr [esi + $20] - pshufb xmm2, xmm7 - movdqu oword ptr [ebx + $20], xmm2 - - movdqu xmm3, oword ptr [esi + $30] - pshufb xmm3, xmm7 - movdqu oword ptr [ebx + $30], xmm3 - - // --- W[16..31]: ROL1 formula with cross-lane fix --- - - lea edi, [ebx + $40] - lea ecx, [ebx + $80] - -@ssse3_sha1_expand_16_31: - movdqu xmm0, oword ptr [edi - $40] - movdqu xmm1, oword ptr [edi - $30] - movdqu xmm2, oword ptr [edi - $20] - movdqu xmm3, oword ptr [edi - $10] - - pshufd xmm4, xmm0, $EE - punpcklqdq xmm4, xmm1 - - movdqa xmm5, xmm3 - psrldq xmm5, 4 - - pxor xmm4, xmm0 - pxor xmm5, xmm2 - pxor xmm4, xmm5 - - movdqa xmm6, xmm4 - movdqa xmm5, xmm4 - pslldq xmm6, 12 - paddd xmm4, xmm4 - psrld xmm5, 31 - por xmm4, xmm5 - - movdqa xmm5, xmm6 - psrld xmm6, 30 - pslld xmm5, 2 - pxor xmm4, xmm6 - pxor xmm4, xmm5 - - movdqu oword ptr [edi], xmm4 - add edi, $10 - cmp edi, ecx - jb @ssse3_sha1_expand_16_31 - - // --- W[32..79]: ROL2 expanded recurrence --- - - lea ecx, [ebx + $140] - -@ssse3_sha1_expand_32_79: - movdqu xmm0, oword ptr [edi - $80] - movdqu xmm1, oword ptr [edi - $40] - movdqu xmm2, oword ptr [edi - $20] - movdqu xmm3, oword ptr [edi - $10] - movdqu xmm4, oword ptr [edi - $70] - - pxor xmm0, xmm1 - - pshufd xmm5, xmm2, $EE - punpcklqdq xmm5, xmm3 - - pxor xmm0, xmm4 - pxor xmm0, xmm5 - - movdqa xmm5, xmm0 - pslld xmm0, 2 - psrld xmm5, 30 - por xmm0, xmm5 - - movdqu oword ptr [edi], xmm0 - add edi, $10 - cmp edi, ecx - jb @ssse3_sha1_expand_32_79 - - // ========== Phase 2: 80 Compression Rounds ========== - - mov esi, [esp + $10] - mov eax, [esi] - mov ebx, [esi + $04] - mov ecx, [esi + $08] - mov edx, [esi + $0C] - mov edi, [esi + $10] - mov [esp + $1C], edi - - lea ebp, [esp + $60] - - // ---------- Rounds 0-19: Ch, K = $5A827999 ---------- - - mov dword ptr [esp + $20], 4 - -@ssse3_sha1_ch_loop: - - mov esi, ecx - xor esi, edx - and esi, ebx - xor esi, edx - mov edi, dword ptr [ebp] - add dword ptr [esp + $1C], edi - mov edi, eax - rol edi, 5 - add dword ptr [esp + $1C], edi - add dword ptr [esp + $1C], esi - add dword ptr [esp + $1C], $5A827999 - rol ebx, 30 - - mov esi, ebx - xor esi, ecx - and esi, eax - xor esi, ecx - mov edi, dword ptr [esp + $1C] - rol edi, 5 - add edx, dword ptr [ebp + $04] - add edx, edi - add edx, esi - add edx, $5A827999 - rol eax, 30 - - mov esi, eax - xor esi, ebx - and esi, dword ptr [esp + $1C] - xor esi, ebx - mov edi, edx - rol edi, 5 - add ecx, dword ptr [ebp + $08] - add ecx, edi - add ecx, esi - add ecx, $5A827999 - mov edi, dword ptr [esp + $1C] - rol edi, 30 - mov dword ptr [esp + $1C], edi - mov esi, edi - xor esi, eax - and esi, edx - xor esi, eax - mov edi, ecx - rol edi, 5 - add ebx, dword ptr [ebp + $0C] - add ebx, edi - add ebx, esi - add ebx, $5A827999 - rol edx, 30 - - mov esi, edx - xor esi, dword ptr [esp + $1C] - and esi, ecx - xor esi, dword ptr [esp + $1C] - mov edi, ebx - rol edi, 5 - add eax, dword ptr [ebp + $10] - add eax, edi - add eax, esi - add eax, $5A827999 - rol ecx, 30 - - add ebp, $14 - dec dword ptr [esp + $20] - jnz @ssse3_sha1_ch_loop - - // ---------- Rounds 20-39: Parity, K = $6ED9EBA1 ---------- - - mov dword ptr [esp + $20], 4 - -@ssse3_sha1_par1_loop: - - mov esi, ebx - xor esi, ecx - xor esi, edx - mov edi, dword ptr [ebp] - add dword ptr [esp + $1C], edi - mov edi, eax - rol edi, 5 - add dword ptr [esp + $1C], edi - add dword ptr [esp + $1C], esi - add dword ptr [esp + $1C], $6ED9EBA1 - rol ebx, 30 - - mov esi, eax - xor esi, ebx - xor esi, ecx - mov edi, dword ptr [esp + $1C] - rol edi, 5 - add edx, dword ptr [ebp + $04] - add edx, edi - add edx, esi - add edx, $6ED9EBA1 - rol eax, 30 - - mov esi, dword ptr [esp + $1C] - xor esi, eax - xor esi, ebx - mov edi, edx - rol edi, 5 - add ecx, dword ptr [ebp + $08] - add ecx, edi - add ecx, esi - add ecx, $6ED9EBA1 - mov edi, dword ptr [esp + $1C] - rol edi, 30 - mov dword ptr [esp + $1C], edi - - mov esi, edx - xor esi, dword ptr [esp + $1C] - xor esi, eax - mov edi, ecx - rol edi, 5 - add ebx, dword ptr [ebp + $0C] - add ebx, edi - add ebx, esi - add ebx, $6ED9EBA1 - rol edx, 30 - - mov esi, ecx - xor esi, edx - xor esi, dword ptr [esp + $1C] - mov edi, ebx - rol edi, 5 - add eax, dword ptr [ebp + $10] - add eax, edi - add eax, esi - add eax, $6ED9EBA1 - rol ecx, 30 - - add ebp, $14 - dec dword ptr [esp + $20] - jnz @ssse3_sha1_par1_loop - - // ---------- Rounds 40-59: Maj, K = $8F1BBCDC ---------- - - mov dword ptr [esp + $20], 4 - -@ssse3_sha1_maj_loop: - - mov esi, ebx - or esi, ecx - and esi, edx - mov edi, ebx - and edi, ecx - or esi, edi - mov edi, dword ptr [ebp] - add dword ptr [esp + $1C], edi - mov edi, eax - rol edi, 5 - add dword ptr [esp + $1C], edi - add dword ptr [esp + $1C], esi - add dword ptr [esp + $1C], $8F1BBCDC - rol ebx, 30 - - mov esi, eax - or esi, ebx - and esi, ecx - mov edi, eax - and edi, ebx - or esi, edi - mov edi, dword ptr [esp + $1C] - rol edi, 5 - add edx, dword ptr [ebp + $04] - add edx, edi - add edx, esi - add edx, $8F1BBCDC - rol eax, 30 - - mov esi, dword ptr [esp + $1C] - or esi, eax - and esi, ebx - mov edi, dword ptr [esp + $1C] - and edi, eax - or esi, edi - mov edi, edx - rol edi, 5 - add ecx, dword ptr [ebp + $08] - add ecx, edi - add ecx, esi - add ecx, $8F1BBCDC - mov edi, dword ptr [esp + $1C] - rol edi, 30 - mov dword ptr [esp + $1C], edi - - mov esi, edx - or esi, dword ptr [esp + $1C] - and esi, eax - mov edi, edx - and edi, dword ptr [esp + $1C] - or esi, edi - mov edi, ecx - rol edi, 5 - add ebx, dword ptr [ebp + $0C] - add ebx, edi - add ebx, esi - add ebx, $8F1BBCDC - rol edx, 30 - - mov esi, ecx - or esi, edx - and esi, dword ptr [esp + $1C] - mov edi, ecx - and edi, edx - or esi, edi - mov edi, ebx - rol edi, 5 - add eax, dword ptr [ebp + $10] - add eax, edi - add eax, esi - add eax, $8F1BBCDC - rol ecx, 30 - - add ebp, $14 - dec dword ptr [esp + $20] - jnz @ssse3_sha1_maj_loop - - // ---------- Rounds 60-79: Parity, K = $CA62C1D6 ---------- - - mov dword ptr [esp + $20], 4 - -@ssse3_sha1_par2_loop: - - mov esi, ebx - xor esi, ecx - xor esi, edx - mov edi, dword ptr [ebp] - add dword ptr [esp + $1C], edi - mov edi, eax - rol edi, 5 - add dword ptr [esp + $1C], edi - add dword ptr [esp + $1C], esi - add dword ptr [esp + $1C], $CA62C1D6 - rol ebx, 30 - - mov esi, eax - xor esi, ebx - xor esi, ecx - mov edi, dword ptr [esp + $1C] - rol edi, 5 - add edx, dword ptr [ebp + $04] - add edx, edi - add edx, esi - add edx, $CA62C1D6 - rol eax, 30 - - mov esi, dword ptr [esp + $1C] - xor esi, eax - xor esi, ebx - mov edi, edx - rol edi, 5 - add ecx, dword ptr [ebp + $08] - add ecx, edi - add ecx, esi - add ecx, $CA62C1D6 - mov edi, dword ptr [esp + $1C] - rol edi, 30 - mov dword ptr [esp + $1C], edi - - mov esi, edx - xor esi, dword ptr [esp + $1C] - xor esi, eax - mov edi, ecx - rol edi, 5 - add ebx, dword ptr [ebp + $0C] - add ebx, edi - add ebx, esi - add ebx, $CA62C1D6 - rol edx, 30 - - mov esi, ecx - xor esi, edx - xor esi, dword ptr [esp + $1C] - mov edi, ebx - rol edi, 5 - add eax, dword ptr [ebp + $10] - add eax, edi - add eax, esi - add eax, $CA62C1D6 - rol ecx, 30 - - add ebp, $14 - dec dword ptr [esp + $20] - jnz @ssse3_sha1_par2_loop - - // Add round results to state - mov esi, [esp + $10] - add dword ptr [esi], eax - add dword ptr [esi + $04], ebx - add dword ptr [esi + $08], ecx - add dword ptr [esi + $0C], edx - mov eax, dword ptr [esp + $1C] - add dword ptr [esi + $10], eax - - mov esi, [esp + $14] - add esi, $40 - mov [esp + $14], esi - dec dword ptr [esp + $18] - jnz @ssse3_sha1_block_loop - -@ssse3_sha1_done: - - mov ebp, [esp + $38] - movdqu xmm7, oword ptr [esp + $24] - movdqu xmm6, oword ptr [esp] - add esp, 424 - pop edi - pop esi - pop ebx diff --git a/HashLib/src/Include/Simd/SHA1/SHA1CompressSsse3_x86_64.inc b/HashLib/src/Include/Simd/SHA1/SHA1CompressSsse3_x86_64.inc deleted file mode 100644 index 334220f5..00000000 --- a/HashLib/src/Include/Simd/SHA1/SHA1CompressSsse3_x86_64.inc +++ /dev/null @@ -1,465 +0,0 @@ -// SHA-1 SSSE3 implementation with SIMD message schedule. -// Inspired by OpenSSL sha1-x86_64.pl by Andy Polyakov (CRYPTOGAMS), -// Linux kernel sha1_ssse3_asm.S by Maxim Locktyukhin / Ronen Zohar / Mathias Krause. -// Expects MS x64 ABI: rcx = state ptr, rdx = data ptr, r8d = numblocks, -// r9 = K_SHA1 ptr (K_00_19 at 0, K_20_39 at 16, K_40_59 at 32, K_60_79 at 48), -// r10 = BSWAP32 mask ptr (16 bytes). -// Uses xmm0-xmm7 (SIMD message schedule + byte-swap), all GPR. -// -// Two phases per block: -// Phase 1 (SIMD): Byte-swap W[0..15] using pshufb, then expand W[16..79] -// using vectorized message schedule (4 W values per XMM iteration). -// W[16..31]: ROL1 formula with cross-lane fix for element 3. -// W[32..79]: ROL2 expanded recurrence W[t]=ROL2(W[t-6]^W[t-16]^W[t-28]^W[t-32]). -// Phase 2 (GPR): 80 compression rounds with 5-round unrolling -// -// MS x64 non-volatile saves: xmm6-xmm7, rbx, rbp, rdi, rsi, r12-r15. -// -// Stack layout (sub rsp, 440): -// [rsp + 0.. 15]: xmm6 save -// [rsp + 16.. 31]: xmm7 save -// [rsp + 32.. 39]: rbx save -// [rsp + 40.. 47]: rbp save -// [rsp + 48.. 55]: rdi save -// [rsp + 56.. 63]: rsi save -// [rsp + 64.. 71]: r12 save -// [rsp + 72.. 79]: r13 save -// [rsp + 80.. 87]: r14 save -// [rsp + 88.. 95]: r15 save -// [rsp + 96..103]: K_SHA1 ptr save -// [rsp + 104..111]: BSWAP mask ptr save -// [rsp + 112..431]: W buffer (320 bytes = 80 x 4, 16-byte aligned) - - {$I ..\Include\Simd\Common\SimdNonVolatileSave_x86_64.inc} - - sub rsp, 408 - - mov [rsp + $10], rdi - mov [rsp + $18], rsi - mov [rsp + $00], rbx - mov [rsp + $08], rbp - mov [rsp + $20], r12 - mov [rsp + $28], r13 - mov [rsp + $30], r14 - mov [rsp + $38], r15 - - mov r12, rcx - mov r13, rdx - mov r14d, r8d - mov [rsp + $40], r9 - mov [rsp + $48], r10 - - test r14d, r14d - jz @ssse3_sha1_done - -@ssse3_sha1_block_loop: - - // ========== Phase 1: SIMD message schedule ========== - - mov rax, [rsp + $48] - movdqu xmm7, oword [rax] - mov rax, [rsp + $40] - - lea r15, [rsp + $50] - - movdqu xmm0, oword [r13] - pshufb xmm0, xmm7 - movdqa oword [r15], xmm0 - - movdqu xmm1, oword [r13 + $10] - pshufb xmm1, xmm7 - movdqa oword [r15 + $10], xmm1 - - movdqu xmm2, oword [r13 + $20] - pshufb xmm2, xmm7 - movdqa oword [r15 + $20], xmm2 - - movdqu xmm3, oword [r13 + $30] - pshufb xmm3, xmm7 - movdqa oword [r15 + $30], xmm3 - - // --- W[16..31]: ROL1 formula with cross-lane fix --- - // W[t..t+3] = ROL1(W[t-3..t]^W[t-8..t-5]^W[t-14..t-11]^W[t-16..t-13]) - // Element 3 needs correction: XOR in ROL2(pre_element_0) - - lea rbp, [r15 + $40] - lea r10, [r15 + $80] - -@ssse3_sha1_expand_16_31: - movdqa xmm0, oword [rbp - $40] - movdqa xmm1, oword [rbp - $30] - movdqa xmm2, oword [rbp - $20] - movdqa xmm3, oword [rbp - $10] - - pshufd xmm4, xmm0, $EE - punpcklqdq xmm4, xmm1 - - movdqa xmm5, xmm3 - psrldq xmm5, 4 - - pxor xmm4, xmm0 - pxor xmm5, xmm2 - pxor xmm4, xmm5 - - movdqa xmm6, xmm4 - movdqa xmm5, xmm4 - pslldq xmm6, 12 - paddd xmm4, xmm4 - psrld xmm5, 31 - por xmm4, xmm5 - - movdqa xmm5, xmm6 - psrld xmm6, 30 - pslld xmm5, 2 - pxor xmm4, xmm6 - pxor xmm4, xmm5 - - movdqa oword [rbp], xmm4 - add rbp, $10 - cmp rbp, r10 - jb @ssse3_sha1_expand_16_31 - - // --- W[32..79]: ROL2 expanded recurrence --- - // W[t..t+3] = ROL2(W[t-6..t-3]^W[t-16..t-13]^W[t-28..t-25]^W[t-32..t-29]) - - lea r10, [r15 + $140] - -@ssse3_sha1_expand_32_79: - movdqa xmm0, oword [rbp - $80] - movdqa xmm1, oword [rbp - $40] - movdqa xmm2, oword [rbp - $20] - movdqa xmm3, oword [rbp - $10] - movdqa xmm4, oword [rbp - $70] - - pxor xmm0, xmm1 - - pshufd xmm5, xmm2, $EE - punpcklqdq xmm5, xmm3 - - pxor xmm0, xmm4 - pxor xmm0, xmm5 - - movdqa xmm5, xmm0 - pslld xmm0, 2 - psrld xmm5, 30 - por xmm0, xmm5 - - movdqa oword [rbp], xmm0 - add rbp, $10 - cmp rbp, r10 - jb @ssse3_sha1_expand_32_79 - - // ========== Phase 2: 80 Compression Rounds ========== - - mov eax, [r12] - mov ebx, [r12 + $04] - mov ecx, [r12 + $08] - mov edx, [r12 + $0C] - mov r8d, [r12 + $10] - - lea rbp, [rsp + $50] - - // ---------- Rounds 0-19: Ch, K = $5A827999 ---------- - - mov r9d, 4 - -@ssse3_sha1_ch_loop: - - mov esi, ecx - xor esi, edx - and esi, ebx - xor esi, edx - mov edi, eax - rol edi, 5 - add r8d, [rbp] - add r8d, edi - add r8d, esi - add r8d, $5A827999 - rol ebx, 30 - - mov esi, ebx - xor esi, ecx - and esi, eax - xor esi, ecx - mov edi, r8d - rol edi, 5 - add edx, [rbp + $04] - add edx, edi - add edx, esi - add edx, $5A827999 - rol eax, 30 - - mov esi, eax - xor esi, ebx - and esi, r8d - xor esi, ebx - mov edi, edx - rol edi, 5 - add ecx, [rbp + $08] - add ecx, edi - add ecx, esi - add ecx, $5A827999 - rol r8d, 30 - - mov esi, r8d - xor esi, eax - and esi, edx - xor esi, eax - mov edi, ecx - rol edi, 5 - add ebx, [rbp + $0C] - add ebx, edi - add ebx, esi - add ebx, $5A827999 - rol edx, 30 - - mov esi, edx - xor esi, r8d - and esi, ecx - xor esi, r8d - mov edi, ebx - rol edi, 5 - add eax, [rbp + $10] - add eax, edi - add eax, esi - add eax, $5A827999 - rol ecx, 30 - - add rbp, $14 - dec r9d - jnz @ssse3_sha1_ch_loop - - // ---------- Rounds 20-39: Parity, K = $6ED9EBA1 ---------- - - mov r9d, 4 - -@ssse3_sha1_par1_loop: - - mov esi, ebx - xor esi, ecx - xor esi, edx - mov edi, eax - rol edi, 5 - add r8d, [rbp] - add r8d, edi - add r8d, esi - add r8d, $6ED9EBA1 - rol ebx, 30 - - mov esi, eax - xor esi, ebx - xor esi, ecx - mov edi, r8d - rol edi, 5 - add edx, [rbp + $04] - add edx, edi - add edx, esi - add edx, $6ED9EBA1 - rol eax, 30 - - mov esi, r8d - xor esi, eax - xor esi, ebx - mov edi, edx - rol edi, 5 - add ecx, [rbp + $08] - add ecx, edi - add ecx, esi - add ecx, $6ED9EBA1 - rol r8d, 30 - - mov esi, edx - xor esi, r8d - xor esi, eax - mov edi, ecx - rol edi, 5 - add ebx, [rbp + $0C] - add ebx, edi - add ebx, esi - add ebx, $6ED9EBA1 - rol edx, 30 - - mov esi, ecx - xor esi, edx - xor esi, r8d - mov edi, ebx - rol edi, 5 - add eax, [rbp + $10] - add eax, edi - add eax, esi - add eax, $6ED9EBA1 - rol ecx, 30 - - add rbp, $14 - dec r9d - jnz @ssse3_sha1_par1_loop - - // ---------- Rounds 40-59: Maj, K = $8F1BBCDC ---------- - - mov r9d, 4 - -@ssse3_sha1_maj_loop: - - mov esi, ebx - or esi, ecx - and esi, edx - mov edi, ebx - and edi, ecx - or esi, edi - mov edi, eax - rol edi, 5 - add r8d, [rbp] - add r8d, edi - add r8d, esi - add r8d, $8F1BBCDC - rol ebx, 30 - - mov esi, eax - or esi, ebx - and esi, ecx - mov edi, eax - and edi, ebx - or esi, edi - mov edi, r8d - rol edi, 5 - add edx, [rbp + $04] - add edx, edi - add edx, esi - add edx, $8F1BBCDC - rol eax, 30 - - mov esi, r8d - or esi, eax - and esi, ebx - mov edi, r8d - and edi, eax - or esi, edi - mov edi, edx - rol edi, 5 - add ecx, [rbp + $08] - add ecx, edi - add ecx, esi - add ecx, $8F1BBCDC - rol r8d, 30 - - mov esi, edx - or esi, r8d - and esi, eax - mov edi, edx - and edi, r8d - or esi, edi - mov edi, ecx - rol edi, 5 - add ebx, [rbp + $0C] - add ebx, edi - add ebx, esi - add ebx, $8F1BBCDC - rol edx, 30 - - mov esi, ecx - or esi, edx - and esi, r8d - mov edi, ecx - and edi, edx - or esi, edi - mov edi, ebx - rol edi, 5 - add eax, [rbp + $10] - add eax, edi - add eax, esi - add eax, $8F1BBCDC - rol ecx, 30 - - add rbp, $14 - dec r9d - jnz @ssse3_sha1_maj_loop - - // ---------- Rounds 60-79: Parity, K = $CA62C1D6 ---------- - - mov r9d, 4 - -@ssse3_sha1_par2_loop: - - mov esi, ebx - xor esi, ecx - xor esi, edx - mov edi, eax - rol edi, 5 - add r8d, [rbp] - add r8d, edi - add r8d, esi - add r8d, $CA62C1D6 - rol ebx, 30 - - mov esi, eax - xor esi, ebx - xor esi, ecx - mov edi, r8d - rol edi, 5 - add edx, [rbp + $04] - add edx, edi - add edx, esi - add edx, $CA62C1D6 - rol eax, 30 - - mov esi, r8d - xor esi, eax - xor esi, ebx - mov edi, edx - rol edi, 5 - add ecx, [rbp + $08] - add ecx, edi - add ecx, esi - add ecx, $CA62C1D6 - rol r8d, 30 - - mov esi, edx - xor esi, r8d - xor esi, eax - mov edi, ecx - rol edi, 5 - add ebx, [rbp + $0C] - add ebx, edi - add ebx, esi - add ebx, $CA62C1D6 - rol edx, 30 - - mov esi, ecx - xor esi, edx - xor esi, r8d - mov edi, ebx - rol edi, 5 - add eax, [rbp + $10] - add eax, edi - add eax, esi - add eax, $CA62C1D6 - rol ecx, 30 - - add rbp, $14 - dec r9d - jnz @ssse3_sha1_par2_loop - - // Add round results to state - add [r12], eax - add [r12 + $04], ebx - add [r12 + $08], ecx - add [r12 + $0C], edx - add [r12 + $10], r8d - - add r13, $40 - dec r14d - jnz @ssse3_sha1_block_loop - -@ssse3_sha1_done: - - mov rbx, [rsp + $00] - mov rbp, [rsp + $08] - mov r12, [rsp + $20] - mov r13, [rsp + $28] - mov r14, [rsp + $30] - mov r15, [rsp + $38] - mov rdi, [rsp + $10] - mov rsi, [rsp + $18] - add rsp, 408 - - {$I ..\Include\Simd\Common\SimdNonVolatileRestore_x86_64.inc} diff --git a/HashLib/src/Include/Simd/SHA256/SHA256CompressSse2_x86_64.inc b/HashLib/src/Include/Simd/SHA256/SHA256CompressSse2_x86_64.inc index ba96210a..3d4b54a6 100644 --- a/HashLib/src/Include/Simd/SHA256/SHA256CompressSse2_x86_64.inc +++ b/HashLib/src/Include/Simd/SHA256/SHA256CompressSse2_x86_64.inc @@ -1,10 +1,10 @@ // SHA-256 SSE2 SIMD-schedule implementation, derived from OpenSSL's SHA-256 // SSSE3 kernel in sha512-x86_64.pl (CRYPTOGAMS). The message schedule runs in // SSE2 (paddd/psrld/pslld/pxor/pshufd) interleaved with the GPR compression -// rounds, so the vector and integer units run in parallel - the design that -// beats the older two-phase kernel. OpenSSL's two SSSE3-only ops are emulated in -// SSE2: the pshufb dword byte-swap becomes psrlw/psllw/por + pshuflw/pshufhw, -// and palignr becomes psrldq/pslldq/por (xmm8 is a free scratch). +// rounds, so the vector and integer units run in parallel. OpenSSL's two +// SSSE3-only ops are emulated in SSE2: the pshufb dword byte-swap becomes +// psrlw/psllw/por + pshuflw/pshufhw, and palignr becomes psrldq/pslldq/por +// (xmm8 is a free scratch). // Expects MS x64 ABI (after SimdProc4Begin): rcx = state ptr, rdx = data ptr, // r8d = numblocks, r9 = doubled-K256 ptr (read at a 32-byte stride so the // duplicated halves are skipped; see K256_Doubled). No byte-swap mask table is From 2e59d1d8642124845b230e44ab62726f01ade93b Mon Sep 17 00:00:00 2001 From: Ugochukwu Mmaduekwe Date: Tue, 7 Jul 2026 07:31:38 +0100 Subject: [PATCH 5/6] SHA-NI enhancements --- HashLib/src/Crypto/HlpSHA1Dispatch.pas | 9 +- HashLib/src/Crypto/HlpSHA2_256Dispatch.pas | 4 +- .../Simd/SHA1/SHA1CompressShaNi_x86_64.inc | 338 ++++++++---------- .../SHA256/SHA256CompressShaNi_x86_64.inc | 43 ++- 4 files changed, 191 insertions(+), 203 deletions(-) diff --git a/HashLib/src/Crypto/HlpSHA1Dispatch.pas b/HashLib/src/Crypto/HlpSHA1Dispatch.pas index 1d332efe..c2bd0816 100644 --- a/HashLib/src/Crypto/HlpSHA1Dispatch.pas +++ b/HashLib/src/Crypto/HlpSHA1Dispatch.pas @@ -21,11 +21,12 @@ interface ); {$IFDEF HASHLIB_X86_SIMD} - // BSWAP32 shuffle mask for pshufb (x86 SIMD only): reverses bytes within each - // dword. Not a SHA-1 constant; passed separately to the SIMD kernels. ARM - // byte-swaps with REV32 and needs no mask table. + // BSWAP32 shuffle mask for pshufb (x86 SIMD only): byte-swaps and reverses + // dword order in one shuffle (sha1rnds4 reads its four words in reverse). Not a + // SHA-1 constant; used only by the SHA-NI kernel. ARM byte-swaps with REV32 and + // needs no mask table. BSWAP32_MASK: array [0 .. 3] of UInt32 = ( - $00010203, $04050607, $08090A0B, $0C0D0E0F + $0C0D0E0F, $08090A0B, $04050607, $00010203 ); // Doubled SHA-1 round constants plus the AVX2 byte-swap masks, shared by the diff --git a/HashLib/src/Crypto/HlpSHA2_256Dispatch.pas b/HashLib/src/Crypto/HlpSHA2_256Dispatch.pas index 32292a79..63fe3aa2 100644 --- a/HashLib/src/Crypto/HlpSHA2_256Dispatch.pas +++ b/HashLib/src/Crypto/HlpSHA2_256Dispatch.pas @@ -33,8 +33,8 @@ interface {$IFDEF HASHLIB_X86_SIMD} // BSWAP32 shuffle mask for pshufb (x86 SIMD only): reverses bytes within each - // dword. Not a SHA-256 constant; passed separately to the SIMD kernels. ARM - // byte-swaps with REV32 and needs no mask table. + // dword. Not a SHA-256 constant; used only by the SHA-NI kernel. ARM byte-swaps + // with REV32 and needs no mask table. BSWAP32_MASK: array [0 .. 3] of UInt32 = ( $00010203, $04050607, $08090A0B, $0C0D0E0F ); diff --git a/HashLib/src/Include/Simd/SHA1/SHA1CompressShaNi_x86_64.inc b/HashLib/src/Include/Simd/SHA1/SHA1CompressShaNi_x86_64.inc index cab6bafb..c027009f 100644 --- a/HashLib/src/Include/Simd/SHA1/SHA1CompressShaNi_x86_64.inc +++ b/HashLib/src/Include/Simd/SHA1/SHA1CompressShaNi_x86_64.inc @@ -1,227 +1,205 @@ -// SHA-1 SHA-NI implementation. -// Expects MS x64 ABI: rcx = state ptr, rdx = data ptr, r8d = numblocks, -// r9 = K_SHA1 ptr (unused here: sha1rnds4 has the round constants built in), -// r10 = BSWAP32 mask ptr (16 bytes). -// Uses xmm0-xmm8; xmm6-xmm8 are MS x64 non-volatile (saved/restored). -// Reference: Intel SHA Extensions whitepaper. +// SHA-1 SHA-NI implementation (Intel SHA Extensions), the same design as +// OpenSSL's x86_64 sha1_block_data_order_shaext (CRYPTOGAMS). The 20 sha1rnds4 +// groups run with the message schedule (sha1msg1/sha1msg2/sha1nexte) interleaved. +// The input is byte-swapped with a single pshufb against a full-reverse mask +// (byte-swap and dword-reverse folded into one mask, loaded once into xmm3), so +// no per-word pshufd is needed. The next block's message loads are software- +// pipelined into rounds 64-79 and the data pointer is advanced branchlessly +// (cmovnz). // -// SHA-NI instruction db encodings (for assembler compatibility): +// Expects MS x64 ABI (after SimdProc5Begin): rcx = state ptr, rdx = data ptr, +// r8d = numblocks, r9 = round-constant ptr (unused - sha1rnds4 has the round +// constants built in), r10 = byte-swap mask ptr (16 bytes; see BSWAP32_MASK, +// matching OpenSSL K_XX_XX+0xa0). +// +// SHA-NI instructions, db-encoded for assembler compatibility: // sha1rnds4 dst, src, imm = $0F $3A $CC // sha1nexte dst, src = $0F $38 $C8 // sha1msg1 dst, src = $0F $38 $C9 // sha1msg2 dst, src = $0F $38 $CA +// pshufb dst, src = $66 $0F $38 $00 +// +// Register map (identical to OpenSSL): +// xmm0 = ABCD state +// xmm1 = E +// xmm2 = E' (ping-pong E register) +// xmm3 = byte-swap mask (loaded once) +// xmm4 = MSG0 +// xmm5 = MSG1 +// xmm6 = MSG2 +// xmm7 = MSG3 +// xmm8 = ABCD_SAVE +// xmm9 = E_SAVE // -// Register map: -// xmm0 = ABCD state (SHA-NI format: A at [127:96], D at [31:0]) -// xmm1 = E0 (ping-pong E register, even groups) -// xmm2 = E1 (ping-pong E register, odd groups) -// xmm3 = MSG0 (W[0..3] / W[16..19] / ...) -// xmm4 = MSG1 (W[4..7] / W[20..23] / ...) -// xmm5 = MSG2 (W[8..11] / W[24..27] / ...) -// xmm6 = MSG3 (W[12..15] / W[28..31] / ...) -// xmm7 = BSWAP mask, then E_SAVE -// xmm8 = ABCD_SAVE +// MS x64 non-volatile saves: xmm6-xmm15 via the shared SimdNonVolatileSave/Restore +// include (no-op on SysV); the kernel itself uses only volatile GPRs (rcx/rdx/r8-r11). {$I ..\Include\Simd\Common\SimdNonVolatileSave_x86_64.inc} test r8d, r8d jz @sha1ni_done - // Load state and convert to SHA-NI register format - movdqu xmm0, oword [rcx] // xmm0 = [A,B,C,D] memory order - pshufd xmm0, xmm0, $1B // xmm0 = [D,C,B,A] -> SHA-NI ABCD format - movd xmm1, [rcx + 16] // xmm1[31:0] = E - pslldq xmm1, 12 // xmm1[127:96] = E, rest zero - -@sha1ni_block_loop: - - // Save state for final addition - movdqa xmm8, xmm0 // ABCD_SAVE - - // Load, byte-swap, and reverse dword order for all 4 message blocks. - // The per-dword BSWAP mask puts W[0] at [31:0], but sha1rnds4 reads - // W[0] from [127:96]. The pshufd $1B reverses the dword order. - movdqu xmm7, oword [r10] // BSWAP32 mask (separate ptr) - movdqu xmm3, oword [rdx] - pshufb xmm3, xmm7 - pshufd xmm3, xmm3, $1B - movdqu xmm4, oword [rdx + $10] - pshufb xmm4, xmm7 - pshufd xmm4, xmm4, $1B - movdqu xmm5, oword [rdx + $20] - pshufb xmm5, xmm7 - pshufd xmm5, xmm5, $1B - movdqu xmm6, oword [rdx + $30] - pshufb xmm6, xmm7 - pshufd xmm6, xmm6, $1B - - // Save E for final addition (reuse xmm7) - movdqa xmm7, xmm1 // E_SAVE - - // ===== Rounds 0-3 (Group 0): imm=0 (Ch), consume MSG0 ===== - paddd xmm1, xmm3 // E0 = [E+W0, W1, W2, W3] - movdqa xmm2, xmm0 // Save ABCD into E1 - db $0F, $3A, $CC, $C1, $00 // sha1rnds4 xmm0, xmm1, 0 - - // ===== Rounds 4-7 (Group 1): imm=0, consume MSG1 ===== - db $0F, $38, $C8, $D4 // sha1nexte xmm2, xmm4 - movdqa xmm1, xmm0 - db $0F, $3A, $CC, $C2, $00 // sha1rnds4 xmm0, xmm2, 0 - db $0F, $38, $C9, $DC // sha1msg1 xmm3, xmm4 - - // ===== Rounds 8-11 (Group 2): imm=0, consume MSG2 ===== - db $0F, $38, $C8, $CD // sha1nexte xmm1, xmm5 + // ===== Setup: load state + mask, load & byte-swap first block, offload E ===== + movdqu xmm0, [rcx] + movd xmm1, [rcx + $10] + movdqu xmm3, [r10] // full-reverse mask (loaded once) + + movdqu xmm4, [rdx] + pshufd xmm0, xmm0, $1B + movdqu xmm5, [rdx + $10] + pshufd xmm1, xmm1, $1B + movdqu xmm6, [rdx + $20] + db $66, $0F, $38, $00, $E3 // pshufb xmm4, xmm3 + movdqu xmm7, [rdx + $30] + db $66, $0F, $38, $00, $EB // pshufb xmm5, xmm3 + db $66, $0F, $38, $00, $F3 // pshufb xmm6, xmm3 + movdqa xmm9, xmm1 + db $66, $0F, $38, $00, $FB // pshufb xmm7, xmm3 + jmp @sha1ni_loop + +@sha1ni_loop: + dec r8d + lea r11, [rdx + $40] + paddd xmm1, xmm4 + cmovnz rdx, r11 + movdqa xmm8, xmm0 + db $0F, $38, $C9, $E5 // sha1msg1 xmm4, xmm5 movdqa xmm2, xmm0 - db $0F, $3A, $CC, $C1, $00 // sha1rnds4 xmm0, xmm1, 0 - db $0F, $38, $C9, $E5 // sha1msg1 xmm4, xmm5 - pxor xmm3, xmm5 - - // ===== Rounds 12-15 (Group 3): imm=0, consume MSG3 ===== - db $0F, $38, $C8, $D6 // sha1nexte xmm2, xmm6 - movdqa xmm1, xmm0 - db $0F, $38, $CA, $DE // sha1msg2 xmm3, xmm6 - db $0F, $3A, $CC, $C2, $00 // sha1rnds4 xmm0, xmm2, 0 - db $0F, $38, $C9, $EE // sha1msg1 xmm5, xmm6 + db $0F, $3A, $CC, $C1, $00 // sha1rnds4 xmm0, xmm1, 0 + db $0F, $38, $C8, $D5 // sha1nexte xmm2, xmm5 pxor xmm4, xmm6 + db $0F, $38, $C9, $EE // sha1msg1 xmm5, xmm6 + db $0F, $38, $CA, $E7 // sha1msg2 xmm4, xmm7 - // ===== Rounds 16-19 (Group 4): imm=0, consume MSG0 ===== - db $0F, $38, $C8, $CB // sha1nexte xmm1, xmm3 - movdqa xmm2, xmm0 - db $0F, $38, $CA, $E3 // sha1msg2 xmm4, xmm3 - db $0F, $3A, $CC, $C1, $00 // sha1rnds4 xmm0, xmm1, 0 - db $0F, $38, $C9, $F3 // sha1msg1 xmm6, xmm3 - pxor xmm5, xmm3 - - // ===== Rounds 20-23 (Group 5): imm=1 (Parity), consume MSG1 ===== - db $0F, $38, $C8, $D4 // sha1nexte xmm2, xmm4 movdqa xmm1, xmm0 - db $0F, $38, $CA, $EC // sha1msg2 xmm5, xmm4 - db $0F, $3A, $CC, $C2, $01 // sha1rnds4 xmm0, xmm2, 1 - db $0F, $38, $C9, $DC // sha1msg1 xmm3, xmm4 - pxor xmm6, xmm4 - - // ===== Rounds 24-27 (Group 6): imm=1, consume MSG2 ===== - db $0F, $38, $C8, $CD // sha1nexte xmm1, xmm5 + db $0F, $3A, $CC, $C2, $00 // sha1rnds4 xmm0, xmm2, 0 + db $0F, $38, $C8, $CE // sha1nexte xmm1, xmm6 + pxor xmm5, xmm7 + db $0F, $38, $CA, $EC // sha1msg2 xmm5, xmm4 + db $0F, $38, $C9, $F7 // sha1msg1 xmm6, xmm7 movdqa xmm2, xmm0 - db $0F, $38, $CA, $F5 // sha1msg2 xmm6, xmm5 - db $0F, $3A, $CC, $C1, $01 // sha1rnds4 xmm0, xmm1, 1 - db $0F, $38, $C9, $E5 // sha1msg1 xmm4, xmm5 - pxor xmm3, xmm5 + db $0F, $3A, $CC, $C1, $00 // sha1rnds4 xmm0, xmm1, 0 + db $0F, $38, $C8, $D7 // sha1nexte xmm2, xmm7 + pxor xmm6, xmm4 + db $0F, $38, $C9, $FC // sha1msg1 xmm7, xmm4 + db $0F, $38, $CA, $F5 // sha1msg2 xmm6, xmm5 - // ===== Rounds 28-31 (Group 7): imm=1, consume MSG3 ===== - db $0F, $38, $C8, $D6 // sha1nexte xmm2, xmm6 movdqa xmm1, xmm0 - db $0F, $38, $CA, $DE // sha1msg2 xmm3, xmm6 - db $0F, $3A, $CC, $C2, $01 // sha1rnds4 xmm0, xmm2, 1 - db $0F, $38, $C9, $EE // sha1msg1 xmm5, xmm6 - pxor xmm4, xmm6 - - // ===== Rounds 32-35 (Group 8): imm=1, consume MSG0 ===== - db $0F, $38, $C8, $CB // sha1nexte xmm1, xmm3 + db $0F, $3A, $CC, $C2, $00 // sha1rnds4 xmm0, xmm2, 0 + db $0F, $38, $C8, $CC // sha1nexte xmm1, xmm4 + pxor xmm7, xmm5 + db $0F, $38, $CA, $FE // sha1msg2 xmm7, xmm6 + db $0F, $38, $C9, $E5 // sha1msg1 xmm4, xmm5 movdqa xmm2, xmm0 - db $0F, $38, $CA, $E3 // sha1msg2 xmm4, xmm3 - db $0F, $3A, $CC, $C1, $01 // sha1rnds4 xmm0, xmm1, 1 - db $0F, $38, $C9, $F3 // sha1msg1 xmm6, xmm3 - pxor xmm5, xmm3 + db $0F, $3A, $CC, $C1, $00 // sha1rnds4 xmm0, xmm1, 0 + db $0F, $38, $C8, $D5 // sha1nexte xmm2, xmm5 + pxor xmm4, xmm6 + db $0F, $38, $C9, $EE // sha1msg1 xmm5, xmm6 + db $0F, $38, $CA, $E7 // sha1msg2 xmm4, xmm7 - // ===== Rounds 36-39 (Group 9): imm=1, consume MSG1 ===== - db $0F, $38, $C8, $D4 // sha1nexte xmm2, xmm4 movdqa xmm1, xmm0 - db $0F, $38, $CA, $EC // sha1msg2 xmm5, xmm4 - db $0F, $3A, $CC, $C2, $01 // sha1rnds4 xmm0, xmm2, 1 - db $0F, $38, $C9, $DC // sha1msg1 xmm3, xmm4 - pxor xmm6, xmm4 - - // ===== Rounds 40-43 (Group 10): imm=2 (Maj), consume MSG2 ===== - db $0F, $38, $C8, $CD // sha1nexte xmm1, xmm5 + db $0F, $3A, $CC, $C2, $01 // sha1rnds4 xmm0, xmm2, 1 + db $0F, $38, $C8, $CE // sha1nexte xmm1, xmm6 + pxor xmm5, xmm7 + db $0F, $38, $CA, $EC // sha1msg2 xmm5, xmm4 + db $0F, $38, $C9, $F7 // sha1msg1 xmm6, xmm7 movdqa xmm2, xmm0 - db $0F, $38, $CA, $F5 // sha1msg2 xmm6, xmm5 - db $0F, $3A, $CC, $C1, $02 // sha1rnds4 xmm0, xmm1, 2 - db $0F, $38, $C9, $E5 // sha1msg1 xmm4, xmm5 - pxor xmm3, xmm5 + db $0F, $3A, $CC, $C1, $01 // sha1rnds4 xmm0, xmm1, 1 + db $0F, $38, $C8, $D7 // sha1nexte xmm2, xmm7 + pxor xmm6, xmm4 + db $0F, $38, $C9, $FC // sha1msg1 xmm7, xmm4 + db $0F, $38, $CA, $F5 // sha1msg2 xmm6, xmm5 - // ===== Rounds 44-47 (Group 11): imm=2, consume MSG3 ===== - db $0F, $38, $C8, $D6 // sha1nexte xmm2, xmm6 movdqa xmm1, xmm0 - db $0F, $38, $CA, $DE // sha1msg2 xmm3, xmm6 - db $0F, $3A, $CC, $C2, $02 // sha1rnds4 xmm0, xmm2, 2 - db $0F, $38, $C9, $EE // sha1msg1 xmm5, xmm6 - pxor xmm4, xmm6 - - // ===== Rounds 48-51 (Group 12): imm=2, consume MSG0 ===== - db $0F, $38, $C8, $CB // sha1nexte xmm1, xmm3 + db $0F, $3A, $CC, $C2, $01 // sha1rnds4 xmm0, xmm2, 1 + db $0F, $38, $C8, $CC // sha1nexte xmm1, xmm4 + pxor xmm7, xmm5 + db $0F, $38, $CA, $FE // sha1msg2 xmm7, xmm6 + db $0F, $38, $C9, $E5 // sha1msg1 xmm4, xmm5 movdqa xmm2, xmm0 - db $0F, $38, $CA, $E3 // sha1msg2 xmm4, xmm3 - db $0F, $3A, $CC, $C1, $02 // sha1rnds4 xmm0, xmm1, 2 - db $0F, $38, $C9, $F3 // sha1msg1 xmm6, xmm3 - pxor xmm5, xmm3 + db $0F, $3A, $CC, $C1, $01 // sha1rnds4 xmm0, xmm1, 1 + db $0F, $38, $C8, $D5 // sha1nexte xmm2, xmm5 + pxor xmm4, xmm6 + db $0F, $38, $C9, $EE // sha1msg1 xmm5, xmm6 + db $0F, $38, $CA, $E7 // sha1msg2 xmm4, xmm7 - // ===== Rounds 52-55 (Group 13): imm=2, consume MSG1 ===== - db $0F, $38, $C8, $D4 // sha1nexte xmm2, xmm4 movdqa xmm1, xmm0 - db $0F, $38, $CA, $EC // sha1msg2 xmm5, xmm4 - db $0F, $3A, $CC, $C2, $02 // sha1rnds4 xmm0, xmm2, 2 - db $0F, $38, $C9, $DC // sha1msg1 xmm3, xmm4 + db $0F, $3A, $CC, $C2, $01 // sha1rnds4 xmm0, xmm2, 1 + db $0F, $38, $C8, $CE // sha1nexte xmm1, xmm6 + pxor xmm5, xmm7 + db $0F, $38, $CA, $EC // sha1msg2 xmm5, xmm4 + db $0F, $38, $C9, $F7 // sha1msg1 xmm6, xmm7 + movdqa xmm2, xmm0 + db $0F, $3A, $CC, $C1, $02 // sha1rnds4 xmm0, xmm1, 2 + db $0F, $38, $C8, $D7 // sha1nexte xmm2, xmm7 pxor xmm6, xmm4 + db $0F, $38, $C9, $FC // sha1msg1 xmm7, xmm4 + db $0F, $38, $CA, $F5 // sha1msg2 xmm6, xmm5 - // ===== Rounds 56-59 (Group 14): imm=2, consume MSG2 ===== - db $0F, $38, $C8, $CD // sha1nexte xmm1, xmm5 + movdqa xmm1, xmm0 + db $0F, $3A, $CC, $C2, $02 // sha1rnds4 xmm0, xmm2, 2 + db $0F, $38, $C8, $CC // sha1nexte xmm1, xmm4 + pxor xmm7, xmm5 + db $0F, $38, $CA, $FE // sha1msg2 xmm7, xmm6 + db $0F, $38, $C9, $E5 // sha1msg1 xmm4, xmm5 movdqa xmm2, xmm0 - db $0F, $38, $CA, $F5 // sha1msg2 xmm6, xmm5 - db $0F, $3A, $CC, $C1, $02 // sha1rnds4 xmm0, xmm1, 2 - db $0F, $38, $C9, $E5 // sha1msg1 xmm4, xmm5 - pxor xmm3, xmm5 + db $0F, $3A, $CC, $C1, $02 // sha1rnds4 xmm0, xmm1, 2 + db $0F, $38, $C8, $D5 // sha1nexte xmm2, xmm5 + pxor xmm4, xmm6 + db $0F, $38, $C9, $EE // sha1msg1 xmm5, xmm6 + db $0F, $38, $CA, $E7 // sha1msg2 xmm4, xmm7 - // ===== Rounds 60-63 (Group 15): imm=3 (Parity), consume MSG3 ===== - db $0F, $38, $C8, $D6 // sha1nexte xmm2, xmm6 movdqa xmm1, xmm0 - db $0F, $38, $CA, $DE // sha1msg2 xmm3, xmm6 - db $0F, $3A, $CC, $C2, $03 // sha1rnds4 xmm0, xmm2, 3 - db $0F, $38, $C9, $EE // sha1msg1 xmm5, xmm6 - pxor xmm4, xmm6 + db $0F, $3A, $CC, $C2, $02 // sha1rnds4 xmm0, xmm2, 2 + db $0F, $38, $C8, $CE // sha1nexte xmm1, xmm6 + pxor xmm5, xmm7 + db $0F, $38, $CA, $EC // sha1msg2 xmm5, xmm4 + db $0F, $38, $C9, $F7 // sha1msg1 xmm6, xmm7 + movdqa xmm2, xmm0 + db $0F, $3A, $CC, $C1, $02 // sha1rnds4 xmm0, xmm1, 2 + db $0F, $38, $C8, $D7 // sha1nexte xmm2, xmm7 + pxor xmm6, xmm4 + db $0F, $38, $C9, $FC // sha1msg1 xmm7, xmm4 + db $0F, $38, $CA, $F5 // sha1msg2 xmm6, xmm5 - // ===== Rounds 64-67 (Group 16): imm=3, consume MSG0 ===== - db $0F, $38, $C8, $CB // sha1nexte xmm1, xmm3 + movdqa xmm1, xmm0 + db $0F, $3A, $CC, $C2, $03 // sha1rnds4 xmm0, xmm2, 3 + db $0F, $38, $C8, $CC // sha1nexte xmm1, xmm4 + pxor xmm7, xmm5 + db $0F, $38, $CA, $FE // sha1msg2 xmm7, xmm6 + movdqu xmm4, [rdx] movdqa xmm2, xmm0 - db $0F, $38, $CA, $E3 // sha1msg2 xmm4, xmm3 - db $0F, $3A, $CC, $C1, $03 // sha1rnds4 xmm0, xmm1, 3 - db $0F, $38, $C9, $F3 // sha1msg1 xmm6, xmm3 - pxor xmm5, xmm3 + db $0F, $3A, $CC, $C1, $03 // sha1rnds4 xmm0, xmm1, 3 + db $0F, $38, $C8, $D5 // sha1nexte xmm2, xmm5 + movdqu xmm5, [rdx + $10] + db $66, $0F, $38, $00, $E3 // pshufb xmm4, xmm3 - // ===== Rounds 68-71 (Group 17): imm=3, consume MSG1 ===== - db $0F, $38, $C8, $D4 // sha1nexte xmm2, xmm4 movdqa xmm1, xmm0 - db $0F, $38, $CA, $EC // sha1msg2 xmm5, xmm4 - db $0F, $3A, $CC, $C2, $03 // sha1rnds4 xmm0, xmm2, 3 - pxor xmm6, xmm4 + db $0F, $3A, $CC, $C2, $03 // sha1rnds4 xmm0, xmm2, 3 + db $0F, $38, $C8, $CE // sha1nexte xmm1, xmm6 + movdqu xmm6, [rdx + $20] + db $66, $0F, $38, $00, $EB // pshufb xmm5, xmm3 - // ===== Rounds 72-75 (Group 18): imm=3, consume MSG2 ===== - db $0F, $38, $C8, $CD // sha1nexte xmm1, xmm5 movdqa xmm2, xmm0 - db $0F, $38, $CA, $F5 // sha1msg2 xmm6, xmm5 - db $0F, $3A, $CC, $C1, $03 // sha1rnds4 xmm0, xmm1, 3 + db $0F, $3A, $CC, $C1, $03 // sha1rnds4 xmm0, xmm1, 3 + db $0F, $38, $C8, $D7 // sha1nexte xmm2, xmm7 + movdqu xmm7, [rdx + $30] + db $66, $0F, $38, $00, $F3 // pshufb xmm6, xmm3 - // ===== Rounds 76-79 (Group 19): imm=3, consume MSG3 ===== - db $0F, $38, $C8, $D6 // sha1nexte xmm2, xmm6 movdqa xmm1, xmm0 - db $0F, $3A, $CC, $C2, $03 // sha1rnds4 xmm0, xmm2, 3 - - // Finalize E: compute E_new = ROL30(A_before_last_rnds4) + E_SAVE - db $0F, $38, $C8, $CF // sha1nexte xmm1, xmm7 + db $0F, $3A, $CC, $C2, $03 // sha1rnds4 xmm0, xmm2, 3 + db $41, $0F, $38, $C8, $C9 // sha1nexte xmm1, xmm9 + db $66, $0F, $38, $00, $FB // pshufb xmm7, xmm3 - // Add saved state back - paddd xmm0, xmm8 // ABCD += ABCD_SAVE + paddd xmm0, xmm8 + movdqa xmm9, xmm1 - // Advance data pointer and loop - add rdx, 64 - dec r8d - jnz @sha1ni_block_loop + jnz @sha1ni_loop - // Convert state back to memory format - pshufd xmm0, xmm0, $1B // Reverse to [A,B,C,D] memory order - movdqu oword [rcx], xmm0 // Store H0-H3 - psrldq xmm1, 12 // Move E from [127:96] to [31:0] - movd [rcx + 16], xmm1 // Store H4 + pshufd xmm0, xmm0, $1B + pshufd xmm1, xmm1, $1B + movdqu [rcx], xmm0 + movd [rcx + $10], xmm1 @sha1ni_done: diff --git a/HashLib/src/Include/Simd/SHA256/SHA256CompressShaNi_x86_64.inc b/HashLib/src/Include/Simd/SHA256/SHA256CompressShaNi_x86_64.inc index a2dd4441..f8a663ef 100644 --- a/HashLib/src/Include/Simd/SHA256/SHA256CompressShaNi_x86_64.inc +++ b/HashLib/src/Include/Simd/SHA256/SHA256CompressShaNi_x86_64.inc @@ -1,25 +1,34 @@ -// SHA-256 SHA-NI implementation. -// Expects MS x64 ABI: rcx = state ptr, rdx = data ptr, r8d = numblocks, -// r9 = K256 ptr (64 UInt32 round constants), r10 = BSWAP32 mask ptr (16 bytes). -// Uses xmm0-xmm9; xmm6-xmm9 are MS x64 non-volatile (saved/restored). -// Reference: Jeffrey Walton / Sean Gulley / Intel SHA Extensions whitepaper. +// SHA-256 SHA-NI implementation (Intel SHA Extensions), the same design as +// OpenSSL's x86_64 sha256_block_data_order_shaext (CRYPTOGAMS). Each 4-round +// group is two sha256rnds2 with the message schedule (sha256msg1/sha256msg2 + +// palignr) interleaved. The input is byte-swapped with pshufb against +// BSWAP32_MASK (a plain per-dword swap - SHA-256 consumes its words in natural +// order, so no dword reversal is needed). // -// SHA-NI instruction db encodings (for assembler compatibility): -// sha256rnds2 dst, src = $0F $38 $CB (implicit xmm0) +// Expects MS x64 ABI (after SimdProc5Begin): rcx = state ptr, rdx = data ptr, +// r8d = numblocks, r9 = K256 ptr (64 UInt32 round constants), r10 = byte-swap +// mask ptr (16 bytes; see BSWAP32_MASK). +// +// SHA-NI instructions, db-encoded for assembler compatibility: +// sha256rnds2 dst, src = $0F $38 $CB (implicit xmm0) // sha256msg1 dst, src = $0F $38 $CC // sha256msg2 dst, src = $0F $38 $CD +// pshufb dst, src = $66 $0F $38 $00 // // Register map: -// xmm0 = temp MSG+K for sha256rnds2 (implicit operand) -// xmm1 = STATE0 (ABEF in SHA-NI format) -// xmm2 = STATE1 (CDGH in SHA-NI format) -// xmm3 = MSG0 -// xmm4 = MSG1 -// xmm5 = MSG2 -// xmm6 = MSG3 -// xmm7 = TMP (palignr scratch / BSWAP mask during load) -// xmm8 = ABEF_SAVE -// xmm9 = CDGH_SAVE +// xmm0 = MSG+K temp for sha256rnds2 (implicit operand) +// xmm1 = STATE0 (ABEF in SHA-NI format) +// xmm2 = STATE1 (CDGH in SHA-NI format) +// xmm3 = MSG0 +// xmm4 = MSG1 +// xmm5 = MSG2 +// xmm6 = MSG3 +// xmm7 = palignr scratch / byte-swap mask during load +// xmm8 = ABEF_SAVE +// xmm9 = CDGH_SAVE +// +// MS x64 non-volatile saves: xmm6-xmm15 via the shared SimdNonVolatileSave/Restore +// include (no-op on SysV); the kernel itself uses only volatile GPRs (rcx/rdx/r8-r10). {$I ..\Include\Simd\Common\SimdNonVolatileSave_x86_64.inc} From 2e20707e52ace3872a980fc9176124b2972dfe54 Mon Sep 17 00:00:00 2001 From: Ugochukwu Mmaduekwe Date: Tue, 7 Jul 2026 07:47:44 +0100 Subject: [PATCH 6/6] fix header comments in aarch64 CryptoExt inc files --- HashLib/src/Include/Simd/SHA1/SHA1CompressCryptoExt_aarch64.inc | 2 +- .../src/Include/Simd/SHA256/SHA256CompressCryptoExt_aarch64.inc | 2 +- .../Include/Simd/SHA3/KeccakF1600CryptoExtAbsorb_aarch64.inc | 2 +- HashLib/src/Include/Simd/SHA3/KeccakF1600CryptoExt_aarch64.inc | 2 +- .../src/Include/Simd/SHA512/SHA512CompressCryptoExt_aarch64.inc | 2 +- 5 files changed, 5 insertions(+), 5 deletions(-) diff --git a/HashLib/src/Include/Simd/SHA1/SHA1CompressCryptoExt_aarch64.inc b/HashLib/src/Include/Simd/SHA1/SHA1CompressCryptoExt_aarch64.inc index dc8d5772..7e981133 100644 --- a/HashLib/src/Include/Simd/SHA1/SHA1CompressCryptoExt_aarch64.inc +++ b/HashLib/src/Include/Simd/SHA1/SHA1CompressCryptoExt_aarch64.inc @@ -2,7 +2,7 @@ // Expects AAPCS64: x0 = state ptr (5 x UInt32), x1 = data ptr, // w2 = numblocks, x3 = K_SHA1 ptr (16 UInt32: each round constant x4 lanes). // Leaf nostackframe; caller-saved GPR/vector only. -// Reference: OpenSSL CRYPTOGAMS sha1-armv8.S, HashLib SHA1CompressSse2_x86_64.inc. +// Reference: OpenSSL CRYPTOGAMS sha1-armv8.S. // AArch64 vector/crypto instructions are .long-encoded for broad assembler compatibility. // Register map: // v0 = ABCD working state diff --git a/HashLib/src/Include/Simd/SHA256/SHA256CompressCryptoExt_aarch64.inc b/HashLib/src/Include/Simd/SHA256/SHA256CompressCryptoExt_aarch64.inc index 0b81b65a..4148f1fe 100644 --- a/HashLib/src/Include/Simd/SHA256/SHA256CompressCryptoExt_aarch64.inc +++ b/HashLib/src/Include/Simd/SHA256/SHA256CompressCryptoExt_aarch64.inc @@ -3,7 +3,7 @@ // w2 = numblocks, x3 = K256 ptr (64 UInt32 round constants). // Leaf nostackframe; caller-saved GPR/vector only. // K pointer rewound each block (sub x3, #240) after post-index loads. -// Reference: OpenSSL CRYPTOGAMS sha256-armv8.S, HashLib SHA256CompressSse2_x86_64.inc. +// Reference: OpenSSL CRYPTOGAMS sha256-armv8.S. // AArch64 vector/crypto instructions are .long-encoded for broad assembler compatibility. // Register map: // v0, v1 = working state (ABCD, EFGH) diff --git a/HashLib/src/Include/Simd/SHA3/KeccakF1600CryptoExtAbsorb_aarch64.inc b/HashLib/src/Include/Simd/SHA3/KeccakF1600CryptoExtAbsorb_aarch64.inc index 0d181fd7..9647698a 100644 --- a/HashLib/src/Include/Simd/SHA3/KeccakF1600CryptoExtAbsorb_aarch64.inc +++ b/HashLib/src/Include/Simd/SHA3/KeccakF1600CryptoExtAbsorb_aarch64.inc @@ -2,7 +2,7 @@ // Expects AAPCS64: x0 = state ptr (25 x UInt64), x1 = data ptr, // w2 = numblocks, w3 = blocksize (bytes, = rate), x4 = iotas ptr. // Saves/restores d8-d15 on 64-byte frame; XORs blocksize bytes per block then permutes. -// Reference: OpenSSL CRYPTOGAMS keccak1600-armv8.S, HashLib KeccakF1600Avx2Absorb_x86_64.inc. +// Reference: OpenSSL CRYPTOGAMS keccak1600-armv8.S. // AArch64 vector/crypto instructions are .long-encoded for broad assembler compatibility. // Register map: // v0-v24 = Keccak state lanes (data XORed lane-by-lane into v0..) diff --git a/HashLib/src/Include/Simd/SHA3/KeccakF1600CryptoExt_aarch64.inc b/HashLib/src/Include/Simd/SHA3/KeccakF1600CryptoExt_aarch64.inc index e619255b..0c0db336 100644 --- a/HashLib/src/Include/Simd/SHA3/KeccakF1600CryptoExt_aarch64.inc +++ b/HashLib/src/Include/Simd/SHA3/KeccakF1600CryptoExt_aarch64.inc @@ -3,7 +3,7 @@ // x1 = iotas ptr (24 x UInt64 round constants == HlpSHA3 RC table). // Saves/restores d8-d15 on 64-byte frame; state uses v0-v24 (clobbers d8-d15 lanes). // Leaf (no calls); x30 untouched. -// Reference: OpenSSL CRYPTOGAMS keccak1600-armv8.S, HashLib KeccakF1600Avx2_x86_64.inc. +// Reference: OpenSSL CRYPTOGAMS keccak1600-armv8.S. // AArch64 vector/crypto instructions are .long-encoded for broad assembler compatibility. // Register map: // v0-v24 = Keccak state lanes A[y][x] (lane k = v[k], 64 bits in low half) diff --git a/HashLib/src/Include/Simd/SHA512/SHA512CompressCryptoExt_aarch64.inc b/HashLib/src/Include/Simd/SHA512/SHA512CompressCryptoExt_aarch64.inc index dde840cf..a6736168 100644 --- a/HashLib/src/Include/Simd/SHA512/SHA512CompressCryptoExt_aarch64.inc +++ b/HashLib/src/Include/Simd/SHA512/SHA512CompressCryptoExt_aarch64.inc @@ -3,7 +3,7 @@ // w2 = numblocks, x3 = K512 ptr (80 UInt64 round constants). // Leaf nostackframe; caller-saved GPR/vector only. // K pointer rewound each block (sub x3, #640). Two rounds per iteration; csel avoids OOB prefetch. -// Reference: OpenSSL CRYPTOGAMS sha512-armv8.S, HashLib SHA512CompressSse2_x86_64.inc. +// Reference: OpenSSL CRYPTOGAMS sha512-armv8.S. // AArch64 vector/crypto instructions are .long-encoded for broad assembler compatibility. // Register map: // v0-v3 = working state (a..h, two UInt64 per register)