diff --git a/scripts/gen-s-parser.py b/scripts/gen-s-parser.py
index eee21baa807..4b73fee9f89 100755
--- a/scripts/gen-s-parser.py
+++ b/scripts/gen-s-parser.py
@@ -549,6 +549,8 @@
     ("i16x8.trunc_sat_f16x8_u",  "makeUnary(UnaryOp::TruncSatUVecF16x8ToVecI16x8)"),
     ("f16x8.convert_i16x8_s",    "makeUnary(UnaryOp::ConvertSVecI16x8ToVecF16x8)"),
     ("f16x8.convert_i16x8_u",    "makeUnary(UnaryOp::ConvertUVecI16x8ToVecF16x8)"),
+    ("f16x8.madd",               "makeSIMDTernary(SIMDTernaryOp::MaddVecF16x8)"),
+    ("f16x8.nmadd",              "makeSIMDTernary(SIMDTernaryOp::NmaddVecF16x8)"),
 
     # relaxed SIMD ops
     ("i8x16.relaxed_swizzle", "makeBinary(BinaryOp::RelaxedSwizzleVecI8x16)"),
@@ -556,8 +558,6 @@
     ("i32x4.relaxed_trunc_f32x4_u", "makeUnary(UnaryOp::RelaxedTruncUVecF32x4ToVecI32x4)"),
     ("i32x4.relaxed_trunc_f64x2_s_zero", "makeUnary(UnaryOp::RelaxedTruncZeroSVecF64x2ToVecI32x4)"),
     ("i32x4.relaxed_trunc_f64x2_u_zero", "makeUnary(UnaryOp::RelaxedTruncZeroUVecF64x2ToVecI32x4)"),
-    ("f16x8.relaxed_madd", "makeSIMDTernary(SIMDTernaryOp::RelaxedMaddVecF16x8)"),
-    ("f16x8.relaxed_nmadd", "makeSIMDTernary(SIMDTernaryOp::RelaxedNmaddVecF16x8)"),
     ("f32x4.relaxed_madd", "makeSIMDTernary(SIMDTernaryOp::RelaxedMaddVecF32x4)"),
     ("f32x4.relaxed_nmadd", "makeSIMDTernary(SIMDTernaryOp::RelaxedNmaddVecF32x4)"),
     ("f64x2.relaxed_madd", "makeSIMDTernary(SIMDTernaryOp::RelaxedMaddVecF64x2)"),
diff --git a/src/gen-s-parser.inc b/src/gen-s-parser.inc
index f1f425a2943..132806efcf1 100644
--- a/src/gen-s-parser.inc
+++ b/src/gen-s-parser.inc
@@ -570,12 +570,23 @@ switch (buf[0]) {
           }
           case 'm': {
             switch (buf[7]) {
-              case 'a':
-                if (op == "f16x8.max"sv) {
-                  CHECK_ERR(makeBinary(ctx, pos, annotations, BinaryOp::MaxVecF16x8));
-                  return Ok{};
+              case 'a': {
+                switch (buf[8]) {
+                  case 'd':
+                    if (op == "f16x8.madd"sv) {
+                      CHECK_ERR(makeSIMDTernary(ctx, pos, annotations, SIMDTernaryOp::MaddVecF16x8));
+                      return Ok{};
+                    }
+                    goto parse_error;
+                  case 'x':
+                    if (op == "f16x8.max"sv) {
+                      CHECK_ERR(makeBinary(ctx, pos, annotations, BinaryOp::MaxVecF16x8));
+                      return Ok{};
+                    }
+                    goto parse_error;
+                  default: goto parse_error;
                 }
-                goto parse_error;
+              }
               case 'i':
                 if (op == "f16x8.min"sv) {
                   CHECK_ERR(makeBinary(ctx, pos, annotations, BinaryOp::MinVecF16x8));
@@ -592,22 +603,33 @@ switch (buf[0]) {
             }
           }
           case 'n': {
-            switch (buf[8]) {
-              case '\0':
-                if (op == "f16x8.ne"sv) {
-                  CHECK_ERR(makeBinary(ctx, pos, annotations, BinaryOp::NeVecF16x8));
-                  return Ok{};
-                }
-                goto parse_error;
-              case 'a':
-                if (op == "f16x8.nearest"sv) {
-                  CHECK_ERR(makeUnary(ctx, pos, annotations, UnaryOp::NearestVecF16x8));
-                  return Ok{};
+            switch (buf[7]) {
+              case 'e': {
+                switch (buf[8]) {
+                  case '\0':
+                    if (op == "f16x8.ne"sv) {
+                      CHECK_ERR(makeBinary(ctx, pos, annotations, BinaryOp::NeVecF16x8));
+                      return Ok{};
+                    }
+                    goto parse_error;
+                  case 'a':
+                    if (op == "f16x8.nearest"sv) {
+                      CHECK_ERR(makeUnary(ctx, pos, annotations, UnaryOp::NearestVecF16x8));
+                      return Ok{};
+                    }
+                    goto parse_error;
+                  case 'g':
+                    if (op == "f16x8.neg"sv) {
+                      CHECK_ERR(makeUnary(ctx, pos, annotations, UnaryOp::NegVecF16x8));
+                      return Ok{};
+                    }
+                    goto parse_error;
+                  default: goto parse_error;
                 }
-                goto parse_error;
-              case 'g':
-                if (op == "f16x8.neg"sv) {
-                  CHECK_ERR(makeUnary(ctx, pos, annotations, UnaryOp::NegVecF16x8));
+              }
+              case 'm':
+                if (op == "f16x8.nmadd"sv) {
+                  CHECK_ERR(makeSIMDTernary(ctx, pos, annotations, SIMDTernaryOp::NmaddVecF16x8));
                   return Ok{};
                 }
                 goto parse_error;
@@ -631,34 +653,12 @@ switch (buf[0]) {
               default: goto parse_error;
             }
           }
-          case 'r': {
-            switch (buf[8]) {
-              case 'l': {
-                switch (buf[14]) {
-                  case 'm':
-                    if (op == "f16x8.relaxed_madd"sv) {
-                      CHECK_ERR(makeSIMDTernary(ctx, pos, annotations, SIMDTernaryOp::RelaxedMaddVecF16x8));
-                      return Ok{};
-                    }
-                    goto parse_error;
-                  case 'n':
-                    if (op == "f16x8.relaxed_nmadd"sv) {
-                      CHECK_ERR(makeSIMDTernary(ctx, pos, annotations, SIMDTernaryOp::RelaxedNmaddVecF16x8));
-                      return Ok{};
-                    }
-                    goto parse_error;
-                  default: goto parse_error;
-                }
-              }
-              case 'p':
-                if (op == "f16x8.replace_lane"sv) {
-                  CHECK_ERR(makeSIMDReplace(ctx, pos, annotations, SIMDReplaceOp::ReplaceLaneVecF16x8, 8));
-                  return Ok{};
-                }
-                goto parse_error;
-              default: goto parse_error;
+          case 'r':
+            if (op == "f16x8.replace_lane"sv) {
+              CHECK_ERR(makeSIMDReplace(ctx, pos, annotations, SIMDReplaceOp::ReplaceLaneVecF16x8, 8));
+              return Ok{};
             }
-          }
+            goto parse_error;
           case 's': {
             switch (buf[7]) {
               case 'p':
diff --git a/src/ir/cost.h b/src/ir/cost.h
index 03a972f13f9..6eb91ec5183 100644
--- a/src/ir/cost.h
+++ b/src/ir/cost.h
@@ -609,8 +609,8 @@ struct CostAnalyzer : public OverriddenVisitor<CostAnalyzer, CostType> {
       case LaneselectI16x8:
       case LaneselectI32x4:
       case LaneselectI64x2:
-      case RelaxedMaddVecF16x8:
-      case RelaxedNmaddVecF16x8:
+      case MaddVecF16x8:
+      case NmaddVecF16x8:
       case RelaxedMaddVecF32x4:
       case RelaxedNmaddVecF32x4:
       case RelaxedMaddVecF64x2:
diff --git a/src/literal.h b/src/literal.h
index 80e58a061bd..9eb27177d75 100644
--- a/src/literal.h
+++ b/src/literal.h
@@ -727,8 +727,8 @@ class Literal {
   Literal convertSToF16x8() const;
   Literal convertUToF16x8() const;
   Literal swizzleI8x16(const Literal& other) const;
-  Literal relaxedMaddF16x8(const Literal& left, const Literal& right) const;
-  Literal relaxedNmaddF16x8(const Literal& left, const Literal& right) const;
+  Literal maddF16x8(const Literal& left, const Literal& right) const;
+  Literal nmaddF16x8(const Literal& left, const Literal& right) const;
   Literal relaxedMaddF32x4(const Literal& left, const Literal& right) const;
   Literal relaxedNmaddF32x4(const Literal& left, const Literal& right) const;
   Literal relaxedMaddF64x2(const Literal& left, const Literal& right) const;
diff --git a/src/passes/Print.cpp b/src/passes/Print.cpp
index c34e5d0dac9..415324f704e 100644
--- a/src/passes/Print.cpp
+++ b/src/passes/Print.cpp
@@ -790,11 +790,11 @@ struct PrintExpressionContents
       case LaneselectI64x2:
         o << "i64x2.laneselect";
         break;
-      case RelaxedMaddVecF16x8:
-        o << "f16x8.relaxed_madd";
+      case MaddVecF16x8:
+        o << "f16x8.madd";
         break;
-      case RelaxedNmaddVecF16x8:
-        o << "f16x8.relaxed_nmadd";
+      case NmaddVecF16x8:
+        o << "f16x8.nmadd";
         break;
       case RelaxedMaddVecF32x4:
         o << "f32x4.relaxed_madd";
diff --git a/src/passes/RemoveRelaxedSIMD.cpp b/src/passes/RemoveRelaxedSIMD.cpp
index 5dfd82ecd70..b09319d8fce 100644
--- a/src/passes/RemoveRelaxedSIMD.cpp
+++ b/src/passes/RemoveRelaxedSIMD.cpp
@@ -74,8 +74,6 @@ struct RemoveRelaxedSIMD : WalkerPass<PostWalker<RemoveRelaxedSIMD>> {
 
   void visitSIMDTernary(SIMDTernary* curr) {
     switch (curr->op) {
-      case RelaxedMaddVecF16x8:
-      case RelaxedNmaddVecF16x8:
       case RelaxedMaddVecF32x4:
       case RelaxedNmaddVecF32x4:
       case RelaxedMaddVecF64x2:
diff --git a/src/wasm-binary.h b/src/wasm-binary.h
index eb5ee36c0f4..6c56583824a 100644
--- a/src/wasm-binary.h
+++ b/src/wasm-binary.h
@@ -1065,8 +1065,8 @@ enum ASTNodes {
   I32x4RelaxedTruncF32x4U = 0x102,
   I32x4RelaxedTruncF64x2SZero = 0x103,
   I32x4RelaxedTruncF64x2UZero = 0x104,
-  F16x8RelaxedMadd = 0x14e,
-  F16x8RelaxedNmadd = 0x14f,
+  F16x8Madd = 0x14e,
+  F16x8Nmadd = 0x14f,
   F32x4RelaxedMadd = 0x105,
   F32x4RelaxedNmadd = 0x106,
   F64x2RelaxedMadd = 0x107,
diff --git a/src/wasm-interpreter.h b/src/wasm-interpreter.h
index f0058310b95..5594ae4014f 100644
--- a/src/wasm-interpreter.h
+++ b/src/wasm-interpreter.h
@@ -1710,16 +1710,10 @@ class ExpressionRunner : public OverriddenVisitor<SubType, Flow> {
       case LaneselectI64x2:
         return c.bitselectV128(a, b);
 
-      case RelaxedMaddVecF16x8:
-        if (relaxedBehavior == RelaxedBehavior::NonConstant) {
-          return NONCONSTANT_FLOW;
-        }
-        return a.relaxedMaddF16x8(b, c);
-      case RelaxedNmaddVecF16x8:
-        if (relaxedBehavior == RelaxedBehavior::NonConstant) {
-          return NONCONSTANT_FLOW;
-        }
-        return a.relaxedNmaddF16x8(b, c);
+      case MaddVecF16x8:
+        return a.maddF16x8(b, c);
+      case NmaddVecF16x8:
+        return a.nmaddF16x8(b, c);
       case RelaxedMaddVecF32x4:
         if (relaxedBehavior == RelaxedBehavior::NonConstant) {
           return NONCONSTANT_FLOW;
diff --git a/src/wasm.h b/src/wasm.h
index ba359577eeb..b07a922f841 100644
--- a/src/wasm.h
+++ b/src/wasm.h
@@ -585,8 +585,6 @@ enum SIMDTernaryOp {
   Bitselect,
 
   // Relaxed SIMD
-  RelaxedMaddVecF16x8,
-  RelaxedNmaddVecF16x8,
   RelaxedMaddVecF32x4,
   RelaxedNmaddVecF32x4,
   RelaxedMaddVecF64x2,
@@ -596,6 +594,9 @@ enum SIMDTernaryOp {
   LaneselectI32x4,
   LaneselectI64x2,
   DotI8x16I7x16AddSToVecI32x4,
+  // FP16
+  MaddVecF16x8,
+  NmaddVecF16x8,
 };
 
 enum RefAsOp {
diff --git a/src/wasm/literal.cpp b/src/wasm/literal.cpp
index 1b35ac605d7..1a11f2d2ede 100644
--- a/src/wasm/literal.cpp
+++ b/src/wasm/literal.cpp
@@ -2939,14 +2939,12 @@ static Literal ternary(const Literal& a, const Literal& b, const Literal& c) {
 }
 } // namespace
 
-Literal Literal::relaxedMaddF16x8(const Literal& left,
-                                  const Literal& right) const {
+Literal Literal::maddF16x8(const Literal& left, const Literal& right) const {
   return ternary<8, &Literal::getLanesF16x8, &Literal::madd, &toFP16>(
     *this, left, right);
 }
 
-Literal Literal::relaxedNmaddF16x8(const Literal& left,
-                                   const Literal& right) const {
+Literal Literal::nmaddF16x8(const Literal& left, const Literal& right) const {
   return ternary<8, &Literal::getLanesF16x8, &Literal::nmadd, &toFP16>(
     *this, left, right);
 }
diff --git a/src/wasm/wasm-binary.cpp b/src/wasm/wasm-binary.cpp
index 3a242535bdc..dbe16c9889e 100644
--- a/src/wasm/wasm-binary.cpp
+++ b/src/wasm/wasm-binary.cpp
@@ -4492,10 +4492,10 @@ Result<> WasmBinaryReader::readInst() {
           return builder.makeSIMDTernary(LaneselectI32x4);
         case BinaryConsts::I64x2Laneselect:
           return builder.makeSIMDTernary(LaneselectI64x2);
-        case BinaryConsts::F16x8RelaxedMadd:
-          return builder.makeSIMDTernary(RelaxedMaddVecF16x8);
-        case BinaryConsts::F16x8RelaxedNmadd:
-          return builder.makeSIMDTernary(RelaxedNmaddVecF16x8);
+        case BinaryConsts::F16x8Madd:
+          return builder.makeSIMDTernary(MaddVecF16x8);
+        case BinaryConsts::F16x8Nmadd:
+          return builder.makeSIMDTernary(NmaddVecF16x8);
         case BinaryConsts::F32x4RelaxedMadd:
           return builder.makeSIMDTernary(RelaxedMaddVecF32x4);
         case BinaryConsts::F32x4RelaxedNmadd:
diff --git a/src/wasm/wasm-stack.cpp b/src/wasm/wasm-stack.cpp
index d612fb1b640..2ec74dda77f 100644
--- a/src/wasm/wasm-stack.cpp
+++ b/src/wasm/wasm-stack.cpp
@@ -727,11 +727,11 @@ void BinaryInstWriter::visitSIMDTernary(SIMDTernary* curr) {
     case LaneselectI64x2:
       o << U32LEB(BinaryConsts::I64x2Laneselect);
       break;
-    case RelaxedMaddVecF16x8:
-      o << U32LEB(BinaryConsts::F16x8RelaxedMadd);
+    case MaddVecF16x8:
+      o << U32LEB(BinaryConsts::F16x8Madd);
       break;
-    case RelaxedNmaddVecF16x8:
-      o << U32LEB(BinaryConsts::F16x8RelaxedNmadd);
+    case NmaddVecF16x8:
+      o << U32LEB(BinaryConsts::F16x8Nmadd);
       break;
     case RelaxedMaddVecF32x4:
       o << U32LEB(BinaryConsts::F32x4RelaxedMadd);
diff --git a/src/wasm/wasm-validator.cpp b/src/wasm/wasm-validator.cpp
index 0a6d205ee63..70c21508d5f 100644
--- a/src/wasm/wasm-validator.cpp
+++ b/src/wasm/wasm-validator.cpp
@@ -1503,10 +1503,6 @@ void FunctionValidator::visitSIMDShuffle(SIMDShuffle* curr) {
 void FunctionValidator::visitSIMDTernary(SIMDTernary* curr) {
   FeatureSet required = FeatureSet::None;
   switch (curr->op) {
-    case RelaxedMaddVecF16x8:
-    case RelaxedNmaddVecF16x8:
-      required |= FeatureSet::FP16;
-      [[fallthrough]];
     case LaneselectI8x16:
     case LaneselectI16x8:
     case LaneselectI32x4:
@@ -1518,6 +1514,10 @@ void FunctionValidator::visitSIMDTernary(SIMDTernary* curr) {
     case DotI8x16I7x16AddSToVecI32x4:
       required |= FeatureSet::RelaxedSIMD;
       [[fallthrough]];
+    case MaddVecF16x8:
+    case NmaddVecF16x8:
+      required |= FeatureSet::FP16;
+      [[fallthrough]];
     case Bitselect:
       required |= FeatureSet::SIMD;
   }
diff --git a/test/lit/basic/f16.wast b/test/lit/basic/f16.wast
index faf7006d4df..c7240b25aab 100644
--- a/test/lit/basic/f16.wast
+++ b/test/lit/basic/f16.wast
@@ -490,22 +490,22 @@
    (local.get $0)
   )
  )
-  ;; CHECK-TEXT:      (func $f16x8.relaxed_madd (type $2) (param $0 v128) (param $1 v128) (param $2 v128) (result v128)
-  ;; CHECK-TEXT-NEXT:  (f16x8.relaxed_madd
+  ;; CHECK-TEXT:      (func $f16x8.madd (type $2) (param $0 v128) (param $1 v128) (param $2 v128) (result v128)
+  ;; CHECK-TEXT-NEXT:  (f16x8.madd
   ;; CHECK-TEXT-NEXT:   (local.get $0)
   ;; CHECK-TEXT-NEXT:   (local.get $1)
   ;; CHECK-TEXT-NEXT:   (local.get $2)
   ;; CHECK-TEXT-NEXT:  )
   ;; CHECK-TEXT-NEXT: )
-  ;; CHECK-BIN:      (func $f16x8.relaxed_madd (type $2) (param $0 v128) (param $1 v128) (param $2 v128) (result v128)
-  ;; CHECK-BIN-NEXT:  (f16x8.relaxed_madd
+  ;; CHECK-BIN:      (func $f16x8.madd (type $2) (param $0 v128) (param $1 v128) (param $2 v128) (result v128)
+  ;; CHECK-BIN-NEXT:  (f16x8.madd
   ;; CHECK-BIN-NEXT:   (local.get $0)
   ;; CHECK-BIN-NEXT:   (local.get $1)
   ;; CHECK-BIN-NEXT:   (local.get $2)
   ;; CHECK-BIN-NEXT:  )
   ;; CHECK-BIN-NEXT: )
-  (func $f16x8.relaxed_madd (param $0 v128) (param $1 v128) (param $2 v128) (result v128)
-  (f16x8.relaxed_madd
+  (func $f16x8.madd (param $0 v128) (param $1 v128) (param $2 v128) (result v128)
+  (f16x8.madd
    (local.get $0)
    (local.get $1)
    (local.get $2)
@@ -513,22 +513,22 @@
  )
 
 
- ;; CHECK-TEXT:      (func $f16x8.relaxed_nmadd (type $2) (param $0 v128) (param $1 v128) (param $2 v128) (result v128)
- ;; CHECK-TEXT-NEXT:  (f16x8.relaxed_nmadd
+ ;; CHECK-TEXT:      (func $f16x8.nmadd (type $2) (param $0 v128) (param $1 v128) (param $2 v128) (result v128)
+ ;; CHECK-TEXT-NEXT:  (f16x8.nmadd
  ;; CHECK-TEXT-NEXT:   (local.get $0)
  ;; CHECK-TEXT-NEXT:   (local.get $1)
  ;; CHECK-TEXT-NEXT:   (local.get $2)
  ;; CHECK-TEXT-NEXT:  )
  ;; CHECK-TEXT-NEXT: )
- ;; CHECK-BIN:      (func $f16x8.relaxed_nmadd (type $2) (param $0 v128) (param $1 v128) (param $2 v128) (result v128)
- ;; CHECK-BIN-NEXT:  (f16x8.relaxed_nmadd
+ ;; CHECK-BIN:      (func $f16x8.nmadd (type $2) (param $0 v128) (param $1 v128) (param $2 v128) (result v128)
+ ;; CHECK-BIN-NEXT:  (f16x8.nmadd
  ;; CHECK-BIN-NEXT:   (local.get $0)
  ;; CHECK-BIN-NEXT:   (local.get $1)
  ;; CHECK-BIN-NEXT:   (local.get $2)
  ;; CHECK-BIN-NEXT:  )
  ;; CHECK-BIN-NEXT: )
- (func $f16x8.relaxed_nmadd (param $0 v128) (param $1 v128) (param $2 v128) (result v128)
-  (f16x8.relaxed_nmadd
+ (func $f16x8.nmadd (param $0 v128) (param $1 v128) (param $2 v128) (result v128)
+  (f16x8.nmadd
    (local.get $0)
    (local.get $1)
    (local.get $2)
@@ -789,7 +789,7 @@
 ;; CHECK-BIN-NODEBUG-NEXT: )
 
 ;; CHECK-BIN-NODEBUG:      (func $26 (type $2) (param $0 v128) (param $1 v128) (param $2 v128) (result v128)
-;; CHECK-BIN-NODEBUG-NEXT:  (f16x8.relaxed_madd
+;; CHECK-BIN-NODEBUG-NEXT:  (f16x8.madd
 ;; CHECK-BIN-NODEBUG-NEXT:   (local.get $0)
 ;; CHECK-BIN-NODEBUG-NEXT:   (local.get $1)
 ;; CHECK-BIN-NODEBUG-NEXT:   (local.get $2)
@@ -797,7 +797,7 @@
 ;; CHECK-BIN-NODEBUG-NEXT: )
 
 ;; CHECK-BIN-NODEBUG:      (func $27 (type $2) (param $0 v128) (param $1 v128) (param $2 v128) (result v128)
-;; CHECK-BIN-NODEBUG-NEXT:  (f16x8.relaxed_nmadd
+;; CHECK-BIN-NODEBUG-NEXT:  (f16x8.nmadd
 ;; CHECK-BIN-NODEBUG-NEXT:   (local.get $0)
 ;; CHECK-BIN-NODEBUG-NEXT:   (local.get $1)
 ;; CHECK-BIN-NODEBUG-NEXT:   (local.get $2)
diff --git a/test/lit/passes/remove-relaxed-simd.wast b/test/lit/passes/remove-relaxed-simd.wast
index 2269aedc4d2..045a4a190a9 100644
--- a/test/lit/passes/remove-relaxed-simd.wast
+++ b/test/lit/passes/remove-relaxed-simd.wast
@@ -123,16 +123,6 @@
   ;; CHECK-NEXT:   )
   ;; CHECK-NEXT:  )
   ;; CHECK-NEXT:  (drop
-  ;; CHECK-NEXT:   (block
-  ;; CHECK-NEXT:    (unreachable)
-  ;; CHECK-NEXT:   )
-  ;; CHECK-NEXT:  )
-  ;; CHECK-NEXT:  (drop
-  ;; CHECK-NEXT:   (block
-  ;; CHECK-NEXT:    (unreachable)
-  ;; CHECK-NEXT:   )
-  ;; CHECK-NEXT:  )
-  ;; CHECK-NEXT:  (drop
   ;; CHECK-NEXT:   (v128.bitselect
   ;; CHECK-NEXT:    (local.get $0)
   ;; CHECK-NEXT:    (local.get $1)
@@ -142,8 +132,6 @@
   ;; CHECK-NEXT: )
   (func $ternary (param v128 v128 v128)
     (drop (i32x4.dot_i8x16_i7x16_add_s (local.get 0) (local.get 1) (local.get 2)))
-    (drop (f16x8.relaxed_madd (local.get 0) (local.get 1) (local.get 2)))
-    (drop (f16x8.relaxed_nmadd (local.get 0) (local.get 1) (local.get 2)))
     (drop (f32x4.relaxed_madd (local.get 0) (local.get 1) (local.get 2)))
     (drop (f32x4.relaxed_nmadd (local.get 0) (local.get 1) (local.get 2)))
     (drop (f64x2.relaxed_madd (local.get 0) (local.get 1) (local.get 2)))
@@ -192,7 +180,7 @@
   ;; CHECK-NEXT: )
   (func $effects (param v128)
     (drop
-      (f16x8.relaxed_madd
+      (f32x4.relaxed_madd
         (call $effect)
         (local.get 0)
         (block (result v128)
diff --git a/test/lit/validation/simd-ternary.wast b/test/lit/validation/simd-ternary.wast
index 31e3abced20..540c2840e88 100644
--- a/test/lit/validation/simd-ternary.wast
+++ b/test/lit/validation/simd-ternary.wast
@@ -1,10 +1,10 @@
 ;; RUN: not wasm-opt --enable-simd %s 2>&1 | filecheck %s
 
 ;; CHECK: SIMD ternary operation requires additional features, on
-;; CHECK: [--enable-relaxed-simd --enable-fp16]
+;; CHECK: [--enable-fp16]
 
 (module
   (func $fp16 (param v128 v128 v128)
-    (f16x8.relaxed_madd (local.get 0) (local.get 1) (local.get 2))
+    (f16x8.madd (local.get 0) (local.get 1) (local.get 2))
   )
 )
diff --git a/test/spec/f16.wast b/test/spec/f16.wast
index 60bcc74bac0..4664e92f5cf 100644
--- a/test/spec/f16.wast
+++ b/test/spec/f16.wast
@@ -32,8 +32,8 @@
   (func (export "f16x8.floor") (param $0 v128) (result v128) (f16x8.floor (local.get $0)))
   (func (export "f16x8.trunc") (param $0 v128) (result v128) (f16x8.trunc (local.get $0)))
   (func (export "f16x8.nearest") (param $0 v128) (result v128) (f16x8.nearest (local.get $0)))
-  (func (export "f16x8.relaxed_madd") (param $0 v128) (param $1 v128) (param $2 v128) (result v128) (f16x8.relaxed_madd (local.get $0) (local.get $1) (local.get $2)))
-  (func (export "f16x8.relaxed_nmadd") (param $0 v128) (param $1 v128) (param $2 v128) (result v128) (f16x8.relaxed_nmadd (local.get $0) (local.get $1) (local.get $2)))
+  (func (export "f16x8.madd") (param $0 v128) (param $1 v128) (param $2 v128) (result v128) (f16x8.madd (local.get $0) (local.get $1) (local.get $2)))
+  (func (export "f16x8.nmadd") (param $0 v128) (param $1 v128) (param $2 v128) (result v128) (f16x8.nmadd (local.get $0) (local.get $1) (local.get $2)))
   (func (export "i16x8.trunc_sat_f16x8_s") (param $0 v128) (result v128) (i16x8.trunc_sat_f16x8_s (local.get $0)))
   (func (export "i16x8.trunc_sat_f16x8_u") (param $0 v128) (result v128) (i16x8.trunc_sat_f16x8_u (local.get $0)))
   (func (export "f16x8.convert_i16x8_s") (param $0 v128) (result v128) (f16x8.convert_i16x8_s (local.get $0)))
@@ -197,7 +197,7 @@
     ;;                nan    0       inf    -inf   -1     1      2      1
     (v128.const i16x8 0x7e00 0       0x7c00 0xfc00 0xbc00 0x3c00 0x4000 0x3c00))
 ;; ternary operations
-(assert_return (invoke "f16x8.relaxed_madd"
+(assert_return (invoke "f16x8.madd"
     ;; Lane 0 illustrates the difference between fused/unfused. e.g.
     ;; fused: (positive overflow) + -inf = -inf
     ;; unfused: (inf) + -inf = NaN
@@ -210,7 +210,7 @@
     (v128.const i16x8 0xfc00 0x7c00 0xbc00  0      0x3c00 0x4000 0x3c00 0xbc00))
     ;;                -inf   inf    0       0      2      4.25   -7     0
     (v128.const i16x8 0xfc00 0x7c00 0       0      0x4000 0x4440 0xc700 0))
-(assert_return (invoke "f16x8.relaxed_nmadd"
+(assert_return (invoke "f16x8.nmadd"
     ;; Lane 0 illustrates the difference between fused/unfused. e.g.
     ;; fused: -(positive overflow) + inf = inf
     ;; unfused: (-inf) + -inf = NaN