diff --git a/library.properties b/library.properties index b11f724..9ac2a88 100644 --- a/library.properties +++ b/library.properties @@ -6,5 +6,5 @@ category=Display author=Soldered maintainer=Soldered includes=InkplateMotion.h -version=1.0.1 +version=1.1.0 architectures=stm32 diff --git a/src/boards/Inkplate6Motion/IP6MotionDriver.cpp b/src/boards/Inkplate6Motion/IP6MotionDriver.cpp index b22ad9d..8441675 100644 --- a/src/boards/Inkplate6Motion/IP6MotionDriver.cpp +++ b/src/boards/Inkplate6Motion/IP6MotionDriver.cpp @@ -583,6 +583,7 @@ int EPDDriver::epdPSU(uint8_t _state) // Enable buffer for the control ePaper lines. EPD_BUF_CLEAR; + pinMode(EPD_BUFF_PIN, OUTPUT); // Set new PMIC state. _epdPSUState = 1; @@ -603,6 +604,7 @@ int EPDDriver::epdPSU(uint8_t _state) // Disable buffer for the control ePaper lines. EPD_BUF_SET; + pinMode(EPD_BUFF_PIN, INPUT); // One second should be long enough to shut down all EPD PMICs voltage rails. unsigned long timer = millis(); @@ -653,12 +655,20 @@ void EPDDriver::gpioInit() internalIO.blockPinUsage(5); // Set EPD buffer enable for ePaper control pins to output. - pinMode(EPD_BUFF_PIN, OUTPUT); + // pinMode(EPD_BUFF_PIN, OUTPUT); // Enable the external RAM (inverse logic due P-MOS) and enable it by default. + // Since the output is by default low, that will enable the SDRAM for a split + // second, set the output to be set as high first, then set the pin as output. + // Otherwise, SDRAM would glitch. + digitalWrite(PB5, LOW); + pinMode(PB5, OUTPUT); + digitalWrite(INKPLATE_SDRAM_EN, HIGH); pinMode(INKPLATE_SDRAM_EN, OUTPUT); digitalWrite(INKPLATE_SDRAM_EN, LOW); + delay(100); + // Disable battery measurement pin pinMode(INKPLATE_BATT_MEASURE_EN, OUTPUT); digitalWrite(INKPLATE_BATT_MEASURE_EN, LOW); diff --git a/src/stm32System/stm32FMC.cpp b/src/stm32System/stm32FMC.cpp index dff1f17..bb4b7fb 100644 --- a/src/stm32System/stm32FMC.cpp +++ b/src/stm32System/stm32FMC.cpp @@ -68,10 +68,10 @@ static void MX_FMC_Init(void) /* Timing */ _timing.AddressSetupTime = 0; _timing.AddressHoldTime = 0; - _timing.DataSetupTime = 2; + _timing.DataSetupTime = 4; _timing.BusTurnAroundDuration = 0; - _timing.CLKDivision = 1; - _timing.DataLatency = 1; + _timing.CLKDivision = 0; + _timing.DataLatency = 0; _timing.AccessMode = FMC_ACCESS_MODE_A; /* ExtTiming */ @@ -89,19 +89,19 @@ static void MX_FMC_Init(void) _hsdram1.Init.RowBitsNumber = FMC_SDRAM_ROW_BITS_NUM_13; _hsdram1.Init.MemoryDataWidth = FMC_SDRAM_MEM_BUS_WIDTH_16; _hsdram1.Init.InternalBankNumber = FMC_SDRAM_INTERN_BANKS_NUM_4; - _hsdram1.Init.CASLatency = FMC_SDRAM_CAS_LATENCY_2; + _hsdram1.Init.CASLatency = FMC_SDRAM_CAS_LATENCY_3; _hsdram1.Init.WriteProtection = FMC_SDRAM_WRITE_PROTECTION_DISABLE; _hsdram1.Init.SDClockPeriod = FMC_SDRAM_CLOCK_PERIOD_2; _hsdram1.Init.ReadBurst = FMC_SDRAM_RBURST_ENABLE; - _hsdram1.Init.ReadPipeDelay = FMC_SDRAM_RPIPE_DELAY_0; + _hsdram1.Init.ReadPipeDelay = FMC_SDRAM_RPIPE_DELAY_1; /* SdramTiming */ _sdramTiming.LoadToActiveDelay = 2; - _sdramTiming.ExitSelfRefreshDelay = 10; - _sdramTiming.SelfRefreshTime = 2; - _sdramTiming.RowCycleDelay = 8; - _sdramTiming.WriteRecoveryTime = 4; - _sdramTiming.RPDelay = 2; - _sdramTiming.RCDDelay = 2; + _sdramTiming.ExitSelfRefreshDelay = 12; + _sdramTiming.SelfRefreshTime = 8; + _sdramTiming.RowCycleDelay = 10; + _sdramTiming.WriteRecoveryTime = 3; + _sdramTiming.RPDelay = 4; + _sdramTiming.RCDDelay = 4; if (HAL_SDRAM_Init(&_hsdram1, &_sdramTiming) != HAL_OK) { @@ -143,7 +143,7 @@ static void MX_FMC_Init(void) } /* Step 7: Program the external memory mode register */ - _modeRegister = (0 << 0) | (0 << 2) | (2 << 4) | (0 << 7) | (1 << 9); + _modeRegister = 0b000000110011011; _command.CommandMode = FMC_SDRAM_CMD_LOAD_MODE; _command.ModeRegisterDefinition = _modeRegister; _command.CommandTarget = FMC_SDRAM_CMD_TARGET_BANK2; @@ -153,8 +153,8 @@ static void MX_FMC_Init(void) /* Step 8: Set the refresh rate counter - refer to section SDRAM refresh timer register in RM0455 */ /* Set the device refresh rate * COUNT = [(SDRAM self refresh time / number of row) x SDRAM CLK] – 20 - = [(64ms/8192) * 133.3333MHz] - 20 = 1021.6667 */ - if (HAL_SDRAM_ProgramRefreshRate(&_hsdram1, 1022) != HAL_OK) + = [(64ms/8192) * 150MHz] - 20 = 1151.875 ~ 1152. */ + if (HAL_SDRAM_ProgramRefreshRate(&_hsdram1, 1152) != HAL_OK) { Error_Handler(); } @@ -179,7 +179,7 @@ static void HAL_FMC_MspInit(void) */ PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_FMC; PeriphClkInitStruct.PLL2.PLL2M = 6; - PeriphClkInitStruct.PLL2.PLL2N = 200; + PeriphClkInitStruct.PLL2.PLL2N = 225; PeriphClkInitStruct.PLL2.PLL2P = 2; PeriphClkInitStruct.PLL2.PLL2Q = 2; PeriphClkInitStruct.PLL2.PLL2R = 2; @@ -680,4 +680,4 @@ extern "C" void MDMA_IRQHandler() { HAL_MDMA_IRQHandler(&_hmdmaMdmaChannel40Sw0); HAL_MDMA_IRQHandler(&_hmdmaMdmaChannel41Sw0); -} \ No newline at end of file +} diff --git a/src/system/defines.h b/src/system/defines.h index a2c81eb..38214f1 100644 --- a/src/system/defines.h +++ b/src/system/defines.h @@ -14,7 +14,7 @@ #define __DEFINES_H__ // Uncomment for debug messages. -// #define __INKPLATE__DEBUG__ +//#define __INKPLATE__DEBUG__ // Debug meesage print. #ifdef __INKPLATE__DEBUG__ diff --git a/src/system/epdPmic/epdPmic.cpp b/src/system/epdPmic/epdPmic.cpp index a9de9f7..b968e9e 100644 --- a/src/system/epdPmic/epdPmic.cpp +++ b/src/system/epdPmic/epdPmic.cpp @@ -37,6 +37,12 @@ bool EpdPmic::begin() Wire.beginTransmission(TPS_PMIC_ADDR); int _ret = Wire.endTransmission(); + // Disable all rails! + setRails(0); + + // Wait a little bit until all rails are discharged. + delay(10); + // If Wire.endTransmission returns anything else than 0 - Success, return false. return (_ret != 0 ? false : true); }