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Merge pull request #13 from IntegralPilot/extended-alu
2 parents a766cad + 8e820bf commit 471824a

3 files changed

Lines changed: 56 additions & 56 deletions

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GammaALU.vhdl

Lines changed: 12 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -7,7 +7,7 @@ entity GammaALU is
77
clk: in std_logic; -- Clock signal.
88
a : in std_logic_vector(31 downto 0); -- Operand A.
99
b : in std_logic_vector(31 downto 0); -- Operand B.
10-
op : in std_logic_vector(3 downto 0); -- Operation code.
10+
op : in unsigned(15 downto 0); -- Operation code.
1111
result : out std_logic_vector(31 downto 0); -- Result of the operation.
1212
reset : in std_logic; -- Active high reset.
1313
enable: in std_logic -- Active high enable signal.
@@ -21,50 +21,50 @@ begin
2121
if reset = '1' then
2222
result <= (others => '0');
2323
elsif rising_edge(clk) and enable = '1' then
24-
case op is
25-
when "0000" => -- ADD
24+
case to_integer(op) is
25+
when 0 => -- ADD
2626
result <= std_logic_vector(signed(a) + signed(b));
27-
when "0001" => -- SUB
27+
when 1 => -- SUB
2828
result <= std_logic_vector(signed(a) - signed(b));
29-
when "0010" => -- MUL
29+
when 2 => -- MUL
3030
result <= std_logic_vector(resize(signed(a) * signed(b), 32)); -- Resize to 32 bits
31-
when "0011" => -- DIV
31+
when 3 => -- DIV
3232
if b /= "00000000000000000000000000000000" then
3333
result <= std_logic_vector(signed(a) / signed(b));
3434
else
3535
result <= (others => '0'); -- Handle division by zero
3636
end if;
37-
when "0100" => -- equal
37+
when 4 => -- equal
3838
if a = b then
3939
result <= std_logic_vector(to_signed(1, 32));
4040
else
4141
result <= std_logic_vector(to_signed(0, 32));
4242
end if;
43-
when "0101" => -- inequality
43+
when 5 => -- inequality
4444
if a /= b then
4545
result <= std_logic_vector(to_signed(1, 32));
4646
else
4747
result <= std_logic_vector(to_signed(0, 32));
4848
end if;
49-
when "0110" => -- greater than
49+
when 6 => -- greater than
5050
if a > b then
5151
result <= std_logic_vector(to_signed(1, 32));
5252
else
5353
result <= std_logic_vector(to_signed(0, 32));
5454
end if;
55-
when "0111" => -- less than
55+
when 7 => -- less than
5656
if a < b then
5757
result <= std_logic_vector(to_signed(1, 32));
5858
else
5959
result <= std_logic_vector(to_signed(0, 32));
6060
end if;
61-
when "1000" => -- greater than or equal to
61+
when 8 => -- greater than or equal to
6262
if a >= b then
6363
result <= std_logic_vector(to_signed(1, 32));
6464
else
6565
result <= std_logic_vector(to_signed(0, 32));
6666
end if;
67-
when "1001" => -- less than or equal to
67+
when 9 => -- less than or equal to
6868
if a <= b then
6969
result <= std_logic_vector(to_signed(1, 32));
7070
else

GammaCPU.vhdl

Lines changed: 13 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -31,7 +31,7 @@ architecture Behavioral of GammaCPU is
3131
port(
3232
a : in std_logic_vector(31 downto 0); -- Operand A.
3333
b : in std_logic_vector(31 downto 0); -- Operand B.
34-
op : in std_logic_vector(3 downto 0); -- Operation code.
34+
op : in unsigned(15 downto 0); -- Operation code.
3535
result : out std_logic_vector(31 downto 0); -- Result of the operation.
3636
reset : in std_logic; -- Active high reset.
3737
enable : in std_logic; -- Active high to perform the operation.
@@ -58,7 +58,7 @@ architecture Behavioral of GammaCPU is
5858
signal alu_result : std_logic_vector(31 downto 0) := (others => '0');
5959

6060
-- ALU inputs and outputs
61-
signal alu_op : std_logic_vector(3 downto 0);
61+
signal alu_op : unsigned(15 downto 0);
6262
signal alu_a, alu_b : std_logic_vector(31 downto 0);
6363
signal alu_enable : std_logic;
6464

@@ -125,49 +125,49 @@ begin
125125
state <= StackOperation;
126126

127127
when x"6A" => -- i32.add
128-
alu_op <= "0000"; -- ADD
128+
alu_op <= to_unsigned(0, 16); -- ADD
129129
state <= Execute;
130130

131131
when x"6B" => -- i32.sub
132-
alu_op <= "0001"; -- SUB
132+
alu_op <= to_unsigned(1, 16); -- SUB
133133
state <= Execute;
134134

135135
when x"6C" => -- i32.mul
136-
alu_op <= "0010"; -- MUL
136+
alu_op <= to_unsigned(2, 16); -- MUL
137137
state <= Execute;
138138

139139
when x"6D" => -- i32.div_s
140-
alu_op <= "0011"; -- DIV
140+
alu_op <= to_unsigned(3, 16); -- DIV
141141
state <= Execute;
142142

143143
-- Comparisions
144144
when x"45" => -- i32.eqz
145-
alu_op <= "0100"; -- Equal to zero
145+
alu_op <= to_unsigned(4, 16); -- Equal to zero
146146
only_first_stack <= '1';
147147
state <= Execute;
148148

149149
when x"46" => -- i32.eq
150-
alu_op <= "0100"; -- Equal
150+
alu_op <= to_unsigned(5, 16); -- Equal
151151
state <= Execute;
152152

153153
when x"47" => -- i32.ne
154-
alu_op <= "0101"; -- Not Equal
154+
alu_op <= to_unsigned(6, 16); -- Not Equal
155155
state <= Execute;
156156

157157
when x"4b" => -- i32.gt_s
158-
alu_op <= "0110"; -- Greater than
158+
alu_op <= to_unsigned(7, 16); -- Greater than
159159
state <= Execute;
160160

161161
when x"48" => -- i32.lt_s
162-
alu_op <= "0111"; -- Less than
162+
alu_op <= to_unsigned(8, 16); -- Less than
163163
state <= Execute;
164164

165165
when x"4e" => -- i32.ge_s
166-
alu_op <= "1000"; -- Greater than or equal
166+
alu_op <= to_unsigned(9, 16); -- Greater than or equal
167167
state <= Execute;
168168

169169
when x"4C" => -- i32.le_s
170-
alu_op <= "1001"; -- Less than or equal
170+
alu_op <= to_unsigned(10, 16); -- Less than or equal
171171
state <= Execute;
172172

173173
when others =>

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