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Igor-MisicIgor-Misic
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STM32N6xx: add support for running from external flash
1 parent db6b5d4 commit 6cb4c48

4 files changed

Lines changed: 436 additions & 2 deletions

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‎LedBlink/STM32/Src/system_stm32n6xx.c‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -234,8 +234,8 @@ SystemInit(void) {
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RCC->APB4ENR2 &= ~(0x00000010UL);
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/* XSPI2 & XSPIM reset */
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RCC->AHB5RSTSR = RCC_AHB5RSTSR_XSPIMRSTS | RCC_AHB5RSTSR_XSPI2RSTS;
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RCC->AHB5RSTCR = RCC_AHB5RSTCR_XSPIMRSTC | RCC_AHB5RSTCR_XSPI2RSTC;
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// RCC->AHB5RSTSR = RCC_AHB5RSTSR_XSPIMRSTS | RCC_AHB5RSTSR_XSPI2RSTS;
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// RCC->AHB5RSTCR = RCC_AHB5RSTCR_XSPIMRSTC | RCC_AHB5RSTCR_XSPI2RSTC;
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#if defined(USER_TZ_SAU_SETUP)
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/* SAU/IDAU, FPU and Interrupts secure/non-secure allocation settings */

‎Linker/STM32N6xx_EXT_FLASH.ld‎

Lines changed: 211 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,211 @@
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/*
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******************************************************************************
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**
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** @file : STM32N657XX_AXISRAM2_fsbl.ld
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**
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** @author : GPM Application Team
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**
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** @brief : Linker script for STM32N657XX Device from STM32N6 series
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** 512 KBytes RAM
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**
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** Set heap size, stack size and stack location according
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** to application requirements.
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**
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** Set memory bank area and size if external memory is used
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**
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** Target : STMicroelectronics STM32
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**
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** Distribution: The file is distributed as is, without any warranty
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** of any kind.
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**
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******************************************************************************
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** @attention
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**
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** Copyright (c) 2023 STMicroelectronics.
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** All rights reserved.
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**
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** This software is licensed under terms that can be found in the LICENSE file
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** in the root directory of this software component.
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** If no LICENSE file comes with this software, it is provided AS-IS.
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**
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******************************************************************************
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*/
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/* Entry Point */
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ENTRY(Reset_Handler)
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/* Highest address of the user mode stack */
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_estack = ORIGIN(AXISRAM1) + LENGTH(AXISRAM1); /* end of "RAM" Ram type memory */
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_sstack = _estack - _Min_Stack_Size;
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_Min_Heap_Size = 0x200; /* required amount of heap */
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_Min_Stack_Size = 0x800; /* required amount of stack */
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/* Memories definition */
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MEMORY
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{
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AXISRAM1 (xrw) : ORIGIN = 0x34000000, LENGTH = 1024K
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BL_FLAG_RAM (xrw) : ORIGIN = 0x34100000, LENGTH = 64 /* Bootloader flag in RAM */
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ROM (xrw) : ORIGIN = 0x70100400, LENGTH = 255K
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}
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/* Sections */
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SECTIONS
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{
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.bootloader_flag_ram (NOLOAD):
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{
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. = ALIGN(4);
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KEEP(*(.bootloader_flag_ram))
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. = ALIGN(4);
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} >BL_FLAG_RAM
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/* The startup code into "RAM" Ram type memory */
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.isr_vector :
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{
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. = ALIGN(4);
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KEEP(*(.isr_vector)) /* Startup code */
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. = ALIGN(4);
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} >ROM
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/* The program code and other data into "RAM" Ram type memory */
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.text :
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{
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. = ALIGN(4);
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*(.text) /* .text sections (code) */
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*(.text*) /* .text* sections (code) */
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*(.glue_7) /* glue arm to thumb code */
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*(.glue_7t) /* glue thumb to arm code */
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*(.eh_frame)
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*(.RamFunc) /* .RamFunc sections */
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*(.RamFunc*) /* .RamFunc* sections */
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KEEP (*(.init))
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KEEP (*(.fini))
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. = ALIGN(4);
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_etext = .; /* define a global symbols at end of code */
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} >ROM
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/* Constant data into "RAM" Ram type memory */
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.rodata :
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{
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. = ALIGN(4);
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*(.rodata) /* .rodata sections (constants, strings, etc.) */
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*(.rodata*) /* .rodata* sections (constants, strings, etc.) */
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. = ALIGN(4);
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} >ROM
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.ARM.extab (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
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{
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. = ALIGN(4);
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*(.ARM.extab* .gnu.linkonce.armextab.*)
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. = ALIGN(4);
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} >ROM
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.ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
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{
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. = ALIGN(4);
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__exidx_start = .;
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*(.ARM.exidx*)
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__exidx_end = .;
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. = ALIGN(4);
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} >ROM
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.preinit_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
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{
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. = ALIGN(4);
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PROVIDE_HIDDEN (__preinit_array_start = .);
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KEEP (*(.preinit_array*))
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PROVIDE_HIDDEN (__preinit_array_end = .);
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. = ALIGN(4);
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} >ROM
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.init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
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{
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. = ALIGN(4);
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PROVIDE_HIDDEN (__init_array_start = .);
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KEEP (*(SORT(.init_array.*)))
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KEEP (*(.init_array*))
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PROVIDE_HIDDEN (__init_array_end = .);
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. = ALIGN(4);
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} >ROM
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.fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
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{
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. = ALIGN(4);
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PROVIDE_HIDDEN (__fini_array_start = .);
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KEEP (*(SORT(.fini_array.*)))
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KEEP (*(.fini_array*))
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PROVIDE_HIDDEN (__fini_array_end = .);
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. = ALIGN(4);
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} >ROM
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/* Used by the startup to initialize data */
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_sidata = LOADADDR(.data);
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/* Initialized data sections into "RAM" Ram type memory */
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.data :
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{
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. = ALIGN(4);
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_sdata = .; /* create a global symbol at data start */
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*(.data) /* .data sections */
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*(.data*) /* .data* sections */
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. = ALIGN(4);
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_edata = .; /* define a global symbol at data end */
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} >AXISRAM1 AT> ROM
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.noncacheable :
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{
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. = ALIGN(8);
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__snoncacheable = .;/* create symbol for start of section */
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KEEP(*(.noncacheable))
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. = ALIGN(8);
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__enoncacheable = .; /* create symbol for end of section */
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} > AXISRAM1
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.gnu.sgstubs :
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{
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. = ALIGN(4);
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*(.gnu.sgstubs*) /* Secure Gateway stubs */
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. = ALIGN(4);
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} >ROM
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/* Uninitialized data section into "RAM" Ram type memory */
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. = ALIGN(4);
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.bss :
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{
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/* This is used by the startup in order to initialize the .bss section */
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_sbss = .; /* define a global symbol at bss start */
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__bss_start__ = _sbss;
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*(.bss)
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*(.bss*)
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*(COMMON)
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. = ALIGN(4);
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_ebss = .; /* define a global symbol at bss end */
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__bss_end__ = _ebss;
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} >AXISRAM1
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/* User_heap_stack section, used to check that there is enough "RAM" Ram type memory left */
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._user_heap_stack :
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{
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. = ALIGN(8);
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PROVIDE ( end = . );
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PROVIDE ( _end = . );
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. = . + _Min_Heap_Size;
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. = . + _Min_Stack_Size;
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. = ALIGN(8);
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} >AXISRAM1
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/* Remove information from the compiler libraries */
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/DISCARD/ :
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{
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libc.a ( * )
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libm.a ( * )
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libgcc.a ( * )
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}
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.ARM.attributes 0 : { *(.ARM.attributes) }
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}

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