This repository contains the design for a simple hardware neural network accelerator (called Tiny-NN and referred to as TNN below). The design is provided as RTL written in system verilog. Along with the RTL there is a model, written in rust. This aims to be bit accurate with the hardware.
TNN is designed for use with convolutional neural networks (CNNs) but contains generic multiply-accumulate functionality that can be used to implement linear layers.
TNN is not designed to run standalone but rather to be connected to some controller that issues new operations and data. To run a complete neural network outputs will be taken from TNN, potentially processed by the controller and then a new set of operations run.
When implemented in a chip (either an ASIC or within an FPGA) the controller could be a micro-controller that can drive the top-level TNN interface. This repository does not contain any software for the controller, nor is it intended to be placed in this repository (for the time being at least). Within this repository that only thing we are concerned about is providing a suitable set of operations for TNN such that an external controller can use it to execute something like a CNN.
TNN is targetting a very small chip area. It designed for use with a program called tiny tapeout that allows you to submit an ASIC design on various open source silicon processes, the design goes on a small part of the chip along with hundreds of others. IO for the design is limited as is space for logic and storage. These constraints drive its design choices.
Tiny tapeout designs must be in plain verilog, a tool called sv2v is employed to convert the system verilog in this repository into verilog for use in tiny tapeout.
The number type used in TNN in a 16-bit floating point datatype that is similar to BF16 but not identical (see docs/architecture.md for details).
- docs/ - Documentation about TNN
- dv/ - Design verification, contains a basic testbench that can drive test vectors (generated by the model) through a simulation of TNN and check outputs match expected results. Also contains testbenchs for the core FP arithmetic elements.
- model/ - The TNN model written in rust. It runs using toml config files that tell it what operations to run. It can either produce both the input and output for a given operation or just the output
- rtl/ - System verilog for TNN