From c46031774e58af5f1cdef84c2db89951308b8c6a Mon Sep 17 00:00:00 2001 From: Daniel Hansen Date: Thu, 19 Feb 2026 02:50:28 -0800 Subject: [PATCH 1/6] Add _all_ the files Signed-off-by: Daniel Hansen --- .../CMSIS_Integration/system_stm32g4xx.c | 289 ++++++++++++++ .../CMSIS_Integration/system_stm32l4xx.c | 338 ++++++++++++++++ .../CMSIS_Integration/system_stm32u5xx.c | 364 ++++++++++++++++++ .../STM32_HAL_LL/Common/Inc/stm32_assert.h | 52 +++ Lib/Vendor/STM32_HAL_LL/Common/Src/syscalls.c | 168 ++++++++ Lib/Vendor/STM32_HAL_LL/Common/Src/sysmem.c | 78 ++++ .../STM32_HAL_LL/Common/stm32common.cmake | 12 + Lib/Vendor/STM32_HAL_LL/cube.cmake | 13 +- 8 files changed, 1313 insertions(+), 1 deletion(-) create mode 100644 Lib/Vendor/STM32_HAL_LL/CMSIS_Integration/system_stm32g4xx.c create mode 100644 Lib/Vendor/STM32_HAL_LL/CMSIS_Integration/system_stm32l4xx.c create mode 100644 Lib/Vendor/STM32_HAL_LL/CMSIS_Integration/system_stm32u5xx.c create mode 100644 Lib/Vendor/STM32_HAL_LL/Common/Inc/stm32_assert.h create mode 100644 Lib/Vendor/STM32_HAL_LL/Common/Src/syscalls.c create mode 100644 Lib/Vendor/STM32_HAL_LL/Common/Src/sysmem.c create mode 100644 Lib/Vendor/STM32_HAL_LL/Common/stm32common.cmake diff --git a/Lib/Vendor/STM32_HAL_LL/CMSIS_Integration/system_stm32g4xx.c b/Lib/Vendor/STM32_HAL_LL/CMSIS_Integration/system_stm32g4xx.c new file mode 100644 index 000000000..990865b88 --- /dev/null +++ b/Lib/Vendor/STM32_HAL_LL/CMSIS_Integration/system_stm32g4xx.c @@ -0,0 +1,289 @@ +/** + ****************************************************************************** + * @file system_stm32g4xx.c + * @author MCD Application Team + * @brief CMSIS Cortex-M4 Device Peripheral Access Layer System Source File + * + * This file provides two functions and one global variable to be called from + * user application: + * - SystemInit(): This function is called at startup just after reset and + * before branch to main program. This call is made inside + * the "startup_stm32g4xx.s" file. + * + * - SystemCoreClock variable: Contains the core clock (HCLK), it can be + *used by the user application to setup the SysTick timer or configure other + *parameters. + * + * - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must + * be called whenever the core clock is changed + * during program execution. + * + * After each device reset the HSI (16 MHz) is used as system clock source. + * Then SystemInit() function is called, in "startup_stm32g4xx.s" file, to + * configure the system clock before to branch to main program. + * + * This file configures the system clock as follows: + *============================================================================= + *----------------------------------------------------------------------------- + * System Clock source | HSI + *----------------------------------------------------------------------------- + * SYSCLK(Hz) | 16000000 + *----------------------------------------------------------------------------- + * HCLK(Hz) | 16000000 + *----------------------------------------------------------------------------- + * AHB Prescaler | 1 + *----------------------------------------------------------------------------- + * APB1 Prescaler | 1 + *----------------------------------------------------------------------------- + * APB2 Prescaler | 1 + *----------------------------------------------------------------------------- + * PLL_M | 1 + *----------------------------------------------------------------------------- + * PLL_N | 16 + *----------------------------------------------------------------------------- + * PLL_P | 7 + *----------------------------------------------------------------------------- + * PLL_Q | 2 + *----------------------------------------------------------------------------- + * PLL_R | 2 + *----------------------------------------------------------------------------- + * Require 48MHz for RNG | Disabled + *----------------------------------------------------------------------------- + *============================================================================= + ****************************************************************************** + * @attention + * + * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ + +/** @addtogroup CMSIS + * @{ + */ + +/** @addtogroup stm32g4xx_system + * @{ + */ + +/** @addtogroup STM32G4xx_System_Private_Includes + * @{ + */ + +#include "stm32g4xx.h" + +#if !defined(HSE_VALUE) +#define HSE_VALUE 24000000U /*!< Value of the External oscillator in Hz */ +#endif /* HSE_VALUE */ + +#if !defined(HSI_VALUE) +#define HSI_VALUE 16000000U /*!< Value of the Internal oscillator in Hz*/ +#endif /* HSI_VALUE */ + +/** + * @} + */ + +/** @addtogroup STM32G4xx_System_Private_TypesDefinitions + * @{ + */ + +/** + * @} + */ + +/** @addtogroup STM32G4xx_System_Private_Defines + * @{ + */ + +/************************* Miscellaneous Configuration ************************/ +/* Note: Following vector table addresses must be defined in line with linker + configuration. */ +/*!< Uncomment the following line if you need to relocate the vector table + anywhere in Flash or Sram, else the vector table is kept at the automatic + remap of boot address selected */ +/* #define USER_VECT_TAB_ADDRESS */ + +#if defined(USER_VECT_TAB_ADDRESS) +/*!< Uncomment the following line if you need to relocate your vector Table + in Sram else user remap will be done in Flash. */ +/* #define VECT_TAB_SRAM */ +#if defined(VECT_TAB_SRAM) +#define VECT_TAB_BASE_ADDRESS \ + SRAM_BASE /*!< Vector Table base address field. \ + This value must be a multiple of 0x200. */ +#define VECT_TAB_OFFSET \ + 0x00000000U /*!< Vector Table base offset field. \ + This value must be a multiple of 0x200. */ +#else +#define VECT_TAB_BASE_ADDRESS \ + FLASH_BASE /*!< Vector Table base address field. \ + This value must be a multiple of 0x200. */ +#define VECT_TAB_OFFSET \ + 0x00000000U /*!< Vector Table base offset field. \ + This value must be a multiple of 0x200. */ +#endif /* VECT_TAB_SRAM */ +#endif /* USER_VECT_TAB_ADDRESS */ +/******************************************************************************/ +/** + * @} + */ + +/** @addtogroup STM32G4xx_System_Private_Macros + * @{ + */ + +/** + * @} + */ + +/** @addtogroup STM32G4xx_System_Private_Variables + * @{ + */ +/* The SystemCoreClock variable is updated in three ways: + 1) by calling CMSIS function SystemCoreClockUpdate() + 2) by calling HAL API function HAL_RCC_GetHCLKFreq() + 3) each time HAL_RCC_ClockConfig() is called to configure the system clock + frequency Note: If you use this function to configure the system clock; then + there is no need to call the 2 first functions listed above, since + SystemCoreClock variable is updated automatically. +*/ +uint32_t SystemCoreClock = HSI_VALUE; + +const uint8_t AHBPrescTable[16] = {0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U, 6U, 7U, 8U, 9U}; +const uint8_t APBPrescTable[8] = {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U}; + +/** + * @} + */ + +/** @addtogroup STM32G4xx_System_Private_FunctionPrototypes + * @{ + */ + +/** + * @} + */ + +/** @addtogroup STM32G4xx_System_Private_Functions + * @{ + */ + +/** + * @brief Setup the microcontroller system. + * @param None + * @retval None + */ + +void SystemInit(void) +{ +/* FPU settings ------------------------------------------------------------*/ +#if (__FPU_PRESENT == 1) && (__FPU_USED == 1) + SCB->CPACR |= ((3UL << (10 * 2)) | (3UL << (11 * 2))); /* set CP10 and CP11 Full Access */ +#endif + + /* Configure the Vector Table location add offset address + * ------------------*/ +#if defined(USER_VECT_TAB_ADDRESS) + SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */ +#endif /* USER_VECT_TAB_ADDRESS */ +} + +/** + * @brief Update SystemCoreClock variable according to Clock Register Values. + * The SystemCoreClock variable contains the core clock (HCLK), it can + * be used by the user application to setup the SysTick timer or + * configure other parameters. + * + * @note Each time the core clock (HCLK) changes, this function must be called + * to update SystemCoreClock variable value. Otherwise, any + * configuration based on this variable will be incorrect. + * + * @note - The system frequency computed by this function is not the real + * frequency in the chip. It is calculated based on the predefined + * constant and the selected clock source: + * + * - If SYSCLK source is HSI, SystemCoreClock will contain the + * HSI_VALUE(**) + * + * - If SYSCLK source is HSE, SystemCoreClock will contain the + * HSE_VALUE(***) + * + * - If SYSCLK source is PLL, SystemCoreClock will contain the + * HSE_VALUE(***) or HSI_VALUE(*) multiplied/divided by the PLL factors. + * + * (**) HSI_VALUE is a constant defined in stm32g4xx_hal.h file (default + * value 16 MHz) but the real value may vary depending on the variations in + * voltage and temperature. + * + * (***) HSE_VALUE is a constant defined in stm32g4xx_hal.h file + * (default value 24 MHz), user has to ensure that HSE_VALUE is same as the real + * frequency of the crystal used. Otherwise, this function may + * have wrong result. + * + * - The result of this function could be not correct when using + * fractional value for HSE crystal. + * + * @param None + * @retval None + */ +void SystemCoreClockUpdate(void) +{ + uint32_t tmp, pllvco, pllr, pllsource, pllm; + + /* Get SYSCLK source + * -------------------------------------------------------*/ + switch (RCC->CFGR & RCC_CFGR_SWS) { + case 0x04: /* HSI used as system clock source */ + SystemCoreClock = HSI_VALUE; + break; + + case 0x08: /* HSE used as system clock source */ + SystemCoreClock = HSE_VALUE; + break; + + case 0x0C: /* PLL used as system clock source */ + /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN + SYSCLK = PLL_VCO / PLLR + */ + pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC); + pllm = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLM) >> 4) + 1U; + if (pllsource == 0x02UL) /* HSI used as PLL clock source */ + { + pllvco = (HSI_VALUE / pllm); + } else /* HSE used as PLL clock source */ + { + pllvco = (HSE_VALUE / pllm); + } + pllvco = pllvco * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 8); + pllr = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> 25) + 1U) * 2U; + SystemCoreClock = pllvco / pllr; + break; + + default: + break; + } + /* Compute HCLK clock frequency + * --------------------------------------------*/ + /* Get HCLK prescaler */ + tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)]; + /* HCLK clock frequency */ + SystemCoreClock >>= tmp; +} + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ diff --git a/Lib/Vendor/STM32_HAL_LL/CMSIS_Integration/system_stm32l4xx.c b/Lib/Vendor/STM32_HAL_LL/CMSIS_Integration/system_stm32l4xx.c new file mode 100644 index 000000000..3ec9f78a2 --- /dev/null +++ b/Lib/Vendor/STM32_HAL_LL/CMSIS_Integration/system_stm32l4xx.c @@ -0,0 +1,338 @@ +/** + ****************************************************************************** + * @file system_stm32l4xx.c + * @author MCD Application Team + * @brief CMSIS Cortex-M4 Device Peripheral Access Layer System Source File + * + * This file provides two functions and one global variable to be called from + * user application: + * - SystemInit(): This function is called at startup just after reset and + * before branch to main program. This call is made inside + * the "startup_stm32l4xx.s" file. + * + * - SystemCoreClock variable: Contains the core clock (HCLK), it can be + *used by the user application to setup the SysTick timer or configure other + *parameters. + * + * - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must + * be called whenever the core clock is changed + * during program execution. + * + * After each device reset the MSI (4 MHz) is used as system clock source. + * Then SystemInit() function is called, in "startup_stm32l4xx.s" file, to + * configure the system clock before to branch to main program. + * + * This file configures the system clock as follows: + *============================================================================= + *----------------------------------------------------------------------------- + * System Clock source | MSI + *----------------------------------------------------------------------------- + * SYSCLK(Hz) | 4000000 + *----------------------------------------------------------------------------- + * HCLK(Hz) | 4000000 + *----------------------------------------------------------------------------- + * AHB Prescaler | 1 + *----------------------------------------------------------------------------- + * APB1 Prescaler | 1 + *----------------------------------------------------------------------------- + * APB2 Prescaler | 1 + *----------------------------------------------------------------------------- + * PLL_M | 1 + *----------------------------------------------------------------------------- + * PLL_N | 8 + *----------------------------------------------------------------------------- + * PLL_P | 7 + *----------------------------------------------------------------------------- + * PLL_Q | 2 + *----------------------------------------------------------------------------- + * PLL_R | 2 + *----------------------------------------------------------------------------- + * PLLSAI1_P | NA + *----------------------------------------------------------------------------- + * PLLSAI1_Q | NA + *----------------------------------------------------------------------------- + * PLLSAI1_R | NA + *----------------------------------------------------------------------------- + * PLLSAI2_P | NA + *----------------------------------------------------------------------------- + * PLLSAI2_Q | NA + *----------------------------------------------------------------------------- + * PLLSAI2_R | NA + *----------------------------------------------------------------------------- + * Require 48MHz for USB OTG FS, | Disabled + * SDIO and RNG clock | + *----------------------------------------------------------------------------- + *============================================================================= + ****************************************************************************** + * @attention + * + * Copyright (c) 2017 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ + +/** @addtogroup CMSIS + * @{ + */ + +/** @addtogroup stm32l4xx_system + * @{ + */ + +/** @addtogroup STM32L4xx_System_Private_Includes + * @{ + */ + +#include "stm32l4xx.h" + +/** + * @} + */ + +/** @addtogroup STM32L4xx_System_Private_TypesDefinitions + * @{ + */ + +/** + * @} + */ + +/** @addtogroup STM32L4xx_System_Private_Defines + * @{ + */ + +#if !defined(HSE_VALUE) +#define HSE_VALUE 8000000U /*!< Value of the External oscillator in Hz */ +#endif /* HSE_VALUE */ + +#if !defined(MSI_VALUE) +#define MSI_VALUE 4000000U /*!< Value of the Internal oscillator in Hz*/ +#endif /* MSI_VALUE */ + +#if !defined(HSI_VALUE) +#define HSI_VALUE 16000000U /*!< Value of the Internal oscillator in Hz*/ +#endif /* HSI_VALUE */ + +/* Note: Following vector table addresses must be defined in line with linker + configuration. */ +/*!< Uncomment the following line if you need to relocate the vector table + anywhere in Flash or Sram, else the vector table is kept at the automatic + remap of boot address selected */ +/* #define USER_VECT_TAB_ADDRESS */ + +#if defined(USER_VECT_TAB_ADDRESS) +/*!< Uncomment the following line if you need to relocate your vector Table + in Sram else user remap will be done in Flash. */ +/* #define VECT_TAB_SRAM */ + +#if defined(VECT_TAB_SRAM) +#define VECT_TAB_BASE_ADDRESS \ + SRAM1_BASE /*!< Vector Table base address field. \ + This value must be a multiple of 0x200. */ +#define VECT_TAB_OFFSET \ + 0x00000000U /*!< Vector Table base offset field. \ + This value must be a multiple of 0x200. */ +#else +#define VECT_TAB_BASE_ADDRESS \ + FLASH_BASE /*!< Vector Table base address field. \ + This value must be a multiple of 0x200. */ +#define VECT_TAB_OFFSET \ + 0x00000000U /*!< Vector Table base offset field. \ + This value must be a multiple of 0x200. */ +#endif /* VECT_TAB_SRAM */ +#endif /* USER_VECT_TAB_ADDRESS */ + +/******************************************************************************/ +/** + * @} + */ + +/** @addtogroup STM32L4xx_System_Private_Macros + * @{ + */ + +/** + * @} + */ + +/** @addtogroup STM32L4xx_System_Private_Variables + * @{ + */ +/* The SystemCoreClock variable is updated in three ways: + 1) by calling CMSIS function SystemCoreClockUpdate() + 2) by calling HAL API function HAL_RCC_GetHCLKFreq() + 3) each time HAL_RCC_ClockConfig() is called to configure the system clock + frequency Note: If you use this function to configure the system clock; then + there is no need to call the 2 first functions listed above, since + SystemCoreClock variable is updated automatically. +*/ +uint32_t SystemCoreClock = 4000000U; + +const uint8_t AHBPrescTable[16] = {0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U, 6U, 7U, 8U, 9U}; +const uint8_t APBPrescTable[8] = {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U}; +const uint32_t MSIRangeTable[12] = {100000U, 200000U, 400000U, 800000U, 1000000U, 2000000U, 4000000U, 8000000U, 16000000U, 24000000U, 32000000U, 48000000U}; +/** + * @} + */ + +/** @addtogroup STM32L4xx_System_Private_FunctionPrototypes + * @{ + */ + +/** + * @} + */ + +/** @addtogroup STM32L4xx_System_Private_Functions + * @{ + */ + +/** + * @brief Setup the microcontroller system. + * @retval None + */ + +void SystemInit(void) +{ +#if defined(USER_VECT_TAB_ADDRESS) + /* Configure the Vector Table location + * -------------------------------------*/ + SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; +#endif + + /* FPU settings + * ------------------------------------------------------------*/ +#if (__FPU_PRESENT == 1) && (__FPU_USED == 1) + SCB->CPACR |= ((3UL << 20U) | (3UL << 22U)); /* set CP10 and CP11 Full Access */ +#endif +} + +/** + * @brief Update SystemCoreClock variable according to Clock Register Values. + * The SystemCoreClock variable contains the core clock (HCLK), it can + * be used by the user application to setup the SysTick timer or + * configure other parameters. + * + * @note Each time the core clock (HCLK) changes, this function must be called + * to update SystemCoreClock variable value. Otherwise, any + * configuration based on this variable will be incorrect. + * + * @note - The system frequency computed by this function is not the real + * frequency in the chip. It is calculated based on the predefined + * constant and the selected clock source: + * + * - If SYSCLK source is MSI, SystemCoreClock will contain the + * MSI_VALUE(*) + * + * - If SYSCLK source is HSI, SystemCoreClock will contain the + * HSI_VALUE(**) + * + * - If SYSCLK source is HSE, SystemCoreClock will contain the + * HSE_VALUE(***) + * + * - If SYSCLK source is PLL, SystemCoreClock will contain the + * HSE_VALUE(***) or HSI_VALUE(*) or MSI_VALUE(*) multiplied/divided by the PLL + * factors. + * + * (*) MSI_VALUE is a constant defined in stm32l4xx_hal.h file (default + * value 4 MHz) but the real value may vary depending on the variations in + * voltage and temperature. + * + * (**) HSI_VALUE is a constant defined in stm32l4xx_hal.h file (default + * value 16 MHz) but the real value may vary depending on the variations in + * voltage and temperature. + * + * (***) HSE_VALUE is a constant defined in stm32l4xx_hal.h file + * (default value 8 MHz), user has to ensure that HSE_VALUE is same as the real + * frequency of the crystal used. Otherwise, this function may + * have wrong result. + * + * - The result of this function could be not correct when using + * fractional value for HSE crystal. + * + * @retval None + */ +void SystemCoreClockUpdate(void) +{ + uint32_t tmp, msirange, pllvco, pllsource, pllm, pllr; + + /* Get MSI Range + * frequency--------------------------------------------------*/ + if ((RCC->CR & RCC_CR_MSIRGSEL) == 0U) { /* MSISRANGE from RCC_CSR applies */ + msirange = (RCC->CSR & RCC_CSR_MSISRANGE) >> 8U; + } else { /* MSIRANGE from RCC_CR applies */ + msirange = (RCC->CR & RCC_CR_MSIRANGE) >> 4U; + } + /*MSI frequency range in HZ*/ + msirange = MSIRangeTable[msirange]; + + /* Get SYSCLK source + * -------------------------------------------------------*/ + switch (RCC->CFGR & RCC_CFGR_SWS) { + case 0x00: /* MSI used as system clock source */ + SystemCoreClock = msirange; + break; + + case 0x04: /* HSI used as system clock source */ + SystemCoreClock = HSI_VALUE; + break; + + case 0x08: /* HSE used as system clock source */ + SystemCoreClock = HSE_VALUE; + break; + + case 0x0C: /* PLL used as system clock source */ + /* PLL_VCO = (HSE_VALUE or HSI_VALUE or MSI_VALUE/ PLLM) + * PLLN SYSCLK = PLL_VCO / PLLR + */ + pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC); + pllm = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLM) >> 4U) + 1U; + + switch (pllsource) { + case 0x02: /* HSI used as PLL clock source */ + pllvco = (HSI_VALUE / pllm); + break; + + case 0x03: /* HSE used as PLL clock source */ + pllvco = (HSE_VALUE / pllm); + break; + + default: /* MSI used as PLL clock source */ + pllvco = (msirange / pllm); + break; + } + pllvco = pllvco * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 8U); + pllr = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> 25U) + 1U) * 2U; + SystemCoreClock = pllvco / pllr; + break; + + default: + SystemCoreClock = msirange; + break; + } + /* Compute HCLK clock frequency + * --------------------------------------------*/ + /* Get HCLK prescaler */ + tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4U)]; + /* HCLK clock frequency */ + SystemCoreClock >>= tmp; +} + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Lib/Vendor/STM32_HAL_LL/CMSIS_Integration/system_stm32u5xx.c b/Lib/Vendor/STM32_HAL_LL/CMSIS_Integration/system_stm32u5xx.c new file mode 100644 index 000000000..4725dbd02 --- /dev/null +++ b/Lib/Vendor/STM32_HAL_LL/CMSIS_Integration/system_stm32u5xx.c @@ -0,0 +1,364 @@ +/** + ****************************************************************************** + * @file system_stm32u5xx.c + * @author MCD Application Team + * @brief CMSIS Cortex-M33 Device Peripheral Access Layer System Source File + * + * This file provides two functions and one global variable to be called from + * user application: + * - SystemInit(): This function is called at startup just after reset and + * before branch to main program. This call is made inside + * the "startup_stm32u5xx.s" file. + * + * - SystemCoreClock variable: Contains the core clock (HCLK), it can be + *used by the user application to setup the SysTick timer or configure other + *parameters. + * + * - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must + * be called whenever the core clock is changed + * during program execution. + * + * After each device reset the MSI (4 MHz) is used as system clock source. + * Then SystemInit() function is called, in "startup_stm32u5xx.s" file, to + * configure the system clock before to branch to main program. + * + * This file configures the system clock as follows: + *============================================================================= + *----------------------------------------------------------------------------- + * System Clock source | MSI + *----------------------------------------------------------------------------- + * SYSCLK(Hz) | 4000000 + *----------------------------------------------------------------------------- + * HCLK(Hz) | 4000000 + *----------------------------------------------------------------------------- + * AHB Prescaler | 1 + *----------------------------------------------------------------------------- + * APB1 Prescaler | 1 + *----------------------------------------------------------------------------- + * APB2 Prescaler | 1 + *----------------------------------------------------------------------------- + * APB3 Prescaler | 1 + *----------------------------------------------------------------------------- + * PLL1_SRC | No clock + *----------------------------------------------------------------------------- + * PLL1_M | 1 + *----------------------------------------------------------------------------- + * PLL1_N | 8 + *----------------------------------------------------------------------------- + * PLL1_P | 7 + *----------------------------------------------------------------------------- + * PLL1_Q | 2 + *----------------------------------------------------------------------------- + * PLL1_R | 2 + *----------------------------------------------------------------------------- + * PLL2_SRC | NA + *----------------------------------------------------------------------------- + * PLL2_M | NA + *----------------------------------------------------------------------------- + * PLL2_N | NA + *----------------------------------------------------------------------------- + * PLL2_P | NA + *----------------------------------------------------------------------------- + * PLL2_Q | NA + *----------------------------------------------------------------------------- + * PLL2_R | NA + *----------------------------------------------------------------------------- + * PLL3_SRC | NA + *----------------------------------------------------------------------------- + * PLL3_M | NA + *----------------------------------------------------------------------------- + * PLL3_N | NA + *----------------------------------------------------------------------------- + * PLL3_P | NA + *----------------------------------------------------------------------------- + * Require 48MHz for USB FS, | Disabled + * SDIO and RNG clock | + *----------------------------------------------------------------------------- + *============================================================================= + ****************************************************************************** + * @attention + * + * Copyright (c) 2021 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ + +/** @addtogroup CMSIS + * @{ + */ + +/** @addtogroup STM32U5xx_system + * @{ + */ + +/** @addtogroup STM32U5xx_System_Private_Includes + * @{ + */ + +#include + +#include "stm32u5xx.h" + +/** + * @} + */ + +/** @addtogroup STM32U5xx_System_Private_TypesDefinitions + * @{ + */ + +/** + * @} + */ + +/** @addtogroup STM32U5xx_System_Private_Defines + * @{ + */ + +#if !defined(HSE_VALUE) +#define HSE_VALUE 16000000U /*!< Value of the External oscillator in Hz */ +#endif /* HSE_VALUE */ + +#if !defined(MSI_VALUE) +#define MSI_VALUE 4000000U /*!< Value of the Internal oscillator in Hz*/ +#endif /* MSI_VALUE */ + +#if !defined(HSI_VALUE) +#define HSI_VALUE 16000000U /*!< Value of the Internal oscillator in Hz*/ +#endif /* HSI_VALUE */ + +/************************* Miscellaneous Configuration ************************/ +/*!< Uncomment the following line if you need to relocate your vector Table in + Internal SRAM. */ +/* #define VECT_TAB_SRAM */ +#define VECT_TAB_OFFSET \ + 0x00000000UL /*!< Vector Table base offset field. \ + This value must be a multiple of 0x200. */ +/******************************************************************************/ + +/** + * @} + */ + +/** @addtogroup STM32U5xx_System_Private_Macros + * @{ + */ + +/** + * @} + */ + +/** @addtogroup STM32U5xx_System_Private_Variables + * @{ + */ +/* The SystemCoreClock variable is updated in three ways: + 1) by calling CMSIS function SystemCoreClockUpdate() + 2) by calling HAL API function HAL_RCC_GetHCLKFreq() + 3) each time HAL_RCC_ClockConfig() is called to configure the system clock + frequency Note: If you use this function to configure the system clock; then + there is no need to call the 2 first functions listed above, since + SystemCoreClock variable is updated automatically. +*/ +uint32_t SystemCoreClock = 4000000U; + +const uint8_t AHBPrescTable[16] = {0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U, 6U, 7U, 8U, 9U}; +const uint8_t APBPrescTable[8] = {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U}; +const uint32_t MSIRangeTable[16] = {48000000U, 24000000U, 16000000U, 12000000U, 4000000U, 2000000U, 1330000U, 1000000U, 3072000U, 1536000U, 1024000U, 768000U, 400000U, 200000U, 133000U, 100000U}; +/** + * @} + */ + +/** @addtogroup STM32U5xx_System_Private_FunctionPrototypes + * @{ + */ + +/** + * @} + */ + +/** @addtogroup STM32U5xx_System_Private_Functions + * @{ + */ + +/** + * @brief Setup the microcontroller system. + * @param None + * @retval None + */ + +void SystemInit(void) +{ +/* FPU settings ------------------------------------------------------------*/ +#if (__FPU_PRESENT == 1) && (__FPU_USED == 1) + SCB->CPACR |= ((3UL << 20U) | (3UL << 22U)); /* set CP10 and CP11 Full Access */ +#endif + + /* Reset the RCC clock configuration to the default reset state + * ------------*/ + /* Set MSION bit */ + RCC->CR = RCC_CR_MSISON; + + /* Reset CFGR register */ + RCC->CFGR1 = 0U; + RCC->CFGR2 = 0U; + RCC->CFGR3 = 0U; + + /* Reset HSEON, CSSON , HSION, PLLxON bits */ + RCC->CR &= ~(RCC_CR_HSEON | RCC_CR_CSSON | RCC_CR_PLL1ON | RCC_CR_PLL2ON | RCC_CR_PLL3ON); + + /* Reset PLLCFGR register */ + RCC->PLL1CFGR = 0U; + + /* Reset HSEBYP bit */ + RCC->CR &= ~(RCC_CR_HSEBYP); + + /* Disable all interrupts */ + RCC->CIER = 0U; + +/* Configure the Vector Table location add offset address ------------------*/ +#ifdef VECT_TAB_SRAM + SCB->VTOR = SRAM1_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */ +#else + SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */ +#endif +} + +/** + * @brief Update SystemCoreClock variable according to Clock Register Values. + * The SystemCoreClock variable contains the core clock (HCLK), it can + * be used by the user application to setup the SysTick timer or + * configure other parameters. + * + * @note Each time the core clock (HCLK) changes, this function must be called + * to update SystemCoreClock variable value. Otherwise, any + * configuration based on this variable will be incorrect. + * + * @note - The system frequency computed by this function is not the real + * frequency in the chip. It is calculated based on the predefined + * constant and the selected clock source: + * + * - If SYSCLK source is MSI, SystemCoreClock will contain the + * MSI_VALUE(*) + * + * - If SYSCLK source is HSI, SystemCoreClock will contain the + * HSI_VALUE(**) + * + * - If SYSCLK source is HSE, SystemCoreClock will contain the + * HSE_VALUE(***) + * + * - If SYSCLK source is PLL, SystemCoreClock will contain the + * HSE_VALUE(***) or HSI_VALUE(*) or MSI_VALUE(*) multiplied/divided by the PLL + * factors. + * + * (*) MSI_VALUE is a constant defined in stm32u5xx_hal.h file (default + * value 4 MHz) but the real value may vary depending on the variations in + * voltage and temperature. + * + * (**) HSI_VALUE is a constant defined in stm32u5xx_hal.h file (default + * value 16 MHz) but the real value may vary depending on the variations in + * voltage and temperature. + * + * (***) HSE_VALUE is a constant defined in stm32u5xx_hal.h file + * (default value 8 MHz), user has to ensure that HSE_VALUE is same as the real + * frequency of the crystal used. Otherwise, this function may + * have wrong result. + * + * - The result of this function could be not correct when using + * fractional value for HSE crystal. + * + * @param None + * @retval None + */ +void SystemCoreClockUpdate(void) +{ + uint32_t pllr, pllsource, pllm, tmp, pllfracen, msirange; + float_t fracn1, pllvco; + + /* Get MSI Range + * frequency--------------------------------------------------*/ + if (READ_BIT(RCC->ICSCR1, RCC_ICSCR1_MSIRGSEL) == 0U) { + /* MSISRANGE from RCC_CSR applies */ + msirange = (RCC->CSR & RCC_CSR_MSISSRANGE) >> RCC_CSR_MSISSRANGE_Pos; + } else { + /* MSIRANGE from RCC_CR applies */ + msirange = (RCC->ICSCR1 & RCC_ICSCR1_MSISRANGE) >> RCC_ICSCR1_MSISRANGE_Pos; + } + + /*MSI frequency range in HZ*/ + msirange = MSIRangeTable[msirange]; + + /* Get SYSCLK source + * -------------------------------------------------------*/ + switch (RCC->CFGR1 & RCC_CFGR1_SWS) { + case 0x00: /* MSI used as system clock source */ + SystemCoreClock = msirange; + break; + + case 0x04: /* HSI used as system clock source */ + SystemCoreClock = HSI_VALUE; + break; + + case 0x08: /* HSE used as system clock source */ + SystemCoreClock = HSE_VALUE; + break; + + case 0x0C: /* PLL used as system clock source */ + /* PLL_VCO = (HSE_VALUE or HSI_VALUE or MSI_VALUE/ PLLM) + * PLLN SYSCLK = PLL_VCO / PLLR + */ + pllsource = (RCC->PLL1CFGR & RCC_PLL1CFGR_PLL1SRC); + pllm = ((RCC->PLL1CFGR & RCC_PLL1CFGR_PLL1M) >> RCC_PLL1CFGR_PLL1M_Pos) + 1U; + pllfracen = ((RCC->PLL1CFGR & RCC_PLL1CFGR_PLL1FRACEN) >> RCC_PLL1CFGR_PLL1FRACEN_Pos); + fracn1 = (float_t)(uint32_t)(pllfracen * ((RCC->PLL1FRACR & RCC_PLL1FRACR_PLL1FRACN) >> RCC_PLL1FRACR_PLL1FRACN_Pos)); + + switch (pllsource) { + case 0x00: /* No clock sent to PLL*/ + pllvco = (float_t)0U; + break; + + case 0x02: /* HSI used as PLL clock source */ + pllvco = ((float_t)HSI_VALUE / (float_t)pllm); + break; + + case 0x03: /* HSE used as PLL clock source */ + pllvco = ((float_t)HSE_VALUE / (float_t)pllm); + break; + + default: /* MSI used as PLL clock source */ + pllvco = ((float_t)msirange / (float_t)pllm); + break; + } + + pllvco = pllvco * ((float_t)(uint32_t)(RCC->PLL1DIVR & RCC_PLL1DIVR_PLL1N) + (fracn1 / (float_t)0x2000) + (float_t)1U); + pllr = (((RCC->PLL1DIVR & RCC_PLL1DIVR_PLL1R) >> RCC_PLL1DIVR_PLL1R_Pos) + 1U); + SystemCoreClock = (uint32_t)((uint32_t)pllvco / pllr); + break; + + default: + SystemCoreClock = msirange; + break; + } + /* Compute HCLK clock frequency + * --------------------------------------------*/ + /* Get HCLK prescaler */ + tmp = AHBPrescTable[((RCC->CFGR2 & RCC_CFGR2_HPRE) >> RCC_CFGR2_HPRE_Pos)]; + /* HCLK clock frequency */ + SystemCoreClock >>= tmp; +} + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ diff --git a/Lib/Vendor/STM32_HAL_LL/Common/Inc/stm32_assert.h b/Lib/Vendor/STM32_HAL_LL/Common/Inc/stm32_assert.h new file mode 100644 index 000000000..92460620f --- /dev/null +++ b/Lib/Vendor/STM32_HAL_LL/Common/Inc/stm32_assert.h @@ -0,0 +1,52 @@ +/* USER CODE BEGIN Header */ +/** + ****************************************************************************** + * @file stm32_assert.h + * @author MCD Application Team + * @brief STM32 assert file. + ****************************************************************************** + * @attention + * + * Copyright (c) 2019 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ +/* USER CODE END Header */ +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32_ASSERT_H +#define __STM32_ASSERT_H + +#ifdef __cplusplus +extern "C" { +#endif + +/* Exported types ------------------------------------------------------------*/ +/* Exported constants --------------------------------------------------------*/ +/* Includes ------------------------------------------------------------------*/ +/* Exported macro ------------------------------------------------------------*/ +#ifdef USE_FULL_ASSERT +/** + * @brief The assert_param macro is used for function's parameters check. + * @param expr: If expr is false, it calls assert_failed function + * which reports the name of the source file and the source + * line number of the call that failed. + * If expr is true, it returns no value. + * @retval None + */ +#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__)) +/* Exported functions ------------------------------------------------------- */ +void assert_failed(uint8_t *file, uint32_t line); +#else +#define assert_param(expr) ((void)0U) +#endif /* USE_FULL_ASSERT */ + +#ifdef __cplusplus +} +#endif + +#endif /* __STM32_ASSERT_H */ diff --git a/Lib/Vendor/STM32_HAL_LL/Common/Src/syscalls.c b/Lib/Vendor/STM32_HAL_LL/Common/Src/syscalls.c new file mode 100644 index 000000000..834586b36 --- /dev/null +++ b/Lib/Vendor/STM32_HAL_LL/Common/Src/syscalls.c @@ -0,0 +1,168 @@ +/** + ****************************************************************************** + * @file syscalls.c + * @author Auto-generated by STM32CubeMX + * @brief Minimal System calls file + * + * For more information about which c-functions + * need which of these lowlevel functions + * please consult the newlib libc manual + ****************************************************************************** + * @attention + * + * Copyright (c) 2020-2025 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ + +/* Includes */ +#include +#include +#include +#include +#include +#include +#include +#include + +/* Variables */ +extern int __io_putchar(int ch) __attribute__((weak)); +extern int __io_getchar(void) __attribute__((weak)); + +char *__env[1] = {0}; +char **environ = __env; + +/* Functions */ +void initialise_monitor_handles() {} + +int _getpid(void) +{ + return 1; +} + +int _kill(int pid, int sig) +{ + (void)pid; + (void)sig; + errno = EINVAL; + return -1; +} + +void _exit(int status) +{ + _kill(status, -1); + while (1) {} /* Make sure we hang here */ +} + +__attribute__((weak)) int _read(int file, char *ptr, int len) +{ + (void)file; + int DataIdx; + + for (DataIdx = 0; DataIdx < len; DataIdx++) { + *ptr++ = __io_getchar(); + } + + return len; +} + +__attribute__((weak)) int _write(int file, char *ptr, int len) +{ + (void)file; + int DataIdx; + + for (DataIdx = 0; DataIdx < len; DataIdx++) { + __io_putchar(*ptr++); + } + return len; +} + +int _close(int file) +{ + (void)file; + return -1; +} + +int _fstat(int file, struct stat *st) +{ + (void)file; + st->st_mode = S_IFCHR; + return 0; +} + +int _isatty(int file) +{ + (void)file; + return 1; +} + +int _lseek(int file, int ptr, int dir) +{ + (void)file; + (void)ptr; + (void)dir; + return 0; +} + +int _open(char *path, int flags, ...) +{ + (void)path; + (void)flags; + /* Pretend like we always fail */ + return -1; +} + +int _wait(int *status) +{ + (void)status; + errno = ECHILD; + return -1; +} + +int _unlink(char *name) +{ + (void)name; + errno = ENOENT; + return -1; +} + +clock_t _times(struct tms *buf) +{ + (void)buf; + return -1; +} + +int _stat(const char *file, struct stat *st) +{ + (void)file; + st->st_mode = S_IFCHR; + return 0; +} + +int _link(char *old, char *new) +{ + (void)old; + (void)new; + errno = EMLINK; + return -1; +} + +int _fork(void) +{ + errno = EAGAIN; + return -1; +} + +int _execve(char *name, char **argv, char **env) +{ + (void)name; + (void)argv; + (void)env; + errno = ENOMEM; + return -1; +} diff --git a/Lib/Vendor/STM32_HAL_LL/Common/Src/sysmem.c b/Lib/Vendor/STM32_HAL_LL/Common/Src/sysmem.c new file mode 100644 index 000000000..00c67f050 --- /dev/null +++ b/Lib/Vendor/STM32_HAL_LL/Common/Src/sysmem.c @@ -0,0 +1,78 @@ +/** + ****************************************************************************** + * @file sysmem.c + * @author Generated by STM32CubeMX + * @brief System Memory calls file + * + * For more information about which C functions + * need which of these lowlevel functions + * please consult the newlib libc manual + ****************************************************************************** + * @attention + * + * Copyright (c) 2025 STMicroelectronics. + * All rights reserved. + * + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. + * + ****************************************************************************** + */ + +/* Includes */ +#include +#include +#include + +/** + * Pointer to the current high watermark of the heap usage + */ +static uint8_t *__sbrk_heap_end = NULL; + +/** + * @brief _sbrk() allocates memory to the newlib heap and is used by malloc + * and others from the C library + * + * @verbatim + * ############################################################################ + * # .data # .bss # newlib heap # MSP stack # + * # # # # Reserved by _Min_Stack_Size # + * ############################################################################ + * ^-- RAM start ^-- _end _estack, RAM end --^ + * @endverbatim + * + * This implementation starts allocating at the '_end' linker symbol + * The '_Min_Stack_Size' linker symbol reserves a memory for the MSP stack + * The implementation considers '_estack' linker symbol to be RAM end + * NOTE: If the MSP stack, at any point during execution, grows larger than the + * reserved size, please increase the '_Min_Stack_Size'. + * + * @param incr Memory size + * @return Pointer to allocated memory + */ +void *_sbrk(ptrdiff_t incr) +{ + extern uint8_t _end; /* Symbol defined in the linker script */ + extern uint8_t _estack; /* Symbol defined in the linker script */ + extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */ + const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size; + const uint8_t *max_heap = (uint8_t *)stack_limit; + uint8_t *prev_heap_end; + + /* Initialize heap end at first call */ + if (NULL == __sbrk_heap_end) { + __sbrk_heap_end = &_end; + } + + /* Protect heap from growing into the reserved MSP stack */ + if (__sbrk_heap_end + incr > max_heap) { + errno = ENOMEM; + return (void *)-1; + } + + prev_heap_end = __sbrk_heap_end; + __sbrk_heap_end += incr; + + return (void *)prev_heap_end; +} diff --git a/Lib/Vendor/STM32_HAL_LL/Common/stm32common.cmake b/Lib/Vendor/STM32_HAL_LL/Common/stm32common.cmake new file mode 100644 index 000000000..aecc5794f --- /dev/null +++ b/Lib/Vendor/STM32_HAL_LL/Common/stm32common.cmake @@ -0,0 +1,12 @@ +add_library(STM32_Cube_Common INTERFACE) + +target_include_directories(STM32_Cube_Common + INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/Inc +) + +target_sources(STM32_Cube_Common + INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/Src/syscalls.c + ${CMAKE_CURRENT_LIST_DIR}/Src/sysmem.c +) diff --git a/Lib/Vendor/STM32_HAL_LL/cube.cmake b/Lib/Vendor/STM32_HAL_LL/cube.cmake index 132e06a9c..049574809 100644 --- a/Lib/Vendor/STM32_HAL_LL/cube.cmake +++ b/Lib/Vendor/STM32_HAL_LL/cube.cmake @@ -1,5 +1,16 @@ +include("${CMAKE_CURRENT_LIST_DIR}/Common/stm32common.cmake") + include("${CMAKE_CURRENT_LIST_DIR}/STM32G4xx/stm32g4xx.cmake") +target_link_libraries(STM32_HAL_LL_G4xx INTERFACE STM32_Cube_Common) +target_sources(STM32_HAL_LL_G4xx INTERFACE ${CMAKE_CURRENT_LIST_DIR}/CMSIS_Integration/system_stm32g4xx.c) + include("${CMAKE_CURRENT_LIST_DIR}/STM32U5xx/stm32u5xx.cmake") +target_link_libraries(STM32_HAL_LL_U5xx INTERFACE STM32_Cube_Common) +target_sources(STM32_HAL_LL_U5xx INTERFACE ${CMAKE_CURRENT_LIST_DIR}/CMSIS_Integration/system_stm32u5xx.c) + include("${CMAKE_CURRENT_LIST_DIR}/STM32L4xx/stm32l4xx.cmake") +target_link_libraries(STM32_HAL_LL_L4xx INTERFACE STM32_Cube_Common) +target_sources(STM32_HAL_LL_L4xx INTERFACE ${CMAKE_CURRENT_LIST_DIR}/CMSIS_Integration/system_stm32l4xx.c) -# Add other STM32 series as needed +# Add other STM32 series as needed by including and linking them similarly to above +# Note that system files are different than other files, they are added seperately to prevent version conflicts From a0786fe4f457c2dbe245ec7e2d6535073d79acd7 Mon Sep 17 00:00:00 2001 From: Daniel Hansen Date: Thu, 19 Feb 2026 02:50:49 -0800 Subject: [PATCH 2/6] Cleanup **all** the files Signed-off-by: Daniel Hansen --- AnalogCalibration/CMakeLists.txt | 3 - AnalogCalibration/Core/Inc/stm32_assert.h | 52 --- AnalogCalibration/Core/Src/system_stm32g4xx.c | 289 -------------- BLINKY/G4BLINKY/CMakeLists.txt | 3 - BLINKY/G4BLINKY/Core/Src/system_stm32g4xx.c | 289 -------------- BLINKY/G4HELLO/CMakeLists.txt | 3 - BLINKY/G4HELLO/Core/Src/system_stm32g4xx.c | 289 -------------- BLINKY/L4BLINKY/CMakeLists.txt | 3 - BLINKY/L4BLINKY/Core/Src/system_stm32l4xx.c | 338 ---------------- BLINKY/U5BLINKY/CMakeLists.txt | 3 - BLINKY/U5BLINKY/Core/Src/system_stm32u5xx.c | 364 ------------------ CCU/CMakeLists.txt | 3 - CCU/Core/Inc/stm32_assert.h | 52 --- CCU/Core/Src/system_stm32g4xx.c | 289 -------------- ECU/CMakeLists.txt | 3 - ECU/Core/Inc/stm32_assert.h | 52 --- ECU/Core/Src/system_stm32g4xx.c | 289 -------------- G4ADCTESTING/CMakeLists.txt | 3 - G4ADCTESTING/Core/Inc/stm32_assert.h | 52 --- G4ADCTESTING/Core/Src/system_stm32g4xx.c | 289 -------------- G4CANTESTING/CMakeLists.txt | 3 - G4CANTESTING/Core/Inc/stm32_assert.h | 52 --- G4CANTESTING/Core/Src/system_stm32g4xx.c | 289 -------------- G4PERTESTING/CMakeLists.txt | 3 - G4PERTESTING/Core/Inc/stm32_assert.h | 52 --- G4PERTESTING/Core/Src/system_stm32g4xx.c | 289 -------------- .../STM32G4xx/Inc/stm32_assert_template.h | 53 --- .../STM32L4xx/Inc/stm32_assert_template.h | 53 --- .../STM32U5xx/Inc/stm32_assert_template.h | 53 --- Onboarding/W3_G4SPI_Receive/CMakeLists.txt | 3 - .../Core/Src/system_stm32g4xx.c | 289 -------------- Onboarding/W3_G4SPI_Transmit/CMakeLists.txt | 3 - .../Core/Src/system_stm32g4xx.c | 289 -------------- 33 files changed, 4099 deletions(-) delete mode 100644 AnalogCalibration/Core/Inc/stm32_assert.h delete mode 100644 AnalogCalibration/Core/Src/system_stm32g4xx.c delete mode 100644 BLINKY/G4BLINKY/Core/Src/system_stm32g4xx.c delete mode 100644 BLINKY/G4HELLO/Core/Src/system_stm32g4xx.c delete mode 100644 BLINKY/L4BLINKY/Core/Src/system_stm32l4xx.c delete mode 100644 BLINKY/U5BLINKY/Core/Src/system_stm32u5xx.c delete mode 100644 CCU/Core/Inc/stm32_assert.h delete mode 100644 CCU/Core/Src/system_stm32g4xx.c delete mode 100644 ECU/Core/Inc/stm32_assert.h delete mode 100644 ECU/Core/Src/system_stm32g4xx.c delete mode 100644 G4ADCTESTING/Core/Inc/stm32_assert.h delete mode 100644 G4ADCTESTING/Core/Src/system_stm32g4xx.c delete mode 100644 G4CANTESTING/Core/Inc/stm32_assert.h delete mode 100644 G4CANTESTING/Core/Src/system_stm32g4xx.c delete mode 100644 G4PERTESTING/Core/Inc/stm32_assert.h delete mode 100644 G4PERTESTING/Core/Src/system_stm32g4xx.c delete mode 100644 Lib/Vendor/STM32_HAL_LL/STM32G4xx/Inc/stm32_assert_template.h delete mode 100644 Lib/Vendor/STM32_HAL_LL/STM32L4xx/Inc/stm32_assert_template.h delete mode 100644 Lib/Vendor/STM32_HAL_LL/STM32U5xx/Inc/stm32_assert_template.h delete mode 100644 Onboarding/W3_G4SPI_Receive/Core/Src/system_stm32g4xx.c delete mode 100644 Onboarding/W3_G4SPI_Transmit/Core/Src/system_stm32g4xx.c diff --git a/AnalogCalibration/CMakeLists.txt b/AnalogCalibration/CMakeLists.txt index d731f6606..df46188cc 100644 --- a/AnalogCalibration/CMakeLists.txt +++ b/AnalogCalibration/CMakeLists.txt @@ -36,9 +36,6 @@ target_sources( Core/Src/main.c Core/Src/stm32g4xx_hal_msp.c Core/Src/stm32g4xx_it.c - Core/Src/syscalls.c - Core/Src/sysmem.c - Core/Src/system_stm32g4xx.c ) target_link_libraries(${PROJECT_NAME}_USER_CODE INTERFACE GR_ADC) diff --git a/AnalogCalibration/Core/Inc/stm32_assert.h b/AnalogCalibration/Core/Inc/stm32_assert.h deleted file mode 100644 index 92460620f..000000000 --- a/AnalogCalibration/Core/Inc/stm32_assert.h +++ /dev/null @@ -1,52 +0,0 @@ -/* USER CODE BEGIN Header */ -/** - ****************************************************************************** - * @file stm32_assert.h - * @author MCD Application Team - * @brief STM32 assert file. - ****************************************************************************** - * @attention - * - * Copyright (c) 2019 STMicroelectronics. - * All rights reserved. - * - * This software is licensed under terms that can be found in the LICENSE file - * in the root directory of this software component. - * If no LICENSE file comes with this software, it is provided AS-IS. - * - ****************************************************************************** - */ -/* USER CODE END Header */ -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32_ASSERT_H -#define __STM32_ASSERT_H - -#ifdef __cplusplus -extern "C" { -#endif - -/* Exported types ------------------------------------------------------------*/ -/* Exported constants --------------------------------------------------------*/ -/* Includes ------------------------------------------------------------------*/ -/* Exported macro ------------------------------------------------------------*/ -#ifdef USE_FULL_ASSERT -/** - * @brief The assert_param macro is used for function's parameters check. - * @param expr: If expr is false, it calls assert_failed function - * which reports the name of the source file and the source - * line number of the call that failed. - * If expr is true, it returns no value. - * @retval None - */ -#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__)) -/* Exported functions ------------------------------------------------------- */ -void assert_failed(uint8_t *file, uint32_t line); -#else -#define assert_param(expr) ((void)0U) -#endif /* USE_FULL_ASSERT */ - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32_ASSERT_H */ diff --git a/AnalogCalibration/Core/Src/system_stm32g4xx.c b/AnalogCalibration/Core/Src/system_stm32g4xx.c deleted file mode 100644 index 990865b88..000000000 --- a/AnalogCalibration/Core/Src/system_stm32g4xx.c +++ /dev/null @@ -1,289 +0,0 @@ -/** - ****************************************************************************** - * @file system_stm32g4xx.c - * @author MCD Application Team - * @brief CMSIS Cortex-M4 Device Peripheral Access Layer System Source File - * - * This file provides two functions and one global variable to be called from - * user application: - * - SystemInit(): This function is called at startup just after reset and - * before branch to main program. This call is made inside - * the "startup_stm32g4xx.s" file. - * - * - SystemCoreClock variable: Contains the core clock (HCLK), it can be - *used by the user application to setup the SysTick timer or configure other - *parameters. - * - * - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must - * be called whenever the core clock is changed - * during program execution. - * - * After each device reset the HSI (16 MHz) is used as system clock source. - * Then SystemInit() function is called, in "startup_stm32g4xx.s" file, to - * configure the system clock before to branch to main program. - * - * This file configures the system clock as follows: - *============================================================================= - *----------------------------------------------------------------------------- - * System Clock source | HSI - *----------------------------------------------------------------------------- - * SYSCLK(Hz) | 16000000 - *----------------------------------------------------------------------------- - * HCLK(Hz) | 16000000 - *----------------------------------------------------------------------------- - * AHB Prescaler | 1 - *----------------------------------------------------------------------------- - * APB1 Prescaler | 1 - *----------------------------------------------------------------------------- - * APB2 Prescaler | 1 - *----------------------------------------------------------------------------- - * PLL_M | 1 - *----------------------------------------------------------------------------- - * PLL_N | 16 - *----------------------------------------------------------------------------- - * PLL_P | 7 - *----------------------------------------------------------------------------- - * PLL_Q | 2 - *----------------------------------------------------------------------------- - * PLL_R | 2 - *----------------------------------------------------------------------------- - * Require 48MHz for RNG | Disabled - *----------------------------------------------------------------------------- - *============================================================================= - ****************************************************************************** - * @attention - * - * Copyright (c) 2019 STMicroelectronics. - * All rights reserved. - * - * This software is licensed under terms that can be found in the LICENSE file - * in the root directory of this software component. - * If no LICENSE file comes with this software, it is provided AS-IS. - * - ****************************************************************************** - */ - -/** @addtogroup CMSIS - * @{ - */ - -/** @addtogroup stm32g4xx_system - * @{ - */ - -/** @addtogroup STM32G4xx_System_Private_Includes - * @{ - */ - -#include "stm32g4xx.h" - -#if !defined(HSE_VALUE) -#define HSE_VALUE 24000000U /*!< Value of the External oscillator in Hz */ -#endif /* HSE_VALUE */ - -#if !defined(HSI_VALUE) -#define HSI_VALUE 16000000U /*!< Value of the Internal oscillator in Hz*/ -#endif /* HSI_VALUE */ - -/** - * @} - */ - -/** @addtogroup STM32G4xx_System_Private_TypesDefinitions - * @{ - */ - -/** - * @} - */ - -/** @addtogroup STM32G4xx_System_Private_Defines - * @{ - */ - -/************************* Miscellaneous Configuration ************************/ -/* Note: Following vector table addresses must be defined in line with linker - configuration. */ -/*!< Uncomment the following line if you need to relocate the vector table - anywhere in Flash or Sram, else the vector table is kept at the automatic - remap of boot address selected */ -/* #define USER_VECT_TAB_ADDRESS */ - -#if defined(USER_VECT_TAB_ADDRESS) -/*!< Uncomment the following line if you need to relocate your vector Table - in Sram else user remap will be done in Flash. */ -/* #define VECT_TAB_SRAM */ -#if defined(VECT_TAB_SRAM) -#define VECT_TAB_BASE_ADDRESS \ - SRAM_BASE /*!< Vector Table base address field. \ - This value must be a multiple of 0x200. */ -#define VECT_TAB_OFFSET \ - 0x00000000U /*!< Vector Table base offset field. \ - This value must be a multiple of 0x200. */ -#else -#define VECT_TAB_BASE_ADDRESS \ - FLASH_BASE /*!< Vector Table base address field. \ - This value must be a multiple of 0x200. */ -#define VECT_TAB_OFFSET \ - 0x00000000U /*!< Vector Table base offset field. \ - This value must be a multiple of 0x200. */ -#endif /* VECT_TAB_SRAM */ -#endif /* USER_VECT_TAB_ADDRESS */ -/******************************************************************************/ -/** - * @} - */ - -/** @addtogroup STM32G4xx_System_Private_Macros - * @{ - */ - -/** - * @} - */ - -/** @addtogroup STM32G4xx_System_Private_Variables - * @{ - */ -/* The SystemCoreClock variable is updated in three ways: - 1) by calling CMSIS function SystemCoreClockUpdate() - 2) by calling HAL API function HAL_RCC_GetHCLKFreq() - 3) each time HAL_RCC_ClockConfig() is called to configure the system clock - frequency Note: If you use this function to configure the system clock; then - there is no need to call the 2 first functions listed above, since - SystemCoreClock variable is updated automatically. -*/ -uint32_t SystemCoreClock = HSI_VALUE; - -const uint8_t AHBPrescTable[16] = {0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U, 6U, 7U, 8U, 9U}; -const uint8_t APBPrescTable[8] = {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U}; - -/** - * @} - */ - -/** @addtogroup STM32G4xx_System_Private_FunctionPrototypes - * @{ - */ - -/** - * @} - */ - -/** @addtogroup STM32G4xx_System_Private_Functions - * @{ - */ - -/** - * @brief Setup the microcontroller system. - * @param None - * @retval None - */ - -void SystemInit(void) -{ -/* FPU settings ------------------------------------------------------------*/ -#if (__FPU_PRESENT == 1) && (__FPU_USED == 1) - SCB->CPACR |= ((3UL << (10 * 2)) | (3UL << (11 * 2))); /* set CP10 and CP11 Full Access */ -#endif - - /* Configure the Vector Table location add offset address - * ------------------*/ -#if defined(USER_VECT_TAB_ADDRESS) - SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */ -#endif /* USER_VECT_TAB_ADDRESS */ -} - -/** - * @brief Update SystemCoreClock variable according to Clock Register Values. - * The SystemCoreClock variable contains the core clock (HCLK), it can - * be used by the user application to setup the SysTick timer or - * configure other parameters. - * - * @note Each time the core clock (HCLK) changes, this function must be called - * to update SystemCoreClock variable value. Otherwise, any - * configuration based on this variable will be incorrect. - * - * @note - The system frequency computed by this function is not the real - * frequency in the chip. It is calculated based on the predefined - * constant and the selected clock source: - * - * - If SYSCLK source is HSI, SystemCoreClock will contain the - * HSI_VALUE(**) - * - * - If SYSCLK source is HSE, SystemCoreClock will contain the - * HSE_VALUE(***) - * - * - If SYSCLK source is PLL, SystemCoreClock will contain the - * HSE_VALUE(***) or HSI_VALUE(*) multiplied/divided by the PLL factors. - * - * (**) HSI_VALUE is a constant defined in stm32g4xx_hal.h file (default - * value 16 MHz) but the real value may vary depending on the variations in - * voltage and temperature. - * - * (***) HSE_VALUE is a constant defined in stm32g4xx_hal.h file - * (default value 24 MHz), user has to ensure that HSE_VALUE is same as the real - * frequency of the crystal used. Otherwise, this function may - * have wrong result. - * - * - The result of this function could be not correct when using - * fractional value for HSE crystal. - * - * @param None - * @retval None - */ -void SystemCoreClockUpdate(void) -{ - uint32_t tmp, pllvco, pllr, pllsource, pllm; - - /* Get SYSCLK source - * -------------------------------------------------------*/ - switch (RCC->CFGR & RCC_CFGR_SWS) { - case 0x04: /* HSI used as system clock source */ - SystemCoreClock = HSI_VALUE; - break; - - case 0x08: /* HSE used as system clock source */ - SystemCoreClock = HSE_VALUE; - break; - - case 0x0C: /* PLL used as system clock source */ - /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN - SYSCLK = PLL_VCO / PLLR - */ - pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC); - pllm = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLM) >> 4) + 1U; - if (pllsource == 0x02UL) /* HSI used as PLL clock source */ - { - pllvco = (HSI_VALUE / pllm); - } else /* HSE used as PLL clock source */ - { - pllvco = (HSE_VALUE / pllm); - } - pllvco = pllvco * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 8); - pllr = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> 25) + 1U) * 2U; - SystemCoreClock = pllvco / pllr; - break; - - default: - break; - } - /* Compute HCLK clock frequency - * --------------------------------------------*/ - /* Get HCLK prescaler */ - tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)]; - /* HCLK clock frequency */ - SystemCoreClock >>= tmp; -} - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ diff --git a/BLINKY/G4BLINKY/CMakeLists.txt b/BLINKY/G4BLINKY/CMakeLists.txt index 637adcd44..5e27c8df8 100644 --- a/BLINKY/G4BLINKY/CMakeLists.txt +++ b/BLINKY/G4BLINKY/CMakeLists.txt @@ -38,9 +38,6 @@ target_sources( Core/Src/spi.c Core/Src/stm32g4xx_it.c Core/Src/stm32g4xx_hal_msp.c - Core/Src/system_stm32g4xx.c - Core/Src/sysmem.c - Core/Src/syscalls.c ) target_link_libraries(${GR_PROJECT_NAME}_USER_CODE INTERFACE) diff --git a/BLINKY/G4BLINKY/Core/Src/system_stm32g4xx.c b/BLINKY/G4BLINKY/Core/Src/system_stm32g4xx.c deleted file mode 100644 index 990865b88..000000000 --- a/BLINKY/G4BLINKY/Core/Src/system_stm32g4xx.c +++ /dev/null @@ -1,289 +0,0 @@ -/** - ****************************************************************************** - * @file system_stm32g4xx.c - * @author MCD Application Team - * @brief CMSIS Cortex-M4 Device Peripheral Access Layer System Source File - * - * This file provides two functions and one global variable to be called from - * user application: - * - SystemInit(): This function is called at startup just after reset and - * before branch to main program. This call is made inside - * the "startup_stm32g4xx.s" file. - * - * - SystemCoreClock variable: Contains the core clock (HCLK), it can be - *used by the user application to setup the SysTick timer or configure other - *parameters. - * - * - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must - * be called whenever the core clock is changed - * during program execution. - * - * After each device reset the HSI (16 MHz) is used as system clock source. - * Then SystemInit() function is called, in "startup_stm32g4xx.s" file, to - * configure the system clock before to branch to main program. - * - * This file configures the system clock as follows: - *============================================================================= - *----------------------------------------------------------------------------- - * System Clock source | HSI - *----------------------------------------------------------------------------- - * SYSCLK(Hz) | 16000000 - *----------------------------------------------------------------------------- - * HCLK(Hz) | 16000000 - *----------------------------------------------------------------------------- - * AHB Prescaler | 1 - *----------------------------------------------------------------------------- - * APB1 Prescaler | 1 - *----------------------------------------------------------------------------- - * APB2 Prescaler | 1 - *----------------------------------------------------------------------------- - * PLL_M | 1 - *----------------------------------------------------------------------------- - * PLL_N | 16 - *----------------------------------------------------------------------------- - * PLL_P | 7 - *----------------------------------------------------------------------------- - * PLL_Q | 2 - *----------------------------------------------------------------------------- - * PLL_R | 2 - *----------------------------------------------------------------------------- - * Require 48MHz for RNG | Disabled - *----------------------------------------------------------------------------- - *============================================================================= - ****************************************************************************** - * @attention - * - * Copyright (c) 2019 STMicroelectronics. - * All rights reserved. - * - * This software is licensed under terms that can be found in the LICENSE file - * in the root directory of this software component. - * If no LICENSE file comes with this software, it is provided AS-IS. - * - ****************************************************************************** - */ - -/** @addtogroup CMSIS - * @{ - */ - -/** @addtogroup stm32g4xx_system - * @{ - */ - -/** @addtogroup STM32G4xx_System_Private_Includes - * @{ - */ - -#include "stm32g4xx.h" - -#if !defined(HSE_VALUE) -#define HSE_VALUE 24000000U /*!< Value of the External oscillator in Hz */ -#endif /* HSE_VALUE */ - -#if !defined(HSI_VALUE) -#define HSI_VALUE 16000000U /*!< Value of the Internal oscillator in Hz*/ -#endif /* HSI_VALUE */ - -/** - * @} - */ - -/** @addtogroup STM32G4xx_System_Private_TypesDefinitions - * @{ - */ - -/** - * @} - */ - -/** @addtogroup STM32G4xx_System_Private_Defines - * @{ - */ - -/************************* Miscellaneous Configuration ************************/ -/* Note: Following vector table addresses must be defined in line with linker - configuration. */ -/*!< Uncomment the following line if you need to relocate the vector table - anywhere in Flash or Sram, else the vector table is kept at the automatic - remap of boot address selected */ -/* #define USER_VECT_TAB_ADDRESS */ - -#if defined(USER_VECT_TAB_ADDRESS) -/*!< Uncomment the following line if you need to relocate your vector Table - in Sram else user remap will be done in Flash. */ -/* #define VECT_TAB_SRAM */ -#if defined(VECT_TAB_SRAM) -#define VECT_TAB_BASE_ADDRESS \ - SRAM_BASE /*!< Vector Table base address field. \ - This value must be a multiple of 0x200. */ -#define VECT_TAB_OFFSET \ - 0x00000000U /*!< Vector Table base offset field. \ - This value must be a multiple of 0x200. */ -#else -#define VECT_TAB_BASE_ADDRESS \ - FLASH_BASE /*!< Vector Table base address field. \ - This value must be a multiple of 0x200. */ -#define VECT_TAB_OFFSET \ - 0x00000000U /*!< Vector Table base offset field. \ - This value must be a multiple of 0x200. */ -#endif /* VECT_TAB_SRAM */ -#endif /* USER_VECT_TAB_ADDRESS */ -/******************************************************************************/ -/** - * @} - */ - -/** @addtogroup STM32G4xx_System_Private_Macros - * @{ - */ - -/** - * @} - */ - -/** @addtogroup STM32G4xx_System_Private_Variables - * @{ - */ -/* The SystemCoreClock variable is updated in three ways: - 1) by calling CMSIS function SystemCoreClockUpdate() - 2) by calling HAL API function HAL_RCC_GetHCLKFreq() - 3) each time HAL_RCC_ClockConfig() is called to configure the system clock - frequency Note: If you use this function to configure the system clock; then - there is no need to call the 2 first functions listed above, since - SystemCoreClock variable is updated automatically. -*/ -uint32_t SystemCoreClock = HSI_VALUE; - -const uint8_t AHBPrescTable[16] = {0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U, 6U, 7U, 8U, 9U}; -const uint8_t APBPrescTable[8] = {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U}; - -/** - * @} - */ - -/** @addtogroup STM32G4xx_System_Private_FunctionPrototypes - * @{ - */ - -/** - * @} - */ - -/** @addtogroup STM32G4xx_System_Private_Functions - * @{ - */ - -/** - * @brief Setup the microcontroller system. - * @param None - * @retval None - */ - -void SystemInit(void) -{ -/* FPU settings ------------------------------------------------------------*/ -#if (__FPU_PRESENT == 1) && (__FPU_USED == 1) - SCB->CPACR |= ((3UL << (10 * 2)) | (3UL << (11 * 2))); /* set CP10 and CP11 Full Access */ -#endif - - /* Configure the Vector Table location add offset address - * ------------------*/ -#if defined(USER_VECT_TAB_ADDRESS) - SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */ -#endif /* USER_VECT_TAB_ADDRESS */ -} - -/** - * @brief Update SystemCoreClock variable according to Clock Register Values. - * The SystemCoreClock variable contains the core clock (HCLK), it can - * be used by the user application to setup the SysTick timer or - * configure other parameters. - * - * @note Each time the core clock (HCLK) changes, this function must be called - * to update SystemCoreClock variable value. Otherwise, any - * configuration based on this variable will be incorrect. - * - * @note - The system frequency computed by this function is not the real - * frequency in the chip. It is calculated based on the predefined - * constant and the selected clock source: - * - * - If SYSCLK source is HSI, SystemCoreClock will contain the - * HSI_VALUE(**) - * - * - If SYSCLK source is HSE, SystemCoreClock will contain the - * HSE_VALUE(***) - * - * - If SYSCLK source is PLL, SystemCoreClock will contain the - * HSE_VALUE(***) or HSI_VALUE(*) multiplied/divided by the PLL factors. - * - * (**) HSI_VALUE is a constant defined in stm32g4xx_hal.h file (default - * value 16 MHz) but the real value may vary depending on the variations in - * voltage and temperature. - * - * (***) HSE_VALUE is a constant defined in stm32g4xx_hal.h file - * (default value 24 MHz), user has to ensure that HSE_VALUE is same as the real - * frequency of the crystal used. Otherwise, this function may - * have wrong result. - * - * - The result of this function could be not correct when using - * fractional value for HSE crystal. - * - * @param None - * @retval None - */ -void SystemCoreClockUpdate(void) -{ - uint32_t tmp, pllvco, pllr, pllsource, pllm; - - /* Get SYSCLK source - * -------------------------------------------------------*/ - switch (RCC->CFGR & RCC_CFGR_SWS) { - case 0x04: /* HSI used as system clock source */ - SystemCoreClock = HSI_VALUE; - break; - - case 0x08: /* HSE used as system clock source */ - SystemCoreClock = HSE_VALUE; - break; - - case 0x0C: /* PLL used as system clock source */ - /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN - SYSCLK = PLL_VCO / PLLR - */ - pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC); - pllm = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLM) >> 4) + 1U; - if (pllsource == 0x02UL) /* HSI used as PLL clock source */ - { - pllvco = (HSI_VALUE / pllm); - } else /* HSE used as PLL clock source */ - { - pllvco = (HSE_VALUE / pllm); - } - pllvco = pllvco * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 8); - pllr = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> 25) + 1U) * 2U; - SystemCoreClock = pllvco / pllr; - break; - - default: - break; - } - /* Compute HCLK clock frequency - * --------------------------------------------*/ - /* Get HCLK prescaler */ - tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)]; - /* HCLK clock frequency */ - SystemCoreClock >>= tmp; -} - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ diff --git a/BLINKY/G4HELLO/CMakeLists.txt b/BLINKY/G4HELLO/CMakeLists.txt index 53b578956..954f68470 100644 --- a/BLINKY/G4HELLO/CMakeLists.txt +++ b/BLINKY/G4HELLO/CMakeLists.txt @@ -33,9 +33,6 @@ target_sources( Core/Src/main.c Core/Src/stm32g4xx_it.c Core/Src/stm32g4xx_hal_msp.c - Core/Src/system_stm32g4xx.c - Core/Src/sysmem.c - Core/Src/syscalls.c ) target_link_libraries(${GR_PROJECT_NAME}_USER_CODE INTERFACE) diff --git a/BLINKY/G4HELLO/Core/Src/system_stm32g4xx.c b/BLINKY/G4HELLO/Core/Src/system_stm32g4xx.c deleted file mode 100644 index 990865b88..000000000 --- a/BLINKY/G4HELLO/Core/Src/system_stm32g4xx.c +++ /dev/null @@ -1,289 +0,0 @@ -/** - ****************************************************************************** - * @file system_stm32g4xx.c - * @author MCD Application Team - * @brief CMSIS Cortex-M4 Device Peripheral Access Layer System Source File - * - * This file provides two functions and one global variable to be called from - * user application: - * - SystemInit(): This function is called at startup just after reset and - * before branch to main program. This call is made inside - * the "startup_stm32g4xx.s" file. - * - * - SystemCoreClock variable: Contains the core clock (HCLK), it can be - *used by the user application to setup the SysTick timer or configure other - *parameters. - * - * - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must - * be called whenever the core clock is changed - * during program execution. - * - * After each device reset the HSI (16 MHz) is used as system clock source. - * Then SystemInit() function is called, in "startup_stm32g4xx.s" file, to - * configure the system clock before to branch to main program. - * - * This file configures the system clock as follows: - *============================================================================= - *----------------------------------------------------------------------------- - * System Clock source | HSI - *----------------------------------------------------------------------------- - * SYSCLK(Hz) | 16000000 - *----------------------------------------------------------------------------- - * HCLK(Hz) | 16000000 - *----------------------------------------------------------------------------- - * AHB Prescaler | 1 - *----------------------------------------------------------------------------- - * APB1 Prescaler | 1 - *----------------------------------------------------------------------------- - * APB2 Prescaler | 1 - *----------------------------------------------------------------------------- - * PLL_M | 1 - *----------------------------------------------------------------------------- - * PLL_N | 16 - *----------------------------------------------------------------------------- - * PLL_P | 7 - *----------------------------------------------------------------------------- - * PLL_Q | 2 - *----------------------------------------------------------------------------- - * PLL_R | 2 - *----------------------------------------------------------------------------- - * Require 48MHz for RNG | Disabled - *----------------------------------------------------------------------------- - *============================================================================= - ****************************************************************************** - * @attention - * - * Copyright (c) 2019 STMicroelectronics. - * All rights reserved. - * - * This software is licensed under terms that can be found in the LICENSE file - * in the root directory of this software component. - * If no LICENSE file comes with this software, it is provided AS-IS. - * - ****************************************************************************** - */ - -/** @addtogroup CMSIS - * @{ - */ - -/** @addtogroup stm32g4xx_system - * @{ - */ - -/** @addtogroup STM32G4xx_System_Private_Includes - * @{ - */ - -#include "stm32g4xx.h" - -#if !defined(HSE_VALUE) -#define HSE_VALUE 24000000U /*!< Value of the External oscillator in Hz */ -#endif /* HSE_VALUE */ - -#if !defined(HSI_VALUE) -#define HSI_VALUE 16000000U /*!< Value of the Internal oscillator in Hz*/ -#endif /* HSI_VALUE */ - -/** - * @} - */ - -/** @addtogroup STM32G4xx_System_Private_TypesDefinitions - * @{ - */ - -/** - * @} - */ - -/** @addtogroup STM32G4xx_System_Private_Defines - * @{ - */ - -/************************* Miscellaneous Configuration ************************/ -/* Note: Following vector table addresses must be defined in line with linker - configuration. */ -/*!< Uncomment the following line if you need to relocate the vector table - anywhere in Flash or Sram, else the vector table is kept at the automatic - remap of boot address selected */ -/* #define USER_VECT_TAB_ADDRESS */ - -#if defined(USER_VECT_TAB_ADDRESS) -/*!< Uncomment the following line if you need to relocate your vector Table - in Sram else user remap will be done in Flash. */ -/* #define VECT_TAB_SRAM */ -#if defined(VECT_TAB_SRAM) -#define VECT_TAB_BASE_ADDRESS \ - SRAM_BASE /*!< Vector Table base address field. \ - This value must be a multiple of 0x200. */ -#define VECT_TAB_OFFSET \ - 0x00000000U /*!< Vector Table base offset field. \ - This value must be a multiple of 0x200. */ -#else -#define VECT_TAB_BASE_ADDRESS \ - FLASH_BASE /*!< Vector Table base address field. \ - This value must be a multiple of 0x200. */ -#define VECT_TAB_OFFSET \ - 0x00000000U /*!< Vector Table base offset field. \ - This value must be a multiple of 0x200. */ -#endif /* VECT_TAB_SRAM */ -#endif /* USER_VECT_TAB_ADDRESS */ -/******************************************************************************/ -/** - * @} - */ - -/** @addtogroup STM32G4xx_System_Private_Macros - * @{ - */ - -/** - * @} - */ - -/** @addtogroup STM32G4xx_System_Private_Variables - * @{ - */ -/* The SystemCoreClock variable is updated in three ways: - 1) by calling CMSIS function SystemCoreClockUpdate() - 2) by calling HAL API function HAL_RCC_GetHCLKFreq() - 3) each time HAL_RCC_ClockConfig() is called to configure the system clock - frequency Note: If you use this function to configure the system clock; then - there is no need to call the 2 first functions listed above, since - SystemCoreClock variable is updated automatically. -*/ -uint32_t SystemCoreClock = HSI_VALUE; - -const uint8_t AHBPrescTable[16] = {0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U, 6U, 7U, 8U, 9U}; -const uint8_t APBPrescTable[8] = {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U}; - -/** - * @} - */ - -/** @addtogroup STM32G4xx_System_Private_FunctionPrototypes - * @{ - */ - -/** - * @} - */ - -/** @addtogroup STM32G4xx_System_Private_Functions - * @{ - */ - -/** - * @brief Setup the microcontroller system. - * @param None - * @retval None - */ - -void SystemInit(void) -{ -/* FPU settings ------------------------------------------------------------*/ -#if (__FPU_PRESENT == 1) && (__FPU_USED == 1) - SCB->CPACR |= ((3UL << (10 * 2)) | (3UL << (11 * 2))); /* set CP10 and CP11 Full Access */ -#endif - - /* Configure the Vector Table location add offset address - * ------------------*/ -#if defined(USER_VECT_TAB_ADDRESS) - SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */ -#endif /* USER_VECT_TAB_ADDRESS */ -} - -/** - * @brief Update SystemCoreClock variable according to Clock Register Values. - * The SystemCoreClock variable contains the core clock (HCLK), it can - * be used by the user application to setup the SysTick timer or - * configure other parameters. - * - * @note Each time the core clock (HCLK) changes, this function must be called - * to update SystemCoreClock variable value. Otherwise, any - * configuration based on this variable will be incorrect. - * - * @note - The system frequency computed by this function is not the real - * frequency in the chip. It is calculated based on the predefined - * constant and the selected clock source: - * - * - If SYSCLK source is HSI, SystemCoreClock will contain the - * HSI_VALUE(**) - * - * - If SYSCLK source is HSE, SystemCoreClock will contain the - * HSE_VALUE(***) - * - * - If SYSCLK source is PLL, SystemCoreClock will contain the - * HSE_VALUE(***) or HSI_VALUE(*) multiplied/divided by the PLL factors. - * - * (**) HSI_VALUE is a constant defined in stm32g4xx_hal.h file (default - * value 16 MHz) but the real value may vary depending on the variations in - * voltage and temperature. - * - * (***) HSE_VALUE is a constant defined in stm32g4xx_hal.h file - * (default value 24 MHz), user has to ensure that HSE_VALUE is same as the real - * frequency of the crystal used. Otherwise, this function may - * have wrong result. - * - * - The result of this function could be not correct when using - * fractional value for HSE crystal. - * - * @param None - * @retval None - */ -void SystemCoreClockUpdate(void) -{ - uint32_t tmp, pllvco, pllr, pllsource, pllm; - - /* Get SYSCLK source - * -------------------------------------------------------*/ - switch (RCC->CFGR & RCC_CFGR_SWS) { - case 0x04: /* HSI used as system clock source */ - SystemCoreClock = HSI_VALUE; - break; - - case 0x08: /* HSE used as system clock source */ - SystemCoreClock = HSE_VALUE; - break; - - case 0x0C: /* PLL used as system clock source */ - /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN - SYSCLK = PLL_VCO / PLLR - */ - pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC); - pllm = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLM) >> 4) + 1U; - if (pllsource == 0x02UL) /* HSI used as PLL clock source */ - { - pllvco = (HSI_VALUE / pllm); - } else /* HSE used as PLL clock source */ - { - pllvco = (HSE_VALUE / pllm); - } - pllvco = pllvco * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 8); - pllr = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> 25) + 1U) * 2U; - SystemCoreClock = pllvco / pllr; - break; - - default: - break; - } - /* Compute HCLK clock frequency - * --------------------------------------------*/ - /* Get HCLK prescaler */ - tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)]; - /* HCLK clock frequency */ - SystemCoreClock >>= tmp; -} - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ diff --git a/BLINKY/L4BLINKY/CMakeLists.txt b/BLINKY/L4BLINKY/CMakeLists.txt index fad12a97a..4a081c49e 100644 --- a/BLINKY/L4BLINKY/CMakeLists.txt +++ b/BLINKY/L4BLINKY/CMakeLists.txt @@ -32,9 +32,6 @@ target_sources( Core/Src/main.c Core/Src/stm32l4xx_hal_msp.c Core/Src/stm32l4xx_it.c - Core/Src/syscalls.c - Core/Src/sysmem.c - Core/Src/system_stm32l4xx.c Core/Src/usart.c ) diff --git a/BLINKY/L4BLINKY/Core/Src/system_stm32l4xx.c b/BLINKY/L4BLINKY/Core/Src/system_stm32l4xx.c deleted file mode 100644 index 3ec9f78a2..000000000 --- a/BLINKY/L4BLINKY/Core/Src/system_stm32l4xx.c +++ /dev/null @@ -1,338 +0,0 @@ -/** - ****************************************************************************** - * @file system_stm32l4xx.c - * @author MCD Application Team - * @brief CMSIS Cortex-M4 Device Peripheral Access Layer System Source File - * - * This file provides two functions and one global variable to be called from - * user application: - * - SystemInit(): This function is called at startup just after reset and - * before branch to main program. This call is made inside - * the "startup_stm32l4xx.s" file. - * - * - SystemCoreClock variable: Contains the core clock (HCLK), it can be - *used by the user application to setup the SysTick timer or configure other - *parameters. - * - * - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must - * be called whenever the core clock is changed - * during program execution. - * - * After each device reset the MSI (4 MHz) is used as system clock source. - * Then SystemInit() function is called, in "startup_stm32l4xx.s" file, to - * configure the system clock before to branch to main program. - * - * This file configures the system clock as follows: - *============================================================================= - *----------------------------------------------------------------------------- - * System Clock source | MSI - *----------------------------------------------------------------------------- - * SYSCLK(Hz) | 4000000 - *----------------------------------------------------------------------------- - * HCLK(Hz) | 4000000 - *----------------------------------------------------------------------------- - * AHB Prescaler | 1 - *----------------------------------------------------------------------------- - * APB1 Prescaler | 1 - *----------------------------------------------------------------------------- - * APB2 Prescaler | 1 - *----------------------------------------------------------------------------- - * PLL_M | 1 - *----------------------------------------------------------------------------- - * PLL_N | 8 - *----------------------------------------------------------------------------- - * PLL_P | 7 - *----------------------------------------------------------------------------- - * PLL_Q | 2 - *----------------------------------------------------------------------------- - * PLL_R | 2 - *----------------------------------------------------------------------------- - * PLLSAI1_P | NA - *----------------------------------------------------------------------------- - * PLLSAI1_Q | NA - *----------------------------------------------------------------------------- - * PLLSAI1_R | NA - *----------------------------------------------------------------------------- - * PLLSAI2_P | NA - *----------------------------------------------------------------------------- - * PLLSAI2_Q | NA - *----------------------------------------------------------------------------- - * PLLSAI2_R | NA - *----------------------------------------------------------------------------- - * Require 48MHz for USB OTG FS, | Disabled - * SDIO and RNG clock | - *----------------------------------------------------------------------------- - *============================================================================= - ****************************************************************************** - * @attention - * - * Copyright (c) 2017 STMicroelectronics. - * All rights reserved. - * - * This software is licensed under terms that can be found in the LICENSE file - * in the root directory of this software component. - * If no LICENSE file comes with this software, it is provided AS-IS. - * - ****************************************************************************** - */ - -/** @addtogroup CMSIS - * @{ - */ - -/** @addtogroup stm32l4xx_system - * @{ - */ - -/** @addtogroup STM32L4xx_System_Private_Includes - * @{ - */ - -#include "stm32l4xx.h" - -/** - * @} - */ - -/** @addtogroup STM32L4xx_System_Private_TypesDefinitions - * @{ - */ - -/** - * @} - */ - -/** @addtogroup STM32L4xx_System_Private_Defines - * @{ - */ - -#if !defined(HSE_VALUE) -#define HSE_VALUE 8000000U /*!< Value of the External oscillator in Hz */ -#endif /* HSE_VALUE */ - -#if !defined(MSI_VALUE) -#define MSI_VALUE 4000000U /*!< Value of the Internal oscillator in Hz*/ -#endif /* MSI_VALUE */ - -#if !defined(HSI_VALUE) -#define HSI_VALUE 16000000U /*!< Value of the Internal oscillator in Hz*/ -#endif /* HSI_VALUE */ - -/* Note: Following vector table addresses must be defined in line with linker - configuration. */ -/*!< Uncomment the following line if you need to relocate the vector table - anywhere in Flash or Sram, else the vector table is kept at the automatic - remap of boot address selected */ -/* #define USER_VECT_TAB_ADDRESS */ - -#if defined(USER_VECT_TAB_ADDRESS) -/*!< Uncomment the following line if you need to relocate your vector Table - in Sram else user remap will be done in Flash. */ -/* #define VECT_TAB_SRAM */ - -#if defined(VECT_TAB_SRAM) -#define VECT_TAB_BASE_ADDRESS \ - SRAM1_BASE /*!< Vector Table base address field. \ - This value must be a multiple of 0x200. */ -#define VECT_TAB_OFFSET \ - 0x00000000U /*!< Vector Table base offset field. \ - This value must be a multiple of 0x200. */ -#else -#define VECT_TAB_BASE_ADDRESS \ - FLASH_BASE /*!< Vector Table base address field. \ - This value must be a multiple of 0x200. */ -#define VECT_TAB_OFFSET \ - 0x00000000U /*!< Vector Table base offset field. \ - This value must be a multiple of 0x200. */ -#endif /* VECT_TAB_SRAM */ -#endif /* USER_VECT_TAB_ADDRESS */ - -/******************************************************************************/ -/** - * @} - */ - -/** @addtogroup STM32L4xx_System_Private_Macros - * @{ - */ - -/** - * @} - */ - -/** @addtogroup STM32L4xx_System_Private_Variables - * @{ - */ -/* The SystemCoreClock variable is updated in three ways: - 1) by calling CMSIS function SystemCoreClockUpdate() - 2) by calling HAL API function HAL_RCC_GetHCLKFreq() - 3) each time HAL_RCC_ClockConfig() is called to configure the system clock - frequency Note: If you use this function to configure the system clock; then - there is no need to call the 2 first functions listed above, since - SystemCoreClock variable is updated automatically. -*/ -uint32_t SystemCoreClock = 4000000U; - -const uint8_t AHBPrescTable[16] = {0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U, 6U, 7U, 8U, 9U}; -const uint8_t APBPrescTable[8] = {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U}; -const uint32_t MSIRangeTable[12] = {100000U, 200000U, 400000U, 800000U, 1000000U, 2000000U, 4000000U, 8000000U, 16000000U, 24000000U, 32000000U, 48000000U}; -/** - * @} - */ - -/** @addtogroup STM32L4xx_System_Private_FunctionPrototypes - * @{ - */ - -/** - * @} - */ - -/** @addtogroup STM32L4xx_System_Private_Functions - * @{ - */ - -/** - * @brief Setup the microcontroller system. - * @retval None - */ - -void SystemInit(void) -{ -#if defined(USER_VECT_TAB_ADDRESS) - /* Configure the Vector Table location - * -------------------------------------*/ - SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; -#endif - - /* FPU settings - * ------------------------------------------------------------*/ -#if (__FPU_PRESENT == 1) && (__FPU_USED == 1) - SCB->CPACR |= ((3UL << 20U) | (3UL << 22U)); /* set CP10 and CP11 Full Access */ -#endif -} - -/** - * @brief Update SystemCoreClock variable according to Clock Register Values. - * The SystemCoreClock variable contains the core clock (HCLK), it can - * be used by the user application to setup the SysTick timer or - * configure other parameters. - * - * @note Each time the core clock (HCLK) changes, this function must be called - * to update SystemCoreClock variable value. Otherwise, any - * configuration based on this variable will be incorrect. - * - * @note - The system frequency computed by this function is not the real - * frequency in the chip. It is calculated based on the predefined - * constant and the selected clock source: - * - * - If SYSCLK source is MSI, SystemCoreClock will contain the - * MSI_VALUE(*) - * - * - If SYSCLK source is HSI, SystemCoreClock will contain the - * HSI_VALUE(**) - * - * - If SYSCLK source is HSE, SystemCoreClock will contain the - * HSE_VALUE(***) - * - * - If SYSCLK source is PLL, SystemCoreClock will contain the - * HSE_VALUE(***) or HSI_VALUE(*) or MSI_VALUE(*) multiplied/divided by the PLL - * factors. - * - * (*) MSI_VALUE is a constant defined in stm32l4xx_hal.h file (default - * value 4 MHz) but the real value may vary depending on the variations in - * voltage and temperature. - * - * (**) HSI_VALUE is a constant defined in stm32l4xx_hal.h file (default - * value 16 MHz) but the real value may vary depending on the variations in - * voltage and temperature. - * - * (***) HSE_VALUE is a constant defined in stm32l4xx_hal.h file - * (default value 8 MHz), user has to ensure that HSE_VALUE is same as the real - * frequency of the crystal used. Otherwise, this function may - * have wrong result. - * - * - The result of this function could be not correct when using - * fractional value for HSE crystal. - * - * @retval None - */ -void SystemCoreClockUpdate(void) -{ - uint32_t tmp, msirange, pllvco, pllsource, pllm, pllr; - - /* Get MSI Range - * frequency--------------------------------------------------*/ - if ((RCC->CR & RCC_CR_MSIRGSEL) == 0U) { /* MSISRANGE from RCC_CSR applies */ - msirange = (RCC->CSR & RCC_CSR_MSISRANGE) >> 8U; - } else { /* MSIRANGE from RCC_CR applies */ - msirange = (RCC->CR & RCC_CR_MSIRANGE) >> 4U; - } - /*MSI frequency range in HZ*/ - msirange = MSIRangeTable[msirange]; - - /* Get SYSCLK source - * -------------------------------------------------------*/ - switch (RCC->CFGR & RCC_CFGR_SWS) { - case 0x00: /* MSI used as system clock source */ - SystemCoreClock = msirange; - break; - - case 0x04: /* HSI used as system clock source */ - SystemCoreClock = HSI_VALUE; - break; - - case 0x08: /* HSE used as system clock source */ - SystemCoreClock = HSE_VALUE; - break; - - case 0x0C: /* PLL used as system clock source */ - /* PLL_VCO = (HSE_VALUE or HSI_VALUE or MSI_VALUE/ PLLM) - * PLLN SYSCLK = PLL_VCO / PLLR - */ - pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC); - pllm = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLM) >> 4U) + 1U; - - switch (pllsource) { - case 0x02: /* HSI used as PLL clock source */ - pllvco = (HSI_VALUE / pllm); - break; - - case 0x03: /* HSE used as PLL clock source */ - pllvco = (HSE_VALUE / pllm); - break; - - default: /* MSI used as PLL clock source */ - pllvco = (msirange / pllm); - break; - } - pllvco = pllvco * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 8U); - pllr = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> 25U) + 1U) * 2U; - SystemCoreClock = pllvco / pllr; - break; - - default: - SystemCoreClock = msirange; - break; - } - /* Compute HCLK clock frequency - * --------------------------------------------*/ - /* Get HCLK prescaler */ - tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4U)]; - /* HCLK clock frequency */ - SystemCoreClock >>= tmp; -} - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/BLINKY/U5BLINKY/CMakeLists.txt b/BLINKY/U5BLINKY/CMakeLists.txt index cc1f130e8..377f139de 100644 --- a/BLINKY/U5BLINKY/CMakeLists.txt +++ b/BLINKY/U5BLINKY/CMakeLists.txt @@ -29,9 +29,6 @@ target_sources( Core/Src/main.c Core/Src/stm32u5xx_it.c Core/Src/stm32u5xx_hal_msp.c - Core/Src/system_stm32u5xx.c - Core/Src/sysmem.c - Core/Src/syscalls.c ) target_link_libraries(${GR_PROJECT_NAME}_USER_CODE INTERFACE) diff --git a/BLINKY/U5BLINKY/Core/Src/system_stm32u5xx.c b/BLINKY/U5BLINKY/Core/Src/system_stm32u5xx.c deleted file mode 100644 index 4725dbd02..000000000 --- a/BLINKY/U5BLINKY/Core/Src/system_stm32u5xx.c +++ /dev/null @@ -1,364 +0,0 @@ -/** - ****************************************************************************** - * @file system_stm32u5xx.c - * @author MCD Application Team - * @brief CMSIS Cortex-M33 Device Peripheral Access Layer System Source File - * - * This file provides two functions and one global variable to be called from - * user application: - * - SystemInit(): This function is called at startup just after reset and - * before branch to main program. This call is made inside - * the "startup_stm32u5xx.s" file. - * - * - SystemCoreClock variable: Contains the core clock (HCLK), it can be - *used by the user application to setup the SysTick timer or configure other - *parameters. - * - * - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must - * be called whenever the core clock is changed - * during program execution. - * - * After each device reset the MSI (4 MHz) is used as system clock source. - * Then SystemInit() function is called, in "startup_stm32u5xx.s" file, to - * configure the system clock before to branch to main program. - * - * This file configures the system clock as follows: - *============================================================================= - *----------------------------------------------------------------------------- - * System Clock source | MSI - *----------------------------------------------------------------------------- - * SYSCLK(Hz) | 4000000 - *----------------------------------------------------------------------------- - * HCLK(Hz) | 4000000 - *----------------------------------------------------------------------------- - * AHB Prescaler | 1 - *----------------------------------------------------------------------------- - * APB1 Prescaler | 1 - *----------------------------------------------------------------------------- - * APB2 Prescaler | 1 - *----------------------------------------------------------------------------- - * APB3 Prescaler | 1 - *----------------------------------------------------------------------------- - * PLL1_SRC | No clock - *----------------------------------------------------------------------------- - * PLL1_M | 1 - *----------------------------------------------------------------------------- - * PLL1_N | 8 - *----------------------------------------------------------------------------- - * PLL1_P | 7 - *----------------------------------------------------------------------------- - * PLL1_Q | 2 - *----------------------------------------------------------------------------- - * PLL1_R | 2 - *----------------------------------------------------------------------------- - * PLL2_SRC | NA - *----------------------------------------------------------------------------- - * PLL2_M | NA - *----------------------------------------------------------------------------- - * PLL2_N | NA - *----------------------------------------------------------------------------- - * PLL2_P | NA - *----------------------------------------------------------------------------- - * PLL2_Q | NA - *----------------------------------------------------------------------------- - * PLL2_R | NA - *----------------------------------------------------------------------------- - * PLL3_SRC | NA - *----------------------------------------------------------------------------- - * PLL3_M | NA - *----------------------------------------------------------------------------- - * PLL3_N | NA - *----------------------------------------------------------------------------- - * PLL3_P | NA - *----------------------------------------------------------------------------- - * Require 48MHz for USB FS, | Disabled - * SDIO and RNG clock | - *----------------------------------------------------------------------------- - *============================================================================= - ****************************************************************************** - * @attention - * - * Copyright (c) 2021 STMicroelectronics. - * All rights reserved. - * - * This software is licensed under terms that can be found in the LICENSE file - * in the root directory of this software component. - * If no LICENSE file comes with this software, it is provided AS-IS. - * - ****************************************************************************** - */ - -/** @addtogroup CMSIS - * @{ - */ - -/** @addtogroup STM32U5xx_system - * @{ - */ - -/** @addtogroup STM32U5xx_System_Private_Includes - * @{ - */ - -#include - -#include "stm32u5xx.h" - -/** - * @} - */ - -/** @addtogroup STM32U5xx_System_Private_TypesDefinitions - * @{ - */ - -/** - * @} - */ - -/** @addtogroup STM32U5xx_System_Private_Defines - * @{ - */ - -#if !defined(HSE_VALUE) -#define HSE_VALUE 16000000U /*!< Value of the External oscillator in Hz */ -#endif /* HSE_VALUE */ - -#if !defined(MSI_VALUE) -#define MSI_VALUE 4000000U /*!< Value of the Internal oscillator in Hz*/ -#endif /* MSI_VALUE */ - -#if !defined(HSI_VALUE) -#define HSI_VALUE 16000000U /*!< Value of the Internal oscillator in Hz*/ -#endif /* HSI_VALUE */ - -/************************* Miscellaneous Configuration ************************/ -/*!< Uncomment the following line if you need to relocate your vector Table in - Internal SRAM. */ -/* #define VECT_TAB_SRAM */ -#define VECT_TAB_OFFSET \ - 0x00000000UL /*!< Vector Table base offset field. \ - This value must be a multiple of 0x200. */ -/******************************************************************************/ - -/** - * @} - */ - -/** @addtogroup STM32U5xx_System_Private_Macros - * @{ - */ - -/** - * @} - */ - -/** @addtogroup STM32U5xx_System_Private_Variables - * @{ - */ -/* The SystemCoreClock variable is updated in three ways: - 1) by calling CMSIS function SystemCoreClockUpdate() - 2) by calling HAL API function HAL_RCC_GetHCLKFreq() - 3) each time HAL_RCC_ClockConfig() is called to configure the system clock - frequency Note: If you use this function to configure the system clock; then - there is no need to call the 2 first functions listed above, since - SystemCoreClock variable is updated automatically. -*/ -uint32_t SystemCoreClock = 4000000U; - -const uint8_t AHBPrescTable[16] = {0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U, 6U, 7U, 8U, 9U}; -const uint8_t APBPrescTable[8] = {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U}; -const uint32_t MSIRangeTable[16] = {48000000U, 24000000U, 16000000U, 12000000U, 4000000U, 2000000U, 1330000U, 1000000U, 3072000U, 1536000U, 1024000U, 768000U, 400000U, 200000U, 133000U, 100000U}; -/** - * @} - */ - -/** @addtogroup STM32U5xx_System_Private_FunctionPrototypes - * @{ - */ - -/** - * @} - */ - -/** @addtogroup STM32U5xx_System_Private_Functions - * @{ - */ - -/** - * @brief Setup the microcontroller system. - * @param None - * @retval None - */ - -void SystemInit(void) -{ -/* FPU settings ------------------------------------------------------------*/ -#if (__FPU_PRESENT == 1) && (__FPU_USED == 1) - SCB->CPACR |= ((3UL << 20U) | (3UL << 22U)); /* set CP10 and CP11 Full Access */ -#endif - - /* Reset the RCC clock configuration to the default reset state - * ------------*/ - /* Set MSION bit */ - RCC->CR = RCC_CR_MSISON; - - /* Reset CFGR register */ - RCC->CFGR1 = 0U; - RCC->CFGR2 = 0U; - RCC->CFGR3 = 0U; - - /* Reset HSEON, CSSON , HSION, PLLxON bits */ - RCC->CR &= ~(RCC_CR_HSEON | RCC_CR_CSSON | RCC_CR_PLL1ON | RCC_CR_PLL2ON | RCC_CR_PLL3ON); - - /* Reset PLLCFGR register */ - RCC->PLL1CFGR = 0U; - - /* Reset HSEBYP bit */ - RCC->CR &= ~(RCC_CR_HSEBYP); - - /* Disable all interrupts */ - RCC->CIER = 0U; - -/* Configure the Vector Table location add offset address ------------------*/ -#ifdef VECT_TAB_SRAM - SCB->VTOR = SRAM1_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */ -#else - SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */ -#endif -} - -/** - * @brief Update SystemCoreClock variable according to Clock Register Values. - * The SystemCoreClock variable contains the core clock (HCLK), it can - * be used by the user application to setup the SysTick timer or - * configure other parameters. - * - * @note Each time the core clock (HCLK) changes, this function must be called - * to update SystemCoreClock variable value. Otherwise, any - * configuration based on this variable will be incorrect. - * - * @note - The system frequency computed by this function is not the real - * frequency in the chip. It is calculated based on the predefined - * constant and the selected clock source: - * - * - If SYSCLK source is MSI, SystemCoreClock will contain the - * MSI_VALUE(*) - * - * - If SYSCLK source is HSI, SystemCoreClock will contain the - * HSI_VALUE(**) - * - * - If SYSCLK source is HSE, SystemCoreClock will contain the - * HSE_VALUE(***) - * - * - If SYSCLK source is PLL, SystemCoreClock will contain the - * HSE_VALUE(***) or HSI_VALUE(*) or MSI_VALUE(*) multiplied/divided by the PLL - * factors. - * - * (*) MSI_VALUE is a constant defined in stm32u5xx_hal.h file (default - * value 4 MHz) but the real value may vary depending on the variations in - * voltage and temperature. - * - * (**) HSI_VALUE is a constant defined in stm32u5xx_hal.h file (default - * value 16 MHz) but the real value may vary depending on the variations in - * voltage and temperature. - * - * (***) HSE_VALUE is a constant defined in stm32u5xx_hal.h file - * (default value 8 MHz), user has to ensure that HSE_VALUE is same as the real - * frequency of the crystal used. Otherwise, this function may - * have wrong result. - * - * - The result of this function could be not correct when using - * fractional value for HSE crystal. - * - * @param None - * @retval None - */ -void SystemCoreClockUpdate(void) -{ - uint32_t pllr, pllsource, pllm, tmp, pllfracen, msirange; - float_t fracn1, pllvco; - - /* Get MSI Range - * frequency--------------------------------------------------*/ - if (READ_BIT(RCC->ICSCR1, RCC_ICSCR1_MSIRGSEL) == 0U) { - /* MSISRANGE from RCC_CSR applies */ - msirange = (RCC->CSR & RCC_CSR_MSISSRANGE) >> RCC_CSR_MSISSRANGE_Pos; - } else { - /* MSIRANGE from RCC_CR applies */ - msirange = (RCC->ICSCR1 & RCC_ICSCR1_MSISRANGE) >> RCC_ICSCR1_MSISRANGE_Pos; - } - - /*MSI frequency range in HZ*/ - msirange = MSIRangeTable[msirange]; - - /* Get SYSCLK source - * -------------------------------------------------------*/ - switch (RCC->CFGR1 & RCC_CFGR1_SWS) { - case 0x00: /* MSI used as system clock source */ - SystemCoreClock = msirange; - break; - - case 0x04: /* HSI used as system clock source */ - SystemCoreClock = HSI_VALUE; - break; - - case 0x08: /* HSE used as system clock source */ - SystemCoreClock = HSE_VALUE; - break; - - case 0x0C: /* PLL used as system clock source */ - /* PLL_VCO = (HSE_VALUE or HSI_VALUE or MSI_VALUE/ PLLM) - * PLLN SYSCLK = PLL_VCO / PLLR - */ - pllsource = (RCC->PLL1CFGR & RCC_PLL1CFGR_PLL1SRC); - pllm = ((RCC->PLL1CFGR & RCC_PLL1CFGR_PLL1M) >> RCC_PLL1CFGR_PLL1M_Pos) + 1U; - pllfracen = ((RCC->PLL1CFGR & RCC_PLL1CFGR_PLL1FRACEN) >> RCC_PLL1CFGR_PLL1FRACEN_Pos); - fracn1 = (float_t)(uint32_t)(pllfracen * ((RCC->PLL1FRACR & RCC_PLL1FRACR_PLL1FRACN) >> RCC_PLL1FRACR_PLL1FRACN_Pos)); - - switch (pllsource) { - case 0x00: /* No clock sent to PLL*/ - pllvco = (float_t)0U; - break; - - case 0x02: /* HSI used as PLL clock source */ - pllvco = ((float_t)HSI_VALUE / (float_t)pllm); - break; - - case 0x03: /* HSE used as PLL clock source */ - pllvco = ((float_t)HSE_VALUE / (float_t)pllm); - break; - - default: /* MSI used as PLL clock source */ - pllvco = ((float_t)msirange / (float_t)pllm); - break; - } - - pllvco = pllvco * ((float_t)(uint32_t)(RCC->PLL1DIVR & RCC_PLL1DIVR_PLL1N) + (fracn1 / (float_t)0x2000) + (float_t)1U); - pllr = (((RCC->PLL1DIVR & RCC_PLL1DIVR_PLL1R) >> RCC_PLL1DIVR_PLL1R_Pos) + 1U); - SystemCoreClock = (uint32_t)((uint32_t)pllvco / pllr); - break; - - default: - SystemCoreClock = msirange; - break; - } - /* Compute HCLK clock frequency - * --------------------------------------------*/ - /* Get HCLK prescaler */ - tmp = AHBPrescTable[((RCC->CFGR2 & RCC_CFGR2_HPRE) >> RCC_CFGR2_HPRE_Pos)]; - /* HCLK clock frequency */ - SystemCoreClock >>= tmp; -} - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ diff --git a/CCU/CMakeLists.txt b/CCU/CMakeLists.txt index be5c46448..490cd0a02 100644 --- a/CCU/CMakeLists.txt +++ b/CCU/CMakeLists.txt @@ -41,9 +41,6 @@ target_sources( Core/Src/main.c Core/Src/stm32g4xx_hal_msp.c Core/Src/stm32g4xx_it.c - Core/Src/syscalls.c - Core/Src/sysmem.c - Core/Src/system_stm32g4xx.c ) target_link_libraries( diff --git a/CCU/Core/Inc/stm32_assert.h b/CCU/Core/Inc/stm32_assert.h deleted file mode 100644 index 92460620f..000000000 --- a/CCU/Core/Inc/stm32_assert.h +++ /dev/null @@ -1,52 +0,0 @@ -/* USER CODE BEGIN Header */ -/** - ****************************************************************************** - * @file stm32_assert.h - * @author MCD Application Team - * @brief STM32 assert file. - ****************************************************************************** - * @attention - * - * Copyright (c) 2019 STMicroelectronics. - * All rights reserved. - * - * This software is licensed under terms that can be found in the LICENSE file - * in the root directory of this software component. - * If no LICENSE file comes with this software, it is provided AS-IS. - * - ****************************************************************************** - */ -/* USER CODE END Header */ -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32_ASSERT_H -#define __STM32_ASSERT_H - -#ifdef __cplusplus -extern "C" { -#endif - -/* Exported types ------------------------------------------------------------*/ -/* Exported constants --------------------------------------------------------*/ -/* Includes ------------------------------------------------------------------*/ -/* Exported macro ------------------------------------------------------------*/ -#ifdef USE_FULL_ASSERT -/** - * @brief The assert_param macro is used for function's parameters check. - * @param expr: If expr is false, it calls assert_failed function - * which reports the name of the source file and the source - * line number of the call that failed. - * If expr is true, it returns no value. - * @retval None - */ -#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__)) -/* Exported functions ------------------------------------------------------- */ -void assert_failed(uint8_t *file, uint32_t line); -#else -#define assert_param(expr) ((void)0U) -#endif /* USE_FULL_ASSERT */ - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32_ASSERT_H */ diff --git a/CCU/Core/Src/system_stm32g4xx.c b/CCU/Core/Src/system_stm32g4xx.c deleted file mode 100644 index 990865b88..000000000 --- a/CCU/Core/Src/system_stm32g4xx.c +++ /dev/null @@ -1,289 +0,0 @@ -/** - ****************************************************************************** - * @file system_stm32g4xx.c - * @author MCD Application Team - * @brief CMSIS Cortex-M4 Device Peripheral Access Layer System Source File - * - * This file provides two functions and one global variable to be called from - * user application: - * - SystemInit(): This function is called at startup just after reset and - * before branch to main program. This call is made inside - * the "startup_stm32g4xx.s" file. - * - * - SystemCoreClock variable: Contains the core clock (HCLK), it can be - *used by the user application to setup the SysTick timer or configure other - *parameters. - * - * - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must - * be called whenever the core clock is changed - * during program execution. - * - * After each device reset the HSI (16 MHz) is used as system clock source. - * Then SystemInit() function is called, in "startup_stm32g4xx.s" file, to - * configure the system clock before to branch to main program. - * - * This file configures the system clock as follows: - *============================================================================= - *----------------------------------------------------------------------------- - * System Clock source | HSI - *----------------------------------------------------------------------------- - * SYSCLK(Hz) | 16000000 - *----------------------------------------------------------------------------- - * HCLK(Hz) | 16000000 - *----------------------------------------------------------------------------- - * AHB Prescaler | 1 - *----------------------------------------------------------------------------- - * APB1 Prescaler | 1 - *----------------------------------------------------------------------------- - * APB2 Prescaler | 1 - *----------------------------------------------------------------------------- - * PLL_M | 1 - *----------------------------------------------------------------------------- - * PLL_N | 16 - *----------------------------------------------------------------------------- - * PLL_P | 7 - *----------------------------------------------------------------------------- - * PLL_Q | 2 - *----------------------------------------------------------------------------- - * PLL_R | 2 - *----------------------------------------------------------------------------- - * Require 48MHz for RNG | Disabled - *----------------------------------------------------------------------------- - *============================================================================= - ****************************************************************************** - * @attention - * - * Copyright (c) 2019 STMicroelectronics. - * All rights reserved. - * - * This software is licensed under terms that can be found in the LICENSE file - * in the root directory of this software component. - * If no LICENSE file comes with this software, it is provided AS-IS. - * - ****************************************************************************** - */ - -/** @addtogroup CMSIS - * @{ - */ - -/** @addtogroup stm32g4xx_system - * @{ - */ - -/** @addtogroup STM32G4xx_System_Private_Includes - * @{ - */ - -#include "stm32g4xx.h" - -#if !defined(HSE_VALUE) -#define HSE_VALUE 24000000U /*!< Value of the External oscillator in Hz */ -#endif /* HSE_VALUE */ - -#if !defined(HSI_VALUE) -#define HSI_VALUE 16000000U /*!< Value of the Internal oscillator in Hz*/ -#endif /* HSI_VALUE */ - -/** - * @} - */ - -/** @addtogroup STM32G4xx_System_Private_TypesDefinitions - * @{ - */ - -/** - * @} - */ - -/** @addtogroup STM32G4xx_System_Private_Defines - * @{ - */ - -/************************* Miscellaneous Configuration ************************/ -/* Note: Following vector table addresses must be defined in line with linker - configuration. */ -/*!< Uncomment the following line if you need to relocate the vector table - anywhere in Flash or Sram, else the vector table is kept at the automatic - remap of boot address selected */ -/* #define USER_VECT_TAB_ADDRESS */ - -#if defined(USER_VECT_TAB_ADDRESS) -/*!< Uncomment the following line if you need to relocate your vector Table - in Sram else user remap will be done in Flash. */ -/* #define VECT_TAB_SRAM */ -#if defined(VECT_TAB_SRAM) -#define VECT_TAB_BASE_ADDRESS \ - SRAM_BASE /*!< Vector Table base address field. \ - This value must be a multiple of 0x200. */ -#define VECT_TAB_OFFSET \ - 0x00000000U /*!< Vector Table base offset field. \ - This value must be a multiple of 0x200. */ -#else -#define VECT_TAB_BASE_ADDRESS \ - FLASH_BASE /*!< Vector Table base address field. \ - This value must be a multiple of 0x200. */ -#define VECT_TAB_OFFSET \ - 0x00000000U /*!< Vector Table base offset field. \ - This value must be a multiple of 0x200. */ -#endif /* VECT_TAB_SRAM */ -#endif /* USER_VECT_TAB_ADDRESS */ -/******************************************************************************/ -/** - * @} - */ - -/** @addtogroup STM32G4xx_System_Private_Macros - * @{ - */ - -/** - * @} - */ - -/** @addtogroup STM32G4xx_System_Private_Variables - * @{ - */ -/* The SystemCoreClock variable is updated in three ways: - 1) by calling CMSIS function SystemCoreClockUpdate() - 2) by calling HAL API function HAL_RCC_GetHCLKFreq() - 3) each time HAL_RCC_ClockConfig() is called to configure the system clock - frequency Note: If you use this function to configure the system clock; then - there is no need to call the 2 first functions listed above, since - SystemCoreClock variable is updated automatically. -*/ -uint32_t SystemCoreClock = HSI_VALUE; - -const uint8_t AHBPrescTable[16] = {0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U, 6U, 7U, 8U, 9U}; -const uint8_t APBPrescTable[8] = {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U}; - -/** - * @} - */ - -/** @addtogroup STM32G4xx_System_Private_FunctionPrototypes - * @{ - */ - -/** - * @} - */ - -/** @addtogroup STM32G4xx_System_Private_Functions - * @{ - */ - -/** - * @brief Setup the microcontroller system. - * @param None - * @retval None - */ - -void SystemInit(void) -{ -/* FPU settings ------------------------------------------------------------*/ -#if (__FPU_PRESENT == 1) && (__FPU_USED == 1) - SCB->CPACR |= ((3UL << (10 * 2)) | (3UL << (11 * 2))); /* set CP10 and CP11 Full Access */ -#endif - - /* Configure the Vector Table location add offset address - * ------------------*/ -#if defined(USER_VECT_TAB_ADDRESS) - SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */ -#endif /* USER_VECT_TAB_ADDRESS */ -} - -/** - * @brief Update SystemCoreClock variable according to Clock Register Values. - * The SystemCoreClock variable contains the core clock (HCLK), it can - * be used by the user application to setup the SysTick timer or - * configure other parameters. - * - * @note Each time the core clock (HCLK) changes, this function must be called - * to update SystemCoreClock variable value. Otherwise, any - * configuration based on this variable will be incorrect. - * - * @note - The system frequency computed by this function is not the real - * frequency in the chip. It is calculated based on the predefined - * constant and the selected clock source: - * - * - If SYSCLK source is HSI, SystemCoreClock will contain the - * HSI_VALUE(**) - * - * - If SYSCLK source is HSE, SystemCoreClock will contain the - * HSE_VALUE(***) - * - * - If SYSCLK source is PLL, SystemCoreClock will contain the - * HSE_VALUE(***) or HSI_VALUE(*) multiplied/divided by the PLL factors. - * - * (**) HSI_VALUE is a constant defined in stm32g4xx_hal.h file (default - * value 16 MHz) but the real value may vary depending on the variations in - * voltage and temperature. - * - * (***) HSE_VALUE is a constant defined in stm32g4xx_hal.h file - * (default value 24 MHz), user has to ensure that HSE_VALUE is same as the real - * frequency of the crystal used. Otherwise, this function may - * have wrong result. - * - * - The result of this function could be not correct when using - * fractional value for HSE crystal. - * - * @param None - * @retval None - */ -void SystemCoreClockUpdate(void) -{ - uint32_t tmp, pllvco, pllr, pllsource, pllm; - - /* Get SYSCLK source - * -------------------------------------------------------*/ - switch (RCC->CFGR & RCC_CFGR_SWS) { - case 0x04: /* HSI used as system clock source */ - SystemCoreClock = HSI_VALUE; - break; - - case 0x08: /* HSE used as system clock source */ - SystemCoreClock = HSE_VALUE; - break; - - case 0x0C: /* PLL used as system clock source */ - /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN - SYSCLK = PLL_VCO / PLLR - */ - pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC); - pllm = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLM) >> 4) + 1U; - if (pllsource == 0x02UL) /* HSI used as PLL clock source */ - { - pllvco = (HSI_VALUE / pllm); - } else /* HSE used as PLL clock source */ - { - pllvco = (HSE_VALUE / pllm); - } - pllvco = pllvco * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 8); - pllr = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> 25) + 1U) * 2U; - SystemCoreClock = pllvco / pllr; - break; - - default: - break; - } - /* Compute HCLK clock frequency - * --------------------------------------------*/ - /* Get HCLK prescaler */ - tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)]; - /* HCLK clock frequency */ - SystemCoreClock >>= tmp; -} - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ diff --git a/ECU/CMakeLists.txt b/ECU/CMakeLists.txt index 8de5fa9ae..26953c937 100644 --- a/ECU/CMakeLists.txt +++ b/ECU/CMakeLists.txt @@ -72,9 +72,6 @@ target_sources( Core/Src/main.c Core/Src/stm32g4xx_hal_msp.c Core/Src/stm32g4xx_it.c - Core/Src/syscalls.c - Core/Src/sysmem.c - Core/Src/system_stm32g4xx.c # Application Application/Src/CANdler.c Application/Src/StateTicks.c diff --git a/ECU/Core/Inc/stm32_assert.h b/ECU/Core/Inc/stm32_assert.h deleted file mode 100644 index 92460620f..000000000 --- a/ECU/Core/Inc/stm32_assert.h +++ /dev/null @@ -1,52 +0,0 @@ -/* USER CODE BEGIN Header */ -/** - ****************************************************************************** - * @file stm32_assert.h - * @author MCD Application Team - * @brief STM32 assert file. - ****************************************************************************** - * @attention - * - * Copyright (c) 2019 STMicroelectronics. - * All rights reserved. - * - * This software is licensed under terms that can be found in the LICENSE file - * in the root directory of this software component. - * If no LICENSE file comes with this software, it is provided AS-IS. - * - ****************************************************************************** - */ -/* USER CODE END Header */ -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32_ASSERT_H -#define __STM32_ASSERT_H - -#ifdef __cplusplus -extern "C" { -#endif - -/* Exported types ------------------------------------------------------------*/ -/* Exported constants --------------------------------------------------------*/ -/* Includes ------------------------------------------------------------------*/ -/* Exported macro ------------------------------------------------------------*/ -#ifdef USE_FULL_ASSERT -/** - * @brief The assert_param macro is used for function's parameters check. - * @param expr: If expr is false, it calls assert_failed function - * which reports the name of the source file and the source - * line number of the call that failed. - * If expr is true, it returns no value. - * @retval None - */ -#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__)) -/* Exported functions ------------------------------------------------------- */ -void assert_failed(uint8_t *file, uint32_t line); -#else -#define assert_param(expr) ((void)0U) -#endif /* USE_FULL_ASSERT */ - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32_ASSERT_H */ diff --git a/ECU/Core/Src/system_stm32g4xx.c b/ECU/Core/Src/system_stm32g4xx.c deleted file mode 100644 index 990865b88..000000000 --- a/ECU/Core/Src/system_stm32g4xx.c +++ /dev/null @@ -1,289 +0,0 @@ -/** - ****************************************************************************** - * @file system_stm32g4xx.c - * @author MCD Application Team - * @brief CMSIS Cortex-M4 Device Peripheral Access Layer System Source File - * - * This file provides two functions and one global variable to be called from - * user application: - * - SystemInit(): This function is called at startup just after reset and - * before branch to main program. This call is made inside - * the "startup_stm32g4xx.s" file. - * - * - SystemCoreClock variable: Contains the core clock (HCLK), it can be - *used by the user application to setup the SysTick timer or configure other - *parameters. - * - * - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must - * be called whenever the core clock is changed - * during program execution. - * - * After each device reset the HSI (16 MHz) is used as system clock source. - * Then SystemInit() function is called, in "startup_stm32g4xx.s" file, to - * configure the system clock before to branch to main program. - * - * This file configures the system clock as follows: - *============================================================================= - *----------------------------------------------------------------------------- - * System Clock source | HSI - *----------------------------------------------------------------------------- - * SYSCLK(Hz) | 16000000 - *----------------------------------------------------------------------------- - * HCLK(Hz) | 16000000 - *----------------------------------------------------------------------------- - * AHB Prescaler | 1 - *----------------------------------------------------------------------------- - * APB1 Prescaler | 1 - *----------------------------------------------------------------------------- - * APB2 Prescaler | 1 - *----------------------------------------------------------------------------- - * PLL_M | 1 - *----------------------------------------------------------------------------- - * PLL_N | 16 - *----------------------------------------------------------------------------- - * PLL_P | 7 - *----------------------------------------------------------------------------- - * PLL_Q | 2 - *----------------------------------------------------------------------------- - * PLL_R | 2 - *----------------------------------------------------------------------------- - * Require 48MHz for RNG | Disabled - *----------------------------------------------------------------------------- - *============================================================================= - ****************************************************************************** - * @attention - * - * Copyright (c) 2019 STMicroelectronics. - * All rights reserved. - * - * This software is licensed under terms that can be found in the LICENSE file - * in the root directory of this software component. - * If no LICENSE file comes with this software, it is provided AS-IS. - * - ****************************************************************************** - */ - -/** @addtogroup CMSIS - * @{ - */ - -/** @addtogroup stm32g4xx_system - * @{ - */ - -/** @addtogroup STM32G4xx_System_Private_Includes - * @{ - */ - -#include "stm32g4xx.h" - -#if !defined(HSE_VALUE) -#define HSE_VALUE 24000000U /*!< Value of the External oscillator in Hz */ -#endif /* HSE_VALUE */ - -#if !defined(HSI_VALUE) -#define HSI_VALUE 16000000U /*!< Value of the Internal oscillator in Hz*/ -#endif /* HSI_VALUE */ - -/** - * @} - */ - -/** @addtogroup STM32G4xx_System_Private_TypesDefinitions - * @{ - */ - -/** - * @} - */ - -/** @addtogroup STM32G4xx_System_Private_Defines - * @{ - */ - -/************************* Miscellaneous Configuration ************************/ -/* Note: Following vector table addresses must be defined in line with linker - configuration. */ -/*!< Uncomment the following line if you need to relocate the vector table - anywhere in Flash or Sram, else the vector table is kept at the automatic - remap of boot address selected */ -/* #define USER_VECT_TAB_ADDRESS */ - -#if defined(USER_VECT_TAB_ADDRESS) -/*!< Uncomment the following line if you need to relocate your vector Table - in Sram else user remap will be done in Flash. */ -/* #define VECT_TAB_SRAM */ -#if defined(VECT_TAB_SRAM) -#define VECT_TAB_BASE_ADDRESS \ - SRAM_BASE /*!< Vector Table base address field. \ - This value must be a multiple of 0x200. */ -#define VECT_TAB_OFFSET \ - 0x00000000U /*!< Vector Table base offset field. \ - This value must be a multiple of 0x200. */ -#else -#define VECT_TAB_BASE_ADDRESS \ - FLASH_BASE /*!< Vector Table base address field. \ - This value must be a multiple of 0x200. */ -#define VECT_TAB_OFFSET \ - 0x00000000U /*!< Vector Table base offset field. \ - This value must be a multiple of 0x200. */ -#endif /* VECT_TAB_SRAM */ -#endif /* USER_VECT_TAB_ADDRESS */ -/******************************************************************************/ -/** - * @} - */ - -/** @addtogroup STM32G4xx_System_Private_Macros - * @{ - */ - -/** - * @} - */ - -/** @addtogroup STM32G4xx_System_Private_Variables - * @{ - */ -/* The SystemCoreClock variable is updated in three ways: - 1) by calling CMSIS function SystemCoreClockUpdate() - 2) by calling HAL API function HAL_RCC_GetHCLKFreq() - 3) each time HAL_RCC_ClockConfig() is called to configure the system clock - frequency Note: If you use this function to configure the system clock; then - there is no need to call the 2 first functions listed above, since - SystemCoreClock variable is updated automatically. -*/ -uint32_t SystemCoreClock = HSI_VALUE; - -const uint8_t AHBPrescTable[16] = {0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U, 6U, 7U, 8U, 9U}; -const uint8_t APBPrescTable[8] = {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U}; - -/** - * @} - */ - -/** @addtogroup STM32G4xx_System_Private_FunctionPrototypes - * @{ - */ - -/** - * @} - */ - -/** @addtogroup STM32G4xx_System_Private_Functions - * @{ - */ - -/** - * @brief Setup the microcontroller system. - * @param None - * @retval None - */ - -void SystemInit(void) -{ -/* FPU settings ------------------------------------------------------------*/ -#if (__FPU_PRESENT == 1) && (__FPU_USED == 1) - SCB->CPACR |= ((3UL << (10 * 2)) | (3UL << (11 * 2))); /* set CP10 and CP11 Full Access */ -#endif - - /* Configure the Vector Table location add offset address - * ------------------*/ -#if defined(USER_VECT_TAB_ADDRESS) - SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */ -#endif /* USER_VECT_TAB_ADDRESS */ -} - -/** - * @brief Update SystemCoreClock variable according to Clock Register Values. - * The SystemCoreClock variable contains the core clock (HCLK), it can - * be used by the user application to setup the SysTick timer or - * configure other parameters. - * - * @note Each time the core clock (HCLK) changes, this function must be called - * to update SystemCoreClock variable value. Otherwise, any - * configuration based on this variable will be incorrect. - * - * @note - The system frequency computed by this function is not the real - * frequency in the chip. It is calculated based on the predefined - * constant and the selected clock source: - * - * - If SYSCLK source is HSI, SystemCoreClock will contain the - * HSI_VALUE(**) - * - * - If SYSCLK source is HSE, SystemCoreClock will contain the - * HSE_VALUE(***) - * - * - If SYSCLK source is PLL, SystemCoreClock will contain the - * HSE_VALUE(***) or HSI_VALUE(*) multiplied/divided by the PLL factors. - * - * (**) HSI_VALUE is a constant defined in stm32g4xx_hal.h file (default - * value 16 MHz) but the real value may vary depending on the variations in - * voltage and temperature. - * - * (***) HSE_VALUE is a constant defined in stm32g4xx_hal.h file - * (default value 24 MHz), user has to ensure that HSE_VALUE is same as the real - * frequency of the crystal used. Otherwise, this function may - * have wrong result. - * - * - The result of this function could be not correct when using - * fractional value for HSE crystal. - * - * @param None - * @retval None - */ -void SystemCoreClockUpdate(void) -{ - uint32_t tmp, pllvco, pllr, pllsource, pllm; - - /* Get SYSCLK source - * -------------------------------------------------------*/ - switch (RCC->CFGR & RCC_CFGR_SWS) { - case 0x04: /* HSI used as system clock source */ - SystemCoreClock = HSI_VALUE; - break; - - case 0x08: /* HSE used as system clock source */ - SystemCoreClock = HSE_VALUE; - break; - - case 0x0C: /* PLL used as system clock source */ - /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN - SYSCLK = PLL_VCO / PLLR - */ - pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC); - pllm = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLM) >> 4) + 1U; - if (pllsource == 0x02UL) /* HSI used as PLL clock source */ - { - pllvco = (HSI_VALUE / pllm); - } else /* HSE used as PLL clock source */ - { - pllvco = (HSE_VALUE / pllm); - } - pllvco = pllvco * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 8); - pllr = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> 25) + 1U) * 2U; - SystemCoreClock = pllvco / pllr; - break; - - default: - break; - } - /* Compute HCLK clock frequency - * --------------------------------------------*/ - /* Get HCLK prescaler */ - tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)]; - /* HCLK clock frequency */ - SystemCoreClock >>= tmp; -} - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ diff --git a/G4ADCTESTING/CMakeLists.txt b/G4ADCTESTING/CMakeLists.txt index d8f469d3d..103c4e3d9 100644 --- a/G4ADCTESTING/CMakeLists.txt +++ b/G4ADCTESTING/CMakeLists.txt @@ -39,9 +39,6 @@ target_sources( Core/Src/spi.c Core/Src/stm32g4xx_hal_msp.c Core/Src/stm32g4xx_it.c - Core/Src/syscalls.c - Core/Src/sysmem.c - Core/Src/system_stm32g4xx.c Core/Src/tim.c Core/Src/usart.c ) diff --git a/G4ADCTESTING/Core/Inc/stm32_assert.h b/G4ADCTESTING/Core/Inc/stm32_assert.h deleted file mode 100644 index 92460620f..000000000 --- a/G4ADCTESTING/Core/Inc/stm32_assert.h +++ /dev/null @@ -1,52 +0,0 @@ -/* USER CODE BEGIN Header */ -/** - ****************************************************************************** - * @file stm32_assert.h - * @author MCD Application Team - * @brief STM32 assert file. - ****************************************************************************** - * @attention - * - * Copyright (c) 2019 STMicroelectronics. - * All rights reserved. - * - * This software is licensed under terms that can be found in the LICENSE file - * in the root directory of this software component. - * If no LICENSE file comes with this software, it is provided AS-IS. - * - ****************************************************************************** - */ -/* USER CODE END Header */ -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32_ASSERT_H -#define __STM32_ASSERT_H - -#ifdef __cplusplus -extern "C" { -#endif - -/* Exported types ------------------------------------------------------------*/ -/* Exported constants --------------------------------------------------------*/ -/* Includes ------------------------------------------------------------------*/ -/* Exported macro ------------------------------------------------------------*/ -#ifdef USE_FULL_ASSERT -/** - * @brief The assert_param macro is used for function's parameters check. - * @param expr: If expr is false, it calls assert_failed function - * which reports the name of the source file and the source - * line number of the call that failed. - * If expr is true, it returns no value. - * @retval None - */ -#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__)) -/* Exported functions ------------------------------------------------------- */ -void assert_failed(uint8_t *file, uint32_t line); -#else -#define assert_param(expr) ((void)0U) -#endif /* USE_FULL_ASSERT */ - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32_ASSERT_H */ diff --git a/G4ADCTESTING/Core/Src/system_stm32g4xx.c b/G4ADCTESTING/Core/Src/system_stm32g4xx.c deleted file mode 100644 index 990865b88..000000000 --- a/G4ADCTESTING/Core/Src/system_stm32g4xx.c +++ /dev/null @@ -1,289 +0,0 @@ -/** - ****************************************************************************** - * @file system_stm32g4xx.c - * @author MCD Application Team - * @brief CMSIS Cortex-M4 Device Peripheral Access Layer System Source File - * - * This file provides two functions and one global variable to be called from - * user application: - * - SystemInit(): This function is called at startup just after reset and - * before branch to main program. This call is made inside - * the "startup_stm32g4xx.s" file. - * - * - SystemCoreClock variable: Contains the core clock (HCLK), it can be - *used by the user application to setup the SysTick timer or configure other - *parameters. - * - * - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must - * be called whenever the core clock is changed - * during program execution. - * - * After each device reset the HSI (16 MHz) is used as system clock source. - * Then SystemInit() function is called, in "startup_stm32g4xx.s" file, to - * configure the system clock before to branch to main program. - * - * This file configures the system clock as follows: - *============================================================================= - *----------------------------------------------------------------------------- - * System Clock source | HSI - *----------------------------------------------------------------------------- - * SYSCLK(Hz) | 16000000 - *----------------------------------------------------------------------------- - * HCLK(Hz) | 16000000 - *----------------------------------------------------------------------------- - * AHB Prescaler | 1 - *----------------------------------------------------------------------------- - * APB1 Prescaler | 1 - *----------------------------------------------------------------------------- - * APB2 Prescaler | 1 - *----------------------------------------------------------------------------- - * PLL_M | 1 - *----------------------------------------------------------------------------- - * PLL_N | 16 - *----------------------------------------------------------------------------- - * PLL_P | 7 - *----------------------------------------------------------------------------- - * PLL_Q | 2 - *----------------------------------------------------------------------------- - * PLL_R | 2 - *----------------------------------------------------------------------------- - * Require 48MHz for RNG | Disabled - *----------------------------------------------------------------------------- - *============================================================================= - ****************************************************************************** - * @attention - * - * Copyright (c) 2019 STMicroelectronics. - * All rights reserved. - * - * This software is licensed under terms that can be found in the LICENSE file - * in the root directory of this software component. - * If no LICENSE file comes with this software, it is provided AS-IS. - * - ****************************************************************************** - */ - -/** @addtogroup CMSIS - * @{ - */ - -/** @addtogroup stm32g4xx_system - * @{ - */ - -/** @addtogroup STM32G4xx_System_Private_Includes - * @{ - */ - -#include "stm32g4xx.h" - -#if !defined(HSE_VALUE) -#define HSE_VALUE 24000000U /*!< Value of the External oscillator in Hz */ -#endif /* HSE_VALUE */ - -#if !defined(HSI_VALUE) -#define HSI_VALUE 16000000U /*!< Value of the Internal oscillator in Hz*/ -#endif /* HSI_VALUE */ - -/** - * @} - */ - -/** @addtogroup STM32G4xx_System_Private_TypesDefinitions - * @{ - */ - -/** - * @} - */ - -/** @addtogroup STM32G4xx_System_Private_Defines - * @{ - */ - -/************************* Miscellaneous Configuration ************************/ -/* Note: Following vector table addresses must be defined in line with linker - configuration. */ -/*!< Uncomment the following line if you need to relocate the vector table - anywhere in Flash or Sram, else the vector table is kept at the automatic - remap of boot address selected */ -/* #define USER_VECT_TAB_ADDRESS */ - -#if defined(USER_VECT_TAB_ADDRESS) -/*!< Uncomment the following line if you need to relocate your vector Table - in Sram else user remap will be done in Flash. */ -/* #define VECT_TAB_SRAM */ -#if defined(VECT_TAB_SRAM) -#define VECT_TAB_BASE_ADDRESS \ - SRAM_BASE /*!< Vector Table base address field. \ - This value must be a multiple of 0x200. */ -#define VECT_TAB_OFFSET \ - 0x00000000U /*!< Vector Table base offset field. \ - This value must be a multiple of 0x200. */ -#else -#define VECT_TAB_BASE_ADDRESS \ - FLASH_BASE /*!< Vector Table base address field. \ - This value must be a multiple of 0x200. */ -#define VECT_TAB_OFFSET \ - 0x00000000U /*!< Vector Table base offset field. \ - This value must be a multiple of 0x200. */ -#endif /* VECT_TAB_SRAM */ -#endif /* USER_VECT_TAB_ADDRESS */ -/******************************************************************************/ -/** - * @} - */ - -/** @addtogroup STM32G4xx_System_Private_Macros - * @{ - */ - -/** - * @} - */ - -/** @addtogroup STM32G4xx_System_Private_Variables - * @{ - */ -/* The SystemCoreClock variable is updated in three ways: - 1) by calling CMSIS function SystemCoreClockUpdate() - 2) by calling HAL API function HAL_RCC_GetHCLKFreq() - 3) each time HAL_RCC_ClockConfig() is called to configure the system clock - frequency Note: If you use this function to configure the system clock; then - there is no need to call the 2 first functions listed above, since - SystemCoreClock variable is updated automatically. -*/ -uint32_t SystemCoreClock = HSI_VALUE; - -const uint8_t AHBPrescTable[16] = {0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U, 6U, 7U, 8U, 9U}; -const uint8_t APBPrescTable[8] = {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U}; - -/** - * @} - */ - -/** @addtogroup STM32G4xx_System_Private_FunctionPrototypes - * @{ - */ - -/** - * @} - */ - -/** @addtogroup STM32G4xx_System_Private_Functions - * @{ - */ - -/** - * @brief Setup the microcontroller system. - * @param None - * @retval None - */ - -void SystemInit(void) -{ -/* FPU settings ------------------------------------------------------------*/ -#if (__FPU_PRESENT == 1) && (__FPU_USED == 1) - SCB->CPACR |= ((3UL << (10 * 2)) | (3UL << (11 * 2))); /* set CP10 and CP11 Full Access */ -#endif - - /* Configure the Vector Table location add offset address - * ------------------*/ -#if defined(USER_VECT_TAB_ADDRESS) - SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */ -#endif /* USER_VECT_TAB_ADDRESS */ -} - -/** - * @brief Update SystemCoreClock variable according to Clock Register Values. - * The SystemCoreClock variable contains the core clock (HCLK), it can - * be used by the user application to setup the SysTick timer or - * configure other parameters. - * - * @note Each time the core clock (HCLK) changes, this function must be called - * to update SystemCoreClock variable value. Otherwise, any - * configuration based on this variable will be incorrect. - * - * @note - The system frequency computed by this function is not the real - * frequency in the chip. It is calculated based on the predefined - * constant and the selected clock source: - * - * - If SYSCLK source is HSI, SystemCoreClock will contain the - * HSI_VALUE(**) - * - * - If SYSCLK source is HSE, SystemCoreClock will contain the - * HSE_VALUE(***) - * - * - If SYSCLK source is PLL, SystemCoreClock will contain the - * HSE_VALUE(***) or HSI_VALUE(*) multiplied/divided by the PLL factors. - * - * (**) HSI_VALUE is a constant defined in stm32g4xx_hal.h file (default - * value 16 MHz) but the real value may vary depending on the variations in - * voltage and temperature. - * - * (***) HSE_VALUE is a constant defined in stm32g4xx_hal.h file - * (default value 24 MHz), user has to ensure that HSE_VALUE is same as the real - * frequency of the crystal used. Otherwise, this function may - * have wrong result. - * - * - The result of this function could be not correct when using - * fractional value for HSE crystal. - * - * @param None - * @retval None - */ -void SystemCoreClockUpdate(void) -{ - uint32_t tmp, pllvco, pllr, pllsource, pllm; - - /* Get SYSCLK source - * -------------------------------------------------------*/ - switch (RCC->CFGR & RCC_CFGR_SWS) { - case 0x04: /* HSI used as system clock source */ - SystemCoreClock = HSI_VALUE; - break; - - case 0x08: /* HSE used as system clock source */ - SystemCoreClock = HSE_VALUE; - break; - - case 0x0C: /* PLL used as system clock source */ - /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN - SYSCLK = PLL_VCO / PLLR - */ - pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC); - pllm = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLM) >> 4) + 1U; - if (pllsource == 0x02UL) /* HSI used as PLL clock source */ - { - pllvco = (HSI_VALUE / pllm); - } else /* HSE used as PLL clock source */ - { - pllvco = (HSE_VALUE / pllm); - } - pllvco = pllvco * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 8); - pllr = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> 25) + 1U) * 2U; - SystemCoreClock = pllvco / pllr; - break; - - default: - break; - } - /* Compute HCLK clock frequency - * --------------------------------------------*/ - /* Get HCLK prescaler */ - tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)]; - /* HCLK clock frequency */ - SystemCoreClock >>= tmp; -} - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ diff --git a/G4CANTESTING/CMakeLists.txt b/G4CANTESTING/CMakeLists.txt index 0c52f1d1b..e1961b557 100644 --- a/G4CANTESTING/CMakeLists.txt +++ b/G4CANTESTING/CMakeLists.txt @@ -39,9 +39,6 @@ target_sources( Core/Src/spi.c Core/Src/stm32g4xx_hal_msp.c Core/Src/stm32g4xx_it.c - Core/Src/syscalls.c - Core/Src/sysmem.c - Core/Src/system_stm32g4xx.c Core/Src/tim.c Core/Src/usart.c ) diff --git a/G4CANTESTING/Core/Inc/stm32_assert.h b/G4CANTESTING/Core/Inc/stm32_assert.h deleted file mode 100644 index 92460620f..000000000 --- a/G4CANTESTING/Core/Inc/stm32_assert.h +++ /dev/null @@ -1,52 +0,0 @@ -/* USER CODE BEGIN Header */ -/** - ****************************************************************************** - * @file stm32_assert.h - * @author MCD Application Team - * @brief STM32 assert file. - ****************************************************************************** - * @attention - * - * Copyright (c) 2019 STMicroelectronics. - * All rights reserved. - * - * This software is licensed under terms that can be found in the LICENSE file - * in the root directory of this software component. - * If no LICENSE file comes with this software, it is provided AS-IS. - * - ****************************************************************************** - */ -/* USER CODE END Header */ -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32_ASSERT_H -#define __STM32_ASSERT_H - -#ifdef __cplusplus -extern "C" { -#endif - -/* Exported types ------------------------------------------------------------*/ -/* Exported constants --------------------------------------------------------*/ -/* Includes ------------------------------------------------------------------*/ -/* Exported macro ------------------------------------------------------------*/ -#ifdef USE_FULL_ASSERT -/** - * @brief The assert_param macro is used for function's parameters check. - * @param expr: If expr is false, it calls assert_failed function - * which reports the name of the source file and the source - * line number of the call that failed. - * If expr is true, it returns no value. - * @retval None - */ -#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__)) -/* Exported functions ------------------------------------------------------- */ -void assert_failed(uint8_t *file, uint32_t line); -#else -#define assert_param(expr) ((void)0U) -#endif /* USE_FULL_ASSERT */ - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32_ASSERT_H */ diff --git a/G4CANTESTING/Core/Src/system_stm32g4xx.c b/G4CANTESTING/Core/Src/system_stm32g4xx.c deleted file mode 100644 index 990865b88..000000000 --- a/G4CANTESTING/Core/Src/system_stm32g4xx.c +++ /dev/null @@ -1,289 +0,0 @@ -/** - ****************************************************************************** - * @file system_stm32g4xx.c - * @author MCD Application Team - * @brief CMSIS Cortex-M4 Device Peripheral Access Layer System Source File - * - * This file provides two functions and one global variable to be called from - * user application: - * - SystemInit(): This function is called at startup just after reset and - * before branch to main program. This call is made inside - * the "startup_stm32g4xx.s" file. - * - * - SystemCoreClock variable: Contains the core clock (HCLK), it can be - *used by the user application to setup the SysTick timer or configure other - *parameters. - * - * - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must - * be called whenever the core clock is changed - * during program execution. - * - * After each device reset the HSI (16 MHz) is used as system clock source. - * Then SystemInit() function is called, in "startup_stm32g4xx.s" file, to - * configure the system clock before to branch to main program. - * - * This file configures the system clock as follows: - *============================================================================= - *----------------------------------------------------------------------------- - * System Clock source | HSI - *----------------------------------------------------------------------------- - * SYSCLK(Hz) | 16000000 - *----------------------------------------------------------------------------- - * HCLK(Hz) | 16000000 - *----------------------------------------------------------------------------- - * AHB Prescaler | 1 - *----------------------------------------------------------------------------- - * APB1 Prescaler | 1 - *----------------------------------------------------------------------------- - * APB2 Prescaler | 1 - *----------------------------------------------------------------------------- - * PLL_M | 1 - *----------------------------------------------------------------------------- - * PLL_N | 16 - *----------------------------------------------------------------------------- - * PLL_P | 7 - *----------------------------------------------------------------------------- - * PLL_Q | 2 - *----------------------------------------------------------------------------- - * PLL_R | 2 - *----------------------------------------------------------------------------- - * Require 48MHz for RNG | Disabled - *----------------------------------------------------------------------------- - *============================================================================= - ****************************************************************************** - * @attention - * - * Copyright (c) 2019 STMicroelectronics. - * All rights reserved. - * - * This software is licensed under terms that can be found in the LICENSE file - * in the root directory of this software component. - * If no LICENSE file comes with this software, it is provided AS-IS. - * - ****************************************************************************** - */ - -/** @addtogroup CMSIS - * @{ - */ - -/** @addtogroup stm32g4xx_system - * @{ - */ - -/** @addtogroup STM32G4xx_System_Private_Includes - * @{ - */ - -#include "stm32g4xx.h" - -#if !defined(HSE_VALUE) -#define HSE_VALUE 24000000U /*!< Value of the External oscillator in Hz */ -#endif /* HSE_VALUE */ - -#if !defined(HSI_VALUE) -#define HSI_VALUE 16000000U /*!< Value of the Internal oscillator in Hz*/ -#endif /* HSI_VALUE */ - -/** - * @} - */ - -/** @addtogroup STM32G4xx_System_Private_TypesDefinitions - * @{ - */ - -/** - * @} - */ - -/** @addtogroup STM32G4xx_System_Private_Defines - * @{ - */ - -/************************* Miscellaneous Configuration ************************/ -/* Note: Following vector table addresses must be defined in line with linker - configuration. */ -/*!< Uncomment the following line if you need to relocate the vector table - anywhere in Flash or Sram, else the vector table is kept at the automatic - remap of boot address selected */ -/* #define USER_VECT_TAB_ADDRESS */ - -#if defined(USER_VECT_TAB_ADDRESS) -/*!< Uncomment the following line if you need to relocate your vector Table - in Sram else user remap will be done in Flash. */ -/* #define VECT_TAB_SRAM */ -#if defined(VECT_TAB_SRAM) -#define VECT_TAB_BASE_ADDRESS \ - SRAM_BASE /*!< Vector Table base address field. \ - This value must be a multiple of 0x200. */ -#define VECT_TAB_OFFSET \ - 0x00000000U /*!< Vector Table base offset field. \ - This value must be a multiple of 0x200. */ -#else -#define VECT_TAB_BASE_ADDRESS \ - FLASH_BASE /*!< Vector Table base address field. \ - This value must be a multiple of 0x200. */ -#define VECT_TAB_OFFSET \ - 0x00000000U /*!< Vector Table base offset field. \ - This value must be a multiple of 0x200. */ -#endif /* VECT_TAB_SRAM */ -#endif /* USER_VECT_TAB_ADDRESS */ -/******************************************************************************/ -/** - * @} - */ - -/** @addtogroup STM32G4xx_System_Private_Macros - * @{ - */ - -/** - * @} - */ - -/** @addtogroup STM32G4xx_System_Private_Variables - * @{ - */ -/* The SystemCoreClock variable is updated in three ways: - 1) by calling CMSIS function SystemCoreClockUpdate() - 2) by calling HAL API function HAL_RCC_GetHCLKFreq() - 3) each time HAL_RCC_ClockConfig() is called to configure the system clock - frequency Note: If you use this function to configure the system clock; then - there is no need to call the 2 first functions listed above, since - SystemCoreClock variable is updated automatically. -*/ -uint32_t SystemCoreClock = HSI_VALUE; - -const uint8_t AHBPrescTable[16] = {0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U, 6U, 7U, 8U, 9U}; -const uint8_t APBPrescTable[8] = {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U}; - -/** - * @} - */ - -/** @addtogroup STM32G4xx_System_Private_FunctionPrototypes - * @{ - */ - -/** - * @} - */ - -/** @addtogroup STM32G4xx_System_Private_Functions - * @{ - */ - -/** - * @brief Setup the microcontroller system. - * @param None - * @retval None - */ - -void SystemInit(void) -{ -/* FPU settings ------------------------------------------------------------*/ -#if (__FPU_PRESENT == 1) && (__FPU_USED == 1) - SCB->CPACR |= ((3UL << (10 * 2)) | (3UL << (11 * 2))); /* set CP10 and CP11 Full Access */ -#endif - - /* Configure the Vector Table location add offset address - * ------------------*/ -#if defined(USER_VECT_TAB_ADDRESS) - SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */ -#endif /* USER_VECT_TAB_ADDRESS */ -} - -/** - * @brief Update SystemCoreClock variable according to Clock Register Values. - * The SystemCoreClock variable contains the core clock (HCLK), it can - * be used by the user application to setup the SysTick timer or - * configure other parameters. - * - * @note Each time the core clock (HCLK) changes, this function must be called - * to update SystemCoreClock variable value. Otherwise, any - * configuration based on this variable will be incorrect. - * - * @note - The system frequency computed by this function is not the real - * frequency in the chip. It is calculated based on the predefined - * constant and the selected clock source: - * - * - If SYSCLK source is HSI, SystemCoreClock will contain the - * HSI_VALUE(**) - * - * - If SYSCLK source is HSE, SystemCoreClock will contain the - * HSE_VALUE(***) - * - * - If SYSCLK source is PLL, SystemCoreClock will contain the - * HSE_VALUE(***) or HSI_VALUE(*) multiplied/divided by the PLL factors. - * - * (**) HSI_VALUE is a constant defined in stm32g4xx_hal.h file (default - * value 16 MHz) but the real value may vary depending on the variations in - * voltage and temperature. - * - * (***) HSE_VALUE is a constant defined in stm32g4xx_hal.h file - * (default value 24 MHz), user has to ensure that HSE_VALUE is same as the real - * frequency of the crystal used. Otherwise, this function may - * have wrong result. - * - * - The result of this function could be not correct when using - * fractional value for HSE crystal. - * - * @param None - * @retval None - */ -void SystemCoreClockUpdate(void) -{ - uint32_t tmp, pllvco, pllr, pllsource, pllm; - - /* Get SYSCLK source - * -------------------------------------------------------*/ - switch (RCC->CFGR & RCC_CFGR_SWS) { - case 0x04: /* HSI used as system clock source */ - SystemCoreClock = HSI_VALUE; - break; - - case 0x08: /* HSE used as system clock source */ - SystemCoreClock = HSE_VALUE; - break; - - case 0x0C: /* PLL used as system clock source */ - /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN - SYSCLK = PLL_VCO / PLLR - */ - pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC); - pllm = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLM) >> 4) + 1U; - if (pllsource == 0x02UL) /* HSI used as PLL clock source */ - { - pllvco = (HSI_VALUE / pllm); - } else /* HSE used as PLL clock source */ - { - pllvco = (HSE_VALUE / pllm); - } - pllvco = pllvco * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 8); - pllr = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> 25) + 1U) * 2U; - SystemCoreClock = pllvco / pllr; - break; - - default: - break; - } - /* Compute HCLK clock frequency - * --------------------------------------------*/ - /* Get HCLK prescaler */ - tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)]; - /* HCLK clock frequency */ - SystemCoreClock >>= tmp; -} - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ diff --git a/G4PERTESTING/CMakeLists.txt b/G4PERTESTING/CMakeLists.txt index fe543a8d0..6a3e34d42 100644 --- a/G4PERTESTING/CMakeLists.txt +++ b/G4PERTESTING/CMakeLists.txt @@ -39,9 +39,6 @@ target_sources( Core/Src/spi.c Core/Src/stm32g4xx_hal_msp.c Core/Src/stm32g4xx_it.c - Core/Src/syscalls.c - Core/Src/sysmem.c - Core/Src/system_stm32g4xx.c Core/Src/tim.c Core/Src/usart.c ) diff --git a/G4PERTESTING/Core/Inc/stm32_assert.h b/G4PERTESTING/Core/Inc/stm32_assert.h deleted file mode 100644 index 92460620f..000000000 --- a/G4PERTESTING/Core/Inc/stm32_assert.h +++ /dev/null @@ -1,52 +0,0 @@ -/* USER CODE BEGIN Header */ -/** - ****************************************************************************** - * @file stm32_assert.h - * @author MCD Application Team - * @brief STM32 assert file. - ****************************************************************************** - * @attention - * - * Copyright (c) 2019 STMicroelectronics. - * All rights reserved. - * - * This software is licensed under terms that can be found in the LICENSE file - * in the root directory of this software component. - * If no LICENSE file comes with this software, it is provided AS-IS. - * - ****************************************************************************** - */ -/* USER CODE END Header */ -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32_ASSERT_H -#define __STM32_ASSERT_H - -#ifdef __cplusplus -extern "C" { -#endif - -/* Exported types ------------------------------------------------------------*/ -/* Exported constants --------------------------------------------------------*/ -/* Includes ------------------------------------------------------------------*/ -/* Exported macro ------------------------------------------------------------*/ -#ifdef USE_FULL_ASSERT -/** - * @brief The assert_param macro is used for function's parameters check. - * @param expr: If expr is false, it calls assert_failed function - * which reports the name of the source file and the source - * line number of the call that failed. - * If expr is true, it returns no value. - * @retval None - */ -#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__)) -/* Exported functions ------------------------------------------------------- */ -void assert_failed(uint8_t *file, uint32_t line); -#else -#define assert_param(expr) ((void)0U) -#endif /* USE_FULL_ASSERT */ - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32_ASSERT_H */ diff --git a/G4PERTESTING/Core/Src/system_stm32g4xx.c b/G4PERTESTING/Core/Src/system_stm32g4xx.c deleted file mode 100644 index 990865b88..000000000 --- a/G4PERTESTING/Core/Src/system_stm32g4xx.c +++ /dev/null @@ -1,289 +0,0 @@ -/** - ****************************************************************************** - * @file system_stm32g4xx.c - * @author MCD Application Team - * @brief CMSIS Cortex-M4 Device Peripheral Access Layer System Source File - * - * This file provides two functions and one global variable to be called from - * user application: - * - SystemInit(): This function is called at startup just after reset and - * before branch to main program. This call is made inside - * the "startup_stm32g4xx.s" file. - * - * - SystemCoreClock variable: Contains the core clock (HCLK), it can be - *used by the user application to setup the SysTick timer or configure other - *parameters. - * - * - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must - * be called whenever the core clock is changed - * during program execution. - * - * After each device reset the HSI (16 MHz) is used as system clock source. - * Then SystemInit() function is called, in "startup_stm32g4xx.s" file, to - * configure the system clock before to branch to main program. - * - * This file configures the system clock as follows: - *============================================================================= - *----------------------------------------------------------------------------- - * System Clock source | HSI - *----------------------------------------------------------------------------- - * SYSCLK(Hz) | 16000000 - *----------------------------------------------------------------------------- - * HCLK(Hz) | 16000000 - *----------------------------------------------------------------------------- - * AHB Prescaler | 1 - *----------------------------------------------------------------------------- - * APB1 Prescaler | 1 - *----------------------------------------------------------------------------- - * APB2 Prescaler | 1 - *----------------------------------------------------------------------------- - * PLL_M | 1 - *----------------------------------------------------------------------------- - * PLL_N | 16 - *----------------------------------------------------------------------------- - * PLL_P | 7 - *----------------------------------------------------------------------------- - * PLL_Q | 2 - *----------------------------------------------------------------------------- - * PLL_R | 2 - *----------------------------------------------------------------------------- - * Require 48MHz for RNG | Disabled - *----------------------------------------------------------------------------- - *============================================================================= - ****************************************************************************** - * @attention - * - * Copyright (c) 2019 STMicroelectronics. - * All rights reserved. - * - * This software is licensed under terms that can be found in the LICENSE file - * in the root directory of this software component. - * If no LICENSE file comes with this software, it is provided AS-IS. - * - ****************************************************************************** - */ - -/** @addtogroup CMSIS - * @{ - */ - -/** @addtogroup stm32g4xx_system - * @{ - */ - -/** @addtogroup STM32G4xx_System_Private_Includes - * @{ - */ - -#include "stm32g4xx.h" - -#if !defined(HSE_VALUE) -#define HSE_VALUE 24000000U /*!< Value of the External oscillator in Hz */ -#endif /* HSE_VALUE */ - -#if !defined(HSI_VALUE) -#define HSI_VALUE 16000000U /*!< Value of the Internal oscillator in Hz*/ -#endif /* HSI_VALUE */ - -/** - * @} - */ - -/** @addtogroup STM32G4xx_System_Private_TypesDefinitions - * @{ - */ - -/** - * @} - */ - -/** @addtogroup STM32G4xx_System_Private_Defines - * @{ - */ - -/************************* Miscellaneous Configuration ************************/ -/* Note: Following vector table addresses must be defined in line with linker - configuration. */ -/*!< Uncomment the following line if you need to relocate the vector table - anywhere in Flash or Sram, else the vector table is kept at the automatic - remap of boot address selected */ -/* #define USER_VECT_TAB_ADDRESS */ - -#if defined(USER_VECT_TAB_ADDRESS) -/*!< Uncomment the following line if you need to relocate your vector Table - in Sram else user remap will be done in Flash. */ -/* #define VECT_TAB_SRAM */ -#if defined(VECT_TAB_SRAM) -#define VECT_TAB_BASE_ADDRESS \ - SRAM_BASE /*!< Vector Table base address field. \ - This value must be a multiple of 0x200. */ -#define VECT_TAB_OFFSET \ - 0x00000000U /*!< Vector Table base offset field. \ - This value must be a multiple of 0x200. */ -#else -#define VECT_TAB_BASE_ADDRESS \ - FLASH_BASE /*!< Vector Table base address field. \ - This value must be a multiple of 0x200. */ -#define VECT_TAB_OFFSET \ - 0x00000000U /*!< Vector Table base offset field. \ - This value must be a multiple of 0x200. */ -#endif /* VECT_TAB_SRAM */ -#endif /* USER_VECT_TAB_ADDRESS */ -/******************************************************************************/ -/** - * @} - */ - -/** @addtogroup STM32G4xx_System_Private_Macros - * @{ - */ - -/** - * @} - */ - -/** @addtogroup STM32G4xx_System_Private_Variables - * @{ - */ -/* The SystemCoreClock variable is updated in three ways: - 1) by calling CMSIS function SystemCoreClockUpdate() - 2) by calling HAL API function HAL_RCC_GetHCLKFreq() - 3) each time HAL_RCC_ClockConfig() is called to configure the system clock - frequency Note: If you use this function to configure the system clock; then - there is no need to call the 2 first functions listed above, since - SystemCoreClock variable is updated automatically. -*/ -uint32_t SystemCoreClock = HSI_VALUE; - -const uint8_t AHBPrescTable[16] = {0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U, 6U, 7U, 8U, 9U}; -const uint8_t APBPrescTable[8] = {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U}; - -/** - * @} - */ - -/** @addtogroup STM32G4xx_System_Private_FunctionPrototypes - * @{ - */ - -/** - * @} - */ - -/** @addtogroup STM32G4xx_System_Private_Functions - * @{ - */ - -/** - * @brief Setup the microcontroller system. - * @param None - * @retval None - */ - -void SystemInit(void) -{ -/* FPU settings ------------------------------------------------------------*/ -#if (__FPU_PRESENT == 1) && (__FPU_USED == 1) - SCB->CPACR |= ((3UL << (10 * 2)) | (3UL << (11 * 2))); /* set CP10 and CP11 Full Access */ -#endif - - /* Configure the Vector Table location add offset address - * ------------------*/ -#if defined(USER_VECT_TAB_ADDRESS) - SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */ -#endif /* USER_VECT_TAB_ADDRESS */ -} - -/** - * @brief Update SystemCoreClock variable according to Clock Register Values. - * The SystemCoreClock variable contains the core clock (HCLK), it can - * be used by the user application to setup the SysTick timer or - * configure other parameters. - * - * @note Each time the core clock (HCLK) changes, this function must be called - * to update SystemCoreClock variable value. Otherwise, any - * configuration based on this variable will be incorrect. - * - * @note - The system frequency computed by this function is not the real - * frequency in the chip. It is calculated based on the predefined - * constant and the selected clock source: - * - * - If SYSCLK source is HSI, SystemCoreClock will contain the - * HSI_VALUE(**) - * - * - If SYSCLK source is HSE, SystemCoreClock will contain the - * HSE_VALUE(***) - * - * - If SYSCLK source is PLL, SystemCoreClock will contain the - * HSE_VALUE(***) or HSI_VALUE(*) multiplied/divided by the PLL factors. - * - * (**) HSI_VALUE is a constant defined in stm32g4xx_hal.h file (default - * value 16 MHz) but the real value may vary depending on the variations in - * voltage and temperature. - * - * (***) HSE_VALUE is a constant defined in stm32g4xx_hal.h file - * (default value 24 MHz), user has to ensure that HSE_VALUE is same as the real - * frequency of the crystal used. Otherwise, this function may - * have wrong result. - * - * - The result of this function could be not correct when using - * fractional value for HSE crystal. - * - * @param None - * @retval None - */ -void SystemCoreClockUpdate(void) -{ - uint32_t tmp, pllvco, pllr, pllsource, pllm; - - /* Get SYSCLK source - * -------------------------------------------------------*/ - switch (RCC->CFGR & RCC_CFGR_SWS) { - case 0x04: /* HSI used as system clock source */ - SystemCoreClock = HSI_VALUE; - break; - - case 0x08: /* HSE used as system clock source */ - SystemCoreClock = HSE_VALUE; - break; - - case 0x0C: /* PLL used as system clock source */ - /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN - SYSCLK = PLL_VCO / PLLR - */ - pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC); - pllm = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLM) >> 4) + 1U; - if (pllsource == 0x02UL) /* HSI used as PLL clock source */ - { - pllvco = (HSI_VALUE / pllm); - } else /* HSE used as PLL clock source */ - { - pllvco = (HSE_VALUE / pllm); - } - pllvco = pllvco * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 8); - pllr = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> 25) + 1U) * 2U; - SystemCoreClock = pllvco / pllr; - break; - - default: - break; - } - /* Compute HCLK clock frequency - * --------------------------------------------*/ - /* Get HCLK prescaler */ - tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)]; - /* HCLK clock frequency */ - SystemCoreClock >>= tmp; -} - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ diff --git a/Lib/Vendor/STM32_HAL_LL/STM32G4xx/Inc/stm32_assert_template.h b/Lib/Vendor/STM32_HAL_LL/STM32G4xx/Inc/stm32_assert_template.h deleted file mode 100644 index 32c203671..000000000 --- a/Lib/Vendor/STM32_HAL_LL/STM32G4xx/Inc/stm32_assert_template.h +++ /dev/null @@ -1,53 +0,0 @@ -/** - ****************************************************************************** - * @file stm32_assert.h - * @author MCD Application Team - * @brief STM32 assert template file. - * This file should be copied to the application folder and renamed - * to stm32_assert.h. - ****************************************************************************** - * @attention - * - * Copyright (c) 2019 STMicroelectronics. - * All rights reserved. - * - * This software is licensed under terms that can be found in the LICENSE file - * in the root directory of this software component. - * If no LICENSE file comes with this software, it is provided AS-IS. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef STM32_ASSERT_H -#define STM32_ASSERT_H - -#ifdef __cplusplus -extern "C" { -#endif - -/* Exported types ------------------------------------------------------------*/ -/* Exported constants --------------------------------------------------------*/ -/* Includes ------------------------------------------------------------------*/ -/* Exported macro ------------------------------------------------------------*/ -#ifdef USE_FULL_ASSERT -/** - * @brief The assert_param macro is used for function's parameters check. - * @param expr: If expr is false, it calls assert_failed function - * which reports the name of the source file and the source - * line number of the call that failed. - * If expr is true, it returns no value. - * @retval None - */ -#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__)) -/* Exported functions ------------------------------------------------------- */ -void assert_failed(uint8_t *file, uint32_t line); -#else -#define assert_param(expr) ((void)0U) -#endif /* USE_FULL_ASSERT */ - -#ifdef __cplusplus -} -#endif - -#endif /* STM32_ASSERT_H */ diff --git a/Lib/Vendor/STM32_HAL_LL/STM32L4xx/Inc/stm32_assert_template.h b/Lib/Vendor/STM32_HAL_LL/STM32L4xx/Inc/stm32_assert_template.h deleted file mode 100644 index 42a52afd2..000000000 --- a/Lib/Vendor/STM32_HAL_LL/STM32L4xx/Inc/stm32_assert_template.h +++ /dev/null @@ -1,53 +0,0 @@ -/** - ****************************************************************************** - * @file stm32_assert.h - * @author MCD Application Team - * @brief STM32 assert template file. - * This file should be copied to the application folder and renamed - * to stm32_assert.h. - ****************************************************************************** - * @attention - * - * Copyright (c) 2017 STMicroelectronics. - * All rights reserved. - * - * This software is licensed under terms that can be found in the LICENSE file - * in the root directory of this software component. - * If no LICENSE file comes with this software, it is provided AS-IS. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef STM32_ASSERT_H -#define STM32_ASSERT_H - -#ifdef __cplusplus -extern "C" { -#endif - -/* Exported types ------------------------------------------------------------*/ -/* Exported constants --------------------------------------------------------*/ -/* Includes ------------------------------------------------------------------*/ -/* Exported macro ------------------------------------------------------------*/ -#ifdef USE_FULL_ASSERT -/** - * @brief The assert_param macro is used for function's parameters check. - * @param expr: If expr is false, it calls assert_failed function - * which reports the name of the source file and the source - * line number of the call that failed. - * If expr is true, it returns no value. - * @retval None - */ -#define assert_param(expr) ((expr) ? (void)0U : assert_failed((char *)__FILE__, __LINE__)) -/* Exported functions ------------------------------------------------------- */ -void assert_failed(char *file, uint32_t line); -#else -#define assert_param(expr) ((void)0U) -#endif /* USE_FULL_ASSERT */ - -#ifdef __cplusplus -} -#endif - -#endif /* STM32_ASSERT_H */ diff --git a/Lib/Vendor/STM32_HAL_LL/STM32U5xx/Inc/stm32_assert_template.h b/Lib/Vendor/STM32_HAL_LL/STM32U5xx/Inc/stm32_assert_template.h deleted file mode 100644 index 11e2bc952..000000000 --- a/Lib/Vendor/STM32_HAL_LL/STM32U5xx/Inc/stm32_assert_template.h +++ /dev/null @@ -1,53 +0,0 @@ -/** - ****************************************************************************** - * @file stm32_assert.h - * @author MCD Application Team - * @brief STM32 assert template file. - * This file should be copied to the application folder and renamed - * to stm32_assert.h. - ****************************************************************************** - * @attention - * - * Copyright (c) 2021 STMicroelectronics. - * All rights reserved. - * - * This software is licensed under terms that can be found in the LICENSE file - * in the root directory of this software component. - * If no LICENSE file comes with this software, it is provided AS-IS. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32_ASSERT_H -#define __STM32_ASSERT_H - -#ifdef __cplusplus -extern "C" { -#endif - -/* Exported types ------------------------------------------------------------*/ -/* Exported constants --------------------------------------------------------*/ -/* Includes ------------------------------------------------------------------*/ -/* Exported macro ------------------------------------------------------------*/ -#ifdef USE_FULL_ASSERT -/** - * @brief The assert_param macro is used for function's parameters check. - * @param expr If expr is false, it calls assert_failed function - * which reports the name of the source file and the source - * line number of the call that failed. - * If expr is true, it returns no value. - * @retval None - */ -#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__)) -/* Exported functions ------------------------------------------------------- */ -void assert_failed(uint8_t *file, uint32_t line); -#else -#define assert_param(expr) ((void)0U) -#endif /* USE_FULL_ASSERT */ - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32_ASSERT_H */ diff --git a/Onboarding/W3_G4SPI_Receive/CMakeLists.txt b/Onboarding/W3_G4SPI_Receive/CMakeLists.txt index a3763fc78..2a9cb25be 100644 --- a/Onboarding/W3_G4SPI_Receive/CMakeLists.txt +++ b/Onboarding/W3_G4SPI_Receive/CMakeLists.txt @@ -38,9 +38,6 @@ target_sources( #Core/Src/spi.c Core/Src/stm32g4xx_it.c Core/Src/stm32g4xx_hal_msp.c - Core/Src/system_stm32g4xx.c - Core/Src/sysmem.c - Core/Src/syscalls.c ) target_link_libraries(${GR_PROJECT_NAME}_USER_CODE INTERFACE) diff --git a/Onboarding/W3_G4SPI_Receive/Core/Src/system_stm32g4xx.c b/Onboarding/W3_G4SPI_Receive/Core/Src/system_stm32g4xx.c deleted file mode 100644 index 990865b88..000000000 --- a/Onboarding/W3_G4SPI_Receive/Core/Src/system_stm32g4xx.c +++ /dev/null @@ -1,289 +0,0 @@ -/** - ****************************************************************************** - * @file system_stm32g4xx.c - * @author MCD Application Team - * @brief CMSIS Cortex-M4 Device Peripheral Access Layer System Source File - * - * This file provides two functions and one global variable to be called from - * user application: - * - SystemInit(): This function is called at startup just after reset and - * before branch to main program. This call is made inside - * the "startup_stm32g4xx.s" file. - * - * - SystemCoreClock variable: Contains the core clock (HCLK), it can be - *used by the user application to setup the SysTick timer or configure other - *parameters. - * - * - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must - * be called whenever the core clock is changed - * during program execution. - * - * After each device reset the HSI (16 MHz) is used as system clock source. - * Then SystemInit() function is called, in "startup_stm32g4xx.s" file, to - * configure the system clock before to branch to main program. - * - * This file configures the system clock as follows: - *============================================================================= - *----------------------------------------------------------------------------- - * System Clock source | HSI - *----------------------------------------------------------------------------- - * SYSCLK(Hz) | 16000000 - *----------------------------------------------------------------------------- - * HCLK(Hz) | 16000000 - *----------------------------------------------------------------------------- - * AHB Prescaler | 1 - *----------------------------------------------------------------------------- - * APB1 Prescaler | 1 - *----------------------------------------------------------------------------- - * APB2 Prescaler | 1 - *----------------------------------------------------------------------------- - * PLL_M | 1 - *----------------------------------------------------------------------------- - * PLL_N | 16 - *----------------------------------------------------------------------------- - * PLL_P | 7 - *----------------------------------------------------------------------------- - * PLL_Q | 2 - *----------------------------------------------------------------------------- - * PLL_R | 2 - *----------------------------------------------------------------------------- - * Require 48MHz for RNG | Disabled - *----------------------------------------------------------------------------- - *============================================================================= - ****************************************************************************** - * @attention - * - * Copyright (c) 2019 STMicroelectronics. - * All rights reserved. - * - * This software is licensed under terms that can be found in the LICENSE file - * in the root directory of this software component. - * If no LICENSE file comes with this software, it is provided AS-IS. - * - ****************************************************************************** - */ - -/** @addtogroup CMSIS - * @{ - */ - -/** @addtogroup stm32g4xx_system - * @{ - */ - -/** @addtogroup STM32G4xx_System_Private_Includes - * @{ - */ - -#include "stm32g4xx.h" - -#if !defined(HSE_VALUE) -#define HSE_VALUE 24000000U /*!< Value of the External oscillator in Hz */ -#endif /* HSE_VALUE */ - -#if !defined(HSI_VALUE) -#define HSI_VALUE 16000000U /*!< Value of the Internal oscillator in Hz*/ -#endif /* HSI_VALUE */ - -/** - * @} - */ - -/** @addtogroup STM32G4xx_System_Private_TypesDefinitions - * @{ - */ - -/** - * @} - */ - -/** @addtogroup STM32G4xx_System_Private_Defines - * @{ - */ - -/************************* Miscellaneous Configuration ************************/ -/* Note: Following vector table addresses must be defined in line with linker - configuration. */ -/*!< Uncomment the following line if you need to relocate the vector table - anywhere in Flash or Sram, else the vector table is kept at the automatic - remap of boot address selected */ -/* #define USER_VECT_TAB_ADDRESS */ - -#if defined(USER_VECT_TAB_ADDRESS) -/*!< Uncomment the following line if you need to relocate your vector Table - in Sram else user remap will be done in Flash. */ -/* #define VECT_TAB_SRAM */ -#if defined(VECT_TAB_SRAM) -#define VECT_TAB_BASE_ADDRESS \ - SRAM_BASE /*!< Vector Table base address field. \ - This value must be a multiple of 0x200. */ -#define VECT_TAB_OFFSET \ - 0x00000000U /*!< Vector Table base offset field. \ - This value must be a multiple of 0x200. */ -#else -#define VECT_TAB_BASE_ADDRESS \ - FLASH_BASE /*!< Vector Table base address field. \ - This value must be a multiple of 0x200. */ -#define VECT_TAB_OFFSET \ - 0x00000000U /*!< Vector Table base offset field. \ - This value must be a multiple of 0x200. */ -#endif /* VECT_TAB_SRAM */ -#endif /* USER_VECT_TAB_ADDRESS */ -/******************************************************************************/ -/** - * @} - */ - -/** @addtogroup STM32G4xx_System_Private_Macros - * @{ - */ - -/** - * @} - */ - -/** @addtogroup STM32G4xx_System_Private_Variables - * @{ - */ -/* The SystemCoreClock variable is updated in three ways: - 1) by calling CMSIS function SystemCoreClockUpdate() - 2) by calling HAL API function HAL_RCC_GetHCLKFreq() - 3) each time HAL_RCC_ClockConfig() is called to configure the system clock - frequency Note: If you use this function to configure the system clock; then - there is no need to call the 2 first functions listed above, since - SystemCoreClock variable is updated automatically. -*/ -uint32_t SystemCoreClock = HSI_VALUE; - -const uint8_t AHBPrescTable[16] = {0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U, 6U, 7U, 8U, 9U}; -const uint8_t APBPrescTable[8] = {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U}; - -/** - * @} - */ - -/** @addtogroup STM32G4xx_System_Private_FunctionPrototypes - * @{ - */ - -/** - * @} - */ - -/** @addtogroup STM32G4xx_System_Private_Functions - * @{ - */ - -/** - * @brief Setup the microcontroller system. - * @param None - * @retval None - */ - -void SystemInit(void) -{ -/* FPU settings ------------------------------------------------------------*/ -#if (__FPU_PRESENT == 1) && (__FPU_USED == 1) - SCB->CPACR |= ((3UL << (10 * 2)) | (3UL << (11 * 2))); /* set CP10 and CP11 Full Access */ -#endif - - /* Configure the Vector Table location add offset address - * ------------------*/ -#if defined(USER_VECT_TAB_ADDRESS) - SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */ -#endif /* USER_VECT_TAB_ADDRESS */ -} - -/** - * @brief Update SystemCoreClock variable according to Clock Register Values. - * The SystemCoreClock variable contains the core clock (HCLK), it can - * be used by the user application to setup the SysTick timer or - * configure other parameters. - * - * @note Each time the core clock (HCLK) changes, this function must be called - * to update SystemCoreClock variable value. Otherwise, any - * configuration based on this variable will be incorrect. - * - * @note - The system frequency computed by this function is not the real - * frequency in the chip. It is calculated based on the predefined - * constant and the selected clock source: - * - * - If SYSCLK source is HSI, SystemCoreClock will contain the - * HSI_VALUE(**) - * - * - If SYSCLK source is HSE, SystemCoreClock will contain the - * HSE_VALUE(***) - * - * - If SYSCLK source is PLL, SystemCoreClock will contain the - * HSE_VALUE(***) or HSI_VALUE(*) multiplied/divided by the PLL factors. - * - * (**) HSI_VALUE is a constant defined in stm32g4xx_hal.h file (default - * value 16 MHz) but the real value may vary depending on the variations in - * voltage and temperature. - * - * (***) HSE_VALUE is a constant defined in stm32g4xx_hal.h file - * (default value 24 MHz), user has to ensure that HSE_VALUE is same as the real - * frequency of the crystal used. Otherwise, this function may - * have wrong result. - * - * - The result of this function could be not correct when using - * fractional value for HSE crystal. - * - * @param None - * @retval None - */ -void SystemCoreClockUpdate(void) -{ - uint32_t tmp, pllvco, pllr, pllsource, pllm; - - /* Get SYSCLK source - * -------------------------------------------------------*/ - switch (RCC->CFGR & RCC_CFGR_SWS) { - case 0x04: /* HSI used as system clock source */ - SystemCoreClock = HSI_VALUE; - break; - - case 0x08: /* HSE used as system clock source */ - SystemCoreClock = HSE_VALUE; - break; - - case 0x0C: /* PLL used as system clock source */ - /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN - SYSCLK = PLL_VCO / PLLR - */ - pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC); - pllm = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLM) >> 4) + 1U; - if (pllsource == 0x02UL) /* HSI used as PLL clock source */ - { - pllvco = (HSI_VALUE / pllm); - } else /* HSE used as PLL clock source */ - { - pllvco = (HSE_VALUE / pllm); - } - pllvco = pllvco * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 8); - pllr = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> 25) + 1U) * 2U; - SystemCoreClock = pllvco / pllr; - break; - - default: - break; - } - /* Compute HCLK clock frequency - * --------------------------------------------*/ - /* Get HCLK prescaler */ - tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)]; - /* HCLK clock frequency */ - SystemCoreClock >>= tmp; -} - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ diff --git a/Onboarding/W3_G4SPI_Transmit/CMakeLists.txt b/Onboarding/W3_G4SPI_Transmit/CMakeLists.txt index a3763fc78..2a9cb25be 100644 --- a/Onboarding/W3_G4SPI_Transmit/CMakeLists.txt +++ b/Onboarding/W3_G4SPI_Transmit/CMakeLists.txt @@ -38,9 +38,6 @@ target_sources( #Core/Src/spi.c Core/Src/stm32g4xx_it.c Core/Src/stm32g4xx_hal_msp.c - Core/Src/system_stm32g4xx.c - Core/Src/sysmem.c - Core/Src/syscalls.c ) target_link_libraries(${GR_PROJECT_NAME}_USER_CODE INTERFACE) diff --git a/Onboarding/W3_G4SPI_Transmit/Core/Src/system_stm32g4xx.c b/Onboarding/W3_G4SPI_Transmit/Core/Src/system_stm32g4xx.c deleted file mode 100644 index 990865b88..000000000 --- a/Onboarding/W3_G4SPI_Transmit/Core/Src/system_stm32g4xx.c +++ /dev/null @@ -1,289 +0,0 @@ -/** - ****************************************************************************** - * @file system_stm32g4xx.c - * @author MCD Application Team - * @brief CMSIS Cortex-M4 Device Peripheral Access Layer System Source File - * - * This file provides two functions and one global variable to be called from - * user application: - * - SystemInit(): This function is called at startup just after reset and - * before branch to main program. This call is made inside - * the "startup_stm32g4xx.s" file. - * - * - SystemCoreClock variable: Contains the core clock (HCLK), it can be - *used by the user application to setup the SysTick timer or configure other - *parameters. - * - * - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must - * be called whenever the core clock is changed - * during program execution. - * - * After each device reset the HSI (16 MHz) is used as system clock source. - * Then SystemInit() function is called, in "startup_stm32g4xx.s" file, to - * configure the system clock before to branch to main program. - * - * This file configures the system clock as follows: - *============================================================================= - *----------------------------------------------------------------------------- - * System Clock source | HSI - *----------------------------------------------------------------------------- - * SYSCLK(Hz) | 16000000 - *----------------------------------------------------------------------------- - * HCLK(Hz) | 16000000 - *----------------------------------------------------------------------------- - * AHB Prescaler | 1 - *----------------------------------------------------------------------------- - * APB1 Prescaler | 1 - *----------------------------------------------------------------------------- - * APB2 Prescaler | 1 - *----------------------------------------------------------------------------- - * PLL_M | 1 - *----------------------------------------------------------------------------- - * PLL_N | 16 - *----------------------------------------------------------------------------- - * PLL_P | 7 - *----------------------------------------------------------------------------- - * PLL_Q | 2 - *----------------------------------------------------------------------------- - * PLL_R | 2 - *----------------------------------------------------------------------------- - * Require 48MHz for RNG | Disabled - *----------------------------------------------------------------------------- - *============================================================================= - ****************************************************************************** - * @attention - * - * Copyright (c) 2019 STMicroelectronics. - * All rights reserved. - * - * This software is licensed under terms that can be found in the LICENSE file - * in the root directory of this software component. - * If no LICENSE file comes with this software, it is provided AS-IS. - * - ****************************************************************************** - */ - -/** @addtogroup CMSIS - * @{ - */ - -/** @addtogroup stm32g4xx_system - * @{ - */ - -/** @addtogroup STM32G4xx_System_Private_Includes - * @{ - */ - -#include "stm32g4xx.h" - -#if !defined(HSE_VALUE) -#define HSE_VALUE 24000000U /*!< Value of the External oscillator in Hz */ -#endif /* HSE_VALUE */ - -#if !defined(HSI_VALUE) -#define HSI_VALUE 16000000U /*!< Value of the Internal oscillator in Hz*/ -#endif /* HSI_VALUE */ - -/** - * @} - */ - -/** @addtogroup STM32G4xx_System_Private_TypesDefinitions - * @{ - */ - -/** - * @} - */ - -/** @addtogroup STM32G4xx_System_Private_Defines - * @{ - */ - -/************************* Miscellaneous Configuration ************************/ -/* Note: Following vector table addresses must be defined in line with linker - configuration. */ -/*!< Uncomment the following line if you need to relocate the vector table - anywhere in Flash or Sram, else the vector table is kept at the automatic - remap of boot address selected */ -/* #define USER_VECT_TAB_ADDRESS */ - -#if defined(USER_VECT_TAB_ADDRESS) -/*!< Uncomment the following line if you need to relocate your vector Table - in Sram else user remap will be done in Flash. */ -/* #define VECT_TAB_SRAM */ -#if defined(VECT_TAB_SRAM) -#define VECT_TAB_BASE_ADDRESS \ - SRAM_BASE /*!< Vector Table base address field. \ - This value must be a multiple of 0x200. */ -#define VECT_TAB_OFFSET \ - 0x00000000U /*!< Vector Table base offset field. \ - This value must be a multiple of 0x200. */ -#else -#define VECT_TAB_BASE_ADDRESS \ - FLASH_BASE /*!< Vector Table base address field. \ - This value must be a multiple of 0x200. */ -#define VECT_TAB_OFFSET \ - 0x00000000U /*!< Vector Table base offset field. \ - This value must be a multiple of 0x200. */ -#endif /* VECT_TAB_SRAM */ -#endif /* USER_VECT_TAB_ADDRESS */ -/******************************************************************************/ -/** - * @} - */ - -/** @addtogroup STM32G4xx_System_Private_Macros - * @{ - */ - -/** - * @} - */ - -/** @addtogroup STM32G4xx_System_Private_Variables - * @{ - */ -/* The SystemCoreClock variable is updated in three ways: - 1) by calling CMSIS function SystemCoreClockUpdate() - 2) by calling HAL API function HAL_RCC_GetHCLKFreq() - 3) each time HAL_RCC_ClockConfig() is called to configure the system clock - frequency Note: If you use this function to configure the system clock; then - there is no need to call the 2 first functions listed above, since - SystemCoreClock variable is updated automatically. -*/ -uint32_t SystemCoreClock = HSI_VALUE; - -const uint8_t AHBPrescTable[16] = {0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U, 6U, 7U, 8U, 9U}; -const uint8_t APBPrescTable[8] = {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U}; - -/** - * @} - */ - -/** @addtogroup STM32G4xx_System_Private_FunctionPrototypes - * @{ - */ - -/** - * @} - */ - -/** @addtogroup STM32G4xx_System_Private_Functions - * @{ - */ - -/** - * @brief Setup the microcontroller system. - * @param None - * @retval None - */ - -void SystemInit(void) -{ -/* FPU settings ------------------------------------------------------------*/ -#if (__FPU_PRESENT == 1) && (__FPU_USED == 1) - SCB->CPACR |= ((3UL << (10 * 2)) | (3UL << (11 * 2))); /* set CP10 and CP11 Full Access */ -#endif - - /* Configure the Vector Table location add offset address - * ------------------*/ -#if defined(USER_VECT_TAB_ADDRESS) - SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */ -#endif /* USER_VECT_TAB_ADDRESS */ -} - -/** - * @brief Update SystemCoreClock variable according to Clock Register Values. - * The SystemCoreClock variable contains the core clock (HCLK), it can - * be used by the user application to setup the SysTick timer or - * configure other parameters. - * - * @note Each time the core clock (HCLK) changes, this function must be called - * to update SystemCoreClock variable value. Otherwise, any - * configuration based on this variable will be incorrect. - * - * @note - The system frequency computed by this function is not the real - * frequency in the chip. It is calculated based on the predefined - * constant and the selected clock source: - * - * - If SYSCLK source is HSI, SystemCoreClock will contain the - * HSI_VALUE(**) - * - * - If SYSCLK source is HSE, SystemCoreClock will contain the - * HSE_VALUE(***) - * - * - If SYSCLK source is PLL, SystemCoreClock will contain the - * HSE_VALUE(***) or HSI_VALUE(*) multiplied/divided by the PLL factors. - * - * (**) HSI_VALUE is a constant defined in stm32g4xx_hal.h file (default - * value 16 MHz) but the real value may vary depending on the variations in - * voltage and temperature. - * - * (***) HSE_VALUE is a constant defined in stm32g4xx_hal.h file - * (default value 24 MHz), user has to ensure that HSE_VALUE is same as the real - * frequency of the crystal used. Otherwise, this function may - * have wrong result. - * - * - The result of this function could be not correct when using - * fractional value for HSE crystal. - * - * @param None - * @retval None - */ -void SystemCoreClockUpdate(void) -{ - uint32_t tmp, pllvco, pllr, pllsource, pllm; - - /* Get SYSCLK source - * -------------------------------------------------------*/ - switch (RCC->CFGR & RCC_CFGR_SWS) { - case 0x04: /* HSI used as system clock source */ - SystemCoreClock = HSI_VALUE; - break; - - case 0x08: /* HSE used as system clock source */ - SystemCoreClock = HSE_VALUE; - break; - - case 0x0C: /* PLL used as system clock source */ - /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN - SYSCLK = PLL_VCO / PLLR - */ - pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC); - pllm = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLM) >> 4) + 1U; - if (pllsource == 0x02UL) /* HSI used as PLL clock source */ - { - pllvco = (HSI_VALUE / pllm); - } else /* HSE used as PLL clock source */ - { - pllvco = (HSE_VALUE / pllm); - } - pllvco = pllvco * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 8); - pllr = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLR) >> 25) + 1U) * 2U; - SystemCoreClock = pllvco / pllr; - break; - - default: - break; - } - /* Compute HCLK clock frequency - * --------------------------------------------*/ - /* Get HCLK prescaler */ - tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)]; - /* HCLK clock frequency */ - SystemCoreClock >>= tmp; -} - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ From d85259801a77374115f884d3aabda2d7a535832c Mon Sep 17 00:00:00 2001 From: Daniel Hansen Date: Thu, 19 Feb 2026 02:53:33 -0800 Subject: [PATCH 3/6] Large-scale versioning Signed-off-by: Daniel Hansen --- .../system_stm32g4xx.c | 0 .../system_stm32l4xx.c | 0 .../system_stm32u5xx.c | 0 Lib/Vendor/STM32_HAL_LL/cube.cmake | 6 +++--- 4 files changed, 3 insertions(+), 3 deletions(-) rename Lib/Vendor/STM32_HAL_LL/{CMSIS_Integration => CMSIS_5_Integration}/system_stm32g4xx.c (100%) rename Lib/Vendor/STM32_HAL_LL/{CMSIS_Integration => CMSIS_5_Integration}/system_stm32l4xx.c (100%) rename Lib/Vendor/STM32_HAL_LL/{CMSIS_Integration => CMSIS_5_Integration}/system_stm32u5xx.c (100%) diff --git a/Lib/Vendor/STM32_HAL_LL/CMSIS_Integration/system_stm32g4xx.c b/Lib/Vendor/STM32_HAL_LL/CMSIS_5_Integration/system_stm32g4xx.c similarity index 100% rename from Lib/Vendor/STM32_HAL_LL/CMSIS_Integration/system_stm32g4xx.c rename to Lib/Vendor/STM32_HAL_LL/CMSIS_5_Integration/system_stm32g4xx.c diff --git a/Lib/Vendor/STM32_HAL_LL/CMSIS_Integration/system_stm32l4xx.c b/Lib/Vendor/STM32_HAL_LL/CMSIS_5_Integration/system_stm32l4xx.c similarity index 100% rename from Lib/Vendor/STM32_HAL_LL/CMSIS_Integration/system_stm32l4xx.c rename to Lib/Vendor/STM32_HAL_LL/CMSIS_5_Integration/system_stm32l4xx.c diff --git a/Lib/Vendor/STM32_HAL_LL/CMSIS_Integration/system_stm32u5xx.c b/Lib/Vendor/STM32_HAL_LL/CMSIS_5_Integration/system_stm32u5xx.c similarity index 100% rename from Lib/Vendor/STM32_HAL_LL/CMSIS_Integration/system_stm32u5xx.c rename to Lib/Vendor/STM32_HAL_LL/CMSIS_5_Integration/system_stm32u5xx.c diff --git a/Lib/Vendor/STM32_HAL_LL/cube.cmake b/Lib/Vendor/STM32_HAL_LL/cube.cmake index 049574809..5876ca17d 100644 --- a/Lib/Vendor/STM32_HAL_LL/cube.cmake +++ b/Lib/Vendor/STM32_HAL_LL/cube.cmake @@ -2,15 +2,15 @@ include("${CMAKE_CURRENT_LIST_DIR}/Common/stm32common.cmake") include("${CMAKE_CURRENT_LIST_DIR}/STM32G4xx/stm32g4xx.cmake") target_link_libraries(STM32_HAL_LL_G4xx INTERFACE STM32_Cube_Common) -target_sources(STM32_HAL_LL_G4xx INTERFACE ${CMAKE_CURRENT_LIST_DIR}/CMSIS_Integration/system_stm32g4xx.c) +target_sources(STM32_HAL_LL_G4xx INTERFACE ${CMAKE_CURRENT_LIST_DIR}/CMSIS_5_Integration/system_stm32g4xx.c) include("${CMAKE_CURRENT_LIST_DIR}/STM32U5xx/stm32u5xx.cmake") target_link_libraries(STM32_HAL_LL_U5xx INTERFACE STM32_Cube_Common) -target_sources(STM32_HAL_LL_U5xx INTERFACE ${CMAKE_CURRENT_LIST_DIR}/CMSIS_Integration/system_stm32u5xx.c) +target_sources(STM32_HAL_LL_U5xx INTERFACE ${CMAKE_CURRENT_LIST_DIR}/CMSIS_5_Integration/system_stm32u5xx.c) include("${CMAKE_CURRENT_LIST_DIR}/STM32L4xx/stm32l4xx.cmake") target_link_libraries(STM32_HAL_LL_L4xx INTERFACE STM32_Cube_Common) -target_sources(STM32_HAL_LL_L4xx INTERFACE ${CMAKE_CURRENT_LIST_DIR}/CMSIS_Integration/system_stm32l4xx.c) +target_sources(STM32_HAL_LL_L4xx INTERFACE ${CMAKE_CURRENT_LIST_DIR}/CMSIS_5_Integration/system_stm32l4xx.c) # Add other STM32 series as needed by including and linking them similarly to above # Note that system files are different than other files, they are added seperately to prevent version conflicts From b0897f4834fa84511d0d4ddb907e09b5fd435987 Mon Sep 17 00:00:00 2001 From: github-actions <41898282+github-actions[bot]@users.noreply.github.com> Date: Thu, 19 Feb 2026 10:59:40 +0000 Subject: [PATCH 4/6] Automatic CMake Format: Standardized formatting automatically --- .../STM32_HAL_LL/Common/stm32common.cmake | 6 ++++-- Lib/Vendor/STM32_HAL_LL/cube.cmake | 18 +++++++++++++++--- 2 files changed, 19 insertions(+), 5 deletions(-) diff --git a/Lib/Vendor/STM32_HAL_LL/Common/stm32common.cmake b/Lib/Vendor/STM32_HAL_LL/Common/stm32common.cmake index aecc5794f..e64c8dec1 100644 --- a/Lib/Vendor/STM32_HAL_LL/Common/stm32common.cmake +++ b/Lib/Vendor/STM32_HAL_LL/Common/stm32common.cmake @@ -1,11 +1,13 @@ add_library(STM32_Cube_Common INTERFACE) -target_include_directories(STM32_Cube_Common +target_include_directories( + STM32_Cube_Common INTERFACE ${CMAKE_CURRENT_LIST_DIR}/Inc ) -target_sources(STM32_Cube_Common +target_sources( + STM32_Cube_Common INTERFACE ${CMAKE_CURRENT_LIST_DIR}/Src/syscalls.c ${CMAKE_CURRENT_LIST_DIR}/Src/sysmem.c diff --git a/Lib/Vendor/STM32_HAL_LL/cube.cmake b/Lib/Vendor/STM32_HAL_LL/cube.cmake index 5876ca17d..a656fa383 100644 --- a/Lib/Vendor/STM32_HAL_LL/cube.cmake +++ b/Lib/Vendor/STM32_HAL_LL/cube.cmake @@ -2,15 +2,27 @@ include("${CMAKE_CURRENT_LIST_DIR}/Common/stm32common.cmake") include("${CMAKE_CURRENT_LIST_DIR}/STM32G4xx/stm32g4xx.cmake") target_link_libraries(STM32_HAL_LL_G4xx INTERFACE STM32_Cube_Common) -target_sources(STM32_HAL_LL_G4xx INTERFACE ${CMAKE_CURRENT_LIST_DIR}/CMSIS_5_Integration/system_stm32g4xx.c) +target_sources( + STM32_HAL_LL_G4xx + INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/CMSIS_5_Integration/system_stm32g4xx.c +) include("${CMAKE_CURRENT_LIST_DIR}/STM32U5xx/stm32u5xx.cmake") target_link_libraries(STM32_HAL_LL_U5xx INTERFACE STM32_Cube_Common) -target_sources(STM32_HAL_LL_U5xx INTERFACE ${CMAKE_CURRENT_LIST_DIR}/CMSIS_5_Integration/system_stm32u5xx.c) +target_sources( + STM32_HAL_LL_U5xx + INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/CMSIS_5_Integration/system_stm32u5xx.c +) include("${CMAKE_CURRENT_LIST_DIR}/STM32L4xx/stm32l4xx.cmake") target_link_libraries(STM32_HAL_LL_L4xx INTERFACE STM32_Cube_Common) -target_sources(STM32_HAL_LL_L4xx INTERFACE ${CMAKE_CURRENT_LIST_DIR}/CMSIS_5_Integration/system_stm32l4xx.c) +target_sources( + STM32_HAL_LL_L4xx + INTERFACE + ${CMAKE_CURRENT_LIST_DIR}/CMSIS_5_Integration/system_stm32l4xx.c +) # Add other STM32 series as needed by including and linking them similarly to above # Note that system files are different than other files, they are added seperately to prevent version conflicts From b8d158caf2fd9cdc8b06248315560eca93bd62ff Mon Sep 17 00:00:00 2001 From: Daniel Hansen Date: Thu, 19 Feb 2026 03:14:36 -0800 Subject: [PATCH 5/6] Migrate to the platform file with those non-library system level things I mean they are basically startup files in a way with how low to CMSIS they start Signed-off-by: Daniel Hansen --- Lib/Platform/PlatformTemplate/chip.cmake | 1 + Lib/Platform/STM32G474xE/chip.cmake | 1 + .../STM32G474xE}/system_stm32g4xx.c | 0 Lib/Platform/STM32L476xG/chip.cmake | 1 + .../STM32L476xG}/system_stm32l4xx.c | 0 Lib/Platform/STM32U5A9xJ/chip.cmake | 1 + .../STM32U5A9xJ}/system_stm32u5xx.c | 0 Lib/Vendor/STM32_HAL_LL/cube.cmake | 16 ---------------- 8 files changed, 4 insertions(+), 16 deletions(-) rename Lib/{Vendor/STM32_HAL_LL/CMSIS_5_Integration => Platform/STM32G474xE}/system_stm32g4xx.c (100%) rename Lib/{Vendor/STM32_HAL_LL/CMSIS_5_Integration => Platform/STM32L476xG}/system_stm32l4xx.c (100%) rename Lib/{Vendor/STM32_HAL_LL/CMSIS_5_Integration => Platform/STM32U5A9xJ}/system_stm32u5xx.c (100%) diff --git a/Lib/Platform/PlatformTemplate/chip.cmake b/Lib/Platform/PlatformTemplate/chip.cmake index 8c57a1789..67ddc379b 100644 --- a/Lib/Platform/PlatformTemplate/chip.cmake +++ b/Lib/Platform/PlatformTemplate/chip.cmake @@ -33,6 +33,7 @@ function(add_executable_${CHIP} TARGET_NAME) ${TARGET_NAME} PRIVATE "${CMAKE_CURRENT_FUNCTION_LIST_DIR}/STARTUP_ASSEMBLY_SCRIPT.s" # FIXME Replace with real startup assembly script + "${CMAKE_CURRENT_FUNCTION_LIST_DIR}/SYSTEM_C_FILE.c" # FIXME Replace with real system C file ) target_link_libraries( diff --git a/Lib/Platform/STM32G474xE/chip.cmake b/Lib/Platform/STM32G474xE/chip.cmake index f81b80b97..c1a8f4eb2 100644 --- a/Lib/Platform/STM32G474xE/chip.cmake +++ b/Lib/Platform/STM32G474xE/chip.cmake @@ -28,6 +28,7 @@ function(add_executable_${CHIP} TARGET_NAME) ${TARGET_NAME} PRIVATE "${CMAKE_CURRENT_FUNCTION_LIST_DIR}/startup_stm32g474xx.s" + "${CMAKE_CURRENT_FUNCTION_LIST_DIR}/system_stm32g4xx.c" ) target_link_options( diff --git a/Lib/Vendor/STM32_HAL_LL/CMSIS_5_Integration/system_stm32g4xx.c b/Lib/Platform/STM32G474xE/system_stm32g4xx.c similarity index 100% rename from Lib/Vendor/STM32_HAL_LL/CMSIS_5_Integration/system_stm32g4xx.c rename to Lib/Platform/STM32G474xE/system_stm32g4xx.c diff --git a/Lib/Platform/STM32L476xG/chip.cmake b/Lib/Platform/STM32L476xG/chip.cmake index d9d9b027d..dc3e08cf6 100644 --- a/Lib/Platform/STM32L476xG/chip.cmake +++ b/Lib/Platform/STM32L476xG/chip.cmake @@ -28,6 +28,7 @@ function(add_executable_${CHIP} TARGET_NAME) ${TARGET_NAME} PRIVATE "${CMAKE_CURRENT_FUNCTION_LIST_DIR}/startup_stm32l476xx.s" + "${CMAKE_CURRENT_FUNCTION_LIST_DIR}/system_stm32l4xx.c" ) target_link_options( diff --git a/Lib/Vendor/STM32_HAL_LL/CMSIS_5_Integration/system_stm32l4xx.c b/Lib/Platform/STM32L476xG/system_stm32l4xx.c similarity index 100% rename from Lib/Vendor/STM32_HAL_LL/CMSIS_5_Integration/system_stm32l4xx.c rename to Lib/Platform/STM32L476xG/system_stm32l4xx.c diff --git a/Lib/Platform/STM32U5A9xJ/chip.cmake b/Lib/Platform/STM32U5A9xJ/chip.cmake index 0a4509f43..7302ac494 100644 --- a/Lib/Platform/STM32U5A9xJ/chip.cmake +++ b/Lib/Platform/STM32U5A9xJ/chip.cmake @@ -33,6 +33,7 @@ function(add_executable_${CHIP} TARGET_NAME) ${TARGET_NAME} PRIVATE "${CMAKE_CURRENT_FUNCTION_LIST_DIR}/startup_stm32u5a9xx.s" + "${CMAKE_CURRENT_FUNCTION_LIST_DIR}/system_stm32u5xx.c" ) target_link_options( diff --git a/Lib/Vendor/STM32_HAL_LL/CMSIS_5_Integration/system_stm32u5xx.c b/Lib/Platform/STM32U5A9xJ/system_stm32u5xx.c similarity index 100% rename from Lib/Vendor/STM32_HAL_LL/CMSIS_5_Integration/system_stm32u5xx.c rename to Lib/Platform/STM32U5A9xJ/system_stm32u5xx.c diff --git a/Lib/Vendor/STM32_HAL_LL/cube.cmake b/Lib/Vendor/STM32_HAL_LL/cube.cmake index a656fa383..64743a997 100644 --- a/Lib/Vendor/STM32_HAL_LL/cube.cmake +++ b/Lib/Vendor/STM32_HAL_LL/cube.cmake @@ -2,27 +2,11 @@ include("${CMAKE_CURRENT_LIST_DIR}/Common/stm32common.cmake") include("${CMAKE_CURRENT_LIST_DIR}/STM32G4xx/stm32g4xx.cmake") target_link_libraries(STM32_HAL_LL_G4xx INTERFACE STM32_Cube_Common) -target_sources( - STM32_HAL_LL_G4xx - INTERFACE - ${CMAKE_CURRENT_LIST_DIR}/CMSIS_5_Integration/system_stm32g4xx.c -) include("${CMAKE_CURRENT_LIST_DIR}/STM32U5xx/stm32u5xx.cmake") target_link_libraries(STM32_HAL_LL_U5xx INTERFACE STM32_Cube_Common) -target_sources( - STM32_HAL_LL_U5xx - INTERFACE - ${CMAKE_CURRENT_LIST_DIR}/CMSIS_5_Integration/system_stm32u5xx.c -) include("${CMAKE_CURRENT_LIST_DIR}/STM32L4xx/stm32l4xx.cmake") target_link_libraries(STM32_HAL_LL_L4xx INTERFACE STM32_Cube_Common) -target_sources( - STM32_HAL_LL_L4xx - INTERFACE - ${CMAKE_CURRENT_LIST_DIR}/CMSIS_5_Integration/system_stm32l4xx.c -) # Add other STM32 series as needed by including and linking them similarly to above -# Note that system files are different than other files, they are added seperately to prevent version conflicts From 82176fb1c6ee05a4b4ef297702ceeb5c825a8d84 Mon Sep 17 00:00:00 2001 From: "vihanjay@gmail.com" <55373538+VihanJ@users.noreply.github.com> Date: Fri, 20 Feb 2026 00:37:05 -0800 Subject: [PATCH 6/6] L4BLINKY works on a NUCLEOL476RG --- BLINKY/L4BLINKY/Core/Src/main.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/BLINKY/L4BLINKY/Core/Src/main.c b/BLINKY/L4BLINKY/Core/Src/main.c index 599a583cb..6364459f1 100644 --- a/BLINKY/L4BLINKY/Core/Src/main.c +++ b/BLINKY/L4BLINKY/Core/Src/main.c @@ -102,13 +102,17 @@ int main(void) /* USER CODE BEGIN 3 */ // 1. Use HAL_GPIO_WritePin(port, pin, set/reset) to set PA5 as + HAL_GPIO_WritePin(GPIOA, GPIO_PIN_5, GPIO_PIN_SET); // high + HAL_Delay(1000); // 2. Use HAL_Delay() to wait for 1000 ms + HAL_GPIO_WritePin(GPIOA, GPIO_PIN_5, GPIO_PIN_RESET); // 3. Use the HAL to write PA5 as low // 4. Use HAL delay to wait for 1000 ms + HAL_Delay(1000); } /* USER CODE END 3 */ }